From patchwork Tue May 15 16:22:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913816 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="WWqNbXJL"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40ljbZ5jwjz9s01 for ; Wed, 16 May 2018 02:25:30 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753432AbeEOQWf (ORCPT ); Tue, 15 May 2018 12:22:35 -0400 Received: from mail-yb0-f193.google.com ([209.85.213.193]:33988 "EHLO mail-yb0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753169AbeEOQWd (ORCPT ); Tue, 15 May 2018 12:22:33 -0400 Received: by mail-yb0-f193.google.com with SMTP id i1-v6so260214ybe.1; Tue, 15 May 2018 09:22:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zXWx52J09B2XRIIWL2fJqPQYDuMBxPhU30oY293qaME=; b=WWqNbXJLI9rq4GUn54LE/T+RMmUb5qKQ8QKBWfyrS/jgA9BpNwU3jxvv9pGwFHjEuv rwsWwUWFPpVD0/cVETOfz0S/AYB4siQVHr/0HbihrR407NUqigc3ONZIKaIzpTLDpF+8 u/V36P3Y25zwe2XHyvmLbDDLfWkNUd/oYEzbU/ifQD6p/8fLJ96qQ4jcrx3TKwxNoBLe LZcD9QKCZ0yc4Fc6BoipKhUvQ1ApuleJcJxVhFRso4d6kaYcuxGxPmY51/4/qAPMu4dO 7cNpSIzWu/OmhGC8jN95MjoNU9tfJ0PxEqU/mbQ1uokaXj2OnxlBBDMxuARvyJlGTB3s pmiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zXWx52J09B2XRIIWL2fJqPQYDuMBxPhU30oY293qaME=; b=qV7AbcU9FTr1IbJ7KngCZ67MTKycdDpm5HodBmgMm0/7vgWywkbbC0aLQKULC+va0b mJiJjKEH1n1oeDTlkRnNGEZafHxFlnchvix+BiD5ahc9BpDvUuMWhkyfEIo02b1Zx0am ARbAv77TIexp0b8jaS9AP/T2F510dGDGH/xzglWCAPUc2gBQ55A7GVf73GvwTup1Lm89 lI9+KeL4+83xmKbzbsjvUy2jlHv6i2EXq49SoBWygqs301MyJ/CyVXzmctNAapXI1rSJ 5oknVpsIO98CNjz+7+NlW48gT+nNXhDT8fS0lSVseYGPr6V86VaZmHKc4MzD7pr+2x9e 1h0A== X-Gm-Message-State: ALKqPwcJtSxKVcydersloRDU+5Q8l1oq4Gtem3TAdd5nxCfA0Y3q/8Y8 31jLNl4olPL9Nj31yYkdheI= X-Google-Smtp-Source: AB8JxZrDxMqEaurRHShiLPHJ3mbH8/o18rHwaWpq0shnDyKzrcER43JKbjppA60vfn9dfsmD1Tkr2w== X-Received: by 2002:a25:51c9:: with SMTP id f192-v6mr8828470ybb.288.1526401352353; Tue, 15 May 2018 09:22:32 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id r81-v6sm156289ywb.13.2018.05.15.09.22.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 09:22:31 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray , Arnd Bergmann Subject: [PATCH v4 1/8] bitops: Introduce the for_each_set_clump macro Date: Tue, 15 May 2018 12:22:26 -0400 Message-Id: <87c7edee3bd6789345bd1cc6fd0cb91c2d508eda.1526400945.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This macro iterates for each group of bits (clump) with set bits, within a bitmap memory region. For each iteration, "clump" is set to the found clump index, "index" is set to the word index of the bitmap containing the found clump, and "offset" is set to the bit offset of the found clump within the respective bitmap word. Suggested-by: Andy Shevchenko Cc: Arnd Bergmann Signed-off-by: William Breathitt Gray --- include/asm-generic/bitops/find.h | 9 +++++++ include/linux/bitops.h | 7 ++++++ lib/find_bit.c | 40 +++++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+) diff --git a/include/asm-generic/bitops/find.h b/include/asm-generic/bitops/find.h index 8a1ee10014de..3d3b2fc34908 100644 --- a/include/asm-generic/bitops/find.h +++ b/include/asm-generic/bitops/find.h @@ -2,6 +2,8 @@ #ifndef _ASM_GENERIC_BITOPS_FIND_H_ #define _ASM_GENERIC_BITOPS_FIND_H_ +#include + #ifndef find_next_bit /** * find_next_bit - find the next set bit in a memory region @@ -80,4 +82,11 @@ extern unsigned long find_first_zero_bit(const unsigned long *addr, #endif /* CONFIG_GENERIC_FIND_FIRST_BIT */ +size_t find_next_clump(size_t *const index, unsigned int *const offset, + const unsigned long *const bits, const size_t size, + const size_t clump_index, const unsigned int clump_size); + +#define find_first_clump(index, offset, bits, size, clump_size) \ + find_next_clump((index), (offset), (bits), (size), 0, (clump_size)) + #endif /*_ASM_GENERIC_BITOPS_FIND_H_ */ diff --git a/include/linux/bitops.h b/include/linux/bitops.h index 4cac4e1a72ff..cfaff6a14406 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -59,6 +59,13 @@ extern unsigned long __sw_hweight64(__u64 w); (bit) < (size); \ (bit) = find_next_zero_bit((addr), (size), (bit) + 1)) +#define for_each_set_clump(clump, index, offset, bits, size, clump_size) \ + for ((clump) = find_first_clump(&(index), &(offset), (bits), (size), \ + (clump_size)); \ + (clump) < (size); \ + (clump) = find_next_clump(&(index), &(offset), (bits), (size), \ + (clump) + 1, (clump_size))) + static inline int get_bitmask_order(unsigned int count) { int order; diff --git a/lib/find_bit.c b/lib/find_bit.c index ee3df93ba69a..1d547fe9304f 100644 --- a/lib/find_bit.c +++ b/lib/find_bit.c @@ -218,3 +218,43 @@ EXPORT_SYMBOL(find_next_bit_le); #endif #endif /* __BIG_ENDIAN */ + +/** + * find_next_clump - find next clump with set bits in a memory region + * @index: location to store bitmap word index of found clump + * @offset: bits offset of the found clump within the respective bitmap word + * @bits: address to base the search on + * @size: bitmap size in number of clumps + * @clump_index: clump index at which to start searching + * @clump_size: clump size in bits + * + * Returns the clump index for the next clump with set bits; the respective + * bitmap word index is stored at the location pointed by @index, and the bits + * offset of the found clump within the respective bitmap word is stored at the + * location pointed by @offset. If no bits are set, returns @size. + */ +size_t find_next_clump(size_t *const index, unsigned int *const offset, + const unsigned long *const bits, const size_t size, + const size_t clump_index, const unsigned int clump_size) +{ + size_t i; + unsigned int bits_offset; + unsigned long word_mask; + const unsigned long clump_mask = GENMASK(clump_size - 1, 0); + + for (i = clump_index; i < size; i++) { + bits_offset = i * clump_size; + + *index = BIT_WORD(bits_offset); + *offset = bits_offset % BITS_PER_LONG; + + word_mask = bits[*index] & (clump_mask << *offset); + if (!word_mask) + continue; + + return i; + } + + return size; +} +EXPORT_SYMBOL(find_next_clump); From patchwork Tue May 15 16:22:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913808 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="JHgjMudT"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40ljXQ39zJz9s01 for ; Wed, 16 May 2018 02:22:46 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754077AbeEOQWp (ORCPT ); Tue, 15 May 2018 12:22:45 -0400 Received: from mail-yb0-f194.google.com ([209.85.213.194]:40552 "EHLO mail-yb0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754075AbeEOQWn (ORCPT ); Tue, 15 May 2018 12:22:43 -0400 Received: by mail-yb0-f194.google.com with SMTP id o80-v6so254646ybc.7; Tue, 15 May 2018 09:22:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=D9uVVPu6I2zJJL9NaoPcbEwomEyazs1KuK61/fOHRF8=; b=JHgjMudTerAdNjG/n1x797+YUVG8cR2AAGePX951xRa3NbYvGgc2jM3iIAlcWfRRwR Dg7pO2ldICeWBe7McD8F95g4ntvW3wqYfYurhXIeE5IiGbJRB+ReSEPcLhMq/w0OU8z9 jgK/5cwwQLiAscLHghgF7l9pEZCYlYUGmM/tY/oqmW+BKGK3YHlSGRr0DSQyBGPO1lW9 nnVeki1errLjSWDSXtqck5bE/eZ5OTh8z42nBOgrW8iaKApGEP/J67niFkqplw3fFxn0 V8MncfofhPS8GRyZDhlHt0pOuy8/SHZSUSkWYkwH/MngK3JQnaYh3l7LDxN+9bpB3wDM QGUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=D9uVVPu6I2zJJL9NaoPcbEwomEyazs1KuK61/fOHRF8=; b=tmu3SCSJ7WAAgsgOr+wj1YTpy9Lff8JxsDfuAsEfulxsj1b3swyZ+umBgnl0OftcN1 mVm6Z1QX61Zh7eVebf7qYwxPxfYENxRLHmDDvbOSKl6A5uBJhK10Kiy5Obuwt53tRc+z tZgC3WQnj98/EWGFkYwX7gNkTovfEpLfzHIR8akouvWRAq4zxqBmFbHyQyUWGMFp1SWE WcGO8EA3wW2yyOWwz5igx1fwHcVAAe7pV7GYxcvMUi+B0LVGJLhSzp23pvWrHbgawoKi A27TaxBl3jbiW1jUNyGnufMUTFjR3SVnklZctwgggmdzxylzUnTMmFJNYKiTWxvvNaJF bRSg== X-Gm-Message-State: ALKqPwdGGYrVUBO2qwSfJEHemGB8PQzHE1l8mFMjG4XglD7ZC5AfW1eK hpeZ7AXV0PSXn4tj4bn/ipk= X-Google-Smtp-Source: AB8JxZpMgE/4LBe7V0kVGA5G3XghehXyznIepaFc5pXFz5XgowzJsAyTTH0Pr96qD8QgkGLNH/cjcQ== X-Received: by 2002:a25:ae5e:: with SMTP id g30-v6mr8967334ybe.399.1526401362835; Tue, 15 May 2018 09:22:42 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id t79-v6sm171612ywg.109.2018.05.15.09.22.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 09:22:42 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray , Andy Shevchenko Subject: [PATCH v4 2/8] lib/test_bitmap.c: Add for_each_set_clump test cases Date: Tue, 15 May 2018 12:22:36 -0400 Message-Id: X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The introduction of the for_each_set_clump macro warrants test cases to verify the implementation. This patch adds test case checks for whether an out-of-bounds clump index is returned, a zero clump is returned, or the returned clump value differs from the expected clump value. A 4-bit clump size is chosen in order to verify non-8-bit iteration. Cc: Andy Shevchenko Signed-off-by: William Breathitt Gray --- lib/test_bitmap.c | 71 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/lib/test_bitmap.c b/lib/test_bitmap.c index de16f7869fb1..fd1b9f0d5eda 100644 --- a/lib/test_bitmap.c +++ b/lib/test_bitmap.c @@ -88,6 +88,39 @@ __check_eq_u32_array(const char *srcfile, unsigned int line, return true; } +static bool __init __check_eq_clump(const char *srcfile, unsigned int line, + const size_t clump_index, const size_t size, + const unsigned char *const clump_exp, + const unsigned long *const bits, + const size_t index, + const unsigned int offset) +{ + unsigned long clump; + unsigned long exp; + + if (clump_index >= size) { + pr_warn("[%s:%u] clump index out-of-bounds: expected less than %zu, got %zu\n", + srcfile, line, size, clump_index); + return false; + } + + exp = clump_exp[clump_index]; + if (!exp) { + pr_warn("[%s:%u] clump index for zero clump: expected nonzero clump, got clump index %zu with clump value 0", + srcfile, line, clump_index); + return false; + } + + clump = (bits[index] >> offset) & 0xF; + if (clump != exp) { + pr_warn("[%s:%u] expected 0x%lX, got 0x%lX", + srcfile, line, exp, clump); + return false; + } + + return true; +} + #define __expect_eq(suffix, ...) \ ({ \ int result = 0; \ @@ -104,6 +137,7 @@ __check_eq_u32_array(const char *srcfile, unsigned int line, #define expect_eq_bitmap(...) __expect_eq(bitmap, ##__VA_ARGS__) #define expect_eq_pbl(...) __expect_eq(pbl, ##__VA_ARGS__) #define expect_eq_u32_array(...) __expect_eq(u32_array, ##__VA_ARGS__) +#define expect_eq_clump(...) __expect_eq(clump, ##__VA_ARGS__) static void __init test_zero_clear(void) { @@ -352,6 +386,42 @@ static void noinline __init test_mem_optimisations(void) } } +static const unsigned char clump_exp[] __initconst = { + 0x1, /* 1 bit set */ + 0x2, /* non-edge 1 bit set */ + 0x0, /* zero bits set */ + 0xE, /* 3 bits set */ + 0xE, /* Repeated clump */ + 0xF, /* 4 bits set */ + 0x3, /* 2 bits set */ + 0x5, /* non-adjacent 2 bits set */ +}; + +static void __init test_for_each_set_clump(void) +{ + size_t clump; + size_t index; + unsigned int offset; +#define CLUMP_BITMAP_NUMBITS 32 + DECLARE_BITMAP(bits, CLUMP_BITMAP_NUMBITS); +#define CLUMP_SIZE 4 + const size_t size = DIV_ROUND_UP(CLUMP_BITMAP_NUMBITS, CLUMP_SIZE); + + /* set bitmap to test case */ + bitmap_zero(bits, CLUMP_BITMAP_NUMBITS); + bitmap_set(bits, 0, 1); /* 0x1 */ + bitmap_set(bits, 5, 1); /* 0x2 */ + bitmap_set(bits, 13, 3); /* 0xE */ + bitmap_set(bits, 17, 3); /* 0xE */ + bitmap_set(bits, 20, 4); /* 0xF */ + bitmap_set(bits, 24, 2); /* 0x3 */ + bitmap_set(bits, 28, 1); /* 0x5 - part 1 */ + bitmap_set(bits, 30, 1); /* 0x5 - part 2 */ + + for_each_set_clump(clump, index, offset, bits, size, CLUMP_SIZE) + expect_eq_clump(clump, size, clump_exp, bits, index, offset); +} + static int __init test_bitmap_init(void) { test_zero_clear(); @@ -360,6 +430,7 @@ static int __init test_bitmap_init(void) test_bitmap_arr32(); test_bitmap_parselist(); test_mem_optimisations(); + test_for_each_set_clump(); if (failed_tests == 0) pr_info("all %u tests passed\n", total_tests); From patchwork Tue May 15 16:22:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913815 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="bdJUFf6Q"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40ljb26qLQz9s01 for ; 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Tue, 15 May 2018 09:22:53 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v4 3/8] gpio: 104-dio-48e: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 12:22:48 -0400 Message-Id: <3c9de7a04c7b02555067d17d55956bdb0365ae50.1526400945.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-104-dio-48e.c | 67 ++++++++------------------------- 1 file changed, 16 insertions(+), 51 deletions(-) diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c index 9c4e07fcb74b..77eeaa36094c 100644 --- a/drivers/gpio/gpio-104-dio-48e.c +++ b/drivers/gpio/gpio-104-dio-48e.c @@ -183,46 +183,23 @@ static int dio48e_gpio_get(struct gpio_chip *chip, unsigned offset) return !!(port_state & mask); } +static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + static int dio48e_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip); size_t i; - static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + size_t word; + unsigned int offset; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { port_state = inb(dio48egpio->base + ports[i]); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; @@ -252,37 +229,25 @@ static void dio48e_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int out_port; + size_t i; + size_t word; + unsigned int offset; + unsigned int iomask; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } - - port = i / gpio_reg_size; - out_port = (port > 2) ? port + 1 : port; - bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)]; + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { + iomask = mask[word] >> offset; + bitmask = iomask & (bits[word] >> offset); raw_spin_lock_irqsave(&dio48egpio->lock, flags); /* update output state data and set device gpio register */ - dio48egpio->out_state[port] &= ~mask[BIT_WORD(i)]; - dio48egpio->out_state[port] |= bitmask; - outb(dio48egpio->out_state[port], dio48egpio->base + out_port); + dio48egpio->out_state[i] &= ~iomask; + dio48egpio->out_state[i] |= bitmask; + outb(dio48egpio->out_state[i], dio48egpio->base + ports[i]); raw_spin_unlock_irqrestore(&dio48egpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } From patchwork Tue May 15 16:22:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913809 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="NQMGzK9d"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40ljXs2XgCz9s1w for ; Wed, 16 May 2018 02:23:09 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754140AbeEOQXH (ORCPT ); Tue, 15 May 2018 12:23:07 -0400 Received: from mail-yw0-f194.google.com ([209.85.161.194]:35029 "EHLO mail-yw0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752750AbeEOQXF (ORCPT ); Tue, 15 May 2018 12:23:05 -0400 Received: by mail-yw0-f194.google.com with SMTP id m8-v6so245175ywd.2; Tue, 15 May 2018 09:23:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2U7Ozw2SgAQBqAZnsfCoNU2PQB0sCh7oHKc5SOqZD3A=; b=NQMGzK9dHqaZwtP9jFu5a/W8u9WU0lpMbC+8FtMHw+9N84IeE4+qKcQAZHX6lGEg66 de7Ga2dUtJmPnmgu5duHWmX3P3mb/gCVVKuVI82XLna/5qFll5rjVpzjKYA7CFpSKkp4 lEJVQIQE7GWujOjIFCZrGIH1AOQzH7P3yNoTQnxdy3NmEhezK/zOVrpx2lixux4guVeU OkxaW2EfEhq5oxjO+hhI9SJD6GUyAHMFe2SMCyJeChtxqYqQ10Se+UmIYiGxF4bCM0Ts C1+UpDhR5bNN3kd6Xvh5ggo4ZgJBxdnyl2UjPjNNZzgfZ4Pjo7e7Zs2ltpkU1NC6ASje qRkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2U7Ozw2SgAQBqAZnsfCoNU2PQB0sCh7oHKc5SOqZD3A=; b=rSz/B5eodum0VJVd4riidrfQwzzqT/4sJJImtLB4hJIR90uyXfmJSd14mXlHRdLcJ/ SNBfDhJPjh6uXBqOk3/E7TeMfyEd2kEhPtUbMUheGVDnm84b4yVgp4/DMudQYTw6Pn09 EUd6Qi8yBO2h94+Ta/3OkciUmfmfQIpVa+1hLAxIWeLpFr8PlqpPu3vi4DqBEbyXEzpb bkh+8xhl5iY9FJ8aA4dHeQifLvnNmQUBuHnAGYd6xubfQDQNTSegHraN952uLSfh9tv4 O2Xc4sAKnjMkO666OnwI2LjhCrtnlLKtd89lGJ1zY8f8N+FjJmn5uPPHMvOzAsIlL45F iV8Q== X-Gm-Message-State: ALKqPwciNkikKkNZoM01XB04Nf2JUrajwxcwX32E0IHiZNwlf8FfsAzB DQ40sXABdJTcZ7oACXjPJpiZiQ== X-Google-Smtp-Source: AB8JxZqTTvPBgCQjOWGDQ5DjEVUKcQJ1EG2Uu49bemPgoOE35R5U34s/t2sB5v5ChXfqMiPdg+bq8A== X-Received: by 2002:a81:37ce:: with SMTP id e197-v6mr6933867ywa.340.1526401384905; Tue, 15 May 2018 09:23:04 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id 205-v6sm136882ywv.79.2018.05.15.09.23.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 09:23:04 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v4 4/8] gpio: 104-idi-48: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 12:22:59 -0400 Message-Id: <2dd756692d0fdd20be629ea341a0e563c079f374.1526400945.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-104-idi-48.c | 32 ++++---------------------------- 1 file changed, 4 insertions(+), 28 deletions(-) diff --git a/drivers/gpio/gpio-104-idi-48.c b/drivers/gpio/gpio-104-idi-48.c index 2c9738adb3a6..f8de5560174f 100644 --- a/drivers/gpio/gpio-104-idi-48.c +++ b/drivers/gpio/gpio-104-idi-48.c @@ -94,41 +94,17 @@ static int idi_48_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, { struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip); size_t i; + size_t word; + unsigned int offset; static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { port_state = inb(idi48gpio->base + ports[i]); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; From patchwork Tue May 15 16:23:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913814 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Tue, 15 May 2018 09:23:23 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id x9-v6sm132594ywl.108.2018.05.15.09.23.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 09:23:22 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v4 5/8] gpio: gpio-mm: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 12:23:17 -0400 Message-Id: <524f6b5cb6a340522a563ee7e3e89313aafe1486.1526400945.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-gpio-mm.c | 67 +++++++++---------------------------- 1 file changed, 16 insertions(+), 51 deletions(-) diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c index b56ff2efbf36..72668da8bf8d 100644 --- a/drivers/gpio/gpio-gpio-mm.c +++ b/drivers/gpio/gpio-gpio-mm.c @@ -172,46 +172,23 @@ static int gpiomm_gpio_get(struct gpio_chip *chip, unsigned int offset) return !!(port_state & mask); } +static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); size_t i; - static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + size_t word; + unsigned int offset; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { port_state = inb(gpiommgpio->base + ports[i]); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; @@ -242,37 +219,25 @@ static void gpiomm_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int out_port; + size_t i; + size_t word; + unsigned int offset; + unsigned int iomask; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } - - port = i / gpio_reg_size; - out_port = (port > 2) ? port + 1 : port; - bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)]; + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { + iomask = mask[word] >> offset; + bitmask = iomask & (bits[word] >> offset); spin_lock_irqsave(&gpiommgpio->lock, flags); /* update output state data and set device gpio register */ - gpiommgpio->out_state[port] &= ~mask[BIT_WORD(i)]; - gpiommgpio->out_state[port] |= bitmask; - outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port); + gpiommgpio->out_state[i] &= ~iomask; + gpiommgpio->out_state[i] |= bitmask; + outb(gpiommgpio->out_state[i], gpiommgpio->base + ports[i]); spin_unlock_irqrestore(&gpiommgpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } From patchwork Tue May 15 16:23:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913812 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="k0y5+BtU"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40ljZF01myz9s01 for ; Wed, 16 May 2018 02:24:20 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753130AbeEOQXi (ORCPT ); Tue, 15 May 2018 12:23:38 -0400 Received: from mail-yb0-f196.google.com ([209.85.213.196]:33143 "EHLO mail-yb0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753984AbeEOQXe (ORCPT ); Tue, 15 May 2018 12:23:34 -0400 Received: by mail-yb0-f196.google.com with SMTP id y5-v6so261145ybg.0; Tue, 15 May 2018 09:23:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tAo7rXu+mux3L7ze8r9gzOGceOAVFwQmVWVRQkyRRgw=; b=k0y5+BtUBd4IyC+OUFlBlHbTEJAMXU9t1JrQSkv2jLV2/zinkC6BDhiJGy4JIleaYx /Gg89LUcM93QDX1Z9Uo19fdl7QIiBIaiihLXX3vF7CIsIWXz+PnEnb6JmFGEwhPK5PlL d82AFbvJ1IQ4SfmfeDcs2hVK1EqptOEDemTZt49h7+a9ejbg9kVAWH9A6DUN1VVXWnNu 3/vTqQgZBFksmlwpMmztCPk1oka/hdusqDwGBWz91OMP5fM+pAeBaoR1DLpGibaW3+9V DL3lA3RUPL871i8/EDYZR2wHBNq7RYofOh7JkQz2ljs78O8S6nz8/V5txW1Vz7/qebvZ 5dWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tAo7rXu+mux3L7ze8r9gzOGceOAVFwQmVWVRQkyRRgw=; b=GtQFclDzxc8vnXGB9ZiM2L2te0dGwua17JV6OfPMOWNnhTqKqywf4s+PKMCWhCORc9 +K1W17wTl02Mq6DSSuBktdUdRp9bM0iX7PyiFlOKPiiz0uUPDjnN86uB8rMYEmtH8hWS u0infCte6Q1XzvwRC/pGIbwxBo4MmPnd4MxKNWiiaysrHTLjUxpvwjEGPK6c30PZ8of5 e4NKDu8D+1dW0/RIvlXnl+ZOz27XCWOLGvekv8D6hMPIh4Dw99FU2sCuXTvnKaSc2IEA vCzvrWzsQKdLNVPAcrrzcjKOS99flm8NhflzzH4+Wd08ImrI7PllW7zqRGfcPZ9wgXPb GE1g== X-Gm-Message-State: ALKqPwc8zoiNzpKJqbwZ9wLyDf2Q//rBnOAvILEClJRbk/YJl6fxP33y 7PRSe2SpsmaXYBnyw794Qdk= X-Google-Smtp-Source: AB8JxZoxX7YyuCbRWja+1V8L1LhM/VulAMv20V1tbBOyDJsTuN5r5nG4Qd9EaDWK0/rRfF0rai+J2A== X-Received: by 2002:a25:42c2:: with SMTP id p185-v6mr8991887yba.313.1526401414204; Tue, 15 May 2018 09:23:34 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id t124-v6sm142031ywe.107.2018.05.15.09.23.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 09:23:33 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v4 6/8] gpio: ws16c48: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 12:23:27 -0400 Message-Id: <639ed637c39c77fe6df26f0b55b930751c5864ca.1526400945.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-ws16c48.c | 66 +++++++++---------------------------- 1 file changed, 16 insertions(+), 50 deletions(-) diff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c index c7028eb0b8e1..625336376b5d 100644 --- a/drivers/gpio/gpio-ws16c48.c +++ b/drivers/gpio/gpio-ws16c48.c @@ -134,42 +134,19 @@ static int ws16c48_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned int gpio_reg_size = 8; - size_t i; - const size_t num_ports = chip->ngpio / gpio_reg_size; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + size_t port; + size_t word; + unsigned int offset; + const unsigned int port_size = 8; + const size_t num_ports = chip->ngpio / port_size; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < num_ports; i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ - port_state = inb(ws16c48gpio->base + i); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + for_each_set_clump(port, word, offset, mask, num_ports, port_size) { + port_state = inb(ws16c48gpio->base + port); + bits[word] |= port_state << offset; } return 0; @@ -203,26 +180,19 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; + size_t port; + size_t word; + unsigned int offset; + const unsigned int port_size = 8; + const size_t num_ports = chip->ngpio / port_size; unsigned int iomask; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } - - port = i / gpio_reg_size; - + for_each_set_clump(port, word, offset, mask, num_ports, port_size) { /* mask out GPIO configured for input */ - iomask = mask[BIT_WORD(i)] & ~ws16c48gpio->io_state[port]; - bitmask = iomask & bits[BIT_WORD(i)]; + iomask = (mask[word] >> offset) & ~ws16c48gpio->io_state[port]; + bitmask = iomask & (bits[word] >> offset); raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); @@ -232,10 +202,6 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port); raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } From patchwork Tue May 15 16:23:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913810 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="oMJfnsu/"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40ljYq0qhnz9s0q for ; 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Tue, 15 May 2018 09:23:44 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v4 7/8] gpio: pci-idio-16: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 12:23:39 -0400 Message-Id: X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-pci-idio-16.c | 67 +++++++++++---------------------- 1 file changed, 21 insertions(+), 46 deletions(-) diff --git a/drivers/gpio/gpio-pci-idio-16.c b/drivers/gpio/gpio-pci-idio-16.c index 25d16b2af1c3..6d748c6e59cb 100644 --- a/drivers/gpio/gpio-pci-idio-16.c +++ b/drivers/gpio/gpio-pci-idio-16.c @@ -109,44 +109,20 @@ static int idio_16_gpio_get_multiple(struct gpio_chip *chip, { struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); size_t i; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); - unsigned long port_state; + size_t word; + unsigned int offset; void __iomem *ports[] = { &idio16gpio->reg->out0_7, &idio16gpio->reg->out8_15, &idio16gpio->reg->in0_7, &idio16gpio->reg->in8_15, }; + unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { port_state = ioread8(ports[i]); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; @@ -186,30 +162,29 @@ static void idio_16_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); + size_t i; + size_t word; + unsigned int offset; + void __iomem *ports[] = { + &idio16gpio->reg->out0_7, &idio16gpio->reg->out8_15, + }; + unsigned int iomask; + unsigned int bitmask; unsigned long flags; unsigned int out_state; - raw_spin_lock_irqsave(&idio16gpio->lock, flags); + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { + iomask = mask[word] >> offset; + bitmask = iomask & (bits[word] >> offset); - /* process output lines 0-7 */ - if (*mask & 0xFF) { - out_state = ioread8(&idio16gpio->reg->out0_7) & ~*mask; - out_state |= *mask & *bits; - iowrite8(out_state, &idio16gpio->reg->out0_7); - } + raw_spin_lock_irqsave(&idio16gpio->lock, flags); - /* shift to next output line word */ - *mask >>= 8; + out_state = ioread8(ports[i]) & ~iomask; + out_state |= bitmask; + iowrite8(out_state, ports[i]); - /* process output lines 8-15 */ - if (*mask & 0xFF) { - *bits >>= 8; - out_state = ioread8(&idio16gpio->reg->out8_15) & ~*mask; - out_state |= *mask & *bits; - iowrite8(out_state, &idio16gpio->reg->out8_15); + raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); } - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); } static void idio_16_irq_ack(struct irq_data *data) From patchwork Tue May 15 16:23:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913811 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="hqr5GStQ"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40ljZ55FDGz9s01 for ; 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Tue, 15 May 2018 09:23:56 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v4 8/8] gpio: pcie-idio-24: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 12:23:51 -0400 Message-Id: <7266e618f199840e54624edcefb7f2e6b320b0f7.1526400945.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-pcie-idio-24.c | 102 +++++++++++-------------------- 1 file changed, 36 insertions(+), 66 deletions(-) diff --git a/drivers/gpio/gpio-pcie-idio-24.c b/drivers/gpio/gpio-pcie-idio-24.c index f953541e7890..b4d300338a05 100644 --- a/drivers/gpio/gpio-pcie-idio-24.c +++ b/drivers/gpio/gpio-pcie-idio-24.c @@ -199,41 +199,21 @@ static int idio_24_gpio_get_multiple(struct gpio_chip *chip, { struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); size_t i; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); - unsigned long port_state; + size_t word; + unsigned int offset; void __iomem *ports[] = { &idio24gpio->reg->out0_7, &idio24gpio->reg->out8_15, &idio24gpio->reg->out16_23, &idio24gpio->reg->in0_7, &idio24gpio->reg->in8_15, &idio24gpio->reg->in16_23, }; + const size_t num_ports = ARRAY_SIZE(ports) + 1; + unsigned long port_state; const unsigned long out_mode_mask = BIT(1); /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports) + 1; i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - + for_each_set_clump(i, word, offset, mask, num_ports, 8) { /* read bits from current gpio port (port 6 is TTL GPIO) */ if (i < 6) port_state = ioread8(ports[i]); @@ -243,7 +223,7 @@ static int idio_24_gpio_get_multiple(struct gpio_chip *chip, port_state = ioread8(&idio24gpio->reg->ttl_in0_7); /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; @@ -295,58 +275,48 @@ static void idio_24_gpio_set_multiple(struct gpio_chip *chip, { struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); size_t i; - unsigned long bits_offset; - unsigned long gpio_mask; - const unsigned int gpio_reg_size = 8; - const unsigned long port_mask = GENMASK(gpio_reg_size, 0); - unsigned long flags; - unsigned int out_state; + size_t word; + unsigned int offset; void __iomem *ports[] = { &idio24gpio->reg->out0_7, &idio24gpio->reg->out8_15, &idio24gpio->reg->out16_23 }; + const size_t num_ports = ARRAY_SIZE(ports) + 1; + unsigned int iomask; + unsigned int bitmask; + unsigned long flags; const unsigned long out_mode_mask = BIT(1); - const unsigned int ttl_offset = 48; - const size_t ttl_i = BIT_WORD(ttl_offset); - const unsigned int word_offset = ttl_offset % BITS_PER_LONG; - const unsigned long ttl_mask = (mask[ttl_i] >> word_offset) & port_mask; - const unsigned long ttl_bits = (bits[ttl_i] >> word_offset) & ttl_mask; - - /* set bits are processed a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* check if any set bits for current port */ - gpio_mask = (*mask >> bits_offset) & port_mask; - if (!gpio_mask) { - /* no set bits for this port so move on to next port */ + unsigned int out_state; + + for_each_set_clump(i, word, offset, mask, num_ports, 8) { + iomask = mask[word] >> offset; + bitmask = iomask & (bits[word] >> offset); + + raw_spin_lock_irqsave(&idio24gpio->lock, flags); + + /* read bits from current gpio port (port 6 is TTL GPIO) */ + if (i < 6) { + out_state = ioread8(ports[i]) & ~iomask; + } else if (ioread8(&idio24gpio->reg->ctl) & out_mode_mask) { + out_state = ioread8(&idio24gpio->reg->ttl_out0_7); + } else { + /* skip TTL GPIO if set for input */ + raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); continue; } - raw_spin_lock_irqsave(&idio24gpio->lock, flags); + /* set requested bit states */ + out_state &= ~iomask; + out_state |= bitmask; - /* process output lines */ - out_state = ioread8(ports[i]) & ~gpio_mask; - out_state |= (*bits >> bits_offset) & gpio_mask; - iowrite8(out_state, ports[i]); + /* write bits for current gpio port (port 6 is TTL GPIO) */ + if (i < 6) + iowrite8(out_state, ports[i]); + else + iowrite8(out_state, &idio24gpio->reg->ttl_out0_7); raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); } - - /* check if setting TTL lines and if they are in output mode */ - if (!ttl_mask || !(ioread8(&idio24gpio->reg->ctl) & out_mode_mask)) - return; - - /* handle TTL output */ - raw_spin_lock_irqsave(&idio24gpio->lock, flags); - - /* process output lines */ - out_state = ioread8(&idio24gpio->reg->ttl_out0_7) & ~ttl_mask; - out_state |= ttl_bits; - iowrite8(out_state, &idio24gpio->reg->ttl_out0_7); - - raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); } static void idio_24_irq_ack(struct irq_data *data)