From patchwork Tue May 15 15:50:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913765 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="TQhQSEmr"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40lhpq1qvVz9s0x for ; Wed, 16 May 2018 01:50:11 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752002AbeEOPuJ (ORCPT ); Tue, 15 May 2018 11:50:09 -0400 Received: from mail-yb0-f194.google.com ([209.85.213.194]:33418 "EHLO mail-yb0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751309AbeEOPuI (ORCPT ); Tue, 15 May 2018 11:50:08 -0400 Received: by mail-yb0-f194.google.com with SMTP id y5-v6so223202ybg.0; Tue, 15 May 2018 08:50:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zXWx52J09B2XRIIWL2fJqPQYDuMBxPhU30oY293qaME=; b=TQhQSEmrnKsJWtYrwniZ3cR3gwu/4hCy+Iv3euZ2tyHnx70BJHWHlqt31C8Zddua4I Vl8LaCVQJSOBi0xEdTk3z5Jo2RKQVU+jM1xYuu2JVerpzIM6Lw7UuQ3S1mQqSFO9R58v 529kC5W8Toy7exERriKow7Wee1tugK55mhsJUgZ8d0vxEU2EWZP6Ve+Z1CSsDKrGbPXd 6eZhTJqwVq97RT1sSDwqsLB8+lw4hmKgAoAIZEOGiD3S8hUBrnnVakZ6clrpgxCsa7RN 3zD/bHsx8l2tZyHD2ySb/tWcUQxDP5fEXr6+G/No3qA8NQM3YJrSCPk6+okdsnJKWVVx +TeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zXWx52J09B2XRIIWL2fJqPQYDuMBxPhU30oY293qaME=; b=szPPSRIyR8QiXHlJe/c/wa0AuZ9Gybyadg8iU9XAVPBK3Tof9Q0Mm5oD1oi9APTKeI 7WPiZakY/Lb6VCY3D6TLM8i/nhRNDlYLsiCP/cf8SqodAseJM5T64NZaLwHkdyecyc4q LYuXMQNERX9C604aXxk5i65YYHrHttw2BRVsWzdltKEqFr7wheYh8QljqsIzLVUZM/fO frKiHUu8N4g5AxRIatw5NqYNKcWmbcIYOj2IEM9DhxMqFsR96nB0W9uvc3DjJxY0yKlJ dJnKbvlLvNlVTVC3zmwQ/vCnd4LyZKT52IInhOHZE7YETqz5uqfPdSJQJgNbxKJXZ7iA xksg== X-Gm-Message-State: ALKqPwfHNjo5IysBLRpfcDyZSPTk3wrgyF4XzE5rk24i21I3eiqKPOTS UEZGuD8rfhDi5r9yqsLsnk8= X-Google-Smtp-Source: AB8JxZpxpt5KLHVO56jZl+0/YXriWm1bOYnLNE0o6yXdjbZA8jcBtjMcBIZDjrA+4xpO5lIQwEjULQ== X-Received: by 2002:a25:45:: with SMTP id 66-v6mr9484591yba.434.1526399407749; Tue, 15 May 2018 08:50:07 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id x16-v6sm135130ywj.22.2018.05.15.08.50.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 08:50:07 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray , Arnd Bergmann Subject: [PATCH v3 1/8] bitops: Introduce the for_each_set_clump macro Date: Tue, 15 May 2018 11:50:01 -0400 Message-Id: <87c7edee3bd6789345bd1cc6fd0cb91c2d508eda.1526397764.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This macro iterates for each group of bits (clump) with set bits, within a bitmap memory region. For each iteration, "clump" is set to the found clump index, "index" is set to the word index of the bitmap containing the found clump, and "offset" is set to the bit offset of the found clump within the respective bitmap word. Suggested-by: Andy Shevchenko Cc: Arnd Bergmann Signed-off-by: William Breathitt Gray --- include/asm-generic/bitops/find.h | 9 +++++++ include/linux/bitops.h | 7 ++++++ lib/find_bit.c | 40 +++++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+) diff --git a/include/asm-generic/bitops/find.h b/include/asm-generic/bitops/find.h index 8a1ee10014de..3d3b2fc34908 100644 --- a/include/asm-generic/bitops/find.h +++ b/include/asm-generic/bitops/find.h @@ -2,6 +2,8 @@ #ifndef _ASM_GENERIC_BITOPS_FIND_H_ #define _ASM_GENERIC_BITOPS_FIND_H_ +#include + #ifndef find_next_bit /** * find_next_bit - find the next set bit in a memory region @@ -80,4 +82,11 @@ extern unsigned long find_first_zero_bit(const unsigned long *addr, #endif /* CONFIG_GENERIC_FIND_FIRST_BIT */ +size_t find_next_clump(size_t *const index, unsigned int *const offset, + const unsigned long *const bits, const size_t size, + const size_t clump_index, const unsigned int clump_size); + +#define find_first_clump(index, offset, bits, size, clump_size) \ + find_next_clump((index), (offset), (bits), (size), 0, (clump_size)) + #endif /*_ASM_GENERIC_BITOPS_FIND_H_ */ diff --git a/include/linux/bitops.h b/include/linux/bitops.h index 4cac4e1a72ff..cfaff6a14406 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -59,6 +59,13 @@ extern unsigned long __sw_hweight64(__u64 w); (bit) < (size); \ (bit) = find_next_zero_bit((addr), (size), (bit) + 1)) +#define for_each_set_clump(clump, index, offset, bits, size, clump_size) \ + for ((clump) = find_first_clump(&(index), &(offset), (bits), (size), \ + (clump_size)); \ + (clump) < (size); \ + (clump) = find_next_clump(&(index), &(offset), (bits), (size), \ + (clump) + 1, (clump_size))) + static inline int get_bitmask_order(unsigned int count) { int order; diff --git a/lib/find_bit.c b/lib/find_bit.c index ee3df93ba69a..1d547fe9304f 100644 --- a/lib/find_bit.c +++ b/lib/find_bit.c @@ -218,3 +218,43 @@ EXPORT_SYMBOL(find_next_bit_le); #endif #endif /* __BIG_ENDIAN */ + +/** + * find_next_clump - find next clump with set bits in a memory region + * @index: location to store bitmap word index of found clump + * @offset: bits offset of the found clump within the respective bitmap word + * @bits: address to base the search on + * @size: bitmap size in number of clumps + * @clump_index: clump index at which to start searching + * @clump_size: clump size in bits + * + * Returns the clump index for the next clump with set bits; the respective + * bitmap word index is stored at the location pointed by @index, and the bits + * offset of the found clump within the respective bitmap word is stored at the + * location pointed by @offset. If no bits are set, returns @size. + */ +size_t find_next_clump(size_t *const index, unsigned int *const offset, + const unsigned long *const bits, const size_t size, + const size_t clump_index, const unsigned int clump_size) +{ + size_t i; + unsigned int bits_offset; + unsigned long word_mask; + const unsigned long clump_mask = GENMASK(clump_size - 1, 0); + + for (i = clump_index; i < size; i++) { + bits_offset = i * clump_size; + + *index = BIT_WORD(bits_offset); + *offset = bits_offset % BITS_PER_LONG; + + word_mask = bits[*index] & (clump_mask << *offset); + if (!word_mask) + continue; + + return i; + } + + return size; +} +EXPORT_SYMBOL(find_next_clump); From patchwork Tue May 15 15:50:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913767 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="jdCTXsRJ"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40lhqG5DjSz9s08 for ; Wed, 16 May 2018 01:50:34 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751917AbeEOPuV (ORCPT ); Tue, 15 May 2018 11:50:21 -0400 Received: from mail-yb0-f193.google.com ([209.85.213.193]:37083 "EHLO mail-yb0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751309AbeEOPuT (ORCPT ); Tue, 15 May 2018 11:50:19 -0400 Received: by mail-yb0-f193.google.com with SMTP id i13-v6so217626ybl.4; Tue, 15 May 2018 08:50:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+sr29fQyfWY2HRDh3nP0cRl0Asr8Qz+juv1orUOFG6g=; b=jdCTXsRJBT15Iot8q7a20yUX5KpdOpUs9r66nDgLfl+e9IipRHtagrqXgtD5HZmbQz LemHibajIYoOraWwtk1FHL1bK+XQiOXEDY7nKMCPzWNl9mQqVDF41t7MW4lufo3pYCEr 8CCjcTZeEbXkdMhWpGewL+fCbm0kUz3WaYcArYNf81U8X2pHuqve9yFGh+xHe4XAyvaX whViY2Kt4QY4bcEdhaWiBOwYdwkaBws2Tq34Wm0cPqoMP3UzFd7eB0C/EZ/uvp3OdCW/ EglG0qbE7RCLHhcpmI9t6EfEPvLPhmn3SHLwb7qXZJGtWnhRvadmP/12kWHXYdOJIn0Z sEAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+sr29fQyfWY2HRDh3nP0cRl0Asr8Qz+juv1orUOFG6g=; b=o4MUY51T5FumAgskmUd9HNZTnJw9T4BmoLRtXxEgcYiISfUX6PpTUwGrrxeeP9OXKS 0M3OPpVHhLcJi7tGgDoK6WkZLZmZ7VskaoLZtCQS6aKIb82SYzDPO84lpcJip4IzsRW8 JDGQ+h/DcAbdlx//orrGVsTCIx/B6s7hplPb8azOOXQEU3zU6ersq/hIs1h81UQqitMY ZxnrmKbHmVrwMZuTMmV77ee6f37EOppYkVabsIF6TjXoev/+vMabSvum4OrMOqssw5L8 BbPZW4ie0byO5f39FOGvZscxmdpQ/q8WfZTWAF2sc1y//5q29GMkiYAdjpjsGJ/Ow21f fsQg== X-Gm-Message-State: ALKqPwctBz4ndG7aBmauU4QcszShIGyRJLYKYfRPxQgH9HBKzQy7AZdh CGJOEIOHg/T55acQB7f8d2Y4YA== X-Google-Smtp-Source: AB8JxZpXPAWuaEocZmeCGNeekXBtM0XtKc/GnW2UNe73MzbJN/Zl1JmnzmyOiPutvMNkPuLjpxaSdg== X-Received: by 2002:a25:818c:: with SMTP id p12-v6mr2954380ybk.397.1526399418070; Tue, 15 May 2018 08:50:18 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id z67-v6sm124520ywd.50.2018.05.15.08.50.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 08:50:17 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray , Andy Shevchenko Subject: [PATCH v3 2/8] lib/test_bitmap.c: Add for_each_set_clump test cases Date: Tue, 15 May 2018 11:50:12 -0400 Message-Id: X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The introduction of the for_each_set_clump macro warrants test cases to verify the implementation. This patch adds test case checks for whether an out-of-bounds clump index is returned, a zero clump is returned, or the returned clump value differs from the expected clump value. A 4-bit clump size is chosen in order to verify non-8-bit iteration. Cc: Andy Shevchenko Signed-off-by: William Breathitt Gray --- lib/test_bitmap.c | 71 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/lib/test_bitmap.c b/lib/test_bitmap.c index de16f7869fb1..395e4f4fe43d 100644 --- a/lib/test_bitmap.c +++ b/lib/test_bitmap.c @@ -88,6 +88,39 @@ __check_eq_u32_array(const char *srcfile, unsigned int line, return true; } +static bool __init __check_eq_clump(const char *srcfile, unsigned int line, + const size_t clump_index, const size_t size, + const unsigned char *const clump_exp, + const unsigned long *const bits, + const size_t index, + const unsigned int offset) +{ + unsigned long clump; + unsigned long exp; + + if (clump_index >= size) { + pr_warn("[%s:%u] clump index out-of-bounds: expected less than %zu, got %zu\n", + srcfile, line, size, clump_index); + return false; + } + + exp = clump_exp[clump_index]; + if (!exp) { + pr_warn("[%s:%u] clump index for zero clump: expected nonzero clump, got clump index %zu with clump value 0", + srcfile, line, clump_index); + return false; + } + + clump = (bits[index] >> offset) & 0xF; + if (clump != exp) { + pr_warn("[%s:%u] expected 0x%lX, got 0x%lX", + srcfile, line, exp, clump); + return false; + } + + return true; +} + #define __expect_eq(suffix, ...) \ ({ \ int result = 0; \ @@ -104,6 +137,7 @@ __check_eq_u32_array(const char *srcfile, unsigned int line, #define expect_eq_bitmap(...) __expect_eq(bitmap, ##__VA_ARGS__) #define expect_eq_pbl(...) __expect_eq(pbl, ##__VA_ARGS__) #define expect_eq_u32_array(...) __expect_eq(u32_array, ##__VA_ARGS__) +#define expect_eq_clump(...) __expect_eq(clump, ##__VA_ARGS__) static void __init test_zero_clear(void) { @@ -352,6 +386,42 @@ static void noinline __init test_mem_optimisations(void) } } +static const unsigned char clump_exp[] __initconst = { + 0x1, /* 1 bit set */ + 0x2, /* non-edge 1 bit set */ + 0x0, /* zero bits set */ + 0xE, /* 3 bits set */ + 0xE, /* Repeated clump */ + 0xF, /* 4 bits set */ + 0x3, /* 2 bits set */ + 0x5, /* non-adjacent 2 bits set */ +}; + +static void __init test_for_each_set_clump(void) +{ + size_t clump; + size_t index; + unsigned int offset; +#define CLUMP_BITMAP_NUMBITS 32 + DECLARE_BITMAP(bits, CLUMP_BITMAP_NUMBITS); +#define CLUMP_SIZE 4 + const size_t size = DIV_ROUND_UP(CLUMP_BITMAP_NUMBITS, CLUMP_SIZE); + + /* set bitmap to test case */ + bitmap_zero(bits, CLUMP_BITMAP_NUMBITS); + bitmap_set(bits, 0, 1); /* 0x1 */ + bitmap_set(bits, 5, 6); /* 0x2 */ + bitmap_set(bits, 13, 16); /* 0xE */ + bitmap_set(bits, 17, 20); /* 0xE */ + bitmap_set(bits, 20, 24); /* 0xF */ + bitmap_set(bits, 24, 26); /* 0x3 */ + bitmap_set(bits, 28, 29); /* 0x5 - part 1 */ + bitmap_set(bits, 30, 31); /* 0x5 - part 2 */ + + for_each_set_clump(clump, index, offset, bits, size, CLUMP_SIZE) + expect_eq_clump(clump, size, clump_exp, bits, index, offset); +} + static int __init test_bitmap_init(void) { test_zero_clear(); @@ -360,6 +430,7 @@ static int __init test_bitmap_init(void) test_bitmap_arr32(); test_bitmap_parselist(); test_mem_optimisations(); + test_for_each_set_clump(); if (failed_tests == 0) pr_info("all %u tests passed\n", total_tests); From patchwork Tue May 15 15:50:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913775 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Hq0z5R2h"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40lhsj3tgTz9s0q for ; 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Tue, 15 May 2018 08:50:34 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v3 3/8] gpio: 104-dio-48e: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 11:50:29 -0400 Message-Id: X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-104-dio-48e.c | 67 ++++++++------------------------- 1 file changed, 16 insertions(+), 51 deletions(-) diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c index 9c4e07fcb74b..77eeaa36094c 100644 --- a/drivers/gpio/gpio-104-dio-48e.c +++ b/drivers/gpio/gpio-104-dio-48e.c @@ -183,46 +183,23 @@ static int dio48e_gpio_get(struct gpio_chip *chip, unsigned offset) return !!(port_state & mask); } +static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + static int dio48e_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip); size_t i; - static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + size_t word; + unsigned int offset; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { port_state = inb(dio48egpio->base + ports[i]); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; @@ -252,37 +229,25 @@ static void dio48e_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int out_port; + size_t i; + size_t word; + unsigned int offset; + unsigned int iomask; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } - - port = i / gpio_reg_size; - out_port = (port > 2) ? port + 1 : port; - bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)]; + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { + iomask = mask[word] >> offset; + bitmask = iomask & (bits[word] >> offset); raw_spin_lock_irqsave(&dio48egpio->lock, flags); /* update output state data and set device gpio register */ - dio48egpio->out_state[port] &= ~mask[BIT_WORD(i)]; - dio48egpio->out_state[port] |= bitmask; - outb(dio48egpio->out_state[port], dio48egpio->base + out_port); + dio48egpio->out_state[i] &= ~iomask; + dio48egpio->out_state[i] |= bitmask; + outb(dio48egpio->out_state[i], dio48egpio->base + ports[i]); raw_spin_unlock_irqrestore(&dio48egpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } From patchwork Tue May 15 15:50:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913774 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="QDKMt1dM"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40lhsb6RxQz9s08 for ; Wed, 16 May 2018 01:52:35 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754224AbeEOPus (ORCPT ); Tue, 15 May 2018 11:50:48 -0400 Received: from mail-yw0-f195.google.com ([209.85.161.195]:35445 "EHLO mail-yw0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753977AbeEOPuq (ORCPT ); Tue, 15 May 2018 11:50:46 -0400 Received: by mail-yw0-f195.google.com with SMTP id m8-v6so210272ywd.2; Tue, 15 May 2018 08:50:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2U7Ozw2SgAQBqAZnsfCoNU2PQB0sCh7oHKc5SOqZD3A=; b=QDKMt1dMc3g1RQ7EpNnEBgjbw2a2FfG1pPs5CbWgxn3InLJjw44uepeogTOu69ioTo /Pn4ZiuY+tramvXdvoEBhgI6W1tEnPYWWZjj3nOF4qGbKmIxj5Q+45500pJ6VekqPMlX o4JgqaUOccoaqX57XE5Qm8ApYUcngjVn/dHRFJ4KFyBDI0XvqfDgX/pTX1bOtUeHuQHZ MX3HOA4Pd9wiV0kXHO5nF87I2kybFp9S9kI+D8yQZG7vWxyFf0ik26VL38GL0ohr2e3t W5NRbRD8uVE+d3t45OFzStyEX4TJKihY9eTmar6L4Rl7ELNNOzT1kKRCoCmdMTd9fezX snIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2U7Ozw2SgAQBqAZnsfCoNU2PQB0sCh7oHKc5SOqZD3A=; b=XfPUnAQyln2WWbP+ay8PxujCfHBqsy3Pzm6tqKIt7VgTmfIo87AkalURCrI3dMppl8 ldW5JWzRjc7CsUhZ4T/qjgRZhrrWNic+MtRwnO6g4/p58KGdltILHWdr5YSqhWPJwS3E kGpXMpd6ou77Ag87l/sIEBTx/oFASSES4jlZZIavByOwnC9Z3t/p6LcnuBJAL0hsahO0 WwF5vXW3ZKejHL4/aDNUGhiVZiHOwhg5mOd1Wi9XEjsDSD0Yhbq+HKODtfMPbjJHIwbQ KxQXa7gYrYFwHeZQkia+lRkLEAmlj54Ez9aoFZ9w2Zoza3gQsJsSrikWIPZ1kIuNrUSO NuzQ== X-Gm-Message-State: ALKqPwd1zwy7DtZu5siN21XcbfbOCh6KR0kASgDxjVYShxoyjFIx8E+H N2nnwz+nApOQWkPZGzD1KlI= X-Google-Smtp-Source: AB8JxZoL6QIgJaCApeU0QUbWUglT/EUl4SE1hlDSfMdNU8vF/hXhMpGOAp3Gw+hN+BOMGpH9qWT/cw== X-Received: by 2002:a0d:e6d6:: with SMTP id p205-v6mr6885784ywe.9.1526399445901; Tue, 15 May 2018 08:50:45 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id m125-v6sm145892ywm.53.2018.05.15.08.50.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 08:50:45 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v3 4/8] gpio: 104-idi-48: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 11:50:39 -0400 Message-Id: <49e61fc62ad34928ae05eaa77d757070636aefb8.1526397764.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-104-idi-48.c | 32 ++++---------------------------- 1 file changed, 4 insertions(+), 28 deletions(-) diff --git a/drivers/gpio/gpio-104-idi-48.c b/drivers/gpio/gpio-104-idi-48.c index 2c9738adb3a6..f8de5560174f 100644 --- a/drivers/gpio/gpio-104-idi-48.c +++ b/drivers/gpio/gpio-104-idi-48.c @@ -94,41 +94,17 @@ static int idi_48_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, { struct idi_48_gpio *const idi48gpio = gpiochip_get_data(chip); size_t i; + size_t word; + unsigned int offset; static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { port_state = inb(idi48gpio->base + ports[i]); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; From patchwork Tue May 15 15:50:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913773 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Tue, 15 May 2018 08:50:57 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id m24-v6sm120739ywh.19.2018.05.15.08.50.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 08:50:56 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v3 5/8] gpio: gpio-mm: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 11:50:51 -0400 Message-Id: X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-gpio-mm.c | 67 +++++++++---------------------------- 1 file changed, 16 insertions(+), 51 deletions(-) diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c index b56ff2efbf36..72668da8bf8d 100644 --- a/drivers/gpio/gpio-gpio-mm.c +++ b/drivers/gpio/gpio-gpio-mm.c @@ -172,46 +172,23 @@ static int gpiomm_gpio_get(struct gpio_chip *chip, unsigned int offset) return !!(port_state & mask); } +static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); size_t i; - static const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + size_t word; + unsigned int offset; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { port_state = inb(gpiommgpio->base + ports[i]); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; @@ -242,37 +219,25 @@ static void gpiomm_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; - unsigned int out_port; + size_t i; + size_t word; + unsigned int offset; + unsigned int iomask; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } - - port = i / gpio_reg_size; - out_port = (port > 2) ? port + 1 : port; - bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)]; + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { + iomask = mask[word] >> offset; + bitmask = iomask & (bits[word] >> offset); spin_lock_irqsave(&gpiommgpio->lock, flags); /* update output state data and set device gpio register */ - gpiommgpio->out_state[port] &= ~mask[BIT_WORD(i)]; - gpiommgpio->out_state[port] |= bitmask; - outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port); + gpiommgpio->out_state[i] &= ~iomask; + gpiommgpio->out_state[i] |= bitmask; + outb(gpiommgpio->out_state[i], gpiommgpio->base + ports[i]); spin_unlock_irqrestore(&gpiommgpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } From patchwork Tue May 15 15:51:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913772 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="h4mn5x8Y"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40lhs40Zd6z9s0x for ; Wed, 16 May 2018 01:52:08 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754279AbeEOPvJ (ORCPT ); Tue, 15 May 2018 11:51:09 -0400 Received: from mail-yb0-f195.google.com ([209.85.213.195]:42586 "EHLO mail-yb0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754276AbeEOPvI (ORCPT ); Tue, 15 May 2018 11:51:08 -0400 Received: by mail-yb0-f195.google.com with SMTP id 140-v6so213139ybc.9; Tue, 15 May 2018 08:51:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tAo7rXu+mux3L7ze8r9gzOGceOAVFwQmVWVRQkyRRgw=; b=h4mn5x8YYkR4E/GOjWgwqntmch0dvHvbZ4ZSNh/BH8QbemmmzuWaaPmiYyYd3rUye9 /fHOsseRA6GGSZWZgBmTbzP1vpeQ7VtPYtGRi9pkuSe9i6Ul0uzg5/J2qcKQDuOxngf5 yHxOxGodqeYVMl/llttEWEF7lQ+Jo0L60CApGzZQuVcyBJLaFbeuvqV5Vm4pP/px2Dm8 TW+TYMEkY1C1q2DrkT+CRGkjB/DuqlBXVSAUqawLpoZ81H+m+GHOjQfY2Dj57aqUGLAI uY/lN+QVZTXJJ0/Ny4ckPmtfGUZYjNWptkcG6gqQ0QTPOzzHOM+/I1MwcSAHa1RbAYNp 4/mg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tAo7rXu+mux3L7ze8r9gzOGceOAVFwQmVWVRQkyRRgw=; b=DzpN/U69867IgwlttZ9EETy2dqXshG1BvEPEoBbwWXwaOTa/MuB9XwqvsnExA6Nw7x n5x6iVYrrXBtwztSVVSS3188BpsNVmhKG9SHN6FssogYWrwwunBJl2oMlmrbasVt1jjn Q91lChpEcrOhNzUf896qdKrjPJp2DVqQDDQTyyIn9R06LoavLFqdbn2tpI7tzGJrx+6d pbxgUdLjjUmdI4DN0Zf1B8UJKl0R/7k1l41Yefi9NKYZSILd4MYIlRrcneFHUhDjxprz 4LonP1qaKCIQQXwF0krgfS26zuheR8Q41v1dc32vIJO9DKV7DXFN0QEupUWplweAXhJm c/BQ== X-Gm-Message-State: ALKqPwflDLeI2gNmOqKtRvGBcWsBRY4Gt5IrE4PumQ/FOtX6GU568mR9 P1RH6g2XKAuwPBTmAe1Yckw= X-Google-Smtp-Source: AB8JxZp0GtDPBZBzjkEmhHchVzZOOHq/i5T6Sa67febjzJgeFR/etLaWqVfPOQsCwq+IgajG/Srmdg== X-Received: by 2002:a25:6648:: with SMTP id z8-v6mr6329849ybm.108.1526399467235; Tue, 15 May 2018 08:51:07 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id b188-v6sm132960ywc.72.2018.05.15.08.51.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 15 May 2018 08:51:06 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v3 6/8] gpio: ws16c48: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 11:51:01 -0400 Message-Id: X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-ws16c48.c | 66 +++++++++---------------------------- 1 file changed, 16 insertions(+), 50 deletions(-) diff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c index c7028eb0b8e1..625336376b5d 100644 --- a/drivers/gpio/gpio-ws16c48.c +++ b/drivers/gpio/gpio-ws16c48.c @@ -134,42 +134,19 @@ static int ws16c48_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - const unsigned int gpio_reg_size = 8; - size_t i; - const size_t num_ports = chip->ngpio / gpio_reg_size; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); + size_t port; + size_t word; + unsigned int offset; + const unsigned int port_size = 8; + const size_t num_ports = chip->ngpio / port_size; unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < num_ports; i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ - port_state = inb(ws16c48gpio->base + i); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + for_each_set_clump(port, word, offset, mask, num_ports, port_size) { + port_state = inb(ws16c48gpio->base + port); + bits[word] |= port_state << offset; } return 0; @@ -203,26 +180,19 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct ws16c48_gpio *const ws16c48gpio = gpiochip_get_data(chip); - unsigned int i; - const unsigned int gpio_reg_size = 8; - unsigned int port; + size_t port; + size_t word; + unsigned int offset; + const unsigned int port_size = 8; + const size_t num_ports = chip->ngpio / port_size; unsigned int iomask; unsigned int bitmask; unsigned long flags; - /* set bits are evaluated a gpio register size at a time */ - for (i = 0; i < chip->ngpio; i += gpio_reg_size) { - /* no more set bits in this mask word; skip to the next word */ - if (!mask[BIT_WORD(i)]) { - i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size; - continue; - } - - port = i / gpio_reg_size; - + for_each_set_clump(port, word, offset, mask, num_ports, port_size) { /* mask out GPIO configured for input */ - iomask = mask[BIT_WORD(i)] & ~ws16c48gpio->io_state[port]; - bitmask = iomask & bits[BIT_WORD(i)]; + iomask = (mask[word] >> offset) & ~ws16c48gpio->io_state[port]; + bitmask = iomask & (bits[word] >> offset); raw_spin_lock_irqsave(&ws16c48gpio->lock, flags); @@ -232,10 +202,6 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip, outb(ws16c48gpio->out_state[port], ws16c48gpio->base + port); raw_spin_unlock_irqrestore(&ws16c48gpio->lock, flags); - - /* prepare for next gpio register set */ - mask[BIT_WORD(i)] >>= gpio_reg_size; - bits[BIT_WORD(i)] >>= gpio_reg_size; } } From patchwork Tue May 15 15:51:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913771 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="mr0UbEHR"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40lhs00klCz9s08 for ; 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Tue, 15 May 2018 08:51:17 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v3 7/8] gpio: pci-idio-16: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 11:51:11 -0400 Message-Id: <7920f597375e1ae5dc70bd9f6eedb23797e4a119.1526397764.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-pci-idio-16.c | 67 +++++++++++---------------------- 1 file changed, 21 insertions(+), 46 deletions(-) diff --git a/drivers/gpio/gpio-pci-idio-16.c b/drivers/gpio/gpio-pci-idio-16.c index 25d16b2af1c3..6d748c6e59cb 100644 --- a/drivers/gpio/gpio-pci-idio-16.c +++ b/drivers/gpio/gpio-pci-idio-16.c @@ -109,44 +109,20 @@ static int idio_16_gpio_get_multiple(struct gpio_chip *chip, { struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); size_t i; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); - unsigned long port_state; + size_t word; + unsigned int offset; void __iomem *ports[] = { &idio16gpio->reg->out0_7, &idio16gpio->reg->out8_15, &idio16gpio->reg->in0_7, &idio16gpio->reg->in8_15, }; + unsigned long port_state; /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - - /* read bits from current gpio port */ + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { port_state = ioread8(ports[i]); - - /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; @@ -186,30 +162,29 @@ static void idio_16_gpio_set_multiple(struct gpio_chip *chip, unsigned long *mask, unsigned long *bits) { struct idio_16_gpio *const idio16gpio = gpiochip_get_data(chip); + size_t i; + size_t word; + unsigned int offset; + void __iomem *ports[] = { + &idio16gpio->reg->out0_7, &idio16gpio->reg->out8_15, + }; + unsigned int iomask; + unsigned int bitmask; unsigned long flags; unsigned int out_state; - raw_spin_lock_irqsave(&idio16gpio->lock, flags); + for_each_set_clump(i, word, offset, mask, ARRAY_SIZE(ports), 8) { + iomask = mask[word] >> offset; + bitmask = iomask & (bits[word] >> offset); - /* process output lines 0-7 */ - if (*mask & 0xFF) { - out_state = ioread8(&idio16gpio->reg->out0_7) & ~*mask; - out_state |= *mask & *bits; - iowrite8(out_state, &idio16gpio->reg->out0_7); - } + raw_spin_lock_irqsave(&idio16gpio->lock, flags); - /* shift to next output line word */ - *mask >>= 8; + out_state = ioread8(ports[i]) & ~iomask; + out_state |= bitmask; + iowrite8(out_state, ports[i]); - /* process output lines 8-15 */ - if (*mask & 0xFF) { - *bits >>= 8; - out_state = ioread8(&idio16gpio->reg->out8_15) & ~*mask; - out_state |= *mask & *bits; - iowrite8(out_state, &idio16gpio->reg->out8_15); + raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); } - - raw_spin_unlock_irqrestore(&idio16gpio->lock, flags); } static void idio_16_irq_ack(struct irq_data *data) From patchwork Tue May 15 15:51:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 913770 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="vSm4LHDK"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 40lhrp6XPsz9s02 for ; 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Tue, 15 May 2018 08:51:28 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, William Breathitt Gray Subject: [PATCH v3 8/8] gpio: pcie-idio-24: Utilize for_each_set_clump macro Date: Tue, 15 May 2018 11:51:22 -0400 Message-Id: <9b9004a4b7f0aba33a7deac3d400d5499153d217.1526397764.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: References: Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump macro to simplify code and improve clarity. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-pcie-idio-24.c | 102 +++++++++++-------------------- 1 file changed, 36 insertions(+), 66 deletions(-) diff --git a/drivers/gpio/gpio-pcie-idio-24.c b/drivers/gpio/gpio-pcie-idio-24.c index f953541e7890..b4d300338a05 100644 --- a/drivers/gpio/gpio-pcie-idio-24.c +++ b/drivers/gpio/gpio-pcie-idio-24.c @@ -199,41 +199,21 @@ static int idio_24_gpio_get_multiple(struct gpio_chip *chip, { struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); size_t i; - const unsigned int gpio_reg_size = 8; - unsigned int bits_offset; - size_t word_index; - unsigned int word_offset; - unsigned long word_mask; - const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0); - unsigned long port_state; + size_t word; + unsigned int offset; void __iomem *ports[] = { &idio24gpio->reg->out0_7, &idio24gpio->reg->out8_15, &idio24gpio->reg->out16_23, &idio24gpio->reg->in0_7, &idio24gpio->reg->in8_15, &idio24gpio->reg->in16_23, }; + const size_t num_ports = ARRAY_SIZE(ports) + 1; + unsigned long port_state; const unsigned long out_mode_mask = BIT(1); /* clear bits array to a clean slate */ bitmap_zero(bits, chip->ngpio); - /* get bits are evaluated a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports) + 1; i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* word index for bits array */ - word_index = BIT_WORD(bits_offset); - - /* gpio offset within current word of bits array */ - word_offset = bits_offset % BITS_PER_LONG; - - /* mask of get bits for current gpio within current word */ - word_mask = mask[word_index] & (port_mask << word_offset); - if (!word_mask) { - /* no get bits in this port so skip to next one */ - continue; - } - + for_each_set_clump(i, word, offset, mask, num_ports, 8) { /* read bits from current gpio port (port 6 is TTL GPIO) */ if (i < 6) port_state = ioread8(ports[i]); @@ -243,7 +223,7 @@ static int idio_24_gpio_get_multiple(struct gpio_chip *chip, port_state = ioread8(&idio24gpio->reg->ttl_in0_7); /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word] |= port_state << offset; } return 0; @@ -295,58 +275,48 @@ static void idio_24_gpio_set_multiple(struct gpio_chip *chip, { struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); size_t i; - unsigned long bits_offset; - unsigned long gpio_mask; - const unsigned int gpio_reg_size = 8; - const unsigned long port_mask = GENMASK(gpio_reg_size, 0); - unsigned long flags; - unsigned int out_state; + size_t word; + unsigned int offset; void __iomem *ports[] = { &idio24gpio->reg->out0_7, &idio24gpio->reg->out8_15, &idio24gpio->reg->out16_23 }; + const size_t num_ports = ARRAY_SIZE(ports) + 1; + unsigned int iomask; + unsigned int bitmask; + unsigned long flags; const unsigned long out_mode_mask = BIT(1); - const unsigned int ttl_offset = 48; - const size_t ttl_i = BIT_WORD(ttl_offset); - const unsigned int word_offset = ttl_offset % BITS_PER_LONG; - const unsigned long ttl_mask = (mask[ttl_i] >> word_offset) & port_mask; - const unsigned long ttl_bits = (bits[ttl_i] >> word_offset) & ttl_mask; - - /* set bits are processed a gpio port register at a time */ - for (i = 0; i < ARRAY_SIZE(ports); i++) { - /* gpio offset in bits array */ - bits_offset = i * gpio_reg_size; - - /* check if any set bits for current port */ - gpio_mask = (*mask >> bits_offset) & port_mask; - if (!gpio_mask) { - /* no set bits for this port so move on to next port */ + unsigned int out_state; + + for_each_set_clump(i, word, offset, mask, num_ports, 8) { + iomask = mask[word] >> offset; + bitmask = iomask & (bits[word] >> offset); + + raw_spin_lock_irqsave(&idio24gpio->lock, flags); + + /* read bits from current gpio port (port 6 is TTL GPIO) */ + if (i < 6) { + out_state = ioread8(ports[i]) & ~iomask; + } else if (ioread8(&idio24gpio->reg->ctl) & out_mode_mask) { + out_state = ioread8(&idio24gpio->reg->ttl_out0_7); + } else { + /* skip TTL GPIO if set for input */ + raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); continue; } - raw_spin_lock_irqsave(&idio24gpio->lock, flags); + /* set requested bit states */ + out_state &= ~iomask; + out_state |= bitmask; - /* process output lines */ - out_state = ioread8(ports[i]) & ~gpio_mask; - out_state |= (*bits >> bits_offset) & gpio_mask; - iowrite8(out_state, ports[i]); + /* write bits for current gpio port (port 6 is TTL GPIO) */ + if (i < 6) + iowrite8(out_state, ports[i]); + else + iowrite8(out_state, &idio24gpio->reg->ttl_out0_7); raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); } - - /* check if setting TTL lines and if they are in output mode */ - if (!ttl_mask || !(ioread8(&idio24gpio->reg->ctl) & out_mode_mask)) - return; - - /* handle TTL output */ - raw_spin_lock_irqsave(&idio24gpio->lock, flags); - - /* process output lines */ - out_state = ioread8(&idio24gpio->reg->ttl_out0_7) & ~ttl_mask; - out_state |= ttl_bits; - iowrite8(out_state, &idio24gpio->reg->ttl_out0_7); - - raw_spin_unlock_irqrestore(&idio24gpio->lock, flags); } static void idio_24_irq_ack(struct irq_data *data)