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a=ed25519-sha256; t=1735842735; l=6164; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=RIPGsNtRW50K3E4tftXP6LldK+TxlhvB+Y3BnDoaHb0=; b=S1HDm+U7HAgFAMYdFK1sGW5heveyGGuVt/bXnOqJRnKzc8lb3SZrRfo7dZbPGf35gYi+2oOU+ WHSlyHLVF8qDaTcaoRJxeDgcmAFHC41G2zWKnsXqTwnXkEt+cm8SWLU X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-2.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" The Reference Design Boards (RDB) don't have the same relevance they had then the MPC831x platform was new; if any work is done today, then likely based on used production boards, which are more readily available than NXP's discontinued devboards. To further reduce the focus on RDBs, add DT compatible strings for all four MPC8314/5 variants. Signed-off-by: J. Neuschäfer --- arch/powerpc/configs/83xx/mpc8313_rdb_defconfig | 2 +- arch/powerpc/configs/83xx/mpc8315_rdb_defconfig | 2 +- arch/powerpc/configs/mpc83xx_defconfig | 2 +- arch/powerpc/configs/ppc6xx_defconfig | 2 +- arch/powerpc/platforms/83xx/Kconfig | 6 +++--- arch/powerpc/platforms/83xx/Makefile | 2 +- .../platforms/83xx/{mpc831x_rdb.c => mpc831x.c} | 21 ++++++++++++++------- 7 files changed, 22 insertions(+), 15 deletions(-) diff --git a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig index 16a42e2267fbe092ea2344f50548101bc1e344ce..38a4d1ceff6a9ea75d9d8a313adbd2e5e5c9ac67 100644 --- a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig +++ b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig @@ -12,7 +12,7 @@ CONFIG_PARTITION_ADVANCED=y # CONFIG_PPC_CHRP is not set # CONFIG_PPC_PMAC is not set CONFIG_PPC_83xx=y -CONFIG_MPC831x_RDB=y +CONFIG_MPC831x=y CONFIG_PCI=y CONFIG_NET=y CONFIG_PACKET=y diff --git a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig index 80d40ae668eb6f1ae10bc0c1100d904946496112..788189a182458c92a62235c10fb3d21a87f4296b 100644 --- a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig +++ b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig @@ -12,7 +12,7 @@ CONFIG_PARTITION_ADVANCED=y # CONFIG_PPC_CHRP is not set # CONFIG_PPC_PMAC is not set CONFIG_PPC_83xx=y -CONFIG_MPC831x_RDB=y +CONFIG_MPC831x=y CONFIG_PCI=y CONFIG_NET=y CONFIG_PACKET=y diff --git a/arch/powerpc/configs/mpc83xx_defconfig b/arch/powerpc/configs/mpc83xx_defconfig index 83c4710017e949c358f3ba8b73f5c1873cfd10f8..4af5e3e8c5a7f44f5e97b8fb4cdf691686f8967b 100644 --- a/arch/powerpc/configs/mpc83xx_defconfig +++ b/arch/powerpc/configs/mpc83xx_defconfig @@ -9,7 +9,7 @@ CONFIG_PARTITION_ADVANCED=y # CONFIG_PPC_CHRP is not set # CONFIG_PPC_PMAC is not set CONFIG_PPC_83xx=y -CONFIG_MPC831x_RDB=y +CONFIG_MPC831x=y CONFIG_MPC832x_RDB=y CONFIG_MPC834x_ITX=y CONFIG_MPC836x_RDK=y diff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig index ca0c90e9583790cbca15ba956b371b8b0cb63c47..7e56dc497a48289614c8d01cc51be6d1edad7846 100644 --- a/arch/powerpc/configs/ppc6xx_defconfig +++ b/arch/powerpc/configs/ppc6xx_defconfig @@ -40,7 +40,7 @@ CONFIG_PPC_82xx=y CONFIG_EP8248E=y CONFIG_MGCOGE=y CONFIG_PPC_83xx=y -CONFIG_MPC831x_RDB=y +CONFIG_MPC831x=y CONFIG_MPC832x_RDB=y CONFIG_MPC834x_ITX=y CONFIG_MPC836x_RDK=y diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig index d355ad40995fdc0fc3b4355126c65c761c21c296..944ec44a1fa6044b03ac71c295e891cd411ce444 100644 --- a/arch/powerpc/platforms/83xx/Kconfig +++ b/arch/powerpc/platforms/83xx/Kconfig @@ -18,12 +18,12 @@ config MPC830x_RDB help This option enables support for the MPC8308 RDB and MPC8308 P1M boards. -config MPC831x_RDB - bool "Freescale MPC831x RDB" +config MPC831x + bool "Freescale MPC831x boards" select DEFAULT_UIMAGE select PPC_MPC831x help - This option enables support for the MPC8313 RDB and MPC8315 RDB boards. + This option enables support for all MPC831x-based boards. config MPC832x_RDB bool "Freescale MPC832x RDB" diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile index 6fc3dba943dade4f63da090b520b0c35bb46a091..92fb0b34913e1113d3e6eac49acbb1c32fb06ab7 100644 --- a/arch/powerpc/platforms/83xx/Makefile +++ b/arch/powerpc/platforms/83xx/Makefile @@ -6,7 +6,7 @@ obj-y := misc.o obj-$(CONFIG_SUSPEND) += suspend.o suspend-asm.o obj-$(CONFIG_MCU_MPC8349EMITX) += mcu_mpc8349emitx.o obj-$(CONFIG_MPC830x_RDB) += mpc830x_rdb.o -obj-$(CONFIG_MPC831x_RDB) += mpc831x_rdb.o +obj-$(CONFIG_MPC831x) += mpc831x.o obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o obj-$(CONFIG_MPC836x_RDK) += mpc836x_rdk.o diff --git a/arch/powerpc/platforms/83xx/mpc831x_rdb.c b/arch/powerpc/platforms/83xx/mpc831x.c similarity index 65% rename from arch/powerpc/platforms/83xx/mpc831x_rdb.c rename to arch/powerpc/platforms/83xx/mpc831x.c index 5c39966762e4264d2ef91b2c4ef75fdf2c2c5d65..7250fc11c7ee80b266f39d0b3aebb0deb777c129 100644 --- a/arch/powerpc/platforms/83xx/mpc831x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc831x.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-or-later /* - * arch/powerpc/platforms/83xx/mpc831x_rdb.c + * arch/powerpc/platforms/83xx/mpc831x.c * - * Description: MPC831x RDB board specific routines. + * Description: MPC831x board specific routines. * This file is based on mpc834x_sys.c * Author: Lo Wlison * @@ -22,24 +22,31 @@ /* * Setup the architecture */ -static void __init mpc831x_rdb_setup_arch(void) +static void __init mpc831x_setup_arch(void) { mpc83xx_setup_arch(); mpc831x_usb_cfg(); } static const char *board[] __initdata = { + /* Reference design boards */ "MPC8313ERDB", "fsl,mpc8315erdb", + + /* Generic chip compatibles */ + "fsl,mpc8315e", + "fsl,mpc8315", + "fsl,mpc8314e", + "fsl,mpc8314", NULL }; -machine_device_initcall(mpc831x_rdb, mpc83xx_declare_of_platform_devices); +machine_device_initcall(mpc831x, mpc83xx_declare_of_platform_devices); -define_machine(mpc831x_rdb) { - .name = "MPC831x RDB", +define_machine(mpc831x) { + .name = "MPC831x", .compatibles = board, - .setup_arch = mpc831x_rdb_setup_arch, + .setup_arch = mpc831x_setup_arch, .discover_phbs = mpc83xx_setup_pci, .init_IRQ = mpc83xx_ipic_init_IRQ, .get_irq = ipic_get_irq, From patchwork Thu Jan 2 18:31:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 2029244 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Thu, 2 Jan 2025 18:32:21 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Thu, 02 Jan 2025 19:31:43 +0100 Subject: [PATCH 02/19] powerpc: dts: Extract mpc8315e.dtsi from mpc8315erdb.dts X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250102-mpc83xx-v1-2-86f78ba2a7af@posteo.net> References: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> In-Reply-To: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> To: Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Madhavan Srinivasan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Frank Li Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?J=2E_Neu?= =?utf-8?q?sch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1735842735; l=20835; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=qUjMMM6o2tcSsY8F4sdgspvgYdGx1PCnjRbfNBI8fWA=; b=+uDfnQblqnn3uCxWMtBw9ZBbN/B61OTH8ka2kNeFLicTC0OBjVLOPG8x5sb95PXySZVcjUkvJ 8IA1axDz+Z0AWTCvjLFIzAyxrGCyTryGnNsA11vfqc820PFE7jbXALm X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-2.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" To make it easier to add other devices based on the MPC831{4,5}{,E}, put the common parts into a dtsi file. mpc8315erdb.dtb remains identical after this patch. Signed-off-by: J. Neuschäfer --- Checkpatch (rightfully) complains about a lot of compatible strings that were never documented in the bindings. Now sure what to do about them. --- arch/powerpc/boot/dts/mpc8315e.dtsi | 356 ++++++++++++++++++++++++++++++++++ arch/powerpc/boot/dts/mpc8315erdb.dts | 320 +----------------------------- 2 files changed, 361 insertions(+), 315 deletions(-) diff --git a/arch/powerpc/boot/dts/mpc8315e.dtsi b/arch/powerpc/boot/dts/mpc8315e.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..4830c8e5cd5c6858ea3a0c25e4a1f26fa87a7111 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8315e.dtsi @@ -0,0 +1,356 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * MPC8315E family device tree. This file supports the following chips: + * + * MPC8314: Without SATA controllers, without security engine + * MPC8314E: Without SATA controllers, with security engine + * MPC8315: With SATA controllers, without security engine + * MPC8315E: With SATA controllers, with security engine + * + * Copyright 2007 Freescale Semiconductor Inc. + * Copyright 2024 J. Neuschäfer + */ + +/dts-v1/; + +/ { + compatible = "fsl,mpc8315e"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8315@0 { + device_type = "cpu"; + reg = <0x0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <16384>; + i-cache-size = <16384>; + timebase-frequency = <0>; // from bootloader + bus-frequency = <0>; // from bootloader + clock-frequency = <0>; // from bootloader + }; + }; + + memory { + device_type = "memory"; + reg = <0 0>; + }; + + localbus@e0005000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus"; + reg = <0xe0005000 0x1000>; + interrupts = <77 0x8>; + interrupt-parent = <&ipic>; + }; + + immr@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "fsl,mpc8315-immr", "simple-bus"; + ranges = <0 0xe0000000 0x00100000>; + reg = <0xe0000000 0x00000200>; + bus-frequency = <0>; + + wdt@200 { + device_type = "watchdog"; + compatible = "mpc83xx_wdt"; + reg = <0x200 0x100>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <14 0x8>; + interrupt-parent = <&ipic>; + dfsrr; + }; + + spi@7000 { + cell-index = <0>; + compatible = "fsl,spi"; + reg = <0x7000 0x1000>; + interrupts = <16 0x8>; + interrupt-parent = <&ipic>; + mode = "cpu"; + }; + + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8315-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + cell-index = <0>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + cell-index = <3>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + + usb@23000 { + compatible = "fsl-usb2-dr"; + reg = <0x23000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&ipic>; + interrupts = <38 0x8>; + phy_type = "utmi"; + }; + + enet0: ethernet@24000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <0>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + ranges = <0x0 0x24000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <32 0x8 33 0x8 34 0x8>; + interrupt-parent = <&ipic>; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x520 0x20>; + }; + }; + + enet1: ethernet@25000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + ranges = <0x0 0x25000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <35 0x8 36 0x8 37 0x8>; + interrupt-parent = <&ipic>; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x520 0x20>; + }; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "fsl,ns16550", "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <133333333>; + interrupts = <9 0x8>; + interrupt-parent = <&ipic>; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "fsl,ns16550", "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <133333333>; + interrupts = <10 0x8>; + interrupt-parent = <&ipic>; + }; + + crypto@30000 { + compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0", + "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", + "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <11 0x8>; + interrupt-parent = <&ipic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x97c>; + fsl,descriptor-types-mask = <0x3a30abf>; + }; + + sata@18000 { + compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; + reg = <0x18000 0x1000>; + cell-index = <1>; + interrupts = <44 0x8>; + interrupt-parent = <&ipic>; + }; + + sata@19000 { + compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; + reg = <0x19000 0x1000>; + cell-index = <2>; + interrupts = <45 0x8>; + interrupt-parent = <&ipic>; + }; + + gtm1: timer@500 { + compatible = "fsl,mpc8315-gtm", "fsl,gtm"; + reg = <0x500 0x100>; + interrupts = <90 8 78 8 84 8 72 8>; + interrupt-parent = <&ipic>; + clock-frequency = <133333333>; + }; + + timer@600 { + compatible = "fsl,mpc8315-gtm", "fsl,gtm"; + reg = <0x600 0x100>; + interrupts = <91 8 79 8 85 8 73 8>; + interrupt-parent = <&ipic>; + clock-frequency = <133333333>; + }; + + /* IPIC + * interrupts cell = + * sense values match linux IORESOURCE_IRQ_* defines: + * sense == 8: Level, low assertion + * sense == 2: Edge, high-to-low change + */ + ipic: interrupt-controller@700 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x700 0x100>; + device_type = "ipic"; + }; + + ipic-msi@7c0 { + compatible = "fsl,ipic-msi"; + reg = <0x7c0 0x40>; + msi-available-ranges = <0 0x100>; + interrupts = <0x43 0x8 + 0x4 0x8 + 0x51 0x8 + 0x52 0x8 + 0x56 0x8 + 0x57 0x8 + 0x58 0x8 + 0x59 0x8>; + interrupt-parent = < &ipic >; + }; + + pmc: power@b00 { + compatible = "fsl,mpc8315-pmc", "fsl,mpc8313-pmc", + "fsl,mpc8349-pmc"; + reg = <0xb00 0x100 0xa00 0x100>; + interrupts = <80 8>; + interrupt-parent = <&ipic>; + fsl,mpc8313-wakeup-timer = <>m1>; + }; + }; + + pci0: pci@e0008500 { + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x0E -mini PCI */ + 0x7000 0x0 0x0 0x1 &ipic 18 0x8 + 0x7000 0x0 0x0 0x2 &ipic 18 0x8 + 0x7000 0x0 0x0 0x3 &ipic 18 0x8 + 0x7000 0x0 0x0 0x4 &ipic 18 0x8 + + /* IDSEL 0x0F -mini PCI */ + 0x7800 0x0 0x0 0x1 &ipic 17 0x8 + 0x7800 0x0 0x0 0x2 &ipic 17 0x8 + 0x7800 0x0 0x0 0x3 &ipic 17 0x8 + 0x7800 0x0 0x0 0x4 &ipic 17 0x8 + + /* IDSEL 0x10 - PCI slot */ + 0x8000 0x0 0x0 0x1 &ipic 48 0x8 + 0x8000 0x0 0x0 0x2 &ipic 17 0x8 + 0x8000 0x0 0x0 0x3 &ipic 48 0x8 + 0x8000 0x0 0x0 0x4 &ipic 17 0x8>; + interrupt-parent = <&ipic>; + interrupts = <66 0x8>; + bus-range = <0x0 0x0>; + ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 + 0x42000000 0 0x80000000 0x80000000 0 0x10000000 + 0x01000000 0 0x00000000 0xe0300000 0 0x00100000>; + clock-frequency = <66666666>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xe0008500 0x100 /* internal registers */ + 0xe0008300 0x8>; /* config space access registers */ + compatible = "fsl,mpc8349-pci"; + device_type = "pci"; + }; + + pci1: pcie@e0009000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; + reg = <0xe0009000 0x00001000>; + ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 + 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; + bus-range = <0 255>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0 0 0 1 &ipic 1 8 + 0 0 0 2 &ipic 1 8 + 0 0 0 3 &ipic 1 8 + 0 0 0 4 &ipic 1 8>; + clock-frequency = <0>; + }; + + pci2: pcie@e000a000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; + reg = <0xe000a000 0x00001000>; + ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000 + 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>; + bus-range = <0 255>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0 0 0 1 &ipic 2 8 + 0 0 0 2 &ipic 2 8 + 0 0 0 3 &ipic 2 8 + 0 0 0 4 &ipic 2 8>; + clock-frequency = <0>; + }; +}; diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts index e09b37d7489d01bfd16a26e9786868f630fa0262..b39903c8813d194c104d1e22c6167d8a9cea0076 100644 --- a/arch/powerpc/boot/dts/mpc8315erdb.dts +++ b/arch/powerpc/boot/dts/mpc8315erdb.dts @@ -5,12 +5,10 @@ * Copyright 2007 Freescale Semiconductor Inc. */ -/dts-v1/; +#include "mpc8315e.dtsi" / { compatible = "fsl,mpc8315erdb"; - #address-cells = <1>; - #size-cells = <1>; aliases { ethernet0 = &enet0; @@ -22,36 +20,11 @@ aliases { pci2 = &pci2; }; - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8315@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - memory { - device_type = "memory"; reg = <0x00000000 0x08000000>; // 128MB at 0 }; localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - // CS0 and CS1 are swapped when // booting from nand, but the // addresses are the same. @@ -91,29 +64,7 @@ fs@400000 { }; immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8315-immr", "simple-bus"; - ranges = <0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; rtc@68 { compatible = "dallas,ds1339"; reg = <0x68>; @@ -128,86 +79,12 @@ mcu_pio: mcu@a { }; }; - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8315-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - phy_type = "utmi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; + ethernet@24000 { tbi-handle = <&tbi0>; phy-handle = < &phy0 >; fsl,magic-packet; mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - phy0: ethernet-phy@0 { interrupt-parent = <&ipic>; interrupts = <20 0x8>; @@ -227,192 +104,21 @@ tbi0: tbi-phy@11 { }; }; - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; + ethernet@25000 { tbi-handle = <&tbi1>; phy-handle = < &phy1 >; fsl,magic-packet; mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - tbi1: tbi-phy@11 { reg = <0x11>; device_type = "tbi-phy"; }; }; }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <133333333>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <133333333>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0", - "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", - "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x97c>; - fsl,descriptor-types-mask = <0x3a30abf>; - }; - - sata@18000 { - compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - cell-index = <1>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - }; - - sata@19000 { - compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - cell-index = <2>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - }; - - gtm1: timer@500 { - compatible = "fsl,mpc8315-gtm", "fsl,gtm"; - reg = <0x500 0x100>; - interrupts = <90 8 78 8 84 8 72 8>; - interrupt-parent = <&ipic>; - clock-frequency = <133333333>; - }; - - timer@600 { - compatible = "fsl,mpc8315-gtm", "fsl,gtm"; - reg = <0x600 0x100>; - interrupts = <91 8 79 8 85 8 73 8>; - interrupt-parent = <&ipic>; - clock-frequency = <133333333>; - }; - - /* IPIC - * interrupts cell = - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - ipic-msi@7c0 { - compatible = "fsl,ipic-msi"; - reg = <0x7c0 0x40>; - msi-available-ranges = <0 0x100>; - interrupts = <0x43 0x8 - 0x4 0x8 - 0x51 0x8 - 0x52 0x8 - 0x56 0x8 - 0x57 0x8 - 0x58 0x8 - 0x59 0x8>; - interrupt-parent = < &ipic >; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8315-pmc", "fsl,mpc8313-pmc", - "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 8>; - interrupt-parent = <&ipic>; - fsl,mpc8313-wakeup-timer = <>m1>; - }; }; - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0E -mini PCI */ - 0x7000 0x0 0x0 0x1 &ipic 18 0x8 - 0x7000 0x0 0x0 0x2 &ipic 18 0x8 - 0x7000 0x0 0x0 0x3 &ipic 18 0x8 - 0x7000 0x0 0x0 0x4 &ipic 18 0x8 - - /* IDSEL 0x0F -mini PCI */ - 0x7800 0x0 0x0 0x1 &ipic 17 0x8 - 0x7800 0x0 0x0 0x2 &ipic 17 0x8 - 0x7800 0x0 0x0 0x3 &ipic 17 0x8 - 0x7800 0x0 0x0 0x4 &ipic 17 0x8 - - /* IDSEL 0x10 - PCI slot */ - 0x8000 0x0 0x0 0x1 &ipic 48 0x8 - 0x8000 0x0 0x0 0x2 &ipic 17 0x8 - 0x8000 0x0 0x0 0x3 &ipic 48 0x8 - 0x8000 0x0 0x0 0x4 &ipic 17 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x42000000 0 0x80000000 0x80000000 0 0x10000000 - 0x01000000 0 0x00000000 0xe0300000 0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - clock-frequency = <0>; - + pcie@e0009000 { pcie@0 { #address-cells = <3>; #size-cells = <2>; @@ -427,23 +133,7 @@ pcie@0 { }; }; - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - clock-frequency = <0>; - + pcie@e000a000 { pcie@0 { #address-cells = <3>; #size-cells = <2>; From patchwork Thu Jan 2 18:31:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 2029268 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=uo3yixYZ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; 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a=ed25519-sha256; t=1735842735; l=10387; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=27vJGZGlFwWizM+EMz5rgxyTnv087lEXb6iLZDOh3DE=; b=9363Ysi+0bn7S8tWB0fh1Ub3SedQBf3xmMz9WI6sCYjeYHhNuAhanngotMhu7PndyysNJ7P0a lqFKK9sAHo5AxNVhzQHHS8d20lltsGV001A4Puc90F4CesxY1Kukf+p X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-2.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" This increases readability, because "0x8" isn't very descriptive. mpc8315erdb.dtb remains identical after this patch. Signed-off-by: J. Neuschäfer --- arch/powerpc/boot/dts/mpc8315e.dtsi | 112 ++++++++++++++++++---------------- arch/powerpc/boot/dts/mpc8315erdb.dts | 4 +- 2 files changed, 62 insertions(+), 54 deletions(-) diff --git a/arch/powerpc/boot/dts/mpc8315e.dtsi b/arch/powerpc/boot/dts/mpc8315e.dtsi index 4830c8e5cd5c6858ea3a0c25e4a1f26fa87a7111..8741482905f0f30bf893a08b2602fdc6e74c23ff 100644 --- a/arch/powerpc/boot/dts/mpc8315e.dtsi +++ b/arch/powerpc/boot/dts/mpc8315e.dtsi @@ -12,6 +12,7 @@ */ /dts-v1/; +#include / { compatible = "fsl,mpc8315e"; @@ -48,7 +49,7 @@ localbus@e0005000 { #size-cells = <1>; compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus"; reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; + interrupts = <77 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; }; @@ -73,7 +74,7 @@ i2c@3000 { cell-index = <0>; compatible = "fsl-i2c"; reg = <0x3000 0x100>; - interrupts = <14 0x8>; + interrupts = <14 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; dfsrr; }; @@ -82,7 +83,7 @@ spi@7000 { cell-index = <0>; compatible = "fsl,spi"; reg = <0x7000 0x1000>; - interrupts = <16 0x8>; + interrupts = <16 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; mode = "cpu"; }; @@ -94,35 +95,35 @@ dma@82a8 { reg = <0x82a8 4>; ranges = <0 0x8100 0x1a8>; interrupt-parent = <&ipic>; - interrupts = <71 8>; + interrupts = <71 IRQ_TYPE_LEVEL_LOW>; cell-index = <0>; dma-channel@0 { compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; reg = <0 0x80>; cell-index = <0>; interrupt-parent = <&ipic>; - interrupts = <71 8>; + interrupts = <71 IRQ_TYPE_LEVEL_LOW>; }; dma-channel@80 { compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; reg = <0x80 0x80>; cell-index = <1>; interrupt-parent = <&ipic>; - interrupts = <71 8>; + interrupts = <71 IRQ_TYPE_LEVEL_LOW>; }; dma-channel@100 { compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; reg = <0x100 0x80>; cell-index = <2>; interrupt-parent = <&ipic>; - interrupts = <71 8>; + interrupts = <71 IRQ_TYPE_LEVEL_LOW>; }; dma-channel@180 { compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; reg = <0x180 0x28>; cell-index = <3>; interrupt-parent = <&ipic>; - interrupts = <71 8>; + interrupts = <71 IRQ_TYPE_LEVEL_LOW>; }; }; @@ -132,7 +133,7 @@ usb@23000 { #address-cells = <1>; #size-cells = <0>; interrupt-parent = <&ipic>; - interrupts = <38 0x8>; + interrupts = <38 IRQ_TYPE_LEVEL_LOW>; phy_type = "utmi"; }; @@ -146,7 +147,9 @@ enet0: ethernet@24000 { reg = <0x24000 0x1000>; ranges = <0x0 0x24000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; + interrupts = <32 IRQ_TYPE_LEVEL_LOW>, + <33 IRQ_TYPE_LEVEL_LOW>, + <34 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; mdio@520 { @@ -167,7 +170,9 @@ enet1: ethernet@25000 { reg = <0x25000 0x1000>; ranges = <0x0 0x25000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; + interrupts = <35 IRQ_TYPE_LEVEL_LOW>, + <36 IRQ_TYPE_LEVEL_LOW>, + <37 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; mdio@520 { @@ -184,7 +189,7 @@ serial0: serial@4500 { compatible = "fsl,ns16550", "ns16550"; reg = <0x4500 0x100>; clock-frequency = <133333333>; - interrupts = <9 0x8>; + interrupts = <9 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; }; @@ -194,7 +199,7 @@ serial1: serial@4600 { compatible = "fsl,ns16550", "ns16550"; reg = <0x4600 0x100>; clock-frequency = <133333333>; - interrupts = <10 0x8>; + interrupts = <10 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; }; @@ -203,7 +208,7 @@ crypto@30000 { "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; reg = <0x30000 0x10000>; - interrupts = <11 0x8>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; fsl,num-channels = <4>; fsl,channel-fifo-len = <24>; @@ -215,7 +220,7 @@ sata@18000 { compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; reg = <0x18000 0x1000>; cell-index = <1>; - interrupts = <44 0x8>; + interrupts = <44 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; }; @@ -223,14 +228,17 @@ sata@19000 { compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; reg = <0x19000 0x1000>; cell-index = <2>; - interrupts = <45 0x8>; + interrupts = <45 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; }; gtm1: timer@500 { compatible = "fsl,mpc8315-gtm", "fsl,gtm"; reg = <0x500 0x100>; - interrupts = <90 8 78 8 84 8 72 8>; + interrupts = <90 IRQ_TYPE_LEVEL_LOW>, + <78 IRQ_TYPE_LEVEL_LOW>, + <84 IRQ_TYPE_LEVEL_LOW>, + <72 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; clock-frequency = <133333333>; }; @@ -238,16 +246,16 @@ gtm1: timer@500 { timer@600 { compatible = "fsl,mpc8315-gtm", "fsl,gtm"; reg = <0x600 0x100>; - interrupts = <91 8 79 8 85 8 73 8>; + interrupts = <91 IRQ_TYPE_LEVEL_LOW>, + <79 IRQ_TYPE_LEVEL_LOW>, + <85 IRQ_TYPE_LEVEL_LOW>, + <73 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; clock-frequency = <133333333>; }; /* IPIC - * interrupts cell = - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change + * interrupts cell = */ ipic: interrupt-controller@700 { interrupt-controller; @@ -261,14 +269,14 @@ ipic-msi@7c0 { compatible = "fsl,ipic-msi"; reg = <0x7c0 0x40>; msi-available-ranges = <0 0x100>; - interrupts = <0x43 0x8 - 0x4 0x8 - 0x51 0x8 - 0x52 0x8 - 0x56 0x8 - 0x57 0x8 - 0x58 0x8 - 0x59 0x8>; + interrupts = <0x43 IRQ_TYPE_LEVEL_LOW>, + <0x4 IRQ_TYPE_LEVEL_LOW>, + <0x51 IRQ_TYPE_LEVEL_LOW>, + <0x52 IRQ_TYPE_LEVEL_LOW>, + <0x56 IRQ_TYPE_LEVEL_LOW>, + <0x57 IRQ_TYPE_LEVEL_LOW>, + <0x58 IRQ_TYPE_LEVEL_LOW>, + <0x59 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = < &ipic >; }; @@ -276,7 +284,7 @@ pmc: power@b00 { compatible = "fsl,mpc8315-pmc", "fsl,mpc8313-pmc", "fsl,mpc8349-pmc"; reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 8>; + interrupts = <80 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; fsl,mpc8313-wakeup-timer = <>m1>; }; @@ -286,24 +294,24 @@ pci0: pci@e0008500 { interrupt-map-mask = <0xf800 0x0 0x0 0x7>; interrupt-map = < /* IDSEL 0x0E -mini PCI */ - 0x7000 0x0 0x0 0x1 &ipic 18 0x8 - 0x7000 0x0 0x0 0x2 &ipic 18 0x8 - 0x7000 0x0 0x0 0x3 &ipic 18 0x8 - 0x7000 0x0 0x0 0x4 &ipic 18 0x8 + 0x7000 0x0 0x0 0x1 &ipic 18 IRQ_TYPE_LEVEL_LOW + 0x7000 0x0 0x0 0x2 &ipic 18 IRQ_TYPE_LEVEL_LOW + 0x7000 0x0 0x0 0x3 &ipic 18 IRQ_TYPE_LEVEL_LOW + 0x7000 0x0 0x0 0x4 &ipic 18 IRQ_TYPE_LEVEL_LOW /* IDSEL 0x0F -mini PCI */ - 0x7800 0x0 0x0 0x1 &ipic 17 0x8 - 0x7800 0x0 0x0 0x2 &ipic 17 0x8 - 0x7800 0x0 0x0 0x3 &ipic 17 0x8 - 0x7800 0x0 0x0 0x4 &ipic 17 0x8 + 0x7800 0x0 0x0 0x1 &ipic 17 IRQ_TYPE_LEVEL_LOW + 0x7800 0x0 0x0 0x2 &ipic 17 IRQ_TYPE_LEVEL_LOW + 0x7800 0x0 0x0 0x3 &ipic 17 IRQ_TYPE_LEVEL_LOW + 0x7800 0x0 0x0 0x4 &ipic 17 IRQ_TYPE_LEVEL_LOW /* IDSEL 0x10 - PCI slot */ - 0x8000 0x0 0x0 0x1 &ipic 48 0x8 - 0x8000 0x0 0x0 0x2 &ipic 17 0x8 - 0x8000 0x0 0x0 0x3 &ipic 48 0x8 - 0x8000 0x0 0x0 0x4 &ipic 17 0x8>; + 0x8000 0x0 0x0 0x1 &ipic 48 IRQ_TYPE_LEVEL_LOW + 0x8000 0x0 0x0 0x2 &ipic 17 IRQ_TYPE_LEVEL_LOW + 0x8000 0x0 0x0 0x3 &ipic 48 IRQ_TYPE_LEVEL_LOW + 0x8000 0x0 0x0 0x4 &ipic 17 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; - interrupts = <66 0x8>; + interrupts = <66 IRQ_TYPE_LEVEL_LOW>; bus-range = <0x0 0x0>; ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 0x42000000 0 0x80000000 0x80000000 0 0x10000000 @@ -329,10 +337,10 @@ pci1: pcie@e0009000 { 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; bus-range = <0 255>; interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; + interrupt-map = <0 0 0 1 &ipic 1 IRQ_TYPE_LEVEL_LOW + 0 0 0 2 &ipic 1 IRQ_TYPE_LEVEL_LOW + 0 0 0 3 &ipic 1 IRQ_TYPE_LEVEL_LOW + 0 0 0 4 &ipic 1 IRQ_TYPE_LEVEL_LOW>; clock-frequency = <0>; }; @@ -347,10 +355,10 @@ pci2: pcie@e000a000 { 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>; bus-range = <0 255>; interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; + interrupt-map = <0 0 0 1 &ipic 2 IRQ_TYPE_LEVEL_LOW + 0 0 0 2 &ipic 2 IRQ_TYPE_LEVEL_LOW + 0 0 0 3 &ipic 2 IRQ_TYPE_LEVEL_LOW + 0 0 0 4 &ipic 2 IRQ_TYPE_LEVEL_LOW>; clock-frequency = <0>; }; }; diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts index b39903c8813d194c104d1e22c6167d8a9cea0076..2ea71514900131893a70b44bab7bcc0bf4d86e44 100644 --- a/arch/powerpc/boot/dts/mpc8315erdb.dts +++ b/arch/powerpc/boot/dts/mpc8315erdb.dts @@ -87,13 +87,13 @@ ethernet@24000 { mdio@520 { phy0: ethernet-phy@0 { interrupt-parent = <&ipic>; - interrupts = <20 0x8>; + interrupts = <20 IRQ_TYPE_LEVEL_LOW>; reg = <0x0>; }; phy1: ethernet-phy@1 { interrupt-parent = <&ipic>; - interrupts = <19 0x8>; + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; reg = <0x1>; }; From patchwork Thu Jan 2 18:31:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 2029251 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Thu, 2 Jan 2025 18:32:21 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Thu, 02 Jan 2025 19:31:45 +0100 Subject: [PATCH 04/19] powerpc: dts: mpc8315e: Add labels to peripherals X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250102-mpc83xx-v1-4-86f78ba2a7af@posteo.net> References: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> In-Reply-To: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> To: Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Madhavan Srinivasan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Frank Li Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?J=2E_Neu?= =?utf-8?q?sch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1735842735; l=2746; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=JWG24yKk9tKJztiNlXB5Hna42dBR5XCLmCda3s4BqBY=; b=Fqpu6KOl1IDStHphfeNxyTVjxQMUqH96DufHMXOAJgSY48bPEprSxuxfwuayggOiI9f8hAsrn QtlDpQcen04AYKtIDo3uRqnWQR11t8Z30E826BlCY42QKv++IhxX/ns X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-2.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" Labels can be used in board-specific devicetrees to refer to nodes more conveniently. mpc8315erdb.dtb remains identical after this patch. Signed-off-by: J. Neuschäfer --- arch/powerpc/boot/dts/mpc8315e.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/powerpc/boot/dts/mpc8315e.dtsi b/arch/powerpc/boot/dts/mpc8315e.dtsi index 8741482905f0f30bf893a08b2602fdc6e74c23ff..2531e702648f1bf922a7112c9ddaeac1c3113572 100644 --- a/arch/powerpc/boot/dts/mpc8315e.dtsi +++ b/arch/powerpc/boot/dts/mpc8315e.dtsi @@ -44,7 +44,7 @@ memory { reg = <0 0>; }; - localbus@e0005000 { + localbus: localbus@e0005000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus"; @@ -62,13 +62,13 @@ immr@e0000000 { reg = <0xe0000000 0x00000200>; bus-frequency = <0>; - wdt@200 { + wdt: wdt@200 { device_type = "watchdog"; compatible = "mpc83xx_wdt"; reg = <0x200 0x100>; }; - i2c@3000 { + i2c: i2c@3000 { #address-cells = <1>; #size-cells = <0>; cell-index = <0>; @@ -79,7 +79,7 @@ i2c@3000 { dfsrr; }; - spi@7000 { + spi: spi@7000 { cell-index = <0>; compatible = "fsl,spi"; reg = <0x7000 0x1000>; @@ -127,7 +127,7 @@ dma-channel@180 { }; }; - usb@23000 { + usb: usb@23000 { compatible = "fsl-usb2-dr"; reg = <0x23000 0x1000>; #address-cells = <1>; @@ -152,7 +152,7 @@ enet0: ethernet@24000 { <34 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; - mdio@520 { + mdio0: mdio@520 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,gianfar-mdio"; @@ -175,7 +175,7 @@ enet1: ethernet@25000 { <37 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; - mdio@520 { + mdio1: mdio@520 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,gianfar-tbi"; @@ -203,7 +203,7 @@ serial1: serial@4600 { interrupt-parent = <&ipic>; }; - crypto@30000 { + security: crypto@30000 { compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; @@ -216,7 +216,7 @@ crypto@30000 { fsl,descriptor-types-mask = <0x3a30abf>; }; - sata@18000 { + sata0: sata@18000 { compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; reg = <0x18000 0x1000>; cell-index = <1>; @@ -224,7 +224,7 @@ sata@18000 { interrupt-parent = <&ipic>; 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Thu, 2 Jan 2025 18:32:21 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Thu, 02 Jan 2025 19:31:46 +0100 Subject: [PATCH 05/19] powerpc: dts: mpc8315e: Disable peripherals by default X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250102-mpc83xx-v1-5-86f78ba2a7af@posteo.net> References: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> In-Reply-To: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> To: Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Madhavan Srinivasan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Frank Li Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?J=2E_Neu?= =?utf-8?q?sch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1735842735; l=4954; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=AV1vR3Ihm+C41mrCgb+tb12Q+MpI9SpagJ/QC+gpFGE=; b=wAqdmKvmfb4haqZrhf4yvl5DxXw4IUZoX/quIcvJQO27pvqD85KdryfzhT56KvFnLJJyCWpdQ 1mLSXu6XjPqC04bSBxUiu5G7ZBCVaZiJa5DxY+VGR/xmQwAai02WvEV X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-5.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" Peripherals with a connection to the outside of the chip aren't necessarily used on all board designs, so disable them by default, and enable them per-board. Signed-off-by: J. Neuschäfer --- arch/powerpc/boot/dts/mpc8315e.dtsi | 15 +++++++++++++++ arch/powerpc/boot/dts/mpc8315erdb.dts | 12 ++++++++++++ 2 files changed, 27 insertions(+) diff --git a/arch/powerpc/boot/dts/mpc8315e.dtsi b/arch/powerpc/boot/dts/mpc8315e.dtsi index 2531e702648f1bf922a7112c9ddaeac1c3113572..7e61a78850433fa43795a2a5fb06ce6a148bb11d 100644 --- a/arch/powerpc/boot/dts/mpc8315e.dtsi +++ b/arch/powerpc/boot/dts/mpc8315e.dtsi @@ -51,6 +51,7 @@ localbus: localbus@e0005000 { reg = <0xe0005000 0x1000>; interrupts = <77 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; + status = "disabled"; }; immr@e0000000 { @@ -77,6 +78,7 @@ i2c: i2c@3000 { interrupts = <14 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; dfsrr; + status = "disabled"; }; spi: spi@7000 { @@ -86,6 +88,7 @@ spi: spi@7000 { interrupts = <16 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; mode = "cpu"; + status = "disabled"; }; dma@82a8 { @@ -135,6 +138,7 @@ usb: usb@23000 { interrupt-parent = <&ipic>; interrupts = <38 IRQ_TYPE_LEVEL_LOW>; phy_type = "utmi"; + status = "disabled"; }; enet0: ethernet@24000 { @@ -151,12 +155,14 @@ enet0: ethernet@24000 { <33 IRQ_TYPE_LEVEL_LOW>, <34 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; + status = "disabled"; mdio0: mdio@520 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,gianfar-mdio"; reg = <0x520 0x20>; + status = "disabled"; }; }; @@ -174,12 +180,14 @@ enet1: ethernet@25000 { <36 IRQ_TYPE_LEVEL_LOW>, <37 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; + status = "disabled"; mdio1: mdio@520 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,gianfar-tbi"; reg = <0x520 0x20>; + status = "disabled"; }; }; @@ -191,6 +199,7 @@ serial0: serial@4500 { clock-frequency = <133333333>; interrupts = <9 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; + status = "disabled"; }; serial1: serial@4600 { @@ -201,6 +210,7 @@ serial1: serial@4600 { clock-frequency = <133333333>; interrupts = <10 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; + status = "disabled"; }; security: crypto@30000 { @@ -222,6 +232,7 @@ sata0: sata@18000 { cell-index = <1>; interrupts = <44 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; + status = "disabled"; }; sata1: sata@19000 { @@ -230,6 +241,7 @@ sata1: sata@19000 { cell-index = <2>; interrupts = <45 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; + status = "disabled"; }; gtm1: timer@500 { @@ -324,6 +336,7 @@ pci0: pci@e0008500 { 0xe0008300 0x8>; /* config space access registers */ compatible = "fsl,mpc8349-pci"; device_type = "pci"; + status = "disabled"; }; pci1: pcie@e0009000 { @@ -342,6 +355,7 @@ pci1: pcie@e0009000 { 0 0 0 3 &ipic 1 IRQ_TYPE_LEVEL_LOW 0 0 0 4 &ipic 1 IRQ_TYPE_LEVEL_LOW>; clock-frequency = <0>; + status = "disabled"; }; pci2: pcie@e000a000 { @@ -360,5 +374,6 @@ pci2: pcie@e000a000 { 0 0 0 3 &ipic 2 IRQ_TYPE_LEVEL_LOW 0 0 0 4 &ipic 2 IRQ_TYPE_LEVEL_LOW>; clock-frequency = <0>; + status = "disabled"; }; }; diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts index 2ea71514900131893a70b44bab7bcc0bf4d86e44..28c06faf8ce0eb330a0108eba321b4c1127a8ae2 100644 --- a/arch/powerpc/boot/dts/mpc8315erdb.dts +++ b/arch/powerpc/boot/dts/mpc8315erdb.dts @@ -25,6 +25,8 @@ memory { }; localbus@e0005000 { + status = "okay"; + // CS0 and CS1 are swapped when // booting from nand, but the // addresses are the same. @@ -83,8 +85,11 @@ ethernet@24000 { tbi-handle = <&tbi0>; phy-handle = < &phy0 >; fsl,magic-packet; + status = "okay"; mdio@520 { + status = "okay"; + phy0: ethernet-phy@0 { interrupt-parent = <&ipic>; interrupts = <20 IRQ_TYPE_LEVEL_LOW>; @@ -108,8 +113,11 @@ ethernet@25000 { tbi-handle = <&tbi1>; phy-handle = < &phy1 >; fsl,magic-packet; + status = "okay"; mdio@520 { + status = "okay"; + tbi1: tbi-phy@11 { reg = <0x11>; device_type = "tbi-phy"; @@ -119,6 +127,8 @@ tbi1: tbi-phy@11 { }; pcie@e0009000 { + status = "okay"; + pcie@0 { #address-cells = <3>; #size-cells = <2>; @@ -134,6 +144,8 @@ pcie@0 { }; pcie@e000a000 { + status = "okay"; + pcie@0 { #address-cells = <3>; #size-cells = <2>; From patchwork Thu Jan 2 18:31:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 2029247 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Thu, 2 Jan 2025 18:32:21 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Thu, 02 Jan 2025 19:31:47 +0100 Subject: [PATCH 06/19] powerpc: dts: mpc8315e: Add missing #cells properties to SPI bus X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250102-mpc83xx-v1-6-86f78ba2a7af@posteo.net> References: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> In-Reply-To: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> To: Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Madhavan Srinivasan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Frank Li Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?J=2E_Neu?= =?utf-8?q?sch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1735842735; l=702; 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Neuschäfer" These properties are required by the spi-controller binding. Signed-off-by: J. Neuschäfer --- arch/powerpc/boot/dts/mpc8315e.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/boot/dts/mpc8315e.dtsi b/arch/powerpc/boot/dts/mpc8315e.dtsi index 7e61a78850433fa43795a2a5fb06ce6a148bb11d..f9d1b48b08799822d33f5e7606030019a19b4743 100644 --- a/arch/powerpc/boot/dts/mpc8315e.dtsi +++ b/arch/powerpc/boot/dts/mpc8315e.dtsi @@ -88,6 +88,8 @@ spi: spi@7000 { interrupts = <16 IRQ_TYPE_LEVEL_LOW>; interrupt-parent = <&ipic>; mode = "cpu"; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; }; From patchwork Thu Jan 2 18:31:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 2029237 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=LXYNMcH2; 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Thu, 2 Jan 2025 18:32:21 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Thu, 02 Jan 2025 19:31:48 +0100 Subject: [PATCH 07/19] powerpc: dts: mpc8315erdb: Add missing model property X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250102-mpc83xx-v1-7-86f78ba2a7af@posteo.net> References: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> In-Reply-To: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> To: Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Madhavan Srinivasan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Frank Li Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?J=2E_Neu?= =?utf-8?q?sch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1735842735; l=689; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=i2m+p125oOMi3j6Rp3j8r0hNlqhm4mTOC27OluxVi5k=; b=jz8B5ynuEhfVPpf7QliuUWYwuGE/+fLv6S4QEVZTSRKh9vuo7oKhx4K5ZB/3HV0XhXRxx4tyP owTd0RUdADtB3j8aGvSMkGCN+0FQkHxUZK5mCetV0Jkq/2JyV31JdqG X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-2.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" The mpc8315erdb devicetree did thus far not have a /model property, even though it is required by the devicetree specification. Signed-off-by: J. Neuschäfer --- arch/powerpc/boot/dts/mpc8315erdb.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts index 28c06faf8ce0eb330a0108eba321b4c1127a8ae2..44e82d8b26302b72676badd70c5ab26eba3d08e4 100644 --- a/arch/powerpc/boot/dts/mpc8315erdb.dts +++ b/arch/powerpc/boot/dts/mpc8315erdb.dts @@ -9,6 +9,7 @@ / { compatible = "fsl,mpc8315erdb"; + model = "MPC8315E-RDB"; aliases { ethernet0 = &enet0; From patchwork Thu Jan 2 18:31:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 2029273 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=gaKoDQH1; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; 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a=ed25519-sha256; t=1735842735; l=2597; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=gwgToc0kzqB+BXy5IXnLTTOxYYECLTdDBZaVu6gPiyM=; b=Zf345/Cls673vfLPBl8FI50FAUmAxpsp1Fvxct7loBav9XCC+T9a69RO9whzma99z7p8gIrp/ E1AIylSmAzrBvcSfhIjrrIb6Bww/v+hPd4kyWILMBuuSU4x7NQybIIk X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-3.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,PDS_OTHER_BAD_TLD, RCVD_IN_DNSWL_HI,SPF_HELO_NONE,SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" The Flat Image Tree (FIT) format combines a kernel, a set of devicetrees, and optionally additional resources into a single file that can be loaded by a bootloader such as U-Boot. Generating a FIT image as part of the kernel build reduces the need for additional build scripts, and produces a single boot image without falling back to one of the many legacy methods implemented in arch/powerpc/boot/Makefile, which would require additional changes for arch/powerpc/boot for each board. Signed-off-by: J. Neuschäfer --- Checkpatch warns: arch/powerpc/boot/Makefile:364: WARNING: Possible repeated word: 'Image' for this line: image-y += Image image.fit This is bogus and can be ignored. --- arch/powerpc/Makefile | 3 ++- arch/powerpc/boot/Makefile | 11 +++++++++++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile index f3804103c56ccfdb16289468397ccaea71bf721e..693c82c06072fb0529288736efee460e375b2476 100644 --- a/arch/powerpc/Makefile +++ b/arch/powerpc/Makefile @@ -225,7 +225,7 @@ KBUILD_CFLAGS += $(cflags-y) all: zImage # With make 3.82 we cannot mix normal and wildcard targets -BOOT_TARGETS1 := zImage zImage.initrd uImage +BOOT_TARGETS1 := zImage zImage.initrd uImage image.fit BOOT_TARGETS2 := zImage% dtbImage% treeImage.% cuImage.% simpleImage.% uImage.% PHONY += $(BOOT_TARGETS1) $(BOOT_TARGETS2) @@ -237,6 +237,7 @@ $(BOOT_TARGETS1): vmlinux $(BOOT_TARGETS2): vmlinux $(Q)$(MAKE) $(build)=$(boot) $(patsubst %,$(boot)/%,$@) +image.fit: dtbs PHONY += bootwrapper_install bootwrapper_install: diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index 1ff6ad4f6cd27755ea7bfe5b02af4a47ca33cea7..e0c62ab1cc5af99e43f6639be11bf1c64d352db8 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile @@ -360,6 +360,9 @@ ifdef CONFIG_PPC32 image-$(CONFIG_PPC_PMAC) += zImage.coff zImage.miboot endif +# FIT support (generic) +image-y += Image image.fit + # Allow extra targets to be added to the defconfig image-y += $(CONFIG_EXTRA_TARGETS) @@ -398,6 +401,14 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits) $(obj)/dts/%.dtb FORCE $(obj)/vmlinux.strip: vmlinux $(STRIP) -s -R .comment $< -o $@ +OBJCOPYFLAGS += -O binary + +$(obj)/Image: vmlinux FORCE + $(call if_changed,objcopy) + +$(obj)/image.fit: $(obj)/Image $(obj)/dts/dtbs-list FORCE + $(call if_changed,fit) + $(obj)/uImage: vmlinux $(wrapperbits) FORCE $(call if_changed,wrap,uboot) From patchwork Thu Jan 2 18:31:50 2025 Content-Type: text/plain; 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bh=yfwmhYwiUSm9JlLr+hh+O0Bt/U2vgFRgg3zxSAIQS9o=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ZHFVUiOZiYkzaQGtgHJr+NXmNv1sffFV7GHI16jLrGBqZ5qcRfVZwGTDEPXATAQRH 1H6be+UlJgs9mhvKJZeiAebyFVbZPMu5ZGuI1HLiGyObGaz59vlovSAoPiM4vaFqqp z9XmSGKxj+9FtbqITxq3vx/SRSHrLU7ejKmiUQe93VY/x9xM/CoTZQxuKIcptf9KwZ zlimeCR9a1cD4iCFWltYUX+ZB6SsmqPopuJ5wR47FnL/kNhx/QxkVWalLWizfzWM3g 3MMPM+CFMpDq8w2jdMqaD3dvWijBGChUZE24W3AjLnyRNhFaBKSePuOJYCweCJDC7T tvAOxuX1uagOw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25334E7718B; Thu, 2 Jan 2025 18:32:22 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Thu, 02 Jan 2025 19:31:50 +0100 Subject: [PATCH 09/19] powerpc: boot: Build devicetrees when CONFIG_MPC831x=y X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250102-mpc83xx-v1-9-86f78ba2a7af@posteo.net> References: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> In-Reply-To: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> To: Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Madhavan Srinivasan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Frank Li Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?J=2E_Neu?= =?utf-8?q?sch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1735842735; l=893; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=XjJyRLNOBRP8dGxJA13fx4b2smChJ2cfKB3451J6wqs=; b=gmnc4iytyw/+dvM1kg+2tdYLt8bjZsFxnmFDZtWUSklxe3fMmDu7KXGlPW8DD6cw1T4smCFzT mLXZOMO1dRiCkO80JYXYkXfSTVloW/oUetQpX+gD5lCg5yh6cqAzjFz X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-2.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" In order to produce useful FIT images, the kernel needs to know which devicetrees to build. To that end, follow the same approach as other architectures, and enable devicetrees per platform. Signed-off-by: J. Neuschäfer --- I've only enabled MPC831x devicetrees, because that's the hardware I have. --- arch/powerpc/boot/dts/Makefile | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/powerpc/boot/dts/Makefile b/arch/powerpc/boot/dts/Makefile index 0cd0d8558b475cfe342f36f4b78240ef88dd2e37..6aee895d5baaa2c978d4b1c82a6d198d9e166ea2 100644 --- a/arch/powerpc/boot/dts/Makefile +++ b/arch/powerpc/boot/dts/Makefile @@ -3,3 +3,8 @@ subdir-y += fsl dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(src)/%.dts,%.dtb, $(wildcard $(src)/*.dts)) + +dtb-$(CONFIG_MPC831x) += \ + kmeter1.dtb \ + mpc8313erdb.dtb \ + mpc8315erdb.dtb From patchwork Thu Jan 2 18:31:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 2029274 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; 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Thu, 2 Jan 2025 18:32:22 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Thu, 02 Jan 2025 19:31:51 +0100 Subject: [PATCH 10/19] powerpc: dts: Add MPC8314E devicetree X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250102-mpc83xx-v1-10-86f78ba2a7af@posteo.net> References: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> In-Reply-To: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> To: Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Madhavan Srinivasan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Frank Li Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?J=2E_Neu?= =?utf-8?q?sch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1735842735; l=700; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=iJjsNtyNoaNU2zY47Wv9zZ+eAHSNUrFXjwgqJp3n0GM=; b=/hziTWMuTlV1P/hE3RO9qdSuDxn2Tgq0iTXT9NLI1DfKaJCijj1zAtFX2/zROAJn+CSjfQIeV aVmXNG9Z377Bcy1AgtoBVBdsz5VRDJOAmy4W6DgRCvAQXW3mczS1ogD X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-5.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" The MPC8314E is a variant of the MPC8315E without SATA controllers. Signed-off-by: J. Neuschäfer --- arch/powerpc/boot/dts/mpc8314e.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/powerpc/boot/dts/mpc8314e.dtsi b/arch/powerpc/boot/dts/mpc8314e.dtsi new file mode 100644 index 0000000000000000000000000000000000000000..65a96a485dded5d4918d96b38778399d2f348190 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8314e.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2024 J. 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Neuschäfer" This is for the MPC831{4,5}{,E} SoCs. Signed-off-by: J. Neuschäfer Reviewed-by: Linus Walleij Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/gpio/fsl,qoriq-gpio.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/gpio/fsl,qoriq-gpio.yaml b/Documentation/devicetree/bindings/gpio/fsl,qoriq-gpio.yaml index 84fd82291ee4031a55f704977ee0db084caef08a..f1b60ab3f356b99f936d7d8bd5e03f9ffabd0f93 100644 --- a/Documentation/devicetree/bindings/gpio/fsl,qoriq-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/fsl,qoriq-gpio.yaml @@ -15,6 +15,7 @@ properties: - enum: - fsl,mpc5121-gpio - fsl,mpc5125-gpio + - fsl,mpc8314-gpio - fsl,mpc8349-gpio - fsl,mpc8572-gpio - fsl,mpc8610-gpio From patchwork Thu Jan 2 18:31:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 2029271 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Thu, 2 Jan 2025 18:32:22 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Thu, 02 Jan 2025 19:31:53 +0100 Subject: [PATCH 12/19] powerpc: dts: mpc8315e: Add GPIO controller node X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250102-mpc83xx-v1-12-86f78ba2a7af@posteo.net> References: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> In-Reply-To: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> To: Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Madhavan Srinivasan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Frank Li Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?J=2E_Neu?= =?utf-8?q?sch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1735842735; l=867; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=53IPkv/+qKgm0/DViEM4D8nVx9tPgdRG/PC4lnN6+fc=; b=grga97ENyMGY97nIZwfxEfbacZt96cEOsFzwdrvwrUslDs8ieVW4MRzpzYExkcZ8F3W/eVin6 JigBllwbn/YDXqHVrrZjnesI72P8Hf5rc+QgiKZ0KM9ibGG5RuJEr76 X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-2.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" This node das previously missing from the device tree. Signed-off-by: J. Neuschäfer --- arch/powerpc/boot/dts/mpc8315e.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/powerpc/boot/dts/mpc8315e.dtsi b/arch/powerpc/boot/dts/mpc8315e.dtsi index f9d1b48b08799822d33f5e7606030019a19b4743..ad6131d913fd45ec5b693d85e031ec520fb28b2f 100644 --- a/arch/powerpc/boot/dts/mpc8315e.dtsi +++ b/arch/powerpc/boot/dts/mpc8315e.dtsi @@ -302,6 +302,15 @@ pmc: power@b00 { interrupt-parent = <&ipic>; fsl,mpc8313-wakeup-timer = <>m1>; }; + + gpio: gpio-controller@c00 { + compatible = "fsl,mpc8314-gpio"; + reg = <0xc00 0x100>; + interrupts = <74 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&ipic>; + gpio-controller; + #gpio-cells = <2>; + }; }; pci0: pci@e0008500 { From patchwork Thu Jan 2 18:31:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 2029270 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Thu, 2 Jan 2025 18:32:22 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Thu, 02 Jan 2025 19:31:54 +0100 Subject: [PATCH 13/19] gpio: mpc8xxx: Add MPC8314 support X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250102-mpc83xx-v1-13-86f78ba2a7af@posteo.net> References: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> In-Reply-To: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> To: Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Madhavan Srinivasan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Frank Li Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?J=2E_Neu?= =?utf-8?q?sch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1735842735; l=815; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=IzujOZGh0Kdf7MR+FJDNa5Xge4jQ4IpjSUXuri6ZMCE=; b=Bg2Rwn5IPjZBCymZj2nPxRzynUvjtK0um3nebcnWTTRob7hfmVj+4hlVA6truDJxyBTZK1mYV E2XU37nLAAqCiLpCLQ1oQAs3PvepM7Q7YTnN9sKE6no/AuaZzWCsdZ7 X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-2.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" GPIO input, output, and interrupts have been tested on a MPC8314E board. Signed-off-by: J. Neuschäfer Reviewed-by: Linus Walleij --- drivers/gpio/gpio-mpc8xxx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c index 24417c3247b0a832ad15fe93e9ba0339eac3b883..0cd4c36ae8aaf075a54795810d5eea755325d771 100644 --- a/drivers/gpio/gpio-mpc8xxx.c +++ b/drivers/gpio/gpio-mpc8xxx.c @@ -285,6 +285,7 @@ static const struct mpc8xxx_gpio_devtype mpc8xxx_gpio_devtype_default = { }; static const struct of_device_id mpc8xxx_gpio_ids[] = { + { .compatible = "fsl,mpc8314-gpio", }, { .compatible = "fsl,mpc8349-gpio", }, { .compatible = "fsl,mpc8572-gpio", .data = &mpc8572_gpio_devtype, }, { .compatible = "fsl,mpc8610-gpio", }, From patchwork Thu Jan 2 18:31:55 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 2029276 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Thu, 2 Jan 2025 18:32:22 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Thu, 02 Jan 2025 19:31:55 +0100 Subject: [PATCH 14/19] powerpc: mpc83xx: Switch to of_platform_populate X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250102-mpc83xx-v1-14-86f78ba2a7af@posteo.net> References: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> In-Reply-To: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> To: Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Madhavan Srinivasan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Frank Li Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?J=2E_Neu?= =?utf-8?q?sch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1735842735; l=1933; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=+IqpHh5XW/bYptAKTy7ofbzqqjbf0TgTP59VXCoHzqo=; b=9e/ltqkhbkqoYmAvt8DHPwJqvqjwqUwV7mVFU5GYMkehfc+vd97JJq/T1F6hT+F/IFNl9WZQ3 aOurraZE/mLDNmRzKchRUir6Kg4EjKmgIvfmKynORihXWTpBQ5uGZnh X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-5.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" Quoting from drivers/of/platform.c: > of_platform_populate() - [...] > Similar to of_platform_bus_probe(), this function walks the device > tree and creates devices from nodes. It differs in that it follows > the modern convention of requiring all device nodes to have a > 'compatible' property, and it is suitable for creating devices which > are children of the root node (of_platform_bus_probe will only create > children of the root which are selected by the @matches argument). This is useful for new board ports because it means that the C code does not have to anticipate every node that is placed directly under the root. As a consequence, the of_bus_ids list can be much shorter, and I've trimmed it to the necessary parts: - device-type = "soc" and compatible = "simple-bus" for the SoC bus - compatible = "gianfar" for the Ethernet controller (TSEC), which may contain an MDIO bus, which needs to be probed, as a subnode Signed-off-by: J. Neuschäfer --- arch/powerpc/platforms/83xx/misc.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/arch/powerpc/platforms/83xx/misc.c b/arch/powerpc/platforms/83xx/misc.c index 1135c1ab923cc120f377a0d98767fef686cad1fe..bf522ee007bbb1429233355f668fc8563d8ca4e2 100644 --- a/arch/powerpc/platforms/83xx/misc.c +++ b/arch/powerpc/platforms/83xx/misc.c @@ -94,18 +94,14 @@ void __init mpc83xx_ipic_init_IRQ(void) static const struct of_device_id of_bus_ids[] __initconst = { { .type = "soc", }, - { .compatible = "soc", }, { .compatible = "simple-bus" }, { .compatible = "gianfar" }, - { .compatible = "gpio-leds", }, - { .type = "qe", }, - { .compatible = "fsl,qe", }, {}, }; int __init mpc83xx_declare_of_platform_devices(void) { - of_platform_bus_probe(NULL, of_bus_ids, NULL); + of_platform_populate(NULL, of_bus_ids, NULL, NULL); return 0; } From patchwork Thu Jan 2 18:31:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 2029275 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Thu, 2 Jan 2025 18:32:22 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Thu, 02 Jan 2025 19:31:56 +0100 Subject: [PATCH 15/19] dt-bindings: vendor-prefixes: Add LANCOM Systems GmbH X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250102-mpc83xx-v1-15-86f78ba2a7af@posteo.net> References: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> In-Reply-To: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> To: Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Madhavan Srinivasan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Frank Li Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?J=2E_Neu?= =?utf-8?q?sch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1735842735; l=888; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=cPDycNl9By3Hm5+1t2n1h/bJeTOlBcJ2oe1IgSAfN6U=; b=JRK8A4LytpWFYp4wFnkZVdi329GFgJOOHAqqi81i/HoTMERuo7v01lvfwpwuGoeDe15XGIdFE kebxru9TD1CBOOAasWFhF3rU6HfzY4Rac07KuLWFyVyBs2GeaUMP2bo X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-5.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" LANCOM Systems is a manufacturer of networking equipment. https://www.lancom-systems.com/ Signed-off-by: J. Neuschäfer Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index da01616802c76830a520594a69bd6a2e0231df0d..56d88162b184e45d6b05fc749d77ca952a5eb2e2 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -812,6 +812,8 @@ patternProperties: description: Laird PLC "^lamobo,.*": description: Ketai Huajie Technology Co., Ltd. + "^lancom,.*": + description: LANCOM Systems GmbH "^lantiq,.*": description: Lantiq Semiconductor "^lattice,.*": From patchwork Thu Jan 2 18:31:57 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 2029278 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Thu, 2 Jan 2025 18:32:22 +0000 (UTC) From: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= Date: Thu, 02 Jan 2025 19:31:57 +0100 Subject: [PATCH 16/19] powerpc: dts: Add LANCOM NWAPP2 board devicetree X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250102-mpc83xx-v1-16-86f78ba2a7af@posteo.net> References: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> In-Reply-To: <20250102-mpc83xx-v1-0-86f78ba2a7af@posteo.net> To: Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Madhavan Srinivasan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Frank Li Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, =?utf-8?q?J=2E_Neu?= =?utf-8?q?sch=C3=A4fer?= X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1735842735; l=8029; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=ZKOoalO4wmhQEAwxw29HUheREeAXcDDs75lwK/wrODY=; b=+jeoW7i1ak3Bn5aA7D719CI2NoS8bUwteML/RwSvhKc9oJRv2rTcoj8oRl6e/El4TejDwyZd0 rsXEKhiclnkCyPOhl1JFSi470/dXtl3IfQvBXXd5q5jqAFcPzaoAlvI X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-5.5 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI,SPF_HELO_NONE, SPF_PASS autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" What works so far: - serial port - LEDs - Ethernet - PCIe (port 1 tested) - Flash access What doesn't work: - Access of the YAFFS file system preinstalled by the original firmware (mainline Linux does not include the YAFFS file system) - Writing NAND flash from Linux and reading the same from U-Boot (there is some issue related to ECC) Signed-off-by: J. Neuschäfer --- Note: This patch requires the following patchset as it defines bindings used in lancom-nwapp2.dts: [PATCH v2 0/3] gpio: 74HC595 / 74x164 shift register improvements --- arch/powerpc/boot/dts/Makefile | 1 + arch/powerpc/boot/dts/lancom-nwapp2.dts | 276 ++++++++++++++++++++++++++++++++ 2 files changed, 277 insertions(+) diff --git a/arch/powerpc/boot/dts/Makefile b/arch/powerpc/boot/dts/Makefile index 6aee895d5baaa2c978d4b1c82a6d198d9e166ea2..43e20d8b776b1716a91e6ec8e135c0a45c8e8c77 100644 --- a/arch/powerpc/boot/dts/Makefile +++ b/arch/powerpc/boot/dts/Makefile @@ -6,5 +6,6 @@ dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(src)/%.dts,%.dtb, $(wildcard $(src)/*. dtb-$(CONFIG_MPC831x) += \ kmeter1.dtb \ + lancom-nwapp2.dtb \ mpc8313erdb.dtb \ mpc8315erdb.dtb diff --git a/arch/powerpc/boot/dts/lancom-nwapp2.dts b/arch/powerpc/boot/dts/lancom-nwapp2.dts new file mode 100644 index 0000000000000000000000000000000000000000..d46d94c27ecb91db32c8acb4136cb6e8d0df52f5 --- /dev/null +++ b/arch/powerpc/boot/dts/lancom-nwapp2.dts @@ -0,0 +1,276 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright 2024 J. Neuschäfer +// +// LANCOM NWAPP2, marketed as: +// - LANCOM L-321agn Wireless (R2) +// - LANCOM L-322agn dual Wireless (R2) +// - LANCOM L-322E Wireless +#include "mpc8314e.dtsi" + +#include +#include +#include + +/ { + compatible = "lancom,nwapp2", "fsl,mpc8314e"; + model = "LANCOM NWAPP2"; + + memory { + reg = <0x00000000 0x08000000>; // 128MB at 0 + }; + + aliases { + serial0 = &serial0; + pci1 = &pci1; + pci2 = &pci2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-watchdog { + compatible = "linux,wdt-gpio"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + hw_algo = "toggle"; + hw_margin_ms = <1000>; + always-running; + }; + + gpio-restart { + compatible = "gpio-restart"; + gpios = <&gpio 10 GPIO_ACTIVE_HIGH>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset-button { + label = "Reset Button"; + linux,code = ; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + led_power_red: led-0 { + label = "red:power"; + gpios = <&expander 0 GPIO_ACTIVE_HIGH>; + color = ; + }; + + led_power_green: led-1 { + label = "green:power"; + gpios = <&expander 1 GPIO_ACTIVE_HIGH>; + color = ; + }; + + led_wlan_link_red: led-2 { + label = "red:wlan-link"; + gpios = <&expander 2 GPIO_ACTIVE_LOW>; + color = ; + }; + + led_wlan_link_green: led-3 { + label = "green:wlan-link"; + gpios = <&expander 3 GPIO_ACTIVE_LOW>; + color = ; + }; + + led_wlan_data_red: led-4 { + label = "red:wlan-data"; + gpios = <&expander 4 GPIO_ACTIVE_HIGH>; + color = ; + }; + + led_eth_red: led-10 { + label = "red:eth"; + gpios = <&expander 10 GPIO_ACTIVE_HIGH>; + color = ; + }; + + led_power_top_red: led-12 { + label = "red:power-top"; + gpios = <&expander 12 GPIO_ACTIVE_LOW>; + color = ; + }; + + led_power_top_green: led-13 { + label = "green:power-top"; + gpios = <&expander 13 GPIO_ACTIVE_LOW>; + color = ; + }; + + led_wlan_top_red: led-14 { + label = "red:wlan-top"; + gpios = <&expander 14 GPIO_ACTIVE_LOW>; + color = ; + }; + + led_wlan_top_green: led-15 { + label = "green:wlan-top"; + gpios = <&expander 15 GPIO_ACTIVE_LOW>; + color = ; + }; + }; + + led-power { + label = "multicolor:power"; + compatible = "leds-group-multicolor"; + color = ; + function = LED_FUNCTION_POWER; + leds = <&led_power_red>, <&led_power_green>; + }; + + led-wlan-link { + label = "multicolor:wlan-link"; + compatible = "leds-group-multicolor"; + color = ; + function = LED_FUNCTION_WLAN; + leds = <&led_wlan_link_red>, <&led_wlan_link_green>; + }; + + led-wlan-data { + label = "multicolor:wlan-data"; + compatible = "leds-group-multicolor"; + color = ; + leds = <&led_wlan_data_red>; + }; + + led-eth { + label = "multicolor:eth"; + compatible = "leds-group-multicolor"; + color = ; + leds = <&led_eth_red>; + }; + + led-power-top { + label = "multicolor:power-top"; + compatible = "leds-group-multicolor"; + color = ; + function = LED_FUNCTION_POWER; + leds = <&led_power_top_red>, <&led_power_top_green>; + }; + + led-wlan-top { + label = "multicolor:wlan-top"; + compatible = "leds-group-multicolor"; + color = ; + leds = <&led_wlan_top_red>, <&led_wlan_top_green>; + }; +}; + +&gpio { + gpio-line-names = + /* 0 - 7 */ "DEBUG#", "RESET_BTN#", "", "EXP_LATCH", "", "", "", "PCIE_RST#", + /* 8 - 15 */ "", "", "BOARD_RST", "", "", "", "", "", + /* 16 - 23 */ "", "", "WDT_TOGGLE", "", "", "", "PHY_RST#", "", + /* 24 - 31 */ "", "", "", "", "", "", "", ""; +}; + +&localbus { + status = "okay"; + ranges = <0x0 0x0 0xfe000000 0x00008000>; + + nand@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8315-fcm-nand", + "fsl,elbc-fcm-nand"; + reg = <0x0 0x0 0x2000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "loader1"; + reg = <0x0 0x8000>; + read-only; + }; + + partition@8000 { + label = "loader2"; + reg = <0x8000 0x78000>; + read-only; + }; + + // 0x80000:0xf80000 is designated "loader spare" by + // vendor firmware, but we re-use it for our purposes. + + partition@80000 { + label = "u-boot-env"; + reg = <0x80000 0x80000>; + }; + + partition@100000 { + label = "loader-spare"; + reg = <0x100000 0xf00000>; + }; + + partition@1000000 { + label = "fs"; + reg = <0x1000000 0xf000000>; + /* YAFFS2 filesystem */ + }; + }; + }; +}; + +&enet0 { + status = "okay"; + phy-handle = <&phy>; + phy-mode = "rgmii-id"; +}; + +&mdio0 { + status = "okay"; + compatible = "fsl,gianfar-mdio"; + + phy: ethernet-phy@1 { + /* Atheros AR8032 */ + reg = <1>; + compatible = "ethernet-phy-ieee802.3-c22"; + reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + }; +}; + +&pci1 { + status = "okay"; + ranges = <0x02000000 0 0x88000000 0x88000000 0 0x02000000>, + <0x01000000 0 0x00000000 0xc9080000 0 0x00800000>; +}; + +&pci2 { + status = "okay"; + ranges = <0x02000000 0 0x88000000 0x8c000000 0 0x02000000>, + <0x01000000 0 0x00000000 0xc9900000 0 0x00800000>; +}; + +&serial0 { + status = "okay"; +}; + +&spi { + status = "okay"; + /* + * The GPIO expander doesn't really use a chip select. + * Instead pin 3 is connected to the latch clock input, which triggers + * the transfer of bits from the shift register to the output pins on + * rising edges. Specifying it as a active-low chip select works + * because the CS# is driven high after the serial transfer is done. + */ + cs-gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + + expander: gpio-controller@0 { + reg = <0>; + compatible = "onnn,74hc595a"; + spi-max-frequency = <5000000>; + gpio-controller; + #gpio-cells = <2>; + registers-number = <2>; + }; +}; From patchwork Thu Jan 2 18:31:58 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?J=2E_Neusch=C3=A4fer_via_B4_Relay?= X-Patchwork-Id: 2029277 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=u9oZ6yRk; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; 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a=ed25519-sha256; t=1735842735; l=2583; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=1rOiPx/IBiS+KFXwbtSf4liVE3lSlERERzYFgaFB5Pk=; b=EHF5ZT2XyhVoAK1/ZHS7HRAw+6QSTlpL1V5+eKAfHyxBFSrN3ZC3ueMcFRSU32p1zNVTF1N8r njn7Caw18RADtKpP5TBRZDaoRoT2+3hjH6qkxhOkbbUL4dNPcX8Cdu7 X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-2.0 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS,UPPERCASE_50_75 autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" Run `make mpc83xx_defconfig` and `make savedefconfig`. This reduces the size of subsequent patches that enable/disable functionality. Signed-off-by: J. Neuschäfer --- arch/powerpc/configs/mpc83xx_defconfig | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/configs/mpc83xx_defconfig b/arch/powerpc/configs/mpc83xx_defconfig index 4af5e3e8c5a7f44f5e97b8fb4cdf691686f8967b..525a4f6ae1ff7b51e365668b430fa46ce4938f19 100644 --- a/arch/powerpc/configs/mpc83xx_defconfig +++ b/arch/powerpc/configs/mpc83xx_defconfig @@ -2,10 +2,6 @@ CONFIG_SYSVIPC=y CONFIG_LOG_BUF_SHIFT=14 CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_PARTITION_ADVANCED=y # CONFIG_PPC_CHRP is not set # CONFIG_PPC_PMAC is not set CONFIG_PPC_83xx=y @@ -17,7 +13,9 @@ CONFIG_MPC837x_RDB=y CONFIG_ASP834x=y CONFIG_QE_GPIO=y CONFIG_MATH_EMULATION=y -CONFIG_PCI=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_PARTITION_ADVANCED=y CONFIG_NET=y CONFIG_PACKET=y CONFIG_UNIX=y @@ -31,6 +29,7 @@ CONFIG_IP_PNP_BOOTP=y CONFIG_SYN_COOKIES=y CONFIG_INET_ESP=y # CONFIG_IPV6 is not set +CONFIG_PCI=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y # CONFIG_FW_LOADER is not set @@ -38,7 +37,6 @@ CONFIG_MTD=y CONFIG_MTD_BLOCK=y CONFIG_MTD_CFI=y CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_PHYSMAP_OF=y CONFIG_MTD_RAW_NAND=y CONFIG_MTD_NAND_FSL_ELBC=y CONFIG_BLK_DEV_LOOP=y @@ -46,6 +44,7 @@ CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=32768 CONFIG_BLK_DEV_SD=y CONFIG_CHR_DEV_SG=y +# CONFIG_BLK_DEV_BSG is not set CONFIG_ATA=y CONFIG_SATA_FSL=y CONFIG_SATA_SIL=y @@ -56,7 +55,6 @@ CONFIG_DAVICOM_PHY=y CONFIG_ICPLUS_PHY=y CONFIG_MARVELL_PHY=y CONFIG_VITESSE_PHY=y -CONFIG_INPUT_FF_MEMLESS=m # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_SERIO is not set @@ -68,14 +66,12 @@ CONFIG_I2C_CHARDEV=y CONFIG_I2C_MPC=y CONFIG_WATCHDOG=y CONFIG_HID_A4TECH=y -CONFIG_HID_APPLE=y CONFIG_HID_BELKIN=y CONFIG_HID_CHERRY=y CONFIG_HID_CHICONY=y CONFIG_HID_CYPRESS=y CONFIG_HID_EZKEY=y CONFIG_HID_GYRATION=y -CONFIG_HID_LOGITECH=y CONFIG_HID_MICROSOFT=y CONFIG_HID_MONTEREY=y CONFIG_HID_PANTHERLORD=y @@ -97,8 +93,6 @@ CONFIG_TMPFS=y CONFIG_NFS_FS=y CONFIG_NFS_V4=y CONFIG_ROOT_NFS=y -CONFIG_CRC_T10DIF=y -CONFIG_CRYPTO_ECB=m CONFIG_CRYPTO_PCBC=m -CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_DEV_TALITOS=y +CONFIG_CRC_T10DIF=y From patchwork Thu Jan 2 18:31:59 2025 Content-Type: text/plain; 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a=ed25519-sha256; t=1735842735; l=2040; i=j.ne@posteo.net; s=20240329; h=from:subject:message-id; bh=8cjjERboXjwasKowHGhF3NwI7IcXjBOlMpP4+b1yNfY=; b=pENUUbNIQp734t9sjGGUCevEG+k3KlEAjIRAbzlvB7faecKhTzZv1xTfwPphoY/E0Xtaqb7jX SI7pMQIuWWGCaweTUM4hr3VB+RhS5KSrkYoFXwVlQxu0zFovaY2QLde X-Developer-Key: i=j.ne@posteo.net; a=ed25519; pk=NIe0bK42wNaX/C4bi6ezm7NJK0IQE+8MKBm7igFMIS4= X-Endpoint-Received: by B4 Relay for j.ne@posteo.net/20240329 with auth_id=156 X-Original-From: =?utf-8?q?J=2E_Neusch=C3=A4fer?= Reply-To: j.ne@posteo.net X-Spam-Status: No, score=-2.0 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_PASS,UPPERCASE_50_75 autolearn=disabled version=4.0.0 X-Spam-Checker-Version: SpamAssassin 4.0.0 (2022-12-13) on lists.ozlabs.org From: "J. Neuschäfer" These features are required (or at least helpful) for running Linux on the LANCOM NWAPP2 board: - GPIO restart/watchdog are required for operation - The MPC83xx-internal watchdog is optional - LEDs are nice to have - ATH9K is on a removable mini-PCIe card - ATH803X is the Ethernet PHY installed on the board Signed-off-by: J. Neuschäfer --- arch/powerpc/configs/mpc83xx_defconfig | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/powerpc/configs/mpc83xx_defconfig b/arch/powerpc/configs/mpc83xx_defconfig index 525a4f6ae1ff7b51e365668b430fa46ce4938f19..40dc455517defd42c7dd8a5414531eced79831f2 100644 --- a/arch/powerpc/configs/mpc83xx_defconfig +++ b/arch/powerpc/configs/mpc83xx_defconfig @@ -30,6 +30,9 @@ CONFIG_SYN_COOKIES=y CONFIG_INET_ESP=y # CONFIG_IPV6 is not set CONFIG_PCI=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIEAER=y +CONFIG_PCI_MSI=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y # CONFIG_FW_LOADER is not set @@ -54,6 +57,7 @@ CONFIG_GIANFAR=y CONFIG_DAVICOM_PHY=y CONFIG_ICPLUS_PHY=y CONFIG_MARVELL_PHY=y +CONFIG_AT803X_PHY=y CONFIG_VITESSE_PHY=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set @@ -64,7 +68,17 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MPC=y +CONFIG_SPI=y +CONFIG_SPI_FSL_SPI=y +CONFIG_GPIO_MPC8XXX=y +CONFIG_GPIO_74X164=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO_RESTART=y CONFIG_WATCHDOG=y +CONFIG_GPIO_WATCHDOG=y +CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y +CONFIG_8xxx_WDT=y +CONFIG_REGULATOR=y CONFIG_HID_A4TECH=y CONFIG_HID_BELKIN=y CONFIG_HID_CHERRY=y @@ -82,6 +96,13 @@ CONFIG_USB=y CONFIG_USB_MON=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_FSL=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_CLASS_MULTICOLOR=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_GROUP_MULTICOLOR=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_DS1307=y CONFIG_RTC_DRV_DS1374=y From patchwork Thu Jan 2 18:32:00 2025 Content-Type: text/plain; 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Neuschäfer" Provide a contact for NWAPP2 and other boards. Signed-off-by: J. Neuschäfer --- MAINTAINERS | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 910305c11e8a882da5b49ce5bd55011b93f28c32..6d4717cf7c19c25aa50c5cf1a7956797225a1d21 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12951,6 +12951,14 @@ S: Maintained F: include/net/l3mdev.h F: net/l3mdev +LANCOM BOARD SUPPORT +M: J. Neuschäfer +L: linuxppc-dev@lists.ozlabs.org +F: arch/powerpc/boot/dts/lancom-*.dts +F: arch/powerpc/boot/dts/mpc831* +K: lancom +K: LANCOM + LANDLOCK SECURITY MODULE M: Mickaël Salaün R: Günther Noack