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Fri, 29 Nov 2024 13:34:20 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 4F07440044; Fri, 29 Nov 2024 13:33:41 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 94E8A26FCE0; Fri, 29 Nov 2024 13:33:28 +0100 (CET) Received: from localhost (10.48.87.62) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Fri, 29 Nov 2024 13:33:28 +0100 From: Patrice Chotard To: CC: Patrice CHOTARD , Patrick DELAUNAY , U-Boot STM32 , Tom Rini Subject: [PATCH] ARM: dts: stm32mp13: Add support of ck_usbo_48m in pre-reloc stage Date: Fri, 29 Nov 2024 13:33:25 +0100 Message-ID: <20241129123325.426138-1-patrice.chotard@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.48.87.62] X-ClientProxiedBy: SAFCAS1NODE1.st.com (10.75.90.11) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Patrick Delaunay The clock ck_usbo_48m is a clock source for RCC, so the ck_usbo_48m clock provided by usbphyc need to be probed when RCC clock driver is required, in pre-reloc stage. This patch allow to remove the following warning: clk_register: failed to get ck_usbo_48m device (parent of usbo_k) Signed-off-by: Patrick Delaunay Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp13-u-boot.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi b/arch/arm/dts/stm32mp13-u-boot.dtsi index aa5cfc6e41d..af7edc7e2b2 100644 --- a/arch/arm/dts/stm32mp13-u-boot.dtsi +++ b/arch/arm/dts/stm32mp13-u-boot.dtsi @@ -111,3 +111,8 @@ &syscfg { bootph-all; }; + +&usbphyc { + /* stm32-usbphyc-clk = ck_usbo_48m is a source clock of RCC CCF */ + bootph-all; +};