From patchwork Thu Apr 26 12:17:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 905038 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-91872-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=intel.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="vpKdCdAW"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40Wwzs6JFPz9rxx for ; Thu, 26 Apr 2018 22:17:13 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:date:from:to:subject:message-id:reply-to :mime-version:content-type; q=dns; s=default; b=O395SsDNQfKvWutj SToit4TU0Z/7ZJ2JsSjlchng1SWONVN8z8KRRrLVjz9rQoCKZvciY+hqDNwa7h28 UXR5xGSa36ZEifOjc/cD7SkJRrmp2q4CM9YGojdMcSojE3Z7pUlS4xQG0tNAa+6Y o3gk7odsgsqIoXf18fwPFiXPuxQ= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:date:from:to:subject:message-id:reply-to :mime-version:content-type; s=default; bh=v1oXdUdnlQpLtDjBzRjrYM lEGEQ=; b=vpKdCdAWP2mCpA5CZXMfIsVQa24jeh4sFDY4lKIbVlRTMirF078PIm PwpXom3fcbflYEWreknyliq9YsqZPv0rDGOsCDF2Wgf3Q4IpArAD8V+J/dICHMAw 35Xyeu1Dg+1In6qchFKBSN/xIi1nviO5KAnvk6hJ8MGLdXVxp1jQE= Received: (qmail 111641 invoked by alias); 26 Apr 2018 12:17:05 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 110560 invoked by uid 89); 26 Apr 2018 12:17:03 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-24.8 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, NO_DNS_FOR_FROM autolearn=ham version=3.3.2 spammy= X-HELO: mga14.intel.com X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False X-ExtLoop1: 1 Date: Thu, 26 Apr 2018 05:17:00 -0700 From: "H.J. Lu" To: GNU C Library Subject: [PATCH 1/2] x86-64/setcontext: Pop the pointer into %rdx after syscall Message-ID: <20180426121700.GA30766@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.9.2 (2017-12-15) To prepare for shadow stack support, pop the pointer into %rdx after syscall and use %rdx, instead of %rsi, to restore context. There is no functional change. Any comments? H.J. ---- * sysdeps/unix/sysv/linux/x86_64/setcontext.S (__setcontext): Pop the pointer into %rdx after syscall and use %rdx, instead of %rsi, to restore context. Reviewed-by: Carlos O'Donell --- sysdeps/unix/sysv/linux/x86_64/setcontext.S | 39 +++++++++++++++-------------- 1 file changed, 20 insertions(+), 19 deletions(-) diff --git a/sysdeps/unix/sysv/linux/x86_64/setcontext.S b/sysdeps/unix/sysv/linux/x86_64/setcontext.S index 4a9b662074..5a1bdd8de6 100644 --- a/sysdeps/unix/sysv/linux/x86_64/setcontext.S +++ b/sysdeps/unix/sysv/linux/x86_64/setcontext.S @@ -44,21 +44,22 @@ ENTRY(__setcontext) movl $_NSIG8,%r10d movl $__NR_rt_sigprocmask, %eax syscall - popq %rdi /* Reload %rdi, adjust stack. */ + /* Pop the pointer into RDX which is preserved by the syscall. */ + popq %rdx cfi_adjust_cfa_offset(-8) cmpq $-4095, %rax /* Check %rax for error. */ jae SYSCALL_ERROR_LABEL /* Jump to error handler if error. */ /* Restore the floating-point context. Not the registers, only the rest. */ - movq oFPREGS(%rdi), %rcx + movq oFPREGS(%rdx), %rcx fldenv (%rcx) - ldmxcsr oMXCSR(%rdi) + ldmxcsr oMXCSR(%rdx) /* Load the new stack pointer, the preserved registers and registers used for passing args. */ - cfi_def_cfa(%rdi, 0) + cfi_def_cfa(%rdx, 0) cfi_offset(%rbx,oRBX) cfi_offset(%rbp,oRBP) cfi_offset(%r12,oR12) @@ -68,27 +69,27 @@ ENTRY(__setcontext) cfi_offset(%rsp,oRSP) cfi_offset(%rip,oRIP) - movq oRSP(%rdi), %rsp - movq oRBX(%rdi), %rbx - movq oRBP(%rdi), %rbp - movq oR12(%rdi), %r12 - movq oR13(%rdi), %r13 - movq oR14(%rdi), %r14 - movq oR15(%rdi), %r15 + movq oRSP(%rdx), %rsp + movq oRBX(%rdx), %rbx + movq oRBP(%rdx), %rbp + movq oR12(%rdx), %r12 + movq oR13(%rdx), %r13 + movq oR14(%rdx), %r14 + movq oR15(%rdx), %r15 /* The following ret should return to the address set with getcontext. Therefore push the address on the stack. */ - movq oRIP(%rdi), %rcx + movq oRIP(%rdx), %rcx pushq %rcx - movq oRSI(%rdi), %rsi - movq oRDX(%rdi), %rdx - movq oRCX(%rdi), %rcx - movq oR8(%rdi), %r8 - movq oR9(%rdi), %r9 + movq oRSI(%rdx), %rsi + movq oRDI(%rdx), %rdi + movq oRCX(%rdx), %rcx + movq oR8(%rdx), %r8 + movq oR9(%rdx), %r9 - /* Setup finally %rdi. */ - movq oRDI(%rdi), %rdi + /* Setup finally %rdx. */ + movq oRDX(%rdx), %rdx /* End FDE here, we fall into another context. */ cfi_endproc From patchwork Thu Apr 26 12:17:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 905039 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-91873-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=intel.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="YvA2d6nM"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40Wx0d24cqz9rxx for ; Thu, 26 Apr 2018 22:17:53 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:date:from:to:subject:message-id:reply-to :mime-version:content-type; q=dns; s=default; b=RJSrrOQ6rflRZgBN 8fuE7WuMd+0A+2CzqeqAVAtBYFYLRpFZpaHqNsLqXimnc9dPy3jL68mDS5Lgsr8Z 2mT+ZaW59QQS+Nf2wkiHE5e2fuJGGwrFM5hEC7EvRpvxA2/CYVEYaWGdZNj5mzsE B21LDzOsE6kn8ziRQi/7gDmRw6I= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:date:from:to:subject:message-id:reply-to :mime-version:content-type; s=default; bh=KuiIFUsBe9T5j4hYOPE1gh lHpDQ=; b=YvA2d6nMt06FFYja2ZWXtXD+4OCKuICo68T10zSBpqwGeyis3bNbt3 qZtgyVfB2DzdYp2U8qP6Ll6GAf5KPIk8X6qjwNPg8kVKm/Wv31Qzwrhh9GQ1/sC4 b+cqYz2kfWsTVa0svUds3cDjb9xLtLfljfKmSe3ZW/AmSnv+TJcEk= Received: (qmail 115955 invoked by alias); 26 Apr 2018 12:17:47 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 115834 invoked by uid 89); 26 Apr 2018 12:17:46 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, NO_DNS_FOR_FROM autolearn=ham version=3.3.2 spammy= X-HELO: mga07.intel.com X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False X-ExtLoop1: 1 Date: Thu, 26 Apr 2018 05:17:44 -0700 From: "H.J. Lu" To: GNU C Library Subject: [PATCH 2/2] x86-64/swapcontext: Restore the pointer into %rdx after syscall Message-ID: <20180426121744.GB30766@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.9.2 (2017-12-15) To prepare for shadow stack support, restore the pointer into %rdx after syscall and use %rdx, instead of %rsi, to restore context. There is no functional change. Any comments? H.J. ---- * sysdeps/unix/sysv/linux/x86_64/swapcontext.S (__swapcontext): Restore the pointer into %rdx, after syscall and use %rdx, instead of %rsi, to restore context. Reviewed-by: Carlos O'Donell --- sysdeps/unix/sysv/linux/x86_64/swapcontext.S | 41 ++++++++++++++-------------- 1 file changed, 21 insertions(+), 20 deletions(-) diff --git a/sysdeps/unix/sysv/linux/x86_64/swapcontext.S b/sysdeps/unix/sysv/linux/x86_64/swapcontext.S index e577c209b9..e2bb50308a 100644 --- a/sysdeps/unix/sysv/linux/x86_64/swapcontext.S +++ b/sysdeps/unix/sysv/linux/x86_64/swapcontext.S @@ -79,38 +79,39 @@ ENTRY(__swapcontext) cmpq $-4095, %rax /* Check %rax for error. */ jae SYSCALL_ERROR_LABEL /* Jump to error handler if error. */ - /* Restore destroyed registers. */ - movq %r12, %rsi + /* Restore destroyed register into RDX which is preserved by + the syscall. */ + movq %r12, %rdx /* Restore the floating-point context. Not the registers, only the rest. */ - movq oFPREGS(%rsi), %rcx + movq oFPREGS(%rdx), %rcx fldenv (%rcx) - ldmxcsr oMXCSR(%rsi) + ldmxcsr oMXCSR(%rdx) /* Load the new stack pointer and the preserved registers. */ - movq oRSP(%rsi), %rsp - movq oRBX(%rsi), %rbx - movq oRBP(%rsi), %rbp - movq oR12(%rsi), %r12 - movq oR13(%rsi), %r13 - movq oR14(%rsi), %r14 - movq oR15(%rsi), %r15 + movq oRSP(%rdx), %rsp + movq oRBX(%rdx), %rbx + movq oRBP(%rdx), %rbp + movq oR12(%rdx), %r12 + movq oR13(%rdx), %r13 + movq oR14(%rdx), %r14 + movq oR15(%rdx), %r15 /* The following ret should return to the address set with getcontext. Therefore push the address on the stack. */ - movq oRIP(%rsi), %rcx + movq oRIP(%rdx), %rcx pushq %rcx /* Setup registers used for passing args. */ - movq oRDI(%rsi), %rdi - movq oRDX(%rsi), %rdx - movq oRCX(%rsi), %rcx - movq oR8(%rsi), %r8 - movq oR9(%rsi), %r9 - - /* Setup finally %rsi. */ - movq oRSI(%rsi), %rsi + movq oRDI(%rdx), %rdi + movq oRSI(%rdx), %rsi + movq oRCX(%rdx), %rcx + movq oR8(%rdx), %r8 + movq oR9(%rdx), %r9 + + /* Setup finally %rdx. */ + movq oRDX(%rdx), %rdx /* Clear rax to indicate success. */ xorl %eax, %eax