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X-CSE-ConnectionGUID: h7WyNa80QcalTZD70AFThw== X-CSE-MsgGUID: tPN39RIARdiz9gfN3JZosQ== X-IronPort-AV: E=McAfee;i="6600,9927,11062"; a="10721168" X-IronPort-AV: E=Sophos;i="6.07,247,1708416000"; d="scan'208";a="10721168" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa108.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 May 2024 18:52:03 -0700 X-CSE-ConnectionGUID: rTEdXXDOS862AC1Q32IPfg== X-CSE-MsgGUID: 7j32kVHjT92zZzXGY0TeXg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,247,1708416000"; d="scan'208";a="27366194" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orviesa009.jf.intel.com with ESMTP; 02 May 2024 18:51:59 -0700 Received: from pli-ubuntu.sh.intel.com (pli-ubuntu.sh.intel.com [10.239.159.47]) by shvmail03.sh.intel.com (Postfix) with ESMTP id B2B2F1007BB8; Fri, 3 May 2024 09:51:58 +0800 (CST) From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: jeffreyalaw@gmail.com, juzhe.zhong@rivai.ai, kito.cheng@gmail.com, Hongtao.Liu@intel.com, richard.guenther@gmail.com, Pan Li Subject: [PATCH v4] DSE: Fix ICE after allow vector type in get_stored_val Date: Fri, 3 May 2024 09:51:35 +0800 Message-Id: <20240503015135.1400555-1-pan2.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240226032558.587912-1-pan2.li@intel.com> References: <20240226032558.587912-1-pan2.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org From: Pan Li We allowed vector type for get_stored_val when read is less than or equal to store in previous. Unfortunately, the valididate_subreg treats the vector type's size is less than vector register as invalid. Then we will have ICE here. This patch would like to fix it by filter-out the invalid type size, and make sure the subreg is valid for both the read_mode and store_mode before perform the real gen_lowpart. The below test suites are passed for this patch: * The x86 bootstrap test. * The x86 regression test. * The riscv rv64gcv regression test. * The riscv rv64gc regression test. * The aarch64 regression test. gcc/ChangeLog: * dse.cc (get_stored_val): Make sure read_mode/write_mode is valid subreg before gen_lowpart. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/bug-6.c: New test. Signed-off-by: Pan Li Signed-off-by: Pan Li --- gcc/dse.cc | 4 +++- .../gcc.target/riscv/rvv/base/bug-6.c | 22 +++++++++++++++++++ 2 files changed, 25 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/bug-6.c diff --git a/gcc/dse.cc b/gcc/dse.cc index edc7a1dfecf..1596da91da0 100644 --- a/gcc/dse.cc +++ b/gcc/dse.cc @@ -1946,7 +1946,9 @@ get_stored_val (store_info *store_info, machine_mode read_mode, copy_rtx (store_info->const_rhs)); else if (VECTOR_MODE_P (read_mode) && VECTOR_MODE_P (store_mode) && known_le (GET_MODE_BITSIZE (read_mode), GET_MODE_BITSIZE (store_mode)) - && targetm.modes_tieable_p (read_mode, store_mode)) + && targetm.modes_tieable_p (read_mode, store_mode) + && validate_subreg (read_mode, store_mode, copy_rtx (store_info->rhs), + subreg_lowpart_offset (read_mode, store_mode))) read_reg = gen_lowpart (read_mode, copy_rtx (store_info->rhs)); else read_reg = extract_low_bits (read_mode, store_mode, diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/bug-6.c b/gcc/testsuite/gcc.target/riscv/rvv/base/bug-6.c new file mode 100644 index 00000000000..5bb00b8f587 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/bug-6.c @@ -0,0 +1,22 @@ +/* Test that we do not have ice when compile */ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize" } */ + +struct A { float x, y; }; +struct B { struct A u; }; + +extern void bar (struct A *); + +float +f3 (struct B *x, int y) +{ + struct A p = {1.0f, 2.0f}; + struct A *q = &x[y].u; + + __builtin_memcpy (&q->x, &p.x, sizeof (float)); + __builtin_memcpy (&q->y, &p.y, sizeof (float)); + + bar (&p); + + return x[y].u.x + x[y].u.y; +}