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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id e24-20020a170906081800b00a5891d81009sm3390140ejd.36.2024.04.26.12.42.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Peter Maydell , Richard Henderson , Paolo Bonzini , Peter Xu , David Hildenbrand , =?utf-8?q?Alex_Benn=C3=A9e?= , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Cameron Esfahani , Roman Bolshakov , Reinoud Zandijk , Sunil Muthuswamy , Stefano Stabellini , Anthony Perard , Paul Durrant , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Thomas Huth , kvm@vger.kernel.org, xen-devel@lists.xenproject.org Subject: [PULL 01/38] exec: Rename NEED_CPU_H -> COMPILING_PER_TARGET Date: Fri, 26 Apr 2024 21:41:21 +0200 Message-ID: <20240426194200.43723-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::135; envelope-from=philmd@linaro.org; helo=mail-lf1-x135.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org 'NEED_CPU_H' guard target-specific code; it is defined by meson altogether with the 'CONFIG_TARGET' definition. Rename NEED_CPU_H as COMPILING_PER_TARGET to clarify its meaning. Mechanical change running: $ sed -i s/NEED_CPU_H/COMPILING_PER_TARGET/g $(git grep -l NEED_CPU_H) then manually add a /* COMPILING_PER_TARGET */ comment after the '#endif' when the block is large. Inspired-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240322161439.6448-4-philmd@linaro.org> --- meson.build | 4 ++-- include/exec/cpu-defs.h | 2 +- include/exec/helper-head.h | 4 ++-- include/exec/memop.h | 4 ++-- include/exec/memory.h | 4 ++-- include/exec/tswap.h | 4 ++-- include/gdbstub/helpers.h | 2 +- include/hw/core/cpu.h | 4 ++-- include/qemu/osdep.h | 2 +- include/sysemu/hvf.h | 8 ++++---- include/sysemu/kvm.h | 6 +++--- include/sysemu/nvmm.h | 4 ++-- include/sysemu/whpx.h | 4 ++-- include/sysemu/xen.h | 4 ++-- target/arm/kvm-consts.h | 4 ++-- scripts/analyze-inclusions | 6 +++--- 16 files changed, 33 insertions(+), 33 deletions(-) diff --git a/meson.build b/meson.build index 553b940999..96fdc6dfd2 100644 --- a/meson.build +++ b/meson.build @@ -3610,7 +3610,7 @@ foreach d, list : target_modules if target.endswith('-softmmu') config_target = config_target_mak[target] target_inc = [include_directories('target' / config_target['TARGET_BASE_ARCH'])] - c_args = ['-DNEED_CPU_H', + c_args = ['-DCOMPILING_PER_TARGET', '-DCONFIG_TARGET="@0@-config-target.h"'.format(target), '-DCONFIG_DEVICES="@0@-config-devices.h"'.format(target)] target_module_ss = module_ss.apply(config_target, strict: false) @@ -3793,7 +3793,7 @@ foreach target : target_dirs target_base_arch = config_target['TARGET_BASE_ARCH'] arch_srcs = [config_target_h[target]] arch_deps = [] - c_args = ['-DNEED_CPU_H', + c_args = ['-DCOMPILING_PER_TARGET', '-DCONFIG_TARGET="@0@-config-target.h"'.format(target), '-DCONFIG_DEVICES="@0@-config-devices.h"'.format(target)] link_args = emulator_link_args diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index 3915438b83..0dbef3010c 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -19,7 +19,7 @@ #ifndef CPU_DEFS_H #define CPU_DEFS_H -#ifndef NEED_CPU_H +#ifndef COMPILING_PER_TARGET #error cpu.h included from common code #endif diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h index 28ceab0a46..5ef467a79d 100644 --- a/include/exec/helper-head.h +++ b/include/exec/helper-head.h @@ -43,7 +43,7 @@ #define dh_ctype_noreturn G_NORETURN void #define dh_ctype(t) dh_ctype_##t -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET # ifdef TARGET_LONG_BITS # if TARGET_LONG_BITS == 32 # define dh_alias_tl i32 @@ -54,7 +54,7 @@ # endif # endif # define dh_ctype_tl target_ulong -#endif +#endif /* COMPILING_PER_TARGET */ /* We can't use glue() here because it falls foul of C preprocessor recursive expansion rules. */ diff --git a/include/exec/memop.h b/include/exec/memop.h index a86dc6743a..06417ff361 100644 --- a/include/exec/memop.h +++ b/include/exec/memop.h @@ -35,7 +35,7 @@ typedef enum MemOp { MO_LE = 0, MO_BE = MO_BSWAP, #endif -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #if TARGET_BIG_ENDIAN MO_TE = MO_BE, #else @@ -135,7 +135,7 @@ typedef enum MemOp { MO_BESL = MO_BE | MO_SL, MO_BESQ = MO_BE | MO_SQ, -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET MO_TEUW = MO_TE | MO_UW, MO_TEUL = MO_TE | MO_UL, MO_TEUQ = MO_TE | MO_UQ, diff --git a/include/exec/memory.h b/include/exec/memory.h index dbb1bad72f..dadb5cd65a 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -3107,7 +3107,7 @@ address_space_write_cached(MemoryRegionCache *cache, hwaddr addr, MemTxResult address_space_set(AddressSpace *as, hwaddr addr, uint8_t c, hwaddr len, MemTxAttrs attrs); -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET /* enum device_endian to MemOp. */ static inline MemOp devend_memop(enum device_endian end) { @@ -3125,7 +3125,7 @@ static inline MemOp devend_memop(enum device_endian end) return (end == non_host_endianness) ? MO_BSWAP : 0; #endif } -#endif +#endif /* COMPILING_PER_TARGET */ /* * Inhibit technologies that require discarding of pages in RAM blocks, e.g., diff --git a/include/exec/tswap.h b/include/exec/tswap.h index 68944a880b..5089cd6a4c 100644 --- a/include/exec/tswap.h +++ b/include/exec/tswap.h @@ -15,11 +15,11 @@ * If we're in target-specific code, we can hard-code the swapping * condition, otherwise we have to do (slower) run-time checks. */ -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #define target_needs_bswap() (HOST_BIG_ENDIAN != TARGET_BIG_ENDIAN) #else #define target_needs_bswap() (target_words_bigendian() != HOST_BIG_ENDIAN) -#endif +#endif /* COMPILING_PER_TARGET */ static inline uint16_t tswap16(uint16_t s) { diff --git a/include/gdbstub/helpers.h b/include/gdbstub/helpers.h index c573aef2dc..6b97610f48 100644 --- a/include/gdbstub/helpers.h +++ b/include/gdbstub/helpers.h @@ -12,7 +12,7 @@ #ifndef _GDBSTUB_HELPERS_H_ #define _GDBSTUB_HELPERS_H_ -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #include "cpu.h" /* diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index ec14f74ce5..7f037b158e 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1182,7 +1182,7 @@ bool target_words_bigendian(void); const char *target_name(void); -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #ifndef CONFIG_USER_ONLY @@ -1197,7 +1197,7 @@ extern const VMStateDescription vmstate_cpu_common; } #endif /* !CONFIG_USER_ONLY */ -#endif /* NEED_CPU_H */ +#endif /* COMPILING_PER_TARGET */ #define UNASSIGNED_CPU_INDEX -1 #define UNASSIGNED_CLUSTER_INDEX -1 diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h index c7053cdc2b..f61edcfdc2 100644 --- a/include/qemu/osdep.h +++ b/include/qemu/osdep.h @@ -32,7 +32,7 @@ #endif #include "config-host.h" -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #include CONFIG_TARGET #else #include "exec/poison.h" diff --git a/include/sysemu/hvf.h b/include/sysemu/hvf.h index 4a7c6af3a5..730f927f03 100644 --- a/include/sysemu/hvf.h +++ b/include/sysemu/hvf.h @@ -16,7 +16,7 @@ #include "qemu/accel.h" #include "qom/object.h" -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #include "cpu.h" #ifdef CONFIG_HVF @@ -26,7 +26,7 @@ extern bool hvf_allowed; #define hvf_enabled() 0 #endif /* !CONFIG_HVF */ -#endif /* NEED_CPU_H */ +#endif /* COMPILING_PER_TARGET */ #define TYPE_HVF_ACCEL ACCEL_CLASS_NAME("hvf") @@ -34,7 +34,7 @@ typedef struct HVFState HVFState; DECLARE_INSTANCE_CHECKER(HVFState, HVF_STATE, TYPE_HVF_ACCEL) -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET struct hvf_sw_breakpoint { vaddr pc; vaddr saved_insn; @@ -66,6 +66,6 @@ void hvf_arch_update_guest_debug(CPUState *cpu); * Return whether the guest supports debugging. */ bool hvf_arch_supports_guest_debug(void); -#endif /* NEED_CPU_H */ +#endif /* COMPILING_PER_TARGET */ #endif diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index 47f9e8be1b..eaf801bc93 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -20,7 +20,7 @@ #include "qemu/accel.h" #include "qom/object.h" -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET # ifdef CONFIG_KVM # include # define CONFIG_KVM_IS_POSSIBLE @@ -210,7 +210,7 @@ bool kvm_arm_supports_user_irq(void); int kvm_on_sigbus_vcpu(CPUState *cpu, int code, void *addr); int kvm_on_sigbus(int code, void *addr); -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #include "cpu.h" void kvm_flush_coalesced_mmio_buffer(void); @@ -435,7 +435,7 @@ void kvm_set_sigmask_len(KVMState *s, unsigned int sigmask_len); int kvm_physical_memory_addr_from_host(KVMState *s, void *ram_addr, hwaddr *phys_addr); -#endif /* NEED_CPU_H */ +#endif /* COMPILING_PER_TARGET */ void kvm_cpu_synchronize_state(CPUState *cpu); diff --git a/include/sysemu/nvmm.h b/include/sysemu/nvmm.h index be7bc9a62d..6971ddb3a5 100644 --- a/include/sysemu/nvmm.h +++ b/include/sysemu/nvmm.h @@ -12,7 +12,7 @@ #ifndef QEMU_NVMM_H #define QEMU_NVMM_H -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #ifdef CONFIG_NVMM @@ -24,6 +24,6 @@ int nvmm_enabled(void); #endif /* CONFIG_NVMM */ -#endif /* NEED_CPU_H */ +#endif /* COMPILING_PER_TARGET */ #endif /* QEMU_NVMM_H */ diff --git a/include/sysemu/whpx.h b/include/sysemu/whpx.h index 781ca5b2b6..00ff409b68 100644 --- a/include/sysemu/whpx.h +++ b/include/sysemu/whpx.h @@ -15,7 +15,7 @@ #ifndef QEMU_WHPX_H #define QEMU_WHPX_H -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #ifdef CONFIG_WHPX @@ -29,6 +29,6 @@ bool whpx_apic_in_platform(void); #endif /* CONFIG_WHPX */ -#endif /* NEED_CPU_H */ +#endif /* COMPILING_PER_TARGET */ #endif /* QEMU_WHPX_H */ diff --git a/include/sysemu/xen.h b/include/sysemu/xen.h index a9f591f26d..754ec2e6cb 100644 --- a/include/sysemu/xen.h +++ b/include/sysemu/xen.h @@ -16,13 +16,13 @@ #include "exec/cpu-common.h" -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET # ifdef CONFIG_XEN # define CONFIG_XEN_IS_POSSIBLE # endif #else # define CONFIG_XEN_IS_POSSIBLE -#endif +#endif /* COMPILING_PER_TARGET */ #ifdef CONFIG_XEN_IS_POSSIBLE diff --git a/target/arm/kvm-consts.h b/target/arm/kvm-consts.h index 7c6adc14f6..c44d23dbe7 100644 --- a/target/arm/kvm-consts.h +++ b/target/arm/kvm-consts.h @@ -14,13 +14,13 @@ #ifndef ARM_KVM_CONSTS_H #define ARM_KVM_CONSTS_H -#ifdef NEED_CPU_H +#ifdef COMPILING_PER_TARGET #ifdef CONFIG_KVM #include #include #define MISMATCH_CHECK(X, Y) QEMU_BUILD_BUG_ON(X != Y) #endif -#endif +#endif /* COMPILING_PER_TARGET */ #ifndef MISMATCH_CHECK #define MISMATCH_CHECK(X, Y) QEMU_BUILD_BUG_ON(0) diff --git a/scripts/analyze-inclusions b/scripts/analyze-inclusions index 45c821de32..b6280f25c8 100644 --- a/scripts/analyze-inclusions +++ b/scripts/analyze-inclusions @@ -92,7 +92,7 @@ echo trace/generated-tracers.h: analyze -include ../include/qemu/osdep.h trace/generated-tracers.h echo target/i386/cpu.h: -analyze -DNEED_CPU_H -I../target/i386 -Ii386-softmmu -include ../include/qemu/osdep.h ../target/i386/cpu.h +analyze -DCOMPILING_PER_TARGET -I../target/i386 -Ii386-softmmu -include ../include/qemu/osdep.h ../target/i386/cpu.h -echo hw/hw.h + NEED_CPU_H: -analyze -DNEED_CPU_H -I../target/i386 -Ii386-softmmu -include ../include/qemu/osdep.h ../include/hw/hw.h +echo hw/hw.h + COMPILING_PER_TARGET: +analyze -DCOMPILING_PER_TARGET -I../target/i386 -Ii386-softmmu -include ../include/qemu/osdep.h ../include/hw/hw.h From patchwork Fri Apr 26 19:41:22 2024 Content-Type: text/plain; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id c26-20020aa7c99a000000b00572405680e8sm1789128edt.21.2024.04.26.12.42.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:15 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Harsh Prateek Bora , Richard Henderson , Paolo Bonzini Subject: [PULL 02/38] exec: Reduce tlb_set_dirty() declaration scope Date: Fri, 26 Apr 2024 21:41:22 +0200 Message-ID: <20240426194200.43723-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::235; envelope-from=philmd@linaro.org; helo=mail-lj1-x235.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org tlb_set_dirty() is only used in accel/tcg/cputlb.c, where it is defined. Declare it statically, removing the stub. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Harsh Prateek Bora Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-11-philmd@linaro.org> --- include/exec/exec-all.h | 1 - accel/stubs/tcg-stub.c | 4 ---- accel/tcg/cputlb.c | 2 +- 3 files changed, 1 insertion(+), 6 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 3e53501691..9599e16a09 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -654,7 +654,6 @@ static inline void mmap_unlock(void) {} #define WITH_MMAP_LOCK_GUARD() void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length); -void tlb_set_dirty(CPUState *cpu, vaddr addr); void tlb_reset_dirty_range_all(ram_addr_t start, ram_addr_t length); MemoryRegionSection * diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c index 8a496a2a6f..dd890d6cf6 100644 --- a/accel/stubs/tcg-stub.c +++ b/accel/stubs/tcg-stub.c @@ -18,10 +18,6 @@ void tb_flush(CPUState *cpu) { } -void tlb_set_dirty(CPUState *cpu, vaddr vaddr) -{ -} - int probe_access_flags(CPUArchState *env, vaddr addr, int size, MMUAccessType access_type, int mmu_idx, bool nonfault, void **phost, uintptr_t retaddr) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 93b1ca810b..e16d02a62c 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1039,7 +1039,7 @@ static inline void tlb_set_dirty1_locked(CPUTLBEntry *tlb_entry, /* update the TLB corresponding to virtual page vaddr so that it is no longer dirty */ -void tlb_set_dirty(CPUState *cpu, vaddr addr) +static void tlb_set_dirty(CPUState *cpu, vaddr addr) { int mmu_idx; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id q10-20020a170906388a00b00a46aba003eesm10856553ejd.215.2024.04.26.12.42.20 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:21 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Warner Losh , Richard Henderson , Paolo Bonzini Subject: [PULL 03/38] exec: Include 'cpu.h' before validating CPUArchState placement Date: Fri, 26 Apr 2024 21:41:23 +0200 Message-ID: <20240426194200.43723-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52c; envelope-from=philmd@linaro.org; helo=mail-ed1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org CPUArchState 'env' field is defined within the ArchCPU structure, so we need to include each target "cpu.h" header which defines it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Message-Id: <20231211212003.21686-2-philmd@linaro.org> --- include/exec/cpu-all.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 1a6510fd3b..b86209fc49 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -391,6 +391,7 @@ static inline bool tlb_hit(uint64_t tlb_addr, vaddr addr) #endif /* !CONFIG_USER_ONLY */ /* Validate correct placement of CPUArchState. */ +#include "cpu.h" QEMU_BUILD_BUG_ON(offsetof(ArchCPU, parent_obj) != 0); QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState)); From patchwork Fri Apr 26 19:41:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928317 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=rtYOCSNP; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR38C1SQrz1yZx for ; Sat, 27 Apr 2024 05:44:27 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RSz-0000aZ-5k; Fri, 26 Apr 2024 15:42:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RSu-0000Qs-6f for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:42:36 -0400 Received: from mail-lf1-x12d.google.com ([2a00:1450:4864:20::12d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RSq-0002q3-6Z for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:42:35 -0400 Received: by mail-lf1-x12d.google.com with SMTP id 2adb3069b0e04-518a3e0d2ecso3926527e87.3 for ; Fri, 26 Apr 2024 12:42:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160548; x=1714765348; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=S4r3G1A3uieLAlLtfe4V5hp04cU912Q1LgbF6VzVX8w=; b=rtYOCSNPRvlTRkjO3j1jcvOoMrUCNJVjC34gA/YJ6U7r31pVKuFrOTp0gzobW5O91I zpdiq55+fWg+lWmYcy8of8j38ElSnSEyxWLNWvRf9ggs2Tv3AcHbnBonAtvk9fc19Zi5 DVQyFckW1mu4GhW93/EbgwwZXT3XGUOtlc6GxVliT3+m5acn06H7DqWcXj4sEQrM/zwa R7G7hqyLIZ9Z71Dnogjta4WHlkSaYXbn3FYbj9axP1k8Zar38Zqz3Bjk84WwNFOueYHj imK0e6y0AbiTZ/Chhidv5ho9zV5Sl+mSaGtQEb02rGthluHd7psRihwrvZUI2kzM5ARV ZDJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160548; x=1714765348; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=S4r3G1A3uieLAlLtfe4V5hp04cU912Q1LgbF6VzVX8w=; b=v2/6VR9G/I3g39pZkr33WZEaTA4j8ZgI0Deh1DnKipOnaQCKlJg1ma8YB8LmAFhqe+ eTKn/dtjV456QNwLiuSvu6YiN6EKxwOpDhwAPenE6zby4yXYlbPjSiXNBkuhKagmCem0 7WZ95g9qrmuIQhA3NfYfzSjgxmvnlYoQjUX6wzUcp70SXN0okyFMYXDVV15EJwM7og7+ ksLuWfzpR7pV23I+PF3MLnbrS/h8Zfe/ESEIIvfqL1CVdHCCAi1xWMNj1pOyUl3SNLdT ijTA/a55AKcGHChXyC3fjzL5lhq8a0FtU+quvUX8CKRH4gf+RmzfU5bZaFvJM/U6Rr2m p2iA== X-Forwarded-Encrypted: i=1; AJvYcCWkH8X5FHru4B45SNPdrpUXdN50h6OOZ9JK63vreWqSiV5zNFcd/1a/7d9H4NTVu4URavc8t49zFFtlb78QKXAiCCh2 X-Gm-Message-State: AOJu0YyfbH/JPcTHXlG/jEupkK7Rk00lavBRQbNuebOQCbIe3LOCy5bR PS7ry1E1Ny+3nHSjmnMu5AwDvZR6QyUDPAZC3fsLNPjMhqRMFQYzUUoRWBSf+C0= X-Google-Smtp-Source: AGHT+IHEgQLIyIXgvEtytGPu3bgx9xvrZH5H8bxNMkgnBYf9H4ipD6zo6v2Z9b74Q+Oju52h54anjQ== X-Received: by 2002:ac2:483c:0:b0:51c:5570:f570 with SMTP id 28-20020ac2483c000000b0051c5570f570mr2916306lft.59.1714160548267; Fri, 26 Apr 2024 12:42:28 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id r25-20020a170906351900b00a55b5c365dfsm6435433eja.199.2024.04.26.12.42.26 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:27 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Warner Losh , Richard Henderson , Paolo Bonzini , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Thomas Huth , Peter Xu , David Hildenbrand Subject: [PULL 04/38] exec: Expose 'target_page.h' API to user emulation Date: Fri, 26 Apr 2024 21:41:24 +0200 Message-ID: <20240426194200.43723-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12d; envelope-from=philmd@linaro.org; helo=mail-lf1-x12d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org User-only objects might benefit from the "exec/target_page.h" API, which allows to build some objects once for all targets. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-3-philmd@linaro.org> --- meson.build | 2 +- page-target.c | 44 ++++++++++++++++++++++++++++++++++++++++++ system/physmem.c | 30 ---------------------------- target/target-common.c | 10 ---------- target/meson.build | 2 -- 5 files changed, 45 insertions(+), 43 deletions(-) create mode 100644 page-target.c delete mode 100644 target/target-common.c diff --git a/meson.build b/meson.build index 96fdc6dfd2..5db2dbc12e 100644 --- a/meson.build +++ b/meson.build @@ -3523,7 +3523,7 @@ if get_option('b_lto') pagevary = declare_dependency(link_with: pagevary) endif common_ss.add(pagevary) -specific_ss.add(files('page-vary-target.c')) +specific_ss.add(files('page-target.c', 'page-vary-target.c')) subdir('backends') subdir('disas') diff --git a/page-target.c b/page-target.c new file mode 100644 index 0000000000..82211c8593 --- /dev/null +++ b/page-target.c @@ -0,0 +1,44 @@ +/* + * QEMU page values getters (target independent) + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#include "qemu/osdep.h" +#include "exec/target_page.h" +#include "exec/cpu-defs.h" +#include "cpu.h" +#include "exec/cpu-all.h" + +size_t qemu_target_page_size(void) +{ + return TARGET_PAGE_SIZE; +} + +int qemu_target_page_mask(void) +{ + return TARGET_PAGE_MASK; +} + +int qemu_target_page_bits(void) +{ + return TARGET_PAGE_BITS; +} + +int qemu_target_page_bits_min(void) +{ + return TARGET_PAGE_BITS_MIN; +} + +/* Convert target pages to MiB (2**20). */ +size_t qemu_target_pages_to_MiB(size_t pages) +{ + int page_bits = TARGET_PAGE_BITS; + + /* So far, the largest (non-huge) page size is 64k, i.e. 16 bits. */ + g_assert(page_bits < 20); + + return pages >> (20 - page_bits); +} diff --git a/system/physmem.c b/system/physmem.c index c3d04ca921..1a81c226ba 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -3540,36 +3540,6 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, return 0; } -/* - * Allows code that needs to deal with migration bitmaps etc to still be built - * target independent. - */ -size_t qemu_target_page_size(void) -{ - return TARGET_PAGE_SIZE; -} - -int qemu_target_page_bits(void) -{ - return TARGET_PAGE_BITS; -} - -int qemu_target_page_bits_min(void) -{ - return TARGET_PAGE_BITS_MIN; -} - -/* Convert target pages to MiB (2**20). */ -size_t qemu_target_pages_to_MiB(size_t pages) -{ - int page_bits = TARGET_PAGE_BITS; - - /* So far, the largest (non-huge) page size is 64k, i.e. 16 bits. */ - g_assert(page_bits < 20); - - return pages >> (20 - page_bits); -} - bool cpu_physical_memory_is_io(hwaddr phys_addr) { MemoryRegion*mr; diff --git a/target/target-common.c b/target/target-common.c deleted file mode 100644 index 903b10cfe4..0000000000 --- a/target/target-common.c +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -#include "qemu/osdep.h" - -#include "cpu.h" -#include "exec/target_page.h" - -int qemu_target_page_mask(void) -{ - return TARGET_PAGE_MASK; -} diff --git a/target/meson.build b/target/meson.build index 59b46b2ef4..1c2e6f2b19 100644 --- a/target/meson.build +++ b/target/meson.build @@ -18,5 +18,3 @@ subdir('sh4') subdir('sparc') subdir('tricore') subdir('xtensa') - -specific_ss.add(files('target-common.c')) From patchwork Fri Apr 26 19:41:25 2024 Content-Type: text/plain; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id m24-20020a17090607d800b00a524216fe78sm10939590ejc.64.2024.04.26.12.42.32 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:33 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini , Brian Cain , "Edgar E. Iglesias" Subject: [PULL 05/38] accel: Include missing 'exec/cpu_ldst.h' header Date: Fri, 26 Apr 2024 21:41:25 +0200 Message-ID: <20240426194200.43723-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=philmd@linaro.org; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Theses files call cpu_ldl_code() which is declared in "exec/cpu_ldst.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-5-philmd@linaro.org> --- accel/tcg/translator.c | 1 + target/hexagon/translate.c | 1 + target/microblaze/cpu.c | 1 + target/microblaze/translate.c | 1 + 4 files changed, 4 insertions(+) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 9de0bc34c8..6832e55135 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -12,6 +12,7 @@ #include "qemu/error-report.h" #include "exec/exec-all.h" #include "exec/translator.h" +#include "exec/cpu_ldst.h" #include "exec/plugin-gen.h" #include "tcg/tcg-op-common.h" #include "internal-target.h" diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c index f163eefe97..47a870f42d 100644 --- a/target/hexagon/translate.c +++ b/target/hexagon/translate.c @@ -23,6 +23,7 @@ #include "exec/helper-gen.h" #include "exec/helper-proto.h" #include "exec/translation-block.h" +#include "exec/cpu_ldst.h" #include "exec/log.h" #include "internal.h" #include "attribs.h" diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index f8dc3173fc..9eb7374ccd 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -28,6 +28,7 @@ #include "qemu/module.h" #include "hw/qdev-properties.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" #include "exec/gdbstub.h" #include "fpu/softfloat-helpers.h" #include "tcg/tcg.h" diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index fc451befae..6d89c1a175 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "disas/disas.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" #include "tcg/tcg-op.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" From patchwork Fri Apr 26 19:41:26 2024 Content-Type: text/plain; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id n11-20020a170906b30b00b00a5242e285aesm10798927ejz.184.2024.04.26.12.42.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:39 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Warner Losh , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PULL 06/38] gdbstub: Include missing 'hw/core/cpu.h' header Date: Fri, 26 Apr 2024 21:41:26 +0200 Message-ID: <20240426194200.43723-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=philmd@linaro.org; helo=mail-ed1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Functions such gdb_get_cpu_pid() dereference CPUState so require the structure declaration from "hw/core/cpu.h": static uint32_t gdb_get_cpu_pid(CPUState *cpu) { ... return cpu->cluster_index + 1; } Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Message-Id: <20231211212003.21686-15-philmd@linaro.org> Reviewed-by: Richard Henderson --- gdbstub/gdbstub.c | 1 + 1 file changed, 1 insertion(+) diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c index 9c23d44baf..9c2b8b5d0a 100644 --- a/gdbstub/gdbstub.c +++ b/gdbstub/gdbstub.c @@ -37,6 +37,7 @@ #include "hw/cpu/cluster.h" #include "hw/boards.h" #endif +#include "hw/core/cpu.h" #include "sysemu/hw_accel.h" #include "sysemu/runstate.h" From patchwork Fri Apr 26 19:41:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928326 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=qN6nv4rJ; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id cf8-20020a0564020b8800b0056c24df7a78sm10395889edb.5.2024.04.26.12.42.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:44 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PULL 07/38] gdbstub: Simplify #ifdef'ry in helpers.h Date: Fri, 26 Apr 2024 21:41:27 +0200 Message-ID: <20240426194200.43723-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=philmd@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Slightly simplify by checking NEED_CPU_H definition in header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240322161439.6448-2-philmd@linaro.org> --- include/gdbstub/helpers.h | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/include/gdbstub/helpers.h b/include/gdbstub/helpers.h index 6b97610f48..6277a858a1 100644 --- a/include/gdbstub/helpers.h +++ b/include/gdbstub/helpers.h @@ -12,7 +12,10 @@ #ifndef _GDBSTUB_HELPERS_H_ #define _GDBSTUB_HELPERS_H_ -#ifdef COMPILING_PER_TARGET +#ifndef COMPILING_PER_TARGET +#error "gdbstub helpers should only be included by target specific code" +#endif + #include "cpu.h" /* @@ -96,8 +99,4 @@ static inline uint8_t *gdb_get_reg_ptr(GByteArray *buf, int len) #define ldtul_p(addr) ldl_p(addr) #endif -#else -#error "gdbstub helpers should only be included by target specific code" -#endif - #endif /* _GDBSTUB_HELPERS_H_ */ From patchwork Fri Apr 26 19:41:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928309 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=AHBocRxb; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR36V3zl7z1yZx for ; Sat, 27 Apr 2024 05:42:58 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RTD-0000rg-41; Fri, 26 Apr 2024 15:42:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RTB-0000qn-Sn for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:42:53 -0400 Received: from mail-ed1-x530.google.com ([2a00:1450:4864:20::530]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RTA-0002yi-77 for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:42:53 -0400 Received: by mail-ed1-x530.google.com with SMTP id 4fb4d7f45d1cf-56e1f3462caso3431284a12.3 for ; Fri, 26 Apr 2024 12:42:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160571; x=1714765371; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XHpChPLpjXlPm4sz2ZPmxjIjHGSHb3jC7Cykk4D98j0=; b=AHBocRxb55dFwBoDNMXxbm5eeMorfPXbPqYhzrOUCk8HiRFOU0FKto0eTpG0UgRSxU VusLzWQos+AHsTc4kFvYFDWEXQHrpjDJvky4sCMDhcTVdRxFSYw+EHTpNrvsnlDUKoT/ Ikn6WnmPMl1sb9fNI4HcbriP8EawVGhkOmIYRCyi5XGYSK/X8fWydq7MEGgfmLTVsh7E L46o5GGBvm+vONo8Y2jO700qJOuU4XIVZqIEoldICJczwZBXxjs8k+361npsno0i0lw/ /ySQhut3OqPr52uCA695UuwDRBFG809D7jBshDRQJPt1HogRAiKvHVTFuuJ6WWmhMVhy ePBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160571; x=1714765371; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XHpChPLpjXlPm4sz2ZPmxjIjHGSHb3jC7Cykk4D98j0=; b=GKcLk8quvo9K7gBZv30bddzc9FUH5gCo27qrXpvY/Cvoa2QlTy6JcM5mk5trU0VYjL 7EMaelH3z5V4CWqf0TyPJ9KEyUjqruRpxr/BUpvEZ17MJ6QZ+JBE4KQ+aQOpcZR4321q 0n2hwKGFR8lxMK/DwHqmJRHWwsccMp33oARmmY5h+RSKP2ZGP+VJknxMnfIklX2Kv93h xyJr9i3CeEmPTbnEIvGJiPH8BU65zsxoDyrG2zhODy1Qd6mni/DeUbPk+xDw/LxYGS+U 5F11yqW09dR57wZJOEJ9Zbl46pz5Ns0BpG4xKIy725bZQzslR4gFHM4vCYmaU8yMvwxx YdQQ== X-Forwarded-Encrypted: i=1; AJvYcCVZwWZTsHZM/T5HY7exSG6+MaKw+ZlJR8q6CAYZbKylBEp3lgxqcNLkod16NdD28lY3yBemrmE1q/59EbrTgZxe8uOz X-Gm-Message-State: AOJu0YwZICeI53a+jJRsCYEQJEbzK5yeaRKqhaXJvQtjevLNNaYr0AeF N/TEVXN1F0t6N3jnDdgy0I90X033sSxmY616aFpm6DgQd47WzsjUew8m9u70MQ8= X-Google-Smtp-Source: AGHT+IGbNeMhzgN98z4dLatfRNgzD4JoCLYAUAAa0SGI/fSgo7fYEHmK/xLWoyE9mZAyJiPl+fFwig== X-Received: by 2002:a17:906:27d0:b0:a58:7470:21f3 with SMTP id k16-20020a17090627d000b00a58747021f3mr322493ejc.28.1714160570950; Fri, 26 Apr 2024 12:42:50 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id t11-20020a170906a10b00b00a5244a80cfcsm10944860ejy.91.2024.04.26.12.42.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:50 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= , Michael Rolnik , Bastian Koppelmann Subject: [PULL 08/38] gdbstub: Avoid including 'cpu.h' in 'gdbstub/helpers.h' Date: Fri, 26 Apr 2024 21:41:28 +0200 Message-ID: <20240426194200.43723-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=philmd@linaro.org; helo=mail-ed1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org We only need the "exec/tswap.h" and "cpu-param.h" headers. Only include "cpu.h" in the target gdbstub.c source files. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-20-philmd@linaro.org> --- include/gdbstub/helpers.h | 3 ++- target/avr/gdbstub.c | 1 + target/tricore/gdbstub.c | 1 + 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/include/gdbstub/helpers.h b/include/gdbstub/helpers.h index 6277a858a1..26140ef1ac 100644 --- a/include/gdbstub/helpers.h +++ b/include/gdbstub/helpers.h @@ -16,7 +16,8 @@ #error "gdbstub helpers should only be included by target specific code" #endif -#include "cpu.h" +#include "exec/tswap.h" +#include "cpu-param.h" /* * The GDB remote protocol transfers values in target byte order. As diff --git a/target/avr/gdbstub.c b/target/avr/gdbstub.c index 2eeee2bf4e..d6d3c1479b 100644 --- a/target/avr/gdbstub.c +++ b/target/avr/gdbstub.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "gdbstub/helpers.h" +#include "cpu.h" int avr_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { diff --git a/target/tricore/gdbstub.c b/target/tricore/gdbstub.c index f9309c5e27..29a70051ff 100644 --- a/target/tricore/gdbstub.c +++ b/target/tricore/gdbstub.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "gdbstub/helpers.h" +#include "cpu.h" #define LCX_REGNUM 32 From patchwork Fri Apr 26 19:41:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928316 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=mtLD3cry; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR37z4Qnqz1yZx for ; Sat, 27 Apr 2024 05:44:15 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RTV-00014a-UR; Fri, 26 Apr 2024 15:43:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RTI-0000wV-La for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:02 -0400 Received: from mail-ej1-x62f.google.com ([2a00:1450:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RTF-00030K-U3 for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:00 -0400 Received: by mail-ej1-x62f.google.com with SMTP id a640c23a62f3a-a58d0aea14cso135387766b.2 for ; Fri, 26 Apr 2024 12:42:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160576; x=1714765376; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DE5bQD16xfwEMndgjcE7z1cuHvznf4KEW6ZfSJ0m28c=; b=mtLD3cryCFwGKpctZkcO6fJCInvNr+xo6odVYnQX+roWWGoDY3XJ9or/wh5SvLjJ9J NPY6N5eX2SB9uKZ6dDCptDxUqjgNn6p395lSeH6YFP2+2NeDIvA7B+mvbGTGV7AXa5ea MpV+BBH3w1FJPILlCfD4kW9uThOO+VPbqa0uMvPF0NdC+B8IlipBxCZ4bpnyvNkL3JIf v9DbIX/uPwABEXxXinVF+Kji9vKOz4SXLDvR+/NzUiEVDwLGoF40qBVU7VTfsP5pQEbz 4pTk8hc1zAIXBX7yCm/39lX81kFqxcMctRu7+gbiFxVkkb77hoPYbXampp85NSbJWFmZ 086g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160576; x=1714765376; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DE5bQD16xfwEMndgjcE7z1cuHvznf4KEW6ZfSJ0m28c=; b=KopK3Wmu/UWV4+xUctEhPnwqHQPivVoKGRWowySw1awgMwsNcESeh3NkEO6ePhtaU2 8pDpI+qBgkNq+9kXK/Pd8vqrkgQPsjWby22VZ+eo4YVcMYly/2BAGEToMd8nGokjFJH5 Qh3rTpv3RFjLTMgUyxzhwug4F/Icbmr+V8uwtH1SgLz49UjgiYmzM4CQZot3rO2zAQuA Ua/w0DMjDIkYAuTMNLXHV7RTlWG9MX7xC3c8QvtFSSJO6pm2W8nXG9zGspQhlbvKu/cB c/M0oLqzeFeqTIwPwn+Otm7lg/ysw4NNEMwN+attDNs0iZnL/rEUsqyTB1qW5mzNGrTp ofow== X-Forwarded-Encrypted: i=1; AJvYcCUFjwYfEbb+NZkSw77COBagsURD7OCQjKDZVz7xLHTQJBcpKnStKT1l/l8ChzNIuugoHhNHMlOZSqj7P6X9iyJXu5Gv X-Gm-Message-State: AOJu0YxTR7OHzx3HHKSmSTxeA0mJSyi+H6a6xH9hqiADtlp4vqtNo5vd RDSoa8kjX6s0p9Sez7GpITEQqlzr0lKKbt8XC5pyrSJYSPq3uQx35hzqwCS2r90= X-Google-Smtp-Source: AGHT+IHuivKhc9k4NJGWGfSfiujJsFGjDjDNF8PSddUqhuzyJQcSFexKwQKV1AGdJzYCFcbsEbYqZA== X-Received: by 2002:a17:906:b0d8:b0:a55:adec:7139 with SMTP id bk24-20020a170906b0d800b00a55adec7139mr2412387ejb.60.1714160576443; Fri, 26 Apr 2024 12:42:56 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id n1-20020a170906724100b00a55bef9ab56sm5775865ejk.120.2024.04.26.12.42.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:42:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PULL 09/38] semihosting/uaccess: Avoid including 'cpu.h' Date: Fri, 26 Apr 2024 21:41:29 +0200 Message-ID: <20240426194200.43723-10-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=philmd@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org "semihosting/uaccess.h" only requires the following headers: - "exec/cpu-defs.h" for target_ulong, - "exec/cpu-common.h" for cpu_memory_rw_debug() - "exec/tswap.h" for tswap32() and tswap64(). Include them instead of the huge "cpu.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <42c6471e-8383-45e0-85ee-e20ca32ecbad@linaro.org> --- include/semihosting/uaccess.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/semihosting/uaccess.h b/include/semihosting/uaccess.h index 3963eafc3e..dd289af8dd 100644 --- a/include/semihosting/uaccess.h +++ b/include/semihosting/uaccess.h @@ -14,7 +14,9 @@ #error Cannot include semihosting/uaccess.h from user emulation #endif -#include "cpu.h" +#include "exec/cpu-common.h" +#include "exec/cpu-defs.h" +#include "exec/tswap.h" #define get_user_u64(val, addr) \ ({ uint64_t val_ = 0; \ From patchwork Fri Apr 26 19:41:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928327 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=aCjKQo9M; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR39G3lMGz23rB for ; Sat, 27 Apr 2024 05:45:22 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RTh-0001NK-4r; Fri, 26 Apr 2024 15:43:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RTN-0000z6-ML for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:06 -0400 Received: from mail-ed1-x52a.google.com ([2a00:1450:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RTM-000323-69 for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:05 -0400 Received: by mail-ed1-x52a.google.com with SMTP id 4fb4d7f45d1cf-56e1f3462caso3431567a12.3 for ; Fri, 26 Apr 2024 12:43:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160582; x=1714765382; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/GRlD0UJ4FFPuLeyFAJhX+j56Axb9nXKO9LompOTbz0=; b=aCjKQo9M3jm32LjSQvYg+f346xUKK6bceDRnpmUqdQFHUqedoCivV6KQaYtJ4fy0q5 ETWAd0WK9383sVCaRxHMiLtlI15Eza9dO/jsDUV/Rz4BiI5nm1YU74UbeM2yhG6qSDj4 KtaLgMgpw1dE28I0vJ8OxZnwfoU5eqZazZWpM+Hwo61yr94ijJfNjg/PHJ1/zqGCoGgF zDvOUJkJY/f40lsxpd4xCyEeGUbkws4Z8+M+kPKOucwsBAwrotcLJDif/Wtv9ONYzM2s qCBYwxpgqj3ommy+jXbdtWDN3bYo3qDjO8sCrcK2QJOb61JuUTcVAchZ+BTK+CKWD3+E BCtw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160582; x=1714765382; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/GRlD0UJ4FFPuLeyFAJhX+j56Axb9nXKO9LompOTbz0=; b=S6VdHdGRq3jvsdvo3PSu8LH6zQfTDgLgKoC7oj+JeWg/mXiqRQqL+7gOW42UueoPwL 3/6k0hv81t+IL5cOLAjhU+wuHmdp+E9Txl9o0WkwN/zc57LLj8RGY1wx6X0K1G6016EC E26mkAN9GRJuPCyOmjgpHgA6r1zYn/+v7hg2pBVmrlalzuEqw8XZ9WD8BQlPmTFLPYJH NWzjpqFbKJN5g0TNowidvcFKGsGE43+tAjBnTDCyizLbW5KQpf5QM4vO2TeRKs+jgSVO gQ0zPFgzss/2VDxfHpcgJ7IlaQ1Mu5s5HYLA25EVLsqDRZJPEVxQffhhRQMpx4nRB8BK CsaA== X-Forwarded-Encrypted: i=1; AJvYcCUJBODn2lPPU/QppD1O4wwBFsgsLRl6K27tHaDAzFV3KxDIjKBHRGJXJDYs5Pz9qPuN8wvoEfz6MCSk6Ia+xR6onlfv X-Gm-Message-State: AOJu0YxAVVnbkqj2z3Ub968UManSLoYqZBOyV+FkvtzcbLOpUMksij+U g48TqqxHLvHF6mYY7op7qxmUhNiyXT6gopy0myUOKrs36SNTrHpEyDh08mnKnw0= X-Google-Smtp-Source: AGHT+IG6A8FnBbnMBUpZM52sQlqiWMtOTwbyU0wTqUCvEyv+4YX+LfAkHA/i8kisOgzCXauqVx2SXg== X-Received: by 2002:a17:906:17d7:b0:a55:664b:fa35 with SMTP id u23-20020a17090617d700b00a55664bfa35mr274955eje.6.1714160582240; Fri, 26 Apr 2024 12:43:02 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id jw24-20020a170906e95800b00a58a3b8589csm2615549ejb.21.2024.04.26.12.43.00 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:01 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [PULL 10/38] semihosting/guestfd: Remove unused 'semihosting/uaccess.h' header Date: Fri, 26 Apr 2024 21:41:30 +0200 Message-ID: <20240426194200.43723-11-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52a; envelope-from=philmd@linaro.org; helo=mail-ed1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Nothing in guestfd.c requires "semihosting/uaccess.h" nor "qemu.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-8-philmd@linaro.org> Reviewed-by: Richard Henderson --- semihosting/guestfd.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/semihosting/guestfd.c b/semihosting/guestfd.c index 955c2efbd0..d3241434c5 100644 --- a/semihosting/guestfd.c +++ b/semihosting/guestfd.c @@ -12,10 +12,7 @@ #include "gdbstub/syscalls.h" #include "semihosting/semihost.h" #include "semihosting/guestfd.h" -#ifdef CONFIG_USER_ONLY -#include "qemu.h" -#else -#include "semihosting/uaccess.h" +#ifndef CONFIG_USER_ONLY #include CONFIG_DEVICES #endif From patchwork Fri Apr 26 19:41:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928380 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=FudrCxSc; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR3Jr6Bhpz1yZP for ; Sat, 27 Apr 2024 05:51:56 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RTl-0001ck-27; Fri, 26 Apr 2024 15:43:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RTi-0001UL-Jr for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:26 -0400 Received: from mail-ed1-x531.google.com ([2a00:1450:4864:20::531]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RTS-00033t-Sx for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:26 -0400 Received: by mail-ed1-x531.google.com with SMTP id 4fb4d7f45d1cf-5725cfa2434so498582a12.2 for ; Fri, 26 Apr 2024 12:43:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160589; x=1714765389; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cKe3cZw/HcttjUJbHfrcy+l3NjV8jZoAyEBmM5OCTLI=; b=FudrCxSc87NtPBGFWYxH9Kw4OFHCetA9Iem+kd/KZRu8J+Du+eNPLDSklGR27/QyPn vf7M4IxZz+Qf46V/rDFkC9fEJpymkmu8oRFhHhZnZASjlE9Hd/QX4d9+nlMqYSurhV+l V9pq5h8wSAy9MRDQNQzQyscQ66u9f5a9CVIkitSqGicBrue/lqd02aEXnhnyuD/pQUQ7 jKAs20tmhGtWa6j+AyNaWFmCZ8s0OCpxSb0UNT12u70IgvKovnl8quwnAH0VsUCx164T aJB796NwWrN27QxYNNMwBiJ95+D/Nf0ERGNHPVBLaUJtygA4PgleKYjMHNkEyWHEFObM qK0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160589; x=1714765389; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cKe3cZw/HcttjUJbHfrcy+l3NjV8jZoAyEBmM5OCTLI=; b=iyLVCDQbBdu7KWHjP2zXIA/cdbsIAPsImuk+UQcd0PQQnlTuLfeGA25+yRycAlNScD 3sIUqV/QgFWCCDgeMc4aivKEhbIMAKZoPO2WAZ4gzQuRxGGPWchgGRc4B8Cp0s6PwLNt UuF9YsbBvkxkyvPEtMOsNqsiDeNUdXXWniM9GA48aZNNrnW1CYPsUb9EKBhO2DMJ2xn+ Bk1zSPtJ0OWDeghfpSgrVc6YzLTFo5KOELEWh8yOmBFkpD/QFEUv2JKZuhVoldo0Ajod YHSKJJHwXZpeFtfdSgoHHhMLmLGWpXtwf00EuAablhiLfkEhP9tq6EzYoFrRSu2VKf+3 txEQ== X-Forwarded-Encrypted: i=1; AJvYcCWVyjLYWVtuKH4eIZSibqsVfQPSGI3h97vYu25dswMe7rq+XfJ7HMQ4dy+LQfCKPp7FS2Q2K1CaRINSjNS+/jTJYpkE X-Gm-Message-State: AOJu0YyUuK7i7Qd4z/I0IUEZ5YaEHPNF6eDjGLyGU62kjnbtfJOO207i BMJ6/sshtuje3m1El7WyDxPYI9tvG7dER9PuYHeMHgApWzepYBXWq+U82svHmqo= X-Google-Smtp-Source: AGHT+IH/ObdtTWbo8KUAN9Dh32LQQrRjhVEOcVbfZ+7COelwSb6FZcAQt0YN1RPg9TDWe2eHp7rL1g== X-Received: by 2002:a50:ba88:0:b0:570:3bb:e099 with SMTP id x8-20020a50ba88000000b0057003bbe099mr3469020ede.1.1714160589480; Fri, 26 Apr 2024 12:43:09 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id 15-20020a0564021f4f00b00571d74c6074sm8792683edz.46.2024.04.26.12.43.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Nicholas Piggin , Peter Maydell , Michael Rolnik , Paolo Bonzini , Song Gao , "Edgar E. Iglesias" , Aurelien Jarno , Jiaxun Yang , Aleksandar Rikalo , Stafford Horne , Daniel Henrique Barboza , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Liu Zhiwei , Thomas Huth , David Hildenbrand , Ilya Leoshkevich , Mark Cave-Ayland , Artyom Tarasenko , Max Filippov Subject: [PULL 11/38] target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h' Date: Fri, 26 Apr 2024 21:41:31 +0200 Message-ID: <20240426194200.43723-12-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::531; envelope-from=philmd@linaro.org; helo=mail-ed1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org accel/tcg/ files requires the following definitions: - TARGET_LONG_BITS - TARGET_PAGE_BITS - TARGET_PHYS_ADDR_SPACE_BITS - TCG_GUEST_DEFAULT_MO The first 3 are defined in "cpu-param.h". The last one in "cpu.h", with a bunch of definitions irrelevant for TCG. By moving the TCG_GUEST_DEFAULT_MO definition to "cpu-param.h", we can simplify various accel/tcg includes. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Acked-by: Nicholas Piggin Message-Id: <20231211212003.21686-4-philmd@linaro.org> --- target/alpha/cpu-param.h | 3 +++ target/alpha/cpu.h | 3 --- target/arm/cpu-param.h | 8 +++++--- target/arm/cpu.h | 3 --- target/avr/cpu-param.h | 2 ++ target/avr/cpu.h | 2 -- target/hppa/cpu-param.h | 8 ++++++++ target/hppa/cpu.h | 6 ------ target/i386/cpu-param.h | 3 +++ target/i386/cpu.h | 3 --- target/loongarch/cpu-param.h | 2 ++ target/loongarch/cpu.h | 2 -- target/microblaze/cpu-param.h | 3 +++ target/microblaze/cpu.h | 3 --- target/mips/cpu-param.h | 2 ++ target/mips/cpu.h | 2 -- target/openrisc/cpu-param.h | 2 ++ target/openrisc/cpu.h | 2 -- target/ppc/cpu-param.h | 2 ++ target/ppc/cpu.h | 2 -- target/riscv/cpu-param.h | 2 ++ target/riscv/cpu.h | 2 -- target/s390x/cpu-param.h | 6 ++++++ target/s390x/cpu.h | 3 --- target/sparc/cpu-param.h | 23 +++++++++++++++++++++++ target/sparc/cpu.h | 23 ----------------------- target/xtensa/cpu-param.h | 3 +++ target/xtensa/cpu.h | 3 --- 28 files changed, 66 insertions(+), 62 deletions(-) diff --git a/target/alpha/cpu-param.h b/target/alpha/cpu-param.h index c969cb016b..5ce213a9a1 100644 --- a/target/alpha/cpu-param.h +++ b/target/alpha/cpu-param.h @@ -27,4 +27,7 @@ # define TARGET_VIRT_ADDR_SPACE_BITS (30 + TARGET_PAGE_BITS) #endif +/* Alpha processors have a weak memory model */ +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index 7188a409a0..f9e2ecb90a 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -24,9 +24,6 @@ #include "exec/cpu-defs.h" #include "qemu/cpu-float.h" -/* Alpha processors have a weak memory model */ -#define TCG_GUEST_DEFAULT_MO (0) - #define ICACHE_LINE_SIZE 32 #define DCACHE_LINE_SIZE 32 diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h index da3243ab21..2d5f3aa312 100644 --- a/target/arm/cpu-param.h +++ b/target/arm/cpu-param.h @@ -27,14 +27,16 @@ # else # define TARGET_PAGE_BITS 12 # endif -#else +#else /* !CONFIG_USER_ONLY */ /* * ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6 * have to support 1K tiny pages. */ # define TARGET_PAGE_BITS_VARY # define TARGET_PAGE_BITS_MIN 10 - -#endif +#endif /* !CONFIG_USER_ONLY */ + +/* ARM processors have a weak memory model */ +#define TCG_GUEST_DEFAULT_MO (0) #endif diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 97997dbd08..17efc5d565 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -30,9 +30,6 @@ #include "target/arm/multiprocessing.h" #include "target/arm/gtimer.h" -/* ARM processors have a weak memory model */ -#define TCG_GUEST_DEFAULT_MO (0) - #ifdef TARGET_AARCH64 #define KVM_HAVE_MCE_INJECTION 1 #endif diff --git a/target/avr/cpu-param.h b/target/avr/cpu-param.h index 9a92bc74fc..93c2f470d0 100644 --- a/target/avr/cpu-param.h +++ b/target/avr/cpu-param.h @@ -32,4 +32,6 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 24 #define TARGET_VIRT_ADDR_SPACE_BITS 24 +#define TCG_GUEST_DEFAULT_MO 0 + #endif diff --git a/target/avr/cpu.h b/target/avr/cpu.h index d185d20dcb..4725535102 100644 --- a/target/avr/cpu.h +++ b/target/avr/cpu.h @@ -30,8 +30,6 @@ #define CPU_RESOLVING_TYPE TYPE_AVR_CPU -#define TCG_GUEST_DEFAULT_MO 0 - /* * AVR has two memory spaces, data & code. * e.g. both have 0 address diff --git a/target/hppa/cpu-param.h b/target/hppa/cpu-param.h index bb3d7ef6f7..473d489f01 100644 --- a/target/hppa/cpu-param.h +++ b/target/hppa/cpu-param.h @@ -21,4 +21,12 @@ #define TARGET_PAGE_BITS 12 +/* PA-RISC 1.x processors have a strong memory model. */ +/* + * ??? While we do not yet implement PA-RISC 2.0, those processors have + * a weak memory model, but with TLB bits that force ordering on a per-page + * basis. It's probably easier to fall back to a strong memory model. + */ +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL + #endif diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index a072d0bb63..fb2e4c4a98 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -25,12 +25,6 @@ #include "qemu/cpu-float.h" #include "qemu/interval-tree.h" -/* PA-RISC 1.x processors have a strong memory model. */ -/* ??? While we do not yet implement PA-RISC 2.0, those processors have - a weak memory model, but with TLB bits that force ordering on a per-page - basis. It's probably easier to fall back to a strong memory model. */ -#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL - #define MMU_ABS_W_IDX 6 #define MMU_ABS_IDX 7 #define MMU_KERNEL_IDX 8 diff --git a/target/i386/cpu-param.h b/target/i386/cpu-param.h index 911b4cd51b..5e15335203 100644 --- a/target/i386/cpu-param.h +++ b/target/i386/cpu-param.h @@ -24,4 +24,7 @@ #endif #define TARGET_PAGE_BITS 12 +/* The x86 has a strong memory model with some store-after-load re-ordering */ +#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) + #endif diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 6112e27bfd..565c7a98c3 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -30,9 +30,6 @@ #define XEN_NR_VIRQS 24 -/* The x86 has a strong memory model with some store-after-load re-ordering */ -#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) - #define KVM_HAVE_MCE_INJECTION 1 /* support for self modifying code even if the modified instruction is diff --git a/target/loongarch/cpu-param.h b/target/loongarch/cpu-param.h index cfe195db4e..db5ad1c69f 100644 --- a/target/loongarch/cpu-param.h +++ b/target/loongarch/cpu-param.h @@ -14,4 +14,6 @@ #define TARGET_PAGE_BITS 12 +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index ec37579fd6..abb01b2cc7 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -39,8 +39,6 @@ #define IOCSR_MEM_SIZE 0x428 -#define TCG_GUEST_DEFAULT_MO (0) - #define FCSR0_M1 0x1f /* FCSR1 mask, Enables */ #define FCSR0_M2 0x1f1f0000 /* FCSR2 mask, Cause and Flags */ #define FCSR0_M3 0x300 /* FCSR3 mask, Round Mode */ diff --git a/target/microblaze/cpu-param.h b/target/microblaze/cpu-param.h index 9770b0eb52..e530fead1c 100644 --- a/target/microblaze/cpu-param.h +++ b/target/microblaze/cpu-param.h @@ -29,4 +29,7 @@ /* FIXME: MB uses variable pages down to 1K but linux only uses 4k. */ #define TARGET_PAGE_BITS 12 +/* MicroBlaze is always in-order. */ +#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL + #endif diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index c0c7574dbd..3e5a3e5c60 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -24,9 +24,6 @@ #include "exec/cpu-defs.h" #include "qemu/cpu-float.h" -/* MicroBlaze is always in-order. */ -#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL - typedef struct CPUArchState CPUMBState; #if !defined(CONFIG_USER_ONLY) #include "mmu.h" diff --git a/target/mips/cpu-param.h b/target/mips/cpu-param.h index 594c91a156..6f6ac1688f 100644 --- a/target/mips/cpu-param.h +++ b/target/mips/cpu-param.h @@ -30,4 +30,6 @@ #define TARGET_PAGE_BITS_MIN 12 #endif +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 7329226d39..3e906a175a 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -10,8 +10,6 @@ #include "hw/clock.h" #include "mips-defs.h" -#define TCG_GUEST_DEFAULT_MO (0) - typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; /* MSA Context */ diff --git a/target/openrisc/cpu-param.h b/target/openrisc/cpu-param.h index 3f08207485..fbfc0f568b 100644 --- a/target/openrisc/cpu-param.h +++ b/target/openrisc/cpu-param.h @@ -13,4 +13,6 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index b1b7db5cbd..c9fe9ae12d 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -24,8 +24,6 @@ #include "exec/cpu-defs.h" #include "fpu/softfloat-types.h" -#define TCG_GUEST_DEFAULT_MO (0) - /** * OpenRISCCPUClass: * @parent_realize: The parent class' realize handler. diff --git a/target/ppc/cpu-param.h b/target/ppc/cpu-param.h index b7ad52de03..77c5ed9a67 100644 --- a/target/ppc/cpu-param.h +++ b/target/ppc/cpu-param.h @@ -40,4 +40,6 @@ # define TARGET_PAGE_BITS 12 #endif +#define TCG_GUEST_DEFAULT_MO 0 + #endif diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 67e6b2effd..0ac55d6b25 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -29,8 +29,6 @@ #define CPU_RESOLVING_TYPE TYPE_POWERPC_CPU -#define TCG_GUEST_DEFAULT_MO 0 - #define TARGET_PAGE_BITS_64K 16 #define TARGET_PAGE_BITS_16M 24 diff --git a/target/riscv/cpu-param.h b/target/riscv/cpu-param.h index b2a9396dec..1fbd64939d 100644 --- a/target/riscv/cpu-param.h +++ b/target/riscv/cpu-param.h @@ -28,4 +28,6 @@ * - M mode HLV/HLVX/HSV 0b111 */ +#define TCG_GUEST_DEFAULT_MO 0 + #endif diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 3b1a02b944..2d0c02c35b 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -43,8 +43,6 @@ typedef struct CPUArchState CPURISCVState; # define TYPE_RISCV_CPU_BASE TYPE_RISCV_CPU_BASE64 #endif -#define TCG_GUEST_DEFAULT_MO 0 - /* * RISC-V-specific extra insn start words: * 1: Original instruction opcode diff --git a/target/s390x/cpu-param.h b/target/s390x/cpu-param.h index 84ca08626b..11d23b600d 100644 --- a/target/s390x/cpu-param.h +++ b/target/s390x/cpu-param.h @@ -13,4 +13,10 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 64 #define TARGET_VIRT_ADDR_SPACE_BITS 64 +/* + * The z/Architecture has a strong memory model with some + * store-after-load re-ordering. + */ +#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) + #endif diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 43a46a5a06..414680eed1 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -33,9 +33,6 @@ #define ELF_MACHINE_UNAME "S390X" -/* The z/Architecture has a strong memory model with some store-after-load re-ordering */ -#define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) - #define TARGET_HAS_PRECISE_SMC #define TARGET_INSN_START_EXTRA_WORDS 2 diff --git a/target/sparc/cpu-param.h b/target/sparc/cpu-param.h index cb11980404..82293fb844 100644 --- a/target/sparc/cpu-param.h +++ b/target/sparc/cpu-param.h @@ -23,4 +23,27 @@ # define TARGET_VIRT_ADDR_SPACE_BITS 32 #endif +/* + * From Oracle SPARC Architecture 2015: + * + * Compatibility notes: The PSO memory model described in SPARC V8 and + * SPARC V9 compatibility architecture specifications was never implemented + * in a SPARC V9 implementation and is not included in the Oracle SPARC + * Architecture specification. + * + * The RMO memory model described in the SPARC V9 specification was + * implemented in some non-Sun SPARC V9 implementations, but is not + * directly supported in Oracle SPARC Architecture 2015 implementations. + * + * Therefore always use TSO in QEMU. + * + * D.5 Specification of Partial Store Order (PSO) + * ... [loads] are followed by an implied MEMBAR #LoadLoad | #LoadStore. + * + * D.6 Specification of Total Store Order (TSO) + * ... PSO with the additional requirement that all [stores] are followed + * by an implied MEMBAR #StoreStore. + */ +#define TCG_GUEST_DEFAULT_MO (TCG_MO_LD_LD | TCG_MO_LD_ST | TCG_MO_ST_ST) + #endif diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index f3cdd17c62..dfd9512a21 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -6,29 +6,6 @@ #include "exec/cpu-defs.h" #include "qemu/cpu-float.h" -/* - * From Oracle SPARC Architecture 2015: - * - * Compatibility notes: The PSO memory model described in SPARC V8 and - * SPARC V9 compatibility architecture specifications was never implemented - * in a SPARC V9 implementation and is not included in the Oracle SPARC - * Architecture specification. - * - * The RMO memory model described in the SPARC V9 specification was - * implemented in some non-Sun SPARC V9 implementations, but is not - * directly supported in Oracle SPARC Architecture 2015 implementations. - * - * Therefore always use TSO in QEMU. - * - * D.5 Specification of Partial Store Order (PSO) - * ... [loads] are followed by an implied MEMBAR #LoadLoad | #LoadStore. - * - * D.6 Specification of Total Store Order (TSO) - * ... PSO with the additional requirement that all [stores] are followed - * by an implied MEMBAR #StoreStore. - */ -#define TCG_GUEST_DEFAULT_MO (TCG_MO_LD_LD | TCG_MO_LD_ST | TCG_MO_ST_ST) - #if !defined(TARGET_SPARC64) #define TARGET_DPREGS 16 #define TARGET_FCCREGS 1 diff --git a/target/xtensa/cpu-param.h b/target/xtensa/cpu-param.h index b1da0555de..0000725f2f 100644 --- a/target/xtensa/cpu-param.h +++ b/target/xtensa/cpu-param.h @@ -17,4 +17,7 @@ #define TARGET_VIRT_ADDR_SPACE_BITS 32 #endif +/* Xtensa processors have a weak memory model */ +#define TCG_GUEST_DEFAULT_MO (0) + #endif diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 6b8d0636d2..9f2341d856 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -34,9 +34,6 @@ #include "hw/clock.h" #include "xtensa-isa.h" -/* Xtensa processors have a weak memory model */ -#define TCG_GUEST_DEFAULT_MO (0) - enum { /* Additional instructions */ XTENSA_OPTION_CODE_DENSITY, From patchwork Fri Apr 26 19:41:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928339 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=ymlZhQlQ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR3Cf5v4lz23rB for ; Sat, 27 Apr 2024 05:47:26 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RTn-0001kt-Ut; Fri, 26 Apr 2024 15:43:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RTj-0001Y4-Ib for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:27 -0400 Received: from mail-ej1-x62d.google.com ([2a00:1450:4864:20::62d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RTf-00034x-BV for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:27 -0400 Received: by mail-ej1-x62d.google.com with SMTP id a640c23a62f3a-a51a7d4466bso303414366b.2 for ; Fri, 26 Apr 2024 12:43:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160595; x=1714765395; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zCHikf9aNyk3WhcB018t8YJhGkQVI+bzenRpRAy8E10=; b=ymlZhQlQ1VzKm64oGfteRO29nS8XfmuSYGxOpxtp75eg5VF6T0AXaKCFqrYEYnalCN w5fnhEJAfmhJ5FLLmyu0YSFBkEenyCKXOEY71UVl0z2jT2kD7d2PmTgkc1KwILTHfVse tvz0BkeuXjdPKqIxNJcK/5BIbX0LDMM8BT/OeihwEjz0Roh5+npNOLTipXTozn0GOC+x gAES0+cAdICfSTPg537+z9gOoWaiuImQpFebi6Yq0WIPJg0OMgSBZxAOvqprx7UKwkLT dyfkuWZxsY6Q9xXuhlgk/2rfXRqPZiR0jokMgpvdA47M37PRKrNS2jmtlyjucDBdsW6z /BWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160595; x=1714765395; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zCHikf9aNyk3WhcB018t8YJhGkQVI+bzenRpRAy8E10=; b=IFjr3qbzLg9BapfaTPlvv/2qzcKnR8ZojeO3Fzx/dkaUOv6bXlt/lVeQUBIdIgkRfq p7VOQMLtnejvAW4fM27NLDnoWHcSfMJdjvv/OdT+ixwOPhBpdV4Srj70z17JrKfUoXY+ Qac/Th2SK/+xbdr3uwQdwfhiW1lZ8nH9OaBin7J8DoTWK3BFUEM6grZdcBp511C8V8iT nhx4fzVdFxtVjlAyNxpC/+K3gmpRjc+Asa0K0INoQH6+iG56Y3oM+VI/f6i+m+ty/u0y ll2ro4S1bhi9NQ64TXY/i2cF/lHI2A8/lKK68HrU++R4ZJRCkbbYzUOumDI0wXZF9HFe Hlng== X-Forwarded-Encrypted: i=1; AJvYcCUe9twouoqssrgYIp11N8vYkBVxZOM4SbUQT/C50Pwf2zgAjfsoK8OoqEGPPFTz9Ca0NzCi3RLU62RM/V50M1rwrKfw X-Gm-Message-State: AOJu0YyLwif3WFO80+lJ1Pt0XHRorhZV4wXbBpHbIyhUwmxq6y8/vN6M kn5UJAWZSWB7W6UiHHmZfSGGlLfvefRgDZs6dYu4K1f5QFIwsh7wI8Kj+mtP+Fs= X-Google-Smtp-Source: AGHT+IHAZlHFUggQbgP5LoyQ+dR4w5wTimxNZNrshdiG5IUEa5nAABnp/2nVbkRYKWVJWzJOKgtGqw== X-Received: by 2002:a17:907:97c8:b0:a58:7857:fee7 with SMTP id js8-20020a17090797c800b00a587857fee7mr3023416ejc.68.1714160595167; Fri, 26 Apr 2024 12:43:15 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id i13-20020a170906090d00b00a588dab605dsm3666771ejd.88.2024.04.26.12.43.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:14 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Nicholas Piggin , Thomas Huth , Richard Henderson , Daniel Henrique Barboza Subject: [PULL 12/38] target/ppc/excp_helper: Avoid 'abi_ptr' in system emulation Date: Fri, 26 Apr 2024 21:41:32 +0200 Message-ID: <20240426194200.43723-13-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=philmd@linaro.org; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org 'abi_ptr' is a user specific type. The system emulation equivalent is 'target_ulong'. Use it in ppc_ldl_code() to emphasis this is not an user emulation function. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Nicholas Piggin Reviewed-by: Thomas Huth Message-Id: <20231211212003.21686-18-philmd@linaro.org> Reviewed-by: Richard Henderson --- target/ppc/excp_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 674c05a2ce..0712098cf7 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -142,7 +142,7 @@ static inline bool insn_need_byteswap(CPUArchState *env) return !!(env->msr & ((target_ulong)1 << MSR_LE)); } -static uint32_t ppc_ldl_code(CPUArchState *env, abi_ptr addr) +static uint32_t ppc_ldl_code(CPUArchState *env, target_ulong addr) { uint32_t insn = cpu_ldl_code(env, addr); From patchwork Fri Apr 26 19:41:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928361 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=fmEWD8mr; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR3Fc26Xyz23rB for ; Sat, 27 Apr 2024 05:49:08 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RUR-0003Db-G2; Fri, 26 Apr 2024 15:44:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RTl-0001cr-9I for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:29 -0400 Received: from mail-ej1-x636.google.com ([2a00:1450:4864:20::636]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RTg-00035n-Oz for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:28 -0400 Received: by mail-ej1-x636.google.com with SMTP id a640c23a62f3a-a58e2740cd7so18287866b.1 for ; Fri, 26 Apr 2024 12:43:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160601; x=1714765401; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3j5wqqpS7/lf73uUyWBqUlTl3qEW0g75YQa/BO6RAIE=; b=fmEWD8mrPo0nCAdTx+DfDnclKQMlrTALRAnzDDyyiHk64BfQO1BkhBUFlgnMvtx85K TUsTNsRav89Qrvl4yKgi/HjgD0tw4WSl9I8Xkzjc6mqQwnUvvYFSiQc3RuepKSoFRKc5 sl4+mYKRzMmJsg5RbvOJqrPSMjo3Q0CnyN0pEj6wB5xodXnY26KagkAzBAu389yHi6H2 mj7HVU4j+DaANMEwBE8yBzToxPiVlCcDf8AQXR0+l7ODTVgFM8QVmAlpf/5HMkfiEoBY 6d+CoajPuURxZL2CX8tv6JrR3Rm4UUthvjUZ1aVzIa8SnqIItm+tpeSr7e3Gq18yzj3i x8og== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160601; x=1714765401; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3j5wqqpS7/lf73uUyWBqUlTl3qEW0g75YQa/BO6RAIE=; b=liE7NyX3VpIIxYbrQuAGmcNRNO0tmatlJaK3uEAVU5wkPwjBkz1AwsCxnnh5F0uCjr FICwm/9w39/HW7x3KSdR7GAMrkqAi8J8RIXx5CMit0WNFM8qk9FtHiNN4Zl294gACePY cPiQQoVQcy2iZcZBDUi/468B6Tu6337qo46bCl/Iapm3DMJaHnLfetXY/ZGBSwekFENJ Z/BdTPsL7DuUjyRGz95vi8P3v+zV3L0et/CpAFvp3QSaLj3rRhqNFsymG5jwY+Hw7WRw JVR0TgqU/6lPFy+qzX4jqmg3jGt1PhRdGNssGbytJf6vU2Na5HCmSdobRSldwuRBvNEh H7lA== X-Forwarded-Encrypted: i=1; AJvYcCV+EkWDvlQadNBl3Iw//DbAs0yFW1nZ01OYAcfI/P8o5qZCt3I7RTeImlR94/7F1rGW5iKobwk0EizCiLVVQSynJ6pw X-Gm-Message-State: AOJu0YzCgkyqNTTYNtEOwQajdKiDjlfEJabtcBntrGNGe03Z4Ve4FzQl 0sHxzBBiq4wC36PxLYhKDhio5kDvaPs6rWkVI0XWiXyaDpqJKppLuMa6LjZYdG4= X-Google-Smtp-Source: AGHT+IETBPuyIVPCZBmtMgTb33DBkiexcpTAB7tWpueprnBvdcNXAlEwf1W/5t8Jv1KaOUZfGRpp7g== X-Received: by 2002:a17:906:f9db:b0:a58:83a6:c68f with SMTP id lj27-20020a170906f9db00b00a5883a6c68fmr551531ejb.17.1714160600871; Fri, 26 Apr 2024 12:43:20 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id dk21-20020a170907941500b00a55aee4bf74sm6993231ejc.79.2024.04.26.12.43.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:20 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Mark Cave-Ayland , Artyom Tarasenko Subject: [PULL 13/38] target/sparc: Replace abi_ulong by uint32_t for TARGET_ABI32 Date: Fri, 26 Apr 2024 21:41:33 +0200 Message-ID: <20240426194200.43723-14-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org We have abi_ulong == uint32_t for the 32-bit ABI. Use the generic type to avoid to depend on the "exec/user/abitypes.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-14-philmd@linaro.org> --- target/sparc/gdbstub.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c index 07ea81ab5f..ec0036e9ef 100644 --- a/target/sparc/gdbstub.c +++ b/target/sparc/gdbstub.c @@ -108,7 +108,7 @@ int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) SPARCCPU *cpu = SPARC_CPU(cs); CPUSPARCState *env = &cpu->env; #if defined(TARGET_ABI32) - abi_ulong tmp; + uint32_t tmp; tmp = ldl_p(mem_buf); #else From patchwork Fri Apr 26 19:41:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928334 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=BSLu+ROa; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR3CN3flNz23rB for ; Sat, 27 Apr 2024 05:47:12 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RUS-0003IZ-AR; Fri, 26 Apr 2024 15:44:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RTq-0001xy-0o for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:37 -0400 Received: from mail-ed1-x529.google.com ([2a00:1450:4864:20::529]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RTk-00037e-6X for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:32 -0400 Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-5709cb80b03so2841517a12.2 for ; Fri, 26 Apr 2024 12:43:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160606; x=1714765406; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ImXEe3AsI+IkHscdZF2OSgUHx6phFwxkW/+zKfz8Om4=; b=BSLu+ROaLKnJztDBtlI+JzJ7mc05sfBehSZB4Rnj19t/cPvC/New8fvqtT0NfEKOx1 QJEmbqVi0EdWKTIVdXlXMHwJpoQM7M3OAE6k5inlK7anaubCg29UqHOl+YrmLeGfZiJ+ TINyT4bq1yqxWgfgNE8bOzWH7IXcEIE577txzp/Hac6Cdk5Zq/9TGluo7gEOuh3mnPYb JpHh6amhV4Qno4Ul4gOX/WOSP8hBAvRRj78+BanHaUd3NGnW9rzEOgtTuvju6BYgqqPH VXYpYcYckoqSa/A+/+7bsaWzD94JgaqpajdDqtGp/kbXmtbyQ/ZFSuBxuSNWTiB5N41I O1SQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160606; x=1714765406; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ImXEe3AsI+IkHscdZF2OSgUHx6phFwxkW/+zKfz8Om4=; b=hFXMnZzwWdddyo23RLX/Dr/8lYgSWKAc9KVsGU3jJxFlLqJ5xqdoMTgyYTSm18a97L kMiCWOrtcgzJxVxSCVMJp68UDOMiDU/tcQN8edcBDlyqTrt6dSEyFHYVU+4szuncC3W2 XNzXffvr2Zdx54ZTp85paq0860kV6B+n4dG7FMOuxyze6H8CO2EWaxrY48Ab+ktMCB2o SjyeT1z+csbnPLZMnYqpa99krlGAAk8VIJwtuo6dR/QMLEaIzJkIey8aKYeIfZmlIeDc QlRW/YfIPpdiwE5+YdxqS1P6zTo4fsdCTngAqf3TTHmhrJkCyVmFX3E3aA5OgC9L0mFn 2Viw== X-Forwarded-Encrypted: i=1; AJvYcCXVXlUvn9hQrArxB6rlFkDbCi+sh8oG8V98Qu0LJ1lr1MJUGXQSD2Os8h++T2K7Rr3/N55te9LBMgfJ/w8FJ8/sSOM6 X-Gm-Message-State: AOJu0YwAZTQdwmhTTqzWmGzt4Gyd2Mubg9bTcGIH76CEmoF0fPOQFW5s 4Wwm3mEIv7z2jZuQQY4bkZLkNSW50NKO2tWCc/k6mGQ4VtpmyfAecj4Iac5Yxt4= X-Google-Smtp-Source: AGHT+IETZwTb4a/21u+upB/lEy3ej/85A0BRlZkCkWx2rxIQGoA88FAGDYQsdKXyNU7INJJuCiipQw== X-Received: by 2002:a17:906:af19:b0:a58:d757:66bb with SMTP id lx25-20020a170906af1900b00a58d75766bbmr1292294ejb.14.1714160606653; Fri, 26 Apr 2024 12:43:26 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id bi14-20020a170907368e00b00a5588ed8fa2sm9358983ejc.113.2024.04.26.12.43.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:26 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini , Eduardo Habkost Subject: [PULL 14/38] target/i386: Include missing 'exec/exec-all.h' header Date: Fri, 26 Apr 2024 21:41:34 +0200 Message-ID: <20240426194200.43723-15-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=philmd@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org The XRSTOR instruction ends calling tlb_flush(), declared in "exec/exec-all.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-13-philmd@linaro.org> --- target/i386/tcg/fpu_helper.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index 4b965a5d6c..ece22a3553 100644 --- a/target/i386/tcg/fpu_helper.c +++ b/target/i386/tcg/fpu_helper.c @@ -21,6 +21,7 @@ #include #include "cpu.h" #include "tcg-cpu.h" +#include "exec/exec-all.h" #include "exec/cpu_ldst.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" From patchwork Fri Apr 26 19:41:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928323 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=YDpF/XGp; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR38p1Nclz1yZx for ; Sat, 27 Apr 2024 05:44:58 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RUX-0003vm-O9; Fri, 26 Apr 2024 15:44:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RTt-0001yp-6U for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:38 -0400 Received: from mail-ed1-x532.google.com ([2a00:1450:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RTq-0003Ai-0U for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:36 -0400 Received: by mail-ed1-x532.google.com with SMTP id 4fb4d7f45d1cf-57222fc625aso3164767a12.3 for ; Fri, 26 Apr 2024 12:43:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160612; x=1714765412; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6ledkbh8k2HTuIvDABWBQUBebX3R5+DXtp/0ED5fWzA=; b=YDpF/XGp+M9BknmM5aeV92FaUZY+j0g8hSbONhONijwA12TaFNGex9mLxFfQAe5G9c ySMduJHjAuLN2zvjLpb31xn3EvxD4IZ59qD5Q+sp7IMTVb+PHVjqUW7aFyyBuxKlKS5H ASYC88Imx1YX0chAvDG86J72dZkm88ts54BVookVk+QAAeXLyh+aQmNqEmNw34lV4Jlt EewiQ6aM+A4UZ/FTweCiEwary/pKV5jyNujNpl4Eb2UVtWgjzZFcwh90Ymn/cE5B7c3i A/ikPaD3i7J7Ivf4o5sPLr8nACNlsg2ih+7ZvYUroFnPiZxNXVERfxuyeM1dPAtbaK7A ugpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160612; x=1714765412; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6ledkbh8k2HTuIvDABWBQUBebX3R5+DXtp/0ED5fWzA=; b=QsSJyIBSBB71saH3hEo5jY94ygf48m4UdhpBR0UzuVGmNUY2kNFpWOpcC2fS+MClTi bPDhwG8tGa2rOH4ZdHgW710Z8m64XXRif0EnDaJah/ygMH//TeQcpa4qlHHbsNxqxGnZ mABj5RcaNPpraNmsCxHmxaEbebL7lP32p74YINiNE2BFVB0EBch9TXg77hkE5FMjV/h2 HhqexbDQSkOz76m/LR2PPWj/CtaEhJPH+xB0JdThhOqKkiAuuisPRQedxhr6EaCpmBGm iEbExJyW0w6fOvQEt8SGNRfIJY7dKLIKnsGCsYUwyZWejAPkOVuDORs1dDb/DJrcvKoU q6zg== X-Forwarded-Encrypted: i=1; AJvYcCV+u3E0D55OTxHfkM/qNsB81zcU/+dZ84B98TdCXnJfm3Pppc5wXQD/0qtEG7AI10wz9gjDIwUMA+8h+6jJTjPU3juJ X-Gm-Message-State: AOJu0YziFOo4a2tNHtA6JYhU9vb5tqNLgEpvBAEzbYpsRhuA/to6aWxb DHVrG/CqhiEjm4luGGHlZvjDK1mvQxm04mLg2RccRCtxTwT0GmNGo29ZUVkBl2U= X-Google-Smtp-Source: AGHT+IFaNie4351cxQ1jjTm+AA+xkAzxC2c9vg5NMcqycaPkVZmd/j8wB9L9GrQ6crtroyZ0xLvBBg== X-Received: by 2002:aa7:cb8c:0:b0:572:637b:c7e1 with SMTP id r12-20020aa7cb8c000000b00572637bc7e1mr1039807edt.21.1714160612244; Fri, 26 Apr 2024 12:43:32 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id be12-20020a0564021a2c00b0056bf7f92346sm10310057edb.50.2024.04.26.12.43.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:31 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini , Riku Voipio Subject: [PULL 15/38] accel/tcg: Un-inline retaddr helpers to 'user-retaddr.h' Date: Fri, 26 Apr 2024 21:41:35 +0200 Message-ID: <20240426194200.43723-16-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=philmd@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org set_helper_retaddr() is only used in accel/tcg/user-exec.c. clear_helper_retaddr() is only used in accel/tcg/cpu-exec.c and accel/tcg/user-exec.c. No need to expose their definitions to all user-emulation files including "exec/cpu_ldst.h", move them to a new "user-retaddr.h" header (restricted to accel/tcg/). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-19-philmd@linaro.org> --- accel/tcg/user-retaddr.h | 28 ++++++++++++++++++++++++++++ include/exec/cpu_ldst.h | 28 ++-------------------------- accel/tcg/cpu-exec.c | 3 +++ accel/tcg/user-exec.c | 1 + 4 files changed, 34 insertions(+), 26 deletions(-) create mode 100644 accel/tcg/user-retaddr.h diff --git a/accel/tcg/user-retaddr.h b/accel/tcg/user-retaddr.h new file mode 100644 index 0000000000..e0f57e1994 --- /dev/null +++ b/accel/tcg/user-retaddr.h @@ -0,0 +1,28 @@ +#ifndef ACCEL_TCG_USER_RETADDR_H +#define ACCEL_TCG_USER_RETADDR_H + +#include "qemu/atomic.h" + +extern __thread uintptr_t helper_retaddr; + +static inline void set_helper_retaddr(uintptr_t ra) +{ + helper_retaddr = ra; + /* + * Ensure that this write is visible to the SIGSEGV handler that + * may be invoked due to a subsequent invalid memory operation. + */ + signal_barrier(); +} + +static inline void clear_helper_retaddr(void) +{ + /* + * Ensure that previous memory operations have succeeded before + * removing the data visible to the signal handler. + */ + signal_barrier(); + helper_retaddr = 0; +} + +#endif diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index eb8f3f0595..82690d3947 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -300,31 +300,7 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr, Int128 cmpv, Int128 newv, MemOpIdx oi, uintptr_t retaddr); -#if defined(CONFIG_USER_ONLY) - -extern __thread uintptr_t helper_retaddr; - -static inline void set_helper_retaddr(uintptr_t ra) -{ - helper_retaddr = ra; - /* - * Ensure that this write is visible to the SIGSEGV handler that - * may be invoked due to a subsequent invalid memory operation. - */ - signal_barrier(); -} - -static inline void clear_helper_retaddr(void) -{ - /* - * Ensure that previous memory operations have succeeded before - * removing the data visible to the signal handler. - */ - signal_barrier(); - helper_retaddr = 0; -} - -#else +#if !defined(CONFIG_USER_ONLY) #include "tcg/oversized-guest.h" @@ -376,7 +352,7 @@ static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx, return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)]; } -#endif /* defined(CONFIG_USER_ONLY) */ +#endif /* !defined(CONFIG_USER_ONLY) */ #if TARGET_BIG_ENDIAN # define cpu_lduw_data cpu_lduw_be_data diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 5c70748060..225e5fbd3e 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -41,6 +41,9 @@ #include "tb-context.h" #include "internal-common.h" #include "internal-target.h" +#if defined(CONFIG_USER_ONLY) +#include "user-retaddr.h" +#endif /* -icount align implementation. */ diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 3cac3a78c4..1c621477ad 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -31,6 +31,7 @@ #include "tcg/tcg-ldst.h" #include "internal-common.h" #include "internal-target.h" +#include "user-retaddr.h" __thread uintptr_t helper_retaddr; From patchwork Fri Apr 26 19:41:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928357 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id l2-20020a1709060e0200b00a4da28f42f1sm11065387eji.177.2024.04.26.12.43.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:37 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Richard Henderson , Paolo Bonzini Subject: [PULL 16/38] accel/tcg: Include missing 'hw/core/cpu.h' header Date: Fri, 26 Apr 2024 21:41:36 +0200 Message-ID: <20240426194200.43723-17-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=philmd@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org tcg_cpu_init_cflags() accesses CPUState fields, so requires "hw/core/cpu.h" to get its structure definition. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-12-philmd@linaro.org> Reviewed-by: Richard Henderson --- accel/tcg/tcg-accel-ops.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 9c957f421c..2c7b0cc09e 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -37,6 +37,8 @@ #include "exec/tb-flush.h" #include "exec/gdbstub.h" +#include "hw/core/cpu.h" + #include "tcg-accel-ops.h" #include "tcg-accel-ops-mttcg.h" #include "tcg-accel-ops-rr.h" From patchwork Fri Apr 26 19:41:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928360 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=qFvyHQit; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR3Fb2bp5z23rD for ; Sat, 27 Apr 2024 05:49:07 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RUa-0004D3-JG; Fri, 26 Apr 2024 15:44:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RUB-0002XZ-IO for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:56 -0400 Received: from mail-ed1-x52e.google.com ([2a00:1450:4864:20::52e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RU8-0003El-Jw for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:43:55 -0400 Received: by mail-ed1-x52e.google.com with SMTP id 4fb4d7f45d1cf-57225322312so3650748a12.1 for ; Fri, 26 Apr 2024 12:43:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160623; x=1714765423; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7ENBQU0RX+7z0jYkAe6EtdYUSGSuY24I2mpEgO+y4o0=; b=qFvyHQittAKmODWxgVXsBe4Ov8PYrWSNK6/GUkdqbRgFvRN0Oy8XDFoPDIalHvP+dw mJqP2fpz43U8fyf1+VGmvk02UG7w/zlNFWJVN+yYUs9OGQOjg7wm5KGV5nJs2pE9g8PJ 1MKydN8toAgbovLi1Z3fT28QS1UCYLW4CkshqNsc6vDe8KiqD2/pAFKFPbbn3uTZGOGG NrI9yZ0ctKmJ7CUQm28dsw0H4jcWw+cYiWAuDjRLQiZ1elXkSTW+K8Mw6yCWqTsjlszI 1gq7TAued3ftv5HU97WLfQ1txFOP8uaf1aJUqhT7xGPGwgmYymI6AxqQgCOMhDQbiDHG DaGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160623; x=1714765423; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7ENBQU0RX+7z0jYkAe6EtdYUSGSuY24I2mpEgO+y4o0=; b=jfO/0hFMSheEKOhtAov+rFwDehzsMURbHvg1WNjqzfP0GuWYSCKUBVvvVOqVuksH7e lD2Lysz+mPUOwqWsEzXOGfaNW0xn/tTOb5ClzFe8Or7TegLSxJ5qa/ZbR+dUHPp7Nfro Y1dYjkfLiDx0OtyriCpz9jP3VhOCfj/wUQoH4HT6o+WuACr3oehEWKgqm/6Ucxpj7Z7b 6afe27zza3ZrsvWKu6e1Ni0Jzcsa9xIZ3pgPgV5VCsiQD/+l0FjkyDQkiHDiOq1hqRuM cJWCLqchC33Oxp/VPR2ixYo8UqDVf0Zpcx77xFHqUuBPTbGYuEOUxlxLf6VkfXdSB+gw pwqA== X-Forwarded-Encrypted: i=1; AJvYcCWkXwJ0dB199ylDX85FASHq8/0gQdJvzKKngADjwTKkmTHv6rrOfbDqtHzAO8cf5hP4Ixbq8h2ZF9DgZhYp2fzworK3 X-Gm-Message-State: AOJu0YyvLcwBEVRyyonbEwYETsYmF6HxPAA+r4ySFHOtiiIzsZ+SrM7n Tp7eX5W3Ofqocg4rLANQ8GyhgKwBtzVCZJWERRMGi62PqQ6CVUVlJ7bawLK74DE= X-Google-Smtp-Source: AGHT+IFOXyRU0XboRrP8yvE6c/KL1v/K13UfHP9b7aI2p9uUVx6EI3q/HsZ+tUw+MtdSBACFe0SISg== X-Received: by 2002:a50:99d6:0:b0:56e:355d:2ece with SMTP id n22-20020a5099d6000000b0056e355d2ecemr2481443edb.30.1714160623526; Fri, 26 Apr 2024 12:43:43 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id ek17-20020a056402371100b0057266474cd2sm289245edb.15.2024.04.26.12.43.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 17/38] accel/tcg: Include missing headers in 'tb-jmp-cache.h' Date: Fri, 26 Apr 2024 21:41:37 +0200 Message-ID: <20240426194200.43723-18-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52e; envelope-from=philmd@linaro.org; helo=mail-ed1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Due to missing headers, when including "tb-jmp-cache.h" we might get: accel/tcg/tb-jmp-cache.h:21:21: error: field ‘rcu’ has incomplete type 21 | struct rcu_head rcu; | ^~~ accel/tcg/tb-jmp-cache.h:24:9: error: unknown type name ‘vaddr’ 24 | vaddr pc; | ^~~~~ Add the missing "qemu/rcu.h" and "exec/cpu-common.h" headers. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson Message-Id: <20240111162442.43755-1-philmd@linaro.org> --- accel/tcg/tb-jmp-cache.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/accel/tcg/tb-jmp-cache.h b/accel/tcg/tb-jmp-cache.h index 4ab8553afc..184bb3e3e2 100644 --- a/accel/tcg/tb-jmp-cache.h +++ b/accel/tcg/tb-jmp-cache.h @@ -9,6 +9,9 @@ #ifndef ACCEL_TCG_TB_JMP_CACHE_H #define ACCEL_TCG_TB_JMP_CACHE_H +#include "qemu/rcu.h" +#include "exec/cpu-common.h" + #define TB_JMP_CACHE_BITS 12 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS) From patchwork Fri Apr 26 19:41:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928369 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=cJVZOFYX; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR3Hf06CTz1yZP for ; Sat, 27 Apr 2024 05:50:54 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RUf-0004lO-N2; Fri, 26 Apr 2024 15:44:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RUJ-0002pK-UB for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:44:04 -0400 Received: from mail-ej1-x632.google.com ([2a00:1450:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RU8-0003FZ-MM for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:44:03 -0400 Received: by mail-ej1-x632.google.com with SMTP id a640c23a62f3a-a559b919303so328884866b.1 for ; Fri, 26 Apr 2024 12:43:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160629; x=1714765429; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=v7EfD6ZqpZav9ENI55PjcdOF+ptN44Hp+/BctxTPyg4=; b=cJVZOFYXU+L6mWEHIDpfDAq3AKeZQj6D1w6JUy+oatdX/eww/rJactZnOXbwQ2N6xQ 7b6CxLcxrZ2BQa4sJwBtDhsQnNmxPrH77jyE6nkrw2mdibG2VDcMcXeHqdoPy7tGenHP PyNZXT5Cz9WzX18ECn0xlzipATxfGcnRfWkVfO6OsS7pR7iqS/lNhuoda7q2ROjcuUMl +wJFpjpvMGkjwXnZYzkXvENrvbqCRvd6Gcckf7C1Q/RWnQZiXeeeX18DRQGd43Rxoz6R X7+Qe27rRSoDJIFInjKR1w4LtisyYq9F7+EnahRDQxxNMyUbC7eDhP1gb5UTeR+QUKTz v/VA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160629; x=1714765429; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=v7EfD6ZqpZav9ENI55PjcdOF+ptN44Hp+/BctxTPyg4=; b=lTIZK6CpqfZdEPKfmqzjfJJDjNslkJLVoZDNaKHvln90s5q16o3CPmKip4mrIcnZka q/EtBCs5Ec3XWKN9tIbfZne0vWiLW233x2sSQaL1jd8CTcEEHmsZS+Vo8ZTddND76PO0 jJNuk8wStGdITlQLAqKKD168lgGp6B2Z4w/4iuWcL18reaSXHY8xQDdGjQ1F5bRBaQk8 BI61M36aefMFK+5IH0JZly8Z0JbPM/jxSgdtKICO7Zin43kdOTK/L2E6AavLmD2OVW0V 19z91gxNY0Vg/QqeLCdc+Zk96DrIM+pADUXMV9a5LuQcGGksudtHWESOTHG/zq8IWSY8 vmZg== X-Forwarded-Encrypted: i=1; AJvYcCW3w/pxj+xZR/0FHLOoJIDIGaQEKEfaillSYuOou0zXk1UJrq4C8lGj1sloEqlAQikeWboXliIDYFNOm+q+7n4iVcX+ X-Gm-Message-State: AOJu0YyrDycqvTRzeiZTj1Xo1+OsEunchCiqVptKjQtxE5zByw0mH0Sv d3OTuYcJQIYlW9t0RhDvnj9aC8mMarnaN2+OjCHRrs06KSsx/yD6HBvGAgoFg5Q= X-Google-Smtp-Source: AGHT+IEOXlToa21r4yUxiAleA+/mG4rc15QE0VT8GBUb+CHeadQ4/roYWuQ/oB749Wv4bjPrXIvxFA== X-Received: by 2002:a17:906:c1d6:b0:a55:bf86:3ccd with SMTP id bw22-20020a170906c1d600b00a55bf863ccdmr2750281ejb.40.1714160629052; Fri, 26 Apr 2024 12:43:49 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id lb9-20020a170906adc900b00a5889e8353esm3839625ejb.44.2024.04.26.12.43.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 18/38] accel/tcg: Rename load-extract/store-insert headers using .h.inc suffix Date: Fri, 26 Apr 2024 21:41:38 +0200 Message-ID: <20240426194200.43723-19-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Since commit 139c1837db ("meson: rename included C source files to .c.inc"), QEMU standard procedure for included C files is to use *.c.inc. Besides, since commit 6a0057aa22 ("docs/devel: make a statement about includes") this is documented in the Coding Style: If you do use template header files they should be named with the ``.c.inc`` or ``.h.inc`` suffix to make it clear they are being included for expansion. Therefore rename 'store-insert-al16.h' as 'store-insert-al16.h.inc' and 'load-extract-al16-al8.h' as 'load-extract-al16-al8.h.inc'. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson Message-Id: <20240424173333.96148-3-philmd@linaro.org> --- .../{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} | 0 .../host/{store-insert-al16.h => store-insert-al16.h.inc} | 0 .../{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} | 0 .../host/{store-insert-al16.h => store-insert-al16.h.inc} | 0 .../{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} | 0 .../host/{store-insert-al16.h => store-insert-al16.h.inc} | 0 .../{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} | 0 accel/tcg/ldst_atomicity.c.inc | 4 ++-- 8 files changed, 2 insertions(+), 2 deletions(-) rename host/include/aarch64/host/{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} (100%) rename host/include/aarch64/host/{store-insert-al16.h => store-insert-al16.h.inc} (100%) rename host/include/generic/host/{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} (100%) rename host/include/generic/host/{store-insert-al16.h => store-insert-al16.h.inc} (100%) rename host/include/loongarch64/host/{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} (100%) rename host/include/loongarch64/host/{store-insert-al16.h => store-insert-al16.h.inc} (100%) rename host/include/x86_64/host/{load-extract-al16-al8.h => load-extract-al16-al8.h.inc} (100%) diff --git a/host/include/aarch64/host/load-extract-al16-al8.h b/host/include/aarch64/host/load-extract-al16-al8.h.inc similarity index 100% rename from host/include/aarch64/host/load-extract-al16-al8.h rename to host/include/aarch64/host/load-extract-al16-al8.h.inc diff --git a/host/include/aarch64/host/store-insert-al16.h b/host/include/aarch64/host/store-insert-al16.h.inc similarity index 100% rename from host/include/aarch64/host/store-insert-al16.h rename to host/include/aarch64/host/store-insert-al16.h.inc diff --git a/host/include/generic/host/load-extract-al16-al8.h b/host/include/generic/host/load-extract-al16-al8.h.inc similarity index 100% rename from host/include/generic/host/load-extract-al16-al8.h rename to host/include/generic/host/load-extract-al16-al8.h.inc diff --git a/host/include/generic/host/store-insert-al16.h b/host/include/generic/host/store-insert-al16.h.inc similarity index 100% rename from host/include/generic/host/store-insert-al16.h rename to host/include/generic/host/store-insert-al16.h.inc diff --git a/host/include/loongarch64/host/load-extract-al16-al8.h b/host/include/loongarch64/host/load-extract-al16-al8.h.inc similarity index 100% rename from host/include/loongarch64/host/load-extract-al16-al8.h rename to host/include/loongarch64/host/load-extract-al16-al8.h.inc diff --git a/host/include/loongarch64/host/store-insert-al16.h b/host/include/loongarch64/host/store-insert-al16.h.inc similarity index 100% rename from host/include/loongarch64/host/store-insert-al16.h rename to host/include/loongarch64/host/store-insert-al16.h.inc diff --git a/host/include/x86_64/host/load-extract-al16-al8.h b/host/include/x86_64/host/load-extract-al16-al8.h.inc similarity index 100% rename from host/include/x86_64/host/load-extract-al16-al8.h rename to host/include/x86_64/host/load-extract-al16-al8.h.inc diff --git a/accel/tcg/ldst_atomicity.c.inc b/accel/tcg/ldst_atomicity.c.inc index 97dae70d53..134da3c1da 100644 --- a/accel/tcg/ldst_atomicity.c.inc +++ b/accel/tcg/ldst_atomicity.c.inc @@ -9,8 +9,8 @@ * See the COPYING file in the top-level directory. */ -#include "host/load-extract-al16-al8.h" -#include "host/store-insert-al16.h" +#include "host/load-extract-al16-al8.h.inc" +#include "host/store-insert-al16.h.inc" #ifdef CONFIG_ATOMIC64 # define HAVE_al8 true From patchwork Fri Apr 26 19:41:39 2024 Content-Type: text/plain; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id i22-20020a1709061cd600b00a55a10eb070sm7881150ejh.214.2024.04.26.12.43.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:54 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 19/38] accel/tcg: Rename helper-head.h -> helper-head.h.inc Date: Fri, 26 Apr 2024 21:41:39 +0200 Message-ID: <20240426194200.43723-20-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::230; envelope-from=philmd@linaro.org; helo=mail-lj1-x230.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Since commit 139c1837db ("meson: rename included C source files to .c.inc"), QEMU standard procedure for included C files is to use *.c.inc. Besides, since commit 6a0057aa22 ("docs/devel: make a statement about includes") this is documented in the Coding Style: If you do use template header files they should be named with the ``.c.inc`` or ``.h.inc`` suffix to make it clear they are being included for expansion. Therefore rename "exec/helper-head.h" as "exec/helper-head.h.inc". Signed-off-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson Message-Id: <20240424173333.96148-4-philmd@linaro.org> --- include/exec/helper-gen.h.inc | 2 +- include/exec/{helper-head.h => helper-head.h.inc} | 0 include/exec/helper-proto.h.inc | 2 +- include/exec/helper-info.c.inc | 2 +- 4 files changed, 3 insertions(+), 3 deletions(-) rename include/exec/{helper-head.h => helper-head.h.inc} (100%) diff --git a/include/exec/helper-gen.h.inc b/include/exec/helper-gen.h.inc index c009641517..d9fd3ed72a 100644 --- a/include/exec/helper-gen.h.inc +++ b/include/exec/helper-gen.h.inc @@ -8,7 +8,7 @@ #include "tcg/tcg.h" #include "tcg/helper-info.h" -#include "exec/helper-head.h" +#include "exec/helper-head.h.inc" #define DEF_HELPER_FLAGS_0(name, flags, ret) \ extern TCGHelperInfo glue(helper_info_, name); \ diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h.inc similarity index 100% rename from include/exec/helper-head.h rename to include/exec/helper-head.h.inc diff --git a/include/exec/helper-proto.h.inc b/include/exec/helper-proto.h.inc index c3aa666929..f8e57e43ce 100644 --- a/include/exec/helper-proto.h.inc +++ b/include/exec/helper-proto.h.inc @@ -5,7 +5,7 @@ * Define HELPER_H for the header file to be expanded. */ -#include "exec/helper-head.h" +#include "exec/helper-head.h.inc" /* * Work around an issue with --enable-lto, in which GCC's ipa-split pass diff --git a/include/exec/helper-info.c.inc b/include/exec/helper-info.c.inc index 530d2e6d35..c551736d49 100644 --- a/include/exec/helper-info.c.inc +++ b/include/exec/helper-info.c.inc @@ -7,7 +7,7 @@ #include "tcg/tcg.h" #include "tcg/helper-info.h" -#include "exec/helper-head.h" +#include "exec/helper-head.h.inc" /* * Need one more level of indirection before stringification From patchwork Fri Apr 26 19:41:40 2024 Content-Type: text/plain; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id k25-20020a1709062a5900b00a55a06d7744sm7902411eje.73.2024.04.26.12.43.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:43:59 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Sunil Muthuswamy Subject: [PULL 20/38] accel/whpx: Use accel-specific per-vcpu @dirty field Date: Fri, 26 Apr 2024 21:41:40 +0200 Message-ID: <20240426194200.43723-21-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=philmd@linaro.org; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org WHPX has a specific use of the CPUState::vcpu_dirty field (CPUState::vcpu_dirty is not used by common code). To make this field accel-specific, add and use a new @dirty variable in the AccelCPUState structure. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240424174506.326-2-philmd@linaro.org> --- target/i386/whpx/whpx-all.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index 31eec7048c..b08e644517 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -237,6 +237,7 @@ struct AccelCPUState { uint64_t tpr; uint64_t apic_base; bool interruption_pending; + bool dirty; /* Must be the last field as it may have a tail */ WHV_RUN_VP_EXIT_CONTEXT exit_ctx; @@ -839,7 +840,7 @@ static HRESULT CALLBACK whpx_emu_setreg_callback( * The emulator just successfully wrote the register state. We clear the * dirty state so we avoid the double write on resume of the VP. */ - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; return hr; } @@ -1394,7 +1395,7 @@ static int whpx_last_vcpu_stopping(CPUState *cpu) /* Returns the address of the next instruction that is about to be executed. */ static vaddr whpx_vcpu_get_pc(CPUState *cpu, bool exit_context_valid) { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { /* The CPU registers have been modified by other parts of QEMU. */ return cpu_env(cpu)->eip; } else if (exit_context_valid) { @@ -1713,9 +1714,9 @@ static int whpx_vcpu_run(CPUState *cpu) } do { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { whpx_set_registers(cpu, WHPX_SET_RUNTIME_STATE); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } if (exclusive_step_mode == WHPX_STEP_NONE) { @@ -2063,9 +2064,9 @@ static int whpx_vcpu_run(CPUState *cpu) static void do_whpx_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data arg) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { whpx_get_registers(cpu); - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } } @@ -2073,20 +2074,20 @@ static void do_whpx_cpu_synchronize_post_reset(CPUState *cpu, run_on_cpu_data arg) { whpx_set_registers(cpu, WHPX_SET_RESET_STATE); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } static void do_whpx_cpu_synchronize_post_init(CPUState *cpu, run_on_cpu_data arg) { whpx_set_registers(cpu, WHPX_SET_FULL_STATE); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } static void do_whpx_cpu_synchronize_pre_loadvm(CPUState *cpu, run_on_cpu_data arg) { - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } /* @@ -2095,7 +2096,7 @@ static void do_whpx_cpu_synchronize_pre_loadvm(CPUState *cpu, void whpx_cpu_synchronize_state(CPUState *cpu) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { run_on_cpu(cpu, do_whpx_cpu_synchronize_state, RUN_ON_CPU_NULL); } } @@ -2235,7 +2236,7 @@ int whpx_init_vcpu(CPUState *cpu) } vcpu->interruptable = true; - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; cpu->accel = vcpu; max_vcpu_index = max(max_vcpu_index, cpu->cpu_index); qemu_add_vm_change_state_handler(whpx_cpu_update_state, env); From patchwork Fri Apr 26 19:41:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928350 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=JlxMWkm6; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR3DX5clkz23rB for ; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id bf17-20020a0564021a5100b0056bf6287f32sm10263342edb.26.2024.04.26.12.44.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:05 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Reinoud Zandijk Subject: [PULL 21/38] accel/nvmm: Use accel-specific per-vcpu @dirty field Date: Fri, 26 Apr 2024 21:41:41 +0200 Message-ID: <20240426194200.43723-22-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52a; envelope-from=philmd@linaro.org; helo=mail-ed1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org NVMM has a specific use of the CPUState::vcpu_dirty field (CPUState::vcpu_dirty is not used by common code). To make this field accel-specific, add and use a new @dirty variable in the AccelCPUState structure. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240424174506.326-3-philmd@linaro.org> --- target/i386/nvmm/nvmm-all.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/target/i386/nvmm/nvmm-all.c b/target/i386/nvmm/nvmm-all.c index 49a3a3b916..f9cced53b3 100644 --- a/target/i386/nvmm/nvmm-all.c +++ b/target/i386/nvmm/nvmm-all.c @@ -30,6 +30,7 @@ struct AccelCPUState { struct nvmm_vcpu vcpu; uint8_t tpr; bool stop; + bool dirty; /* Window-exiting for INTs/NMIs. */ bool int_window_exit; @@ -507,7 +508,7 @@ nvmm_io_callback(struct nvmm_io *io) } /* Needed, otherwise infinite loop. */ - current_cpu->vcpu_dirty = false; + current_cpu->accel->dirty = false; } static void @@ -516,7 +517,7 @@ nvmm_mem_callback(struct nvmm_mem *mem) cpu_physical_memory_rw(mem->gpa, mem->data, mem->size, mem->write); /* Needed, otherwise infinite loop. */ - current_cpu->vcpu_dirty = false; + current_cpu->accel->dirty = false; } static struct nvmm_assist_callbacks nvmm_callbacks = { @@ -726,9 +727,9 @@ nvmm_vcpu_loop(CPUState *cpu) * Inner VCPU loop. */ do { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { nvmm_set_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } if (qcpu->stop) { @@ -826,32 +827,32 @@ static void do_nvmm_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data arg) { nvmm_get_registers(cpu); - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } static void do_nvmm_cpu_synchronize_post_reset(CPUState *cpu, run_on_cpu_data arg) { nvmm_set_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } static void do_nvmm_cpu_synchronize_post_init(CPUState *cpu, run_on_cpu_data arg) { nvmm_set_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } static void do_nvmm_cpu_synchronize_pre_loadvm(CPUState *cpu, run_on_cpu_data arg) { - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } void nvmm_cpu_synchronize_state(CPUState *cpu) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { run_on_cpu(cpu, do_nvmm_cpu_synchronize_state, RUN_ON_CPU_NULL); } } @@ -981,7 +982,7 @@ nvmm_init_vcpu(CPUState *cpu) } } - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id dk21-20020a170907941500b00a55aee4bf74sm6993909ejc.79.2024.04.26.12.44.10 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:11 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Cameron Esfahani , Roman Bolshakov , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Alexander Graf , Peter Maydell Subject: [PULL 22/38] accel/hvf: Use accel-specific per-vcpu @dirty field Date: Fri, 26 Apr 2024 21:41:42 +0200 Message-ID: <20240426194200.43723-23-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::533; envelope-from=philmd@linaro.org; helo=mail-ed1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org HVF has a specific use of the CPUState::vcpu_dirty field (CPUState::vcpu_dirty is not used by common code). To make this field accel-specific, add and use a new @dirty variable in the AccelCPUState structure. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240424174506.326-4-philmd@linaro.org> --- include/hw/core/cpu.h | 3 +-- include/sysemu/hvf_int.h | 1 + accel/hvf/hvf-accel-ops.c | 10 +++++----- target/arm/hvf/hvf.c | 4 ++-- target/i386/hvf/hvf.c | 4 ++-- target/i386/hvf/x86hvf.c | 2 +- 6 files changed, 12 insertions(+), 12 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 7f037b158e..cead8f01a6 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -525,6 +525,7 @@ struct CPUState { uint32_t kvm_fetch_index; uint64_t dirty_pages; int kvm_vcpu_stats_fd; + bool vcpu_dirty; /* Use by accel-block: CPU is executing an ioctl() */ QemuLockCnt in_ioctl_lock; @@ -546,8 +547,6 @@ struct CPUState { int32_t exception_index; AccelCPUState *accel; - /* shared by kvm and hvf */ - bool vcpu_dirty; /* Used to keep track of an outstanding cpu throttle thread for migration * autoconverge diff --git a/include/sysemu/hvf_int.h b/include/sysemu/hvf_int.h index 718beddcdd..4a327fd526 100644 --- a/include/sysemu/hvf_int.h +++ b/include/sysemu/hvf_int.h @@ -55,6 +55,7 @@ struct AccelCPUState { bool vtimer_masked; sigset_t unblock_ipi_mask; bool guest_debug_enabled; + bool dirty; }; void assert_hvf_ok(hv_return_t ret); diff --git a/accel/hvf/hvf-accel-ops.c b/accel/hvf/hvf-accel-ops.c index d94d41ab6d..40d4187d9d 100644 --- a/accel/hvf/hvf-accel-ops.c +++ b/accel/hvf/hvf-accel-ops.c @@ -204,15 +204,15 @@ static void hvf_set_phys_mem(MemoryRegionSection *section, bool add) static void do_hvf_cpu_synchronize_state(CPUState *cpu, run_on_cpu_data arg) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { hvf_get_registers(cpu); - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } } static void hvf_cpu_synchronize_state(CPUState *cpu) { - if (!cpu->vcpu_dirty) { + if (!cpu->accel->dirty) { run_on_cpu(cpu, do_hvf_cpu_synchronize_state, RUN_ON_CPU_NULL); } } @@ -221,7 +221,7 @@ static void do_hvf_cpu_synchronize_set_dirty(CPUState *cpu, run_on_cpu_data arg) { /* QEMU state is the reference, push it to HVF now and on next entry */ - cpu->vcpu_dirty = true; + cpu->accel->dirty = true; } static void hvf_cpu_synchronize_post_reset(CPUState *cpu) @@ -402,7 +402,7 @@ static int hvf_init_vcpu(CPUState *cpu) #else r = hv_vcpu_create((hv_vcpuid_t *)&cpu->accel->fd, HV_VCPU_DEFAULT); #endif - cpu->vcpu_dirty = 1; + cpu->accel->dirty = true; assert_hvf_ok(r); cpu->accel->guest_debug_enabled = false; diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index 65a5601804..db628c1cba 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -806,9 +806,9 @@ int hvf_put_registers(CPUState *cpu) static void flush_cpu_state(CPUState *cpu) { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { hvf_put_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } } diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 1ed8ed5154..e493452acb 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -419,9 +419,9 @@ int hvf_vcpu_exec(CPUState *cpu) } do { - if (cpu->vcpu_dirty) { + if (cpu->accel->dirty) { hvf_put_registers(cpu); - cpu->vcpu_dirty = false; + cpu->accel->dirty = false; } if (hvf_inject_interrupts(cpu)) { diff --git a/target/i386/hvf/x86hvf.c b/target/i386/hvf/x86hvf.c index be2c46246e..1569f860eb 100644 --- a/target/i386/hvf/x86hvf.c +++ b/target/i386/hvf/x86hvf.c @@ -427,7 +427,7 @@ int hvf_process_events(CPUState *cs) X86CPU *cpu = X86_CPU(cs); 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id cn18-20020a0564020cb200b00571bfc97b79sm10018803edb.55.2024.04.26.12.44.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:17 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini , Peter Xu , David Hildenbrand Subject: [PULL 23/38] exec/cpu-all: Reduce 'qemu/rcu.h' header inclusion Date: Fri, 26 Apr 2024 21:41:43 +0200 Message-ID: <20240426194200.43723-24-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52e; envelope-from=philmd@linaro.org; helo=mail-ed1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org "exec/cpu-all.h" doesn't need definitions from "qemu/rcu.h", however "exec/ram_addr.h" does. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-17-philmd@linaro.org> --- include/exec/cpu-all.h | 1 - include/exec/ram_addr.h | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index b86209fc49..586dc56d9e 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -24,7 +24,6 @@ #include "exec/tswap.h" #include "qemu/thread.h" #include "hw/core/cpu.h" -#include "qemu/rcu.h" /* some important defines: * diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h index 07c8f86375..891c44cf2d 100644 --- a/include/exec/ram_addr.h +++ b/include/exec/ram_addr.h @@ -26,6 +26,7 @@ #include "exec/ramlist.h" #include "exec/ramblock.h" #include "exec/exec-all.h" +#include "qemu/rcu.h" extern uint64_t total_dirty_pages; From patchwork Fri Apr 26 19:41:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928352 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=azNxgAXh; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR3DY0jPJz23rG for ; Sat, 27 Apr 2024 05:48:13 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RUz-0007Br-Cg; Fri, 26 Apr 2024 15:44:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RUk-0005Oo-RX for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:44:30 -0400 Received: from mail-ej1-x635.google.com ([2a00:1450:4864:20::635]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RUf-0003iU-1n for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:44:30 -0400 Received: by mail-ej1-x635.google.com with SMTP id a640c23a62f3a-a51addddbd4so303759366b.0 for ; Fri, 26 Apr 2024 12:44:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160663; x=1714765463; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hRodVMKRPlEehBD+pKF9cYT1VEV2JM/RMXBv7TIb/2Y=; b=azNxgAXhaZPJT/ppygXNuC6tLVzot9RcyF0tAE3XyXD6llgTeuCivvV3YHaJt6dW2I /wbYDUatX5q36Oav6PbY3hx1euH9POTiRufvAUf/edxF0YzCZQkp06mBtOm44FEo4Ag1 9RwEZjlPXy3bDu3z1jVmx1jD+WiunbFgdg+PuYlRpU9LSK7r1C9YtfPKxMX9J3+Dhyj3 JrheVzYLGB1wFeESFVyftXfhnxjsV7/nNH6uVrWJp+42KKfk3PnzgWcslrEDqVKtr4Cg peu1iFXovff9Pq28gXKlnNp4rH9zneaZLS+/P/3wktu79Q7jLb9Ay9HaXnPITL+ukjgU 7eVQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160663; x=1714765463; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hRodVMKRPlEehBD+pKF9cYT1VEV2JM/RMXBv7TIb/2Y=; b=PfTzANkVx4pEZjSIvmjP6fyYZ26klO3yUGrH2/KZCOsnpeuMnCcZdpO0+h6vozowae 3D5R4BzAYuzr/Fht/Dv9GXiHbW4457Ora8Nu4IN5l+gRQJKj5SWUDcXba166m2r0TALD +mu77oiVRGzW7ZiR4XsqKAkxGjLgeowxPfUGvYOCn3bRlET5c8nFDW/JG1DMIxsXTefO MnDOBeCQjXtGK766+8Imh1nXPTZGDXqasNdIwI+0679xaQiNWubiXc4lUOzvELf4YyrP 96db4qO24myghsuJb93ILhjdZ78mKAx7o0NBZg6ZYAGMyjTa0BAa73qCHtR/Z/fIQhEk 69Xg== X-Forwarded-Encrypted: i=1; AJvYcCVgJOF5zyMehR7rKQatx3oe9jZoyz5YUSQm2Wt6TaFaJf4dD9zBL2pAdGYw6E9+YP1i5wDoS3j6dyigHu9nxKbFH13d X-Gm-Message-State: AOJu0YyP0FmDTSwZnq/wVzPmErAPOzoyYKy3oGPczh0+45vs0HlEzndv mSx65oKEi9OaQ10pC5DA7ewTz4w/lddfnnfdKTmjcj8gMA+OEo2i49MU+z19LyE= X-Google-Smtp-Source: AGHT+IGiNxW9sMrFYVuJdk33VfMfF7sITSlT7j8Mdnt7tmFJUkVZwYI/KuDi5jLkTTURkRp/MthSkw== X-Received: by 2002:a17:906:e2c5:b0:a55:2e77:c718 with SMTP id gr5-20020a170906e2c500b00a552e77c718mr2464204ejb.54.1714160663366; Fri, 26 Apr 2024 12:44:23 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id f20-20020a17090624d400b00a5575cde7cdsm10578996ejb.220.2024.04.26.12.44.22 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Richard Henderson , Paolo Bonzini Subject: [PULL 24/38] exec/cpu-all: Remove unused 'qemu/thread.h' header Date: Fri, 26 Apr 2024 21:41:44 +0200 Message-ID: <20240426194200.43723-25-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=philmd@linaro.org; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Nothing is required from "qemu/thread.h" in "exec/cpu-all.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-13-philmd@linaro.org> Reviewed-by: Richard Henderson --- include/exec/cpu-all.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 586dc56d9e..4de0d5a0d7 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -22,7 +22,6 @@ #include "exec/cpu-common.h" #include "exec/memory.h" #include "exec/tswap.h" -#include "qemu/thread.h" #include "hw/core/cpu.h" /* some important defines: From patchwork Fri Apr 26 19:41:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928341 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=hssJiEDI; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR3Cm3qsKz23rB for ; Sat, 27 Apr 2024 05:47:32 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RUv-0006ls-CQ; Fri, 26 Apr 2024 15:44:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RUm-0005g0-S1 for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:44:33 -0400 Received: from mail-lj1-x235.google.com ([2a00:1450:4864:20::235]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RUk-0003lr-Td for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:44:32 -0400 Received: by mail-lj1-x235.google.com with SMTP id 38308e7fff4ca-2d858501412so32242111fa.0 for ; Fri, 26 Apr 2024 12:44:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160669; x=1714765469; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=P0UDCxOSM6losMm33QUR2Xxw05S6cfuoGa+9agKli+0=; b=hssJiEDIznYtgjxnv2AnEtq42xHsqFoFgxpuwgpNzpR3pnfuMwY75//9Cdpkzqxjl1 Pb7VRJJ2mLkAmavmRO/XesOFuqqPTlpycf6bmo3t4PEbpnaBRsFZACNjxZ5Za3iIaKFz Q5aBJGBu6lPd/mIp4zMsS3avvXyQaP4ltArfrGKTcVVVKnCnqOCtE1QLKPvUmlKR4v7F KXo68VU295XeBC27YPuG+a2Cs8tcU+ot+5+zFXqXbYyu6vtoVj9KEskeLs567sDESqzl Xp7BU+iax2D+7kOVUK6ZzfLilETNsUlvBPN0t3ntKRglauPEBxtNurP3YoH/HiGH5W6E BSIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160669; x=1714765469; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=P0UDCxOSM6losMm33QUR2Xxw05S6cfuoGa+9agKli+0=; b=QOXll0OA9cZ88pKnxcz/kS45WE4eqyyb/sUAONPKb2W50Ei9nnU2ttmcFfpKD4dZ4d wozAZEmRT+C0AlGzGubJzSjeuM4mHOKWTPKrX14sJsFSzHxejsCS/NeWso2h/C7h+2Zn Icco3RkFlNmfYt+geu3oPglpMn0jGqCDaVlhskneyxcvE9UoP+eA0MKS6f7M+8MprrU0 hLhhOXJqa/apNpGwia3Mz8YoXT2xMc9DFNB5Nbb2/LvliMJ/FEtt9EoDoinaXQeg2jX7 rcX63zPHpY+xqgXJoj6xN20WHR05Hq2ZRCEtGHuABTcG8vGWsn8dE+QbI66y3yHbwxhj 9Q1A== X-Forwarded-Encrypted: i=1; AJvYcCVG+W6MpV4447W+JTG4UBlxCOpoPePIOJcW2Y3mic2i3NCAKX7RUZ8+JnbWV2vqZOAmA42i7AGdVJOh2Wr5GyCSL8bt X-Gm-Message-State: AOJu0Yy1XxdrVnCWS5w3qGrIp8d0LXaOEQ45qNt67oncefFCjHsD+lnq vrbt9uF4gAk9wHvWIqjk1EbZ57zbKY2zvrnjQYAVaQFKDwW9FdXW2Jt01WnU3/4= X-Google-Smtp-Source: AGHT+IFpraAeEBrfBwzgkYIqxwrSxx6UxxiFJc4VVXV9x/2kjpwaRriQS99+C/00qFZ/Kw18c+RlHQ== X-Received: by 2002:a2e:950e:0:b0:2db:2397:1055 with SMTP id f14-20020a2e950e000000b002db23971055mr2054988ljh.9.1714160668962; Fri, 26 Apr 2024 12:44:28 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id da25-20020a056402177900b005700024ca57sm10440528edb.4.2024.04.26.12.44.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:28 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Richard Henderson , Paolo Bonzini Subject: [PULL 25/38] exec/cpu-all: Remove unused tswapls() definitions Date: Fri, 26 Apr 2024 21:41:45 +0200 Message-ID: <20240426194200.43723-26-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::235; envelope-from=philmd@linaro.org; helo=mail-lj1-x235.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Last use of tswapls() was removed 2 years ago in commit aee14c77f4 ("linux-user: Rewrite do_getdents, do_getdents64"). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-15-philmd@linaro.org> Reviewed-by: Richard Henderson --- include/exec/cpu-all.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 4de0d5a0d7..7c44ffb3af 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -38,11 +38,9 @@ #if TARGET_LONG_SIZE == 4 #define tswapl(s) tswap32(s) -#define tswapls(s) tswap32s((uint32_t *)(s)) #define bswaptls(s) bswap32s(s) #else #define tswapl(s) tswap64(s) -#define tswapls(s) tswap64s((uint64_t *)(s)) #define bswaptls(s) bswap64s(s) #endif From patchwork Fri Apr 26 19:41:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928328 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=bSeDSl62; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR39J1Cbsz23rB for ; Sat, 27 Apr 2024 05:45:24 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RV1-0007Qv-Aj; Fri, 26 Apr 2024 15:44:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RUy-00072u-1P for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:44:44 -0400 Received: from mail-ed1-x52c.google.com ([2a00:1450:4864:20::52c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RUq-0003qg-PF for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:44:43 -0400 Received: by mail-ed1-x52c.google.com with SMTP id 4fb4d7f45d1cf-571bddddbc2so3139742a12.1 for ; Fri, 26 Apr 2024 12:44:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160675; x=1714765475; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gRQC9Ufjc2oRJM0oXSiGkyeAlDlLBhL0/a+ZOEekFQY=; b=bSeDSl62Q5IsRYUSHWOc0O+wj2f7ulfnbkS5th5Jd8qXXcOkIhlsgvgdLX1TAgrzKj +h9aqHtlvoxHMenAI1tEXoXiVSztGRIP/M46eJxCGCgXxHBm1P0mouYuuIGNJVAI2oTd ng06hDIOYkBPduteJPbHz5o1N/XWY1b7fsTJLcxTsB/Qg87ioZYere1bawvPey8388Y6 dV2wCsJtN1yuqcNvOKZbuf5tAZe+VsuGfSGwimDxDKkMUnAvYgDTwDzUG8yUH9Z472eR pefiaygnWmPcLslLszqapCxc9oCdjViaHNbiBTAht3VDTZ55DhBSOygtVL3bY0d9XrHp gecA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160675; x=1714765475; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gRQC9Ufjc2oRJM0oXSiGkyeAlDlLBhL0/a+ZOEekFQY=; b=Cyt1fa3Xs2y628Y55lAUvL9YAF/A0L/vO1ztrjmYTxYuOiYHeSLpnwq/Hy3lzWKMgQ jT/8kSF/59BtiYZqHK2YgPPWX9aB1h5JEacO2HAlAYs7+KRhz5wzZczDTaGL56jjMmlU o44uB65ZFUdlfbzDGXT66rcfiHbb58tLkv6TK70DLe74Xj5qUaI8J+H97ALIRXopqOxS 3H2X0bi22vKIe7YzfPtOeRSHEO0ZuYJ9rJpZ+YlXGUmuizFf9UxR0cLdO12+F07hsv8v yLZliVZr3wdo79vrfh8SwHaSbIJCt4594b+DTq79BTqKbsiujCxhSRrRZMmbDNd6J6QK 3ZLQ== X-Forwarded-Encrypted: i=1; AJvYcCV2J8WZzIgTUftYv9Yo1FTJVvMhBXLDO7Fe889UVVTkMiQtiHQAMV0iNxrVHjFS6sq8XrMO3b8x91R9VYlkaOHiFEia X-Gm-Message-State: AOJu0Yw9M10BcF6RwS+qYLFoMh6uQNlBrBS/5yNA+sjExgKF1wRhdlZe Rrd6MBYylssHoWe7cQJQlvr2t8ZfrhmebtfZ8NVtwoT3eszdDVubsyvmDjS4C6U= X-Google-Smtp-Source: AGHT+IEBypxG1+3HiSiPhWQJ3NZrPvjKaHrXTATJvdQw5YQtIgcD72BF9xRa13gBLJwXdO6XRCJddA== X-Received: by 2002:a17:906:3918:b0:a58:7e41:c65a with SMTP id f24-20020a170906391800b00a587e41c65amr2633724eje.25.1714160675220; Fri, 26 Apr 2024 12:44:35 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id f1-20020a170906ef0100b00a587cfd7a37sm4742921ejs.84.2024.04.26.12.44.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:34 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Richard Henderson , Paolo Bonzini , "Michael S. Tsirkin" , Gerd Hoffmann , Manos Pitsidianakis , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Alistair Francis Subject: [PULL 26/38] exec: Declare target_words_bigendian() in 'exec/tswap.h' Date: Fri, 26 Apr 2024 21:41:46 +0200 Message-ID: <20240426194200.43723-27-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52c; envelope-from=philmd@linaro.org; helo=mail-ed1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org We usually check target endianess before swapping values, so target_words_bigendian() declaration makes sense in "exec/tswap.h" with the target swapping helpers. Remove "hw/core/cpu.h" when it was only included to get the target_words_bigendian() declaration. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-16-philmd@linaro.org> Reviewed-by: Richard Henderson --- include/exec/tswap.h | 12 +++++++++++- include/hw/core/cpu.h | 11 ----------- cpu-target.c | 1 + disas/disas.c | 1 + hw/audio/virtio-snd.c | 2 +- hw/core/cpu-sysemu.c | 2 +- hw/core/generic-loader.c | 2 +- hw/display/vga.c | 2 +- hw/virtio/virtio.c | 1 + 9 files changed, 18 insertions(+), 16 deletions(-) diff --git a/include/exec/tswap.h b/include/exec/tswap.h index 5089cd6a4c..b7a4191347 100644 --- a/include/exec/tswap.h +++ b/include/exec/tswap.h @@ -8,9 +8,19 @@ #ifndef TSWAP_H #define TSWAP_H -#include "hw/core/cpu.h" #include "qemu/bswap.h" +/** + * target_words_bigendian: + * Returns true if the (default) endianness of the target is big endian, + * false otherwise. Note that in target-specific code, you can use + * TARGET_BIG_ENDIAN directly instead. On the other hand, common + * code should normally never need to know about the endianness of the + * target, so please do *not* use this function unless you know very well + * what you are doing! + */ +bool target_words_bigendian(void); + /* * If we're in target-specific code, we can hard-code the swapping * condition, otherwise we have to do (slower) run-time checks. diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index cead8f01a6..d89b2cffcb 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1168,17 +1168,6 @@ bool cpu_exec_realizefn(CPUState *cpu, Error **errp); void cpu_exec_unrealizefn(CPUState *cpu); void cpu_exec_reset_hold(CPUState *cpu); -/** - * target_words_bigendian: - * Returns true if the (default) endianness of the target is big endian, - * false otherwise. Note that in target-specific code, you can use - * TARGET_BIG_ENDIAN directly instead. On the other hand, common - * code should normally never need to know about the endianness of the - * target, so please do *not* use this function unless you know very well - * what you are doing! - */ -bool target_words_bigendian(void); - const char *target_name(void); #ifdef COMPILING_PER_TARGET diff --git a/cpu-target.c b/cpu-target.c index 4c0621bf33..f88649c299 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -35,6 +35,7 @@ #endif #include "sysemu/cpus.h" #include "sysemu/tcg.h" +#include "exec/tswap.h" #include "exec/replay-core.h" #include "exec/cpu-common.h" #include "exec/exec-all.h" diff --git a/disas/disas.c b/disas/disas.c index 7e3b0bb46c..ec14715ecd 100644 --- a/disas/disas.c +++ b/disas/disas.c @@ -6,6 +6,7 @@ #include "disas/disas.h" #include "disas/capstone.h" #include "hw/core/cpu.h" +#include "exec/tswap.h" #include "exec/memory.h" /* Filled in by elfload.c. Simplistic, but will do for now. */ diff --git a/hw/audio/virtio-snd.c b/hw/audio/virtio-snd.c index c80b58bf5d..6a2ee085c0 100644 --- a/hw/audio/virtio-snd.c +++ b/hw/audio/virtio-snd.c @@ -20,11 +20,11 @@ #include "qemu/log.h" #include "qemu/error-report.h" #include "include/qemu/lockable.h" +#include "exec/tswap.h" #include "sysemu/runstate.h" #include "trace.h" #include "qapi/error.h" #include "hw/audio/virtio-snd.h" -#include "hw/core/cpu.h" #define VIRTIO_SOUND_VM_VERSION 1 #define VIRTIO_SOUND_JACK_DEFAULT 0 diff --git a/hw/core/cpu-sysemu.c b/hw/core/cpu-sysemu.c index d0d6a910f9..2a9a2a4eb5 100644 --- a/hw/core/cpu-sysemu.c +++ b/hw/core/cpu-sysemu.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" -#include "hw/core/cpu.h" +#include "exec/tswap.h" #include "hw/core/sysemu-cpu-ops.h" bool cpu_paging_enabled(const CPUState *cpu) diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c index d4b5c501d8..ea8628b892 100644 --- a/hw/core/generic-loader.c +++ b/hw/core/generic-loader.c @@ -31,7 +31,7 @@ */ #include "qemu/osdep.h" -#include "hw/core/cpu.h" +#include "exec/tswap.h" #include "sysemu/dma.h" #include "sysemu/reset.h" #include "hw/boards.h" diff --git a/hw/display/vga.c b/hw/display/vga.c index e91a76bf76..30facc6c8e 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -26,7 +26,7 @@ #include "qemu/units.h" #include "sysemu/reset.h" #include "qapi/error.h" -#include "hw/core/cpu.h" +#include "exec/tswap.h" #include "hw/display/vga.h" #include "hw/i386/x86.h" #include "hw/pci/pci.h" diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 871674f9be..893a072c9d 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -20,6 +20,7 @@ #include "qemu/log.h" #include "qemu/main-loop.h" #include "qemu/module.h" +#include "exec/tswap.h" #include "qom/object_interfaces.h" #include "hw/core/cpu.h" #include "hw/virtio/virtio.h" From patchwork Fri Apr 26 19:41:47 2024 Content-Type: text/plain; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id l11-20020a50cbcb000000b0057030326144sm10281434edi.47.2024.04.26.12.44.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:40 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Richard Henderson , Warner Losh , Kyle Evans , Paolo Bonzini , Riku Voipio , Laurent Vivier Subject: [PULL 27/38] exec: Move [b]tswapl() declarations to 'exec/user/tswap-target.h' Date: Fri, 26 Apr 2024 21:41:47 +0200 Message-ID: <20240426194200.43723-28-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=philmd@linaro.org; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org tswapl() and bswaptls() are target-dependent and only used by user emulation. Move their definitions to a new header: "exec/user/tswap-target.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20231212123401.37493-17-philmd@linaro.org> Reviewed-by: Richard Henderson --- MAINTAINERS | 1 + bsd-user/freebsd/target_os_elf.h | 1 + bsd-user/freebsd/target_os_stack.h | 1 + bsd-user/netbsd/target_os_elf.h | 1 + bsd-user/openbsd/target_os_elf.h | 1 + include/exec/cpu-all.h | 8 -------- include/exec/user/abitypes.h | 1 + include/user/tswap-target.h | 22 ++++++++++++++++++++++ bsd-user/signal.c | 1 + bsd-user/strace.c | 1 + linux-user/elfload.c | 1 + linux-user/i386/signal.c | 1 + linux-user/ppc/signal.c | 1 + 13 files changed, 33 insertions(+), 8 deletions(-) create mode 100644 include/user/tswap-target.h diff --git a/MAINTAINERS b/MAINTAINERS index 96411e6adf..302b6fd00c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3692,6 +3692,7 @@ Overall usermode emulation M: Riku Voipio S: Maintained F: accel/tcg/user-exec*.c +F: include/exec/user/ F: include/user/ F: common-user/ diff --git a/bsd-user/freebsd/target_os_elf.h b/bsd-user/freebsd/target_os_elf.h index 9df17d56d8..01124979f7 100644 --- a/bsd-user/freebsd/target_os_elf.h +++ b/bsd-user/freebsd/target_os_elf.h @@ -22,6 +22,7 @@ #include "target_arch_elf.h" #include "elf.h" +#include "user/tswap-target.h" #define bsd_get_ncpu() 1 /* until we pull in bsd-proc.[hc] */ diff --git a/bsd-user/freebsd/target_os_stack.h b/bsd-user/freebsd/target_os_stack.h index d15fc3263f..ac0ef22cd7 100644 --- a/bsd-user/freebsd/target_os_stack.h +++ b/bsd-user/freebsd/target_os_stack.h @@ -23,6 +23,7 @@ #include #include "target_arch_sigtramp.h" #include "qemu/guest-random.h" +#include "user/tswap-target.h" /* * The initial FreeBSD stack is as follows: diff --git a/bsd-user/netbsd/target_os_elf.h b/bsd-user/netbsd/target_os_elf.h index 2f3cb20871..9de0f290c0 100644 --- a/bsd-user/netbsd/target_os_elf.h +++ b/bsd-user/netbsd/target_os_elf.h @@ -22,6 +22,7 @@ #include "target_arch_elf.h" #include "elf.h" +#include "user/tswap-target.h" /* this flag is uneffective under linux too, should be deleted */ #ifndef MAP_DENYWRITE diff --git a/bsd-user/openbsd/target_os_elf.h b/bsd-user/openbsd/target_os_elf.h index 6dca9c5a85..4cf5747dcd 100644 --- a/bsd-user/openbsd/target_os_elf.h +++ b/bsd-user/openbsd/target_os_elf.h @@ -22,6 +22,7 @@ #include "target_arch_elf.h" #include "elf.h" +#include "user/tswap-target.h" /* this flag is uneffective under linux too, should be deleted */ #ifndef MAP_DENYWRITE diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 7c44ffb3af..78848f018c 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -36,14 +36,6 @@ #define BSWAP_NEEDED #endif -#if TARGET_LONG_SIZE == 4 -#define tswapl(s) tswap32(s) -#define bswaptls(s) bswap32s(s) -#else -#define tswapl(s) tswap64(s) -#define bswaptls(s) bswap64s(s) -#endif - /* Target-endianness CPU memory access functions. These fit into the * {ld,st}{type}{sign}{size}{endian}_p naming scheme described in bswap.h. */ diff --git a/include/exec/user/abitypes.h b/include/exec/user/abitypes.h index db4a670328..731f345ff5 100644 --- a/include/exec/user/abitypes.h +++ b/include/exec/user/abitypes.h @@ -2,6 +2,7 @@ #define EXEC_USER_ABITYPES_H #include "cpu.h" +#include "user/tswap-target.h" #ifdef TARGET_ABI32 #define TARGET_ABI_BITS 32 diff --git a/include/user/tswap-target.h b/include/user/tswap-target.h new file mode 100644 index 0000000000..4719330dbb --- /dev/null +++ b/include/user/tswap-target.h @@ -0,0 +1,22 @@ +/* + * target-specific swap() definitions + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ +#ifndef USER_TSWAP_H +#define USER_TSWAP_H + +#include "exec/cpu-defs.h" +#include "exec/tswap.h" + +#if TARGET_LONG_SIZE == 4 +#define tswapl(s) tswap32(s) +#define bswaptls(s) bswap32s(s) +#else +#define tswapl(s) tswap64(s) +#define bswaptls(s) bswap64s(s) +#endif + +#endif diff --git a/bsd-user/signal.c b/bsd-user/signal.c index e5a773ddde..b2faf1d0dd 100644 --- a/bsd-user/signal.c +++ b/bsd-user/signal.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qemu.h" +#include "user/tswap-target.h" #include "gdbstub/user.h" #include "signal-common.h" #include "trace.h" diff --git a/bsd-user/strace.c b/bsd-user/strace.c index 96499751eb..6dc01d3be7 100644 --- a/bsd-user/strace.c +++ b/bsd-user/strace.c @@ -22,6 +22,7 @@ #include #include "qemu.h" +#include "user/tswap-target.h" #include "os-strace.h" /* OS dependent strace print functions */ diff --git a/linux-user/elfload.c b/linux-user/elfload.c index a0999dac15..207455c1ba 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -7,6 +7,7 @@ #include #include "qemu.h" +#include "user/tswap-target.h" #include "user-internals.h" #include "signal-common.h" #include "loader.h" diff --git a/linux-user/i386/signal.c b/linux-user/i386/signal.c index cfe70fc5cf..990048f42a 100644 --- a/linux-user/i386/signal.c +++ b/linux-user/i386/signal.c @@ -21,6 +21,7 @@ #include "user-internals.h" #include "signal-common.h" #include "linux-user/trace.h" +#include "user/tswap-target.h" /* from the Linux kernel - /arch/x86/include/uapi/asm/sigcontext.h */ diff --git a/linux-user/ppc/signal.c b/linux-user/ppc/signal.c index 652038a53c..a1d8c0bccc 100644 --- a/linux-user/ppc/signal.c +++ b/linux-user/ppc/signal.c @@ -21,6 +21,7 @@ #include "user-internals.h" #include "signal-common.h" #include "linux-user/trace.h" +#include "user/tswap-target.h" #include "vdso-asmoffset.h" /* See arch/powerpc/include/asm/ucontext.h. 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id qt11-20020a170906eceb00b00a55ab2630c3sm7155905ejb.38.2024.04.26.12.44.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Richard Henderson , Riku Voipio Subject: [PULL 28/38] exec/user: Do not include 'cpu.h' in 'abitypes.h' Date: Fri, 26 Apr 2024 21:41:48 +0200 Message-ID: <20240426194200.43723-29-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::534; envelope-from=philmd@linaro.org; helo=mail-ed1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org "exec/user/abitypes.h" requires: - "exec/cpu-defs.h" (TARGET_LONG_BITS) - "exec/tswap.h" (tswap32) In order to avoid "cpu.h", pick the minimum required headers. Assert this user-specific header is only included from user emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Message-Id: <20231212123401.37493-20-philmd@linaro.org> Reviewed-by: Richard Henderson --- include/exec/user/abitypes.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/include/exec/user/abitypes.h b/include/exec/user/abitypes.h index 731f345ff5..3ec1969368 100644 --- a/include/exec/user/abitypes.h +++ b/include/exec/user/abitypes.h @@ -1,7 +1,12 @@ #ifndef EXEC_USER_ABITYPES_H #define EXEC_USER_ABITYPES_H -#include "cpu.h" +#ifndef CONFIG_USER_ONLY +#error Cannot include this header from system emulation +#endif + +#include "exec/cpu-defs.h" +#include "exec/tswap.h" #include "user/tswap-target.h" #ifdef TARGET_ABI32 From patchwork Fri Apr 26 19:41:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928356 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=XM+o+9A7; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR3Dk1WRrz23rB for ; Sat, 27 Apr 2024 05:48:22 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RVD-0008Qc-PS; Fri, 26 Apr 2024 15:44:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RVC-0008Oo-20 for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:44:58 -0400 Received: from mail-lj1-x235.google.com ([2a00:1450:4864:20::235]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RV9-00047K-VN for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:44:57 -0400 Received: by mail-lj1-x235.google.com with SMTP id 38308e7fff4ca-2def8e58471so35746801fa.0 for ; Fri, 26 Apr 2024 12:44:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160694; x=1714765494; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=O9yWcGZAI9YJhaaCrPIJ5UzojqcAhJ+99W/2NEpvWPY=; b=XM+o+9A7QoMGYO40D2WHigONbruErFFVZnReSPbCXhvTq2HwoWTBYIcF1XsJdItm63 OadKUZHyZEC8PBDRrtzh7ktB1mzhS4RDD/F5/MNvcp3vovpDgsjn9sGFbX2GXeoKM6fS y61uVykqw5y53dWFcnQgPwbZkmkZand+yyjpcFECxLzGzEPhBtsNdx/kKOvFhJwrBpq0 sSFHY7gCSp0Kf2PG/ixBdW47103EubK/wOf+8nFFTRB0imtyInRiraGpF0NzKlcWvY3H 1r5wgEPHbRuhozIG6QN+iS6Yubkx97Thk+sCT9da5PsW75WmIRqBsHdxhNpNiUhsp5Xd 6tYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160694; x=1714765494; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=O9yWcGZAI9YJhaaCrPIJ5UzojqcAhJ+99W/2NEpvWPY=; b=sqOEBbpgDVV1dhpAdirneGsoFlCXBjFOKGjE3CgkgCimrtMIPA6BxOQqf3sZ8gWzMo CeBRpPodvAVSC+i5RCIoECkWGoYzjj/lTd4Tgak6HmjkUgX1Rx8D+edge3NS53pXZQMq ndjvBFkmJphY4RrfJvQ67xkxLtVF7x1BWZSgSBgvMlcxCVTPoRoCzqFMKAI9FxLM4Vl+ fR8KdmKVx/M63lCH+O1O1btECpoGGR/9vpsxy02/4RGcJbTSWxzIQ1Osc9bGfKqUrXQB 6X/t0rqiKFMcq7W4EoFa4s27qA60Xajw4bir+vNhCpq19bVobk8rgUiEFfwzIcQJF/pi ybag== X-Forwarded-Encrypted: i=1; AJvYcCVJ7gbvQS+L4ObJnBEfUEQR4DGQUvgZJC1e50i5MVKa7wO5bddf8QLJJTn2VV1oejphOyQq0nwH8FetZ92VrLv9Ir63 X-Gm-Message-State: AOJu0YyP3/V82M3K2uERk5axb24JLXYYSXE/zGeTbZnQr6noZi7EASwK oegI/Edxk2IhrglNOz6dWkfY4DCWZdmcVvAb/qXd78ixyxj1LC7pw4BELmbAU8U= X-Google-Smtp-Source: AGHT+IEkPQs9duixVRBukgTwLqANKQo2EbNAR1DifxNFZ52yn88GjQTiys7n4Fdp+0p0CWUFSOf+EA== X-Received: by 2002:a05:6512:ba7:b0:51a:fc86:fc6d with SMTP id b39-20020a0565120ba700b0051afc86fc6dmr3811665lfv.22.1714160692338; Fri, 26 Apr 2024 12:44:52 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id jw17-20020a170906e95100b00a58df78ab27sm188914ejb.166.2024.04.26.12.44.51 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 29/38] exec: Declare abi_ptr type in its own 'abi_ptr.h' header Date: Fri, 26 Apr 2024 21:41:49 +0200 Message-ID: <20240426194200.43723-30-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::235; envelope-from=philmd@linaro.org; helo=mail-lj1-x235.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org The abi_ptr type is declared in "exec/cpu_ldst.h" with all the load/store helpers. Some source files requiring abi_ptr type don't need the load/store helpers. In order to simplify, create a new "exec/abi_ptr.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231212123401.37493-21-philmd@linaro.org> --- include/exec/abi_ptr.h | 33 +++++++++++++++++++++++++++++++++ include/exec/cpu_ldst.h | 17 +++-------------- include/exec/exec-all.h | 1 + include/exec/translator.h | 5 ++++- 4 files changed, 41 insertions(+), 15 deletions(-) create mode 100644 include/exec/abi_ptr.h diff --git a/include/exec/abi_ptr.h b/include/exec/abi_ptr.h new file mode 100644 index 0000000000..2aedcceb0c --- /dev/null +++ b/include/exec/abi_ptr.h @@ -0,0 +1,33 @@ +/* + * QEMU abi_ptr type definitions + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ +#ifndef EXEC_ABI_PTR_H +#define EXEC_ABI_PTR_H + +#include "cpu-param.h" + +#if defined(CONFIG_USER_ONLY) +/* + * sparc32plus has 64bit long but 32bit space address + * this can make bad result with g2h() and h2g() + */ +#if TARGET_VIRT_ADDR_SPACE_BITS <= 32 +typedef uint32_t abi_ptr; +#define TARGET_ABI_FMT_ptr "%x" +#else +typedef uint64_t abi_ptr; +#define TARGET_ABI_FMT_ptr "%"PRIx64 +#endif + +#else /* !CONFIG_USER_ONLY */ + +#include "exec/target_long.h" + +typedef target_ulong abi_ptr; +#define TARGET_ABI_FMT_ptr TARGET_FMT_lx + +#endif /* !CONFIG_USER_ONLY */ + +#endif diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 82690d3947..64e0319996 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -63,20 +63,11 @@ #define CPU_LDST_H #include "exec/memopidx.h" +#include "exec/abi_ptr.h" #include "qemu/int128.h" #include "cpu.h" #if defined(CONFIG_USER_ONLY) -/* sparc32plus has 64bit long but 32bit space address - * this can make bad result with g2h() and h2g() - */ -#if TARGET_VIRT_ADDR_SPACE_BITS <= 32 -typedef uint32_t abi_ptr; -#define TARGET_ABI_FMT_ptr "%x" -#else -typedef uint64_t abi_ptr; -#define TARGET_ABI_FMT_ptr "%"PRIx64 -#endif #ifndef TARGET_TAGGED_ADDRESSES static inline abi_ptr cpu_untagged_addr(CPUState *cs, abi_ptr x) @@ -120,10 +111,8 @@ static inline bool guest_range_valid_untagged(abi_ulong start, abi_ulong len) assert(h2g_valid(x)); \ h2g_nocheck(x); \ }) -#else -typedef vaddr abi_ptr; -#define TARGET_ABI_FMT_ptr VADDR_PRIx -#endif + +#endif /* CONFIG_USER_ONLY */ uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr); int cpu_ldsb_data(CPUArchState *env, abi_ptr ptr); diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 9599e16a09..530d442112 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -22,6 +22,7 @@ #include "cpu.h" #if defined(CONFIG_USER_ONLY) +#include "exec/abi_ptr.h" #include "exec/cpu_ldst.h" #endif #include "exec/translation-block.h" diff --git a/include/exec/translator.h b/include/exec/translator.h index 2c4fb818e7..6cd937ac5c 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -19,7 +19,10 @@ */ #include "qemu/bswap.h" -#include "exec/cpu_ldst.h" /* for abi_ptr */ +#include "exec/cpu-common.h" +#include "exec/cpu-defs.h" +#include "exec/abi_ptr.h" +#include "cpu.h" /** * gen_intermediate_code From patchwork Fri Apr 26 19:41:50 2024 Content-Type: text/plain; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id qt3-20020a170906ece300b00a5887fed95dsm3904481ejb.2.2024.04.26.12.44.58 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:44:59 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang Subject: [PULL 30/38] exec: Declare MMUAccessType type in 'mmu-access-type.h' header Date: Fri, 26 Apr 2024 21:41:50 +0200 Message-ID: <20240426194200.43723-31-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=philmd@linaro.org; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org The MMUAccessType enum is declared in "hw/core/cpu.h". "hw/core/cpu.h" contains declarations related to CPUState and CPUClass. Some source files only require MMUAccessType and don't need to pull in all CPU* declarations. In order to simplify, create a new "exec/mmu-access-type.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-2-philmd@linaro.org> --- include/exec/cpu_ldst.h | 1 + include/exec/exec-all.h | 1 + include/exec/mmu-access-type.h | 18 ++++++++++++++++++ include/hw/core/cpu.h | 8 +------- 4 files changed, 21 insertions(+), 7 deletions(-) create mode 100644 include/exec/mmu-access-type.h diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 64e0319996..5b99666702 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -64,6 +64,7 @@ #include "exec/memopidx.h" #include "exec/abi_ptr.h" +#include "exec/mmu-access-type.h" #include "qemu/int128.h" #include "cpu.h" diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 530d442112..4c5e470581 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -25,6 +25,7 @@ #include "exec/abi_ptr.h" #include "exec/cpu_ldst.h" #endif +#include "exec/mmu-access-type.h" #include "exec/translation-block.h" #include "qemu/clang-tsa.h" diff --git a/include/exec/mmu-access-type.h b/include/exec/mmu-access-type.h new file mode 100644 index 0000000000..28bbb05b94 --- /dev/null +++ b/include/exec/mmu-access-type.h @@ -0,0 +1,18 @@ +/* + * QEMU MMU Access type definitions + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef EXEC_MMU_ACCESS_TYPE_H +#define EXEC_MMU_ACCESS_TYPE_H + +typedef enum MMUAccessType { + MMU_DATA_LOAD = 0, + MMU_DATA_STORE = 1, + MMU_INST_FETCH = 2 +#define MMU_ACCESS_COUNT 3 +} MMUAccessType; + +#endif diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index d89b2cffcb..759c3e7d89 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -25,6 +25,7 @@ #include "exec/hwaddr.h" #include "exec/vaddr.h" #include "exec/memattrs.h" +#include "exec/mmu-access-type.h" #include "exec/tlb-common.h" #include "qapi/qapi-types-run-state.h" #include "qemu/bitmap.h" @@ -80,13 +81,6 @@ DECLARE_CLASS_CHECKERS(CPUClass, CPU, typedef struct ArchCPU CpuInstanceType; \ OBJECT_DECLARE_TYPE(ArchCPU, CpuClassType, CPU_MODULE_OBJ_NAME); -typedef enum MMUAccessType { - MMU_DATA_LOAD = 0, - MMU_DATA_STORE = 1, - MMU_INST_FETCH = 2 -#define MMU_ACCESS_COUNT 3 -} MMUAccessType; - typedef struct CPUWatchpoint CPUWatchpoint; /* see accel-cpu.h */ From patchwork Fri Apr 26 19:41:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928371 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id ef15-20020a17090697cf00b00a58bcfa6610sm1863773ejb.185.2024.04.26.12.45.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:06 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Anton Johansson , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Peter Maydell , Nicholas Piggin , Daniel Henrique Barboza , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Liu Zhiwei Subject: [PULL 31/38] exec: Declare CPUBreakpoint/CPUWatchpoint type in 'breakpoint.h' header Date: Fri, 26 Apr 2024 21:41:51 +0200 Message-ID: <20240426194200.43723-32-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=philmd@linaro.org; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org The CPUBreakpoint and CPUWatchpoint structures are declared in "hw/core/cpu.h", which contains declarations related to CPUState and CPUClass. Some source files only require the BP/WP definitions and don't need to pull in all CPU* API. In order to simplify, create a new "exec/breakpoint.h" header. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20240418192525.97451-3-philmd@linaro.org> --- include/exec/breakpoint.h | 30 ++++++++++++++++++++++++++++++ include/hw/core/cpu.h | 16 +--------------- target/arm/internals.h | 1 + target/ppc/internal.h | 1 + target/riscv/debug.h | 2 ++ 5 files changed, 35 insertions(+), 15 deletions(-) create mode 100644 include/exec/breakpoint.h diff --git a/include/exec/breakpoint.h b/include/exec/breakpoint.h new file mode 100644 index 0000000000..95f0482e6d --- /dev/null +++ b/include/exec/breakpoint.h @@ -0,0 +1,30 @@ +/* + * QEMU breakpoint & watchpoint definitions + * + * Copyright (c) 2012 SUSE LINUX Products GmbH + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef EXEC_BREAKPOINT_H +#define EXEC_BREAKPOINT_H + +#include "qemu/queue.h" +#include "exec/vaddr.h" +#include "exec/memattrs.h" + +typedef struct CPUBreakpoint { + vaddr pc; + int flags; /* BP_* */ + QTAILQ_ENTRY(CPUBreakpoint) entry; +} CPUBreakpoint; + +typedef struct CPUWatchpoint { + vaddr vaddr; + vaddr len; + vaddr hitaddr; + MemTxAttrs hitattrs; + int flags; /* BP_* */ + QTAILQ_ENTRY(CPUWatchpoint) entry; +} CPUWatchpoint; + +#endif diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 759c3e7d89..46b99a7ea5 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -22,6 +22,7 @@ #include "hw/qdev-core.h" #include "disas/dis-asm.h" +#include "exec/breakpoint.h" #include "exec/hwaddr.h" #include "exec/vaddr.h" #include "exec/memattrs.h" @@ -347,21 +348,6 @@ typedef struct CPUNegativeOffsetState { bool can_do_io; } CPUNegativeOffsetState; -typedef struct CPUBreakpoint { - vaddr pc; - int flags; /* BP_* */ - QTAILQ_ENTRY(CPUBreakpoint) entry; -} CPUBreakpoint; - -struct CPUWatchpoint { - vaddr vaddr; - vaddr len; - vaddr hitaddr; - MemTxAttrs hitattrs; - int flags; /* BP_* */ - QTAILQ_ENTRY(CPUWatchpoint) entry; -}; - struct KVMState; struct kvm_run; diff --git a/target/arm/internals.h b/target/arm/internals.h index b53f5e8ff2..e40ec453d5 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -25,6 +25,7 @@ #ifndef TARGET_ARM_INTERNALS_H #define TARGET_ARM_INTERNALS_H +#include "exec/breakpoint.h" #include "hw/registerfields.h" #include "tcg/tcg-gvec-desc.h" #include "syndrome.h" diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 5b20ecbd33..601c0b533f 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -18,6 +18,7 @@ #ifndef PPC_INTERNAL_H #define PPC_INTERNAL_H +#include "exec/breakpoint.h" #include "hw/registerfields.h" /* PM instructions */ diff --git a/target/riscv/debug.h b/target/riscv/debug.h index 5794aa6ee5..c347863578 100644 --- a/target/riscv/debug.h +++ b/target/riscv/debug.h @@ -22,6 +22,8 @@ #ifndef RISCV_DEBUG_H #define RISCV_DEBUG_H +#include "exec/breakpoint.h" + #define RV_MAX_TRIGGERS 2 /* register index of tdata CSRs */ From patchwork Fri Apr 26 19:41:52 2024 Content-Type: text/plain; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id jz12-20020a17090775ec00b00a58a9a56c44sm2359531ejc.16.2024.04.26.12.45.10 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:11 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 32/38] exec: Restrict TCG specific declarations of 'cputlb.h' Date: Fri, 26 Apr 2024 21:41:52 +0200 Message-ID: <20240426194200.43723-33-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=philmd@linaro.org; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Avoid TCG specific declarations being used from non-TCG accelerators. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-5-philmd@linaro.org> --- include/exec/cputlb.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index 6da1462c4f..ef18642a32 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -22,9 +22,14 @@ #include "exec/cpu-common.h" +#ifdef CONFIG_TCG + #if !defined(CONFIG_USER_ONLY) /* cputlb.c */ void tlb_protect_code(ram_addr_t ram_addr); void tlb_unprotect_code(ram_addr_t ram_addr); #endif + +#endif /* CONFIG_TCG */ + #endif From patchwork Fri Apr 26 19:41:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928370 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=zu0zykhT; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR3Hk0C4Bz1yZP for ; Sat, 27 Apr 2024 05:50:58 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RVi-0001a3-JA; Fri, 26 Apr 2024 15:45:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RVf-0001OT-S5 for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:45:28 -0400 Received: from mail-ej1-x632.google.com ([2a00:1450:4864:20::632]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RVX-0004ZX-KW for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:45:27 -0400 Received: by mail-ej1-x632.google.com with SMTP id a640c23a62f3a-a5557e3ebcaso424878766b.1 for ; Fri, 26 Apr 2024 12:45:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160718; x=1714765518; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IXDAwLQsv2ww5TZLeRIWY1HIfD/SnMqDRj2dwvAIHgY=; b=zu0zykhTN8O9lp5Zsdgu4VwjvzDUEvIzrQ5Kw5EnVtKG19iLemz1txafl1QoTp/M3C VxwCD7EI1r5c4FNXgnIMLJR/z3rqA1wPn3AZVMTH/08a/+0ZVyGSYQgB1h9Nosixboc0 KkAatfjLLiEtJAbcJaDgzpxQO5PPvox7RyN+k7BXHJElGaiwHbhBWQhMbKvqzZydTW+p 62aqij0dmkcDCkWBVOYxMsGyIBJfKeaH8HIIbAkkoaucioghN3YIW35Pslxr6BfPWXQC o5hY4OvOxvcbdd5HsanEkAKqkXMrACORfmcpHTacNouIxijrOHLBsby7p1xGYPqv7Yel 4mkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160718; x=1714765518; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IXDAwLQsv2ww5TZLeRIWY1HIfD/SnMqDRj2dwvAIHgY=; b=oEWR5t+5sewvKH1f+VrpxgvRqxCPeCwJXL7gkcirqFKTRpKJW6AB5AIUU9smuOqGXE gHTrwshpYTt/YXWB80NuIs2T9iHYVsAAdKvqlJkJLH4xXiWdTxMoKStAxtdwPOhEdAwl /oFfU7MZfRaVa0pK62rt+jIlsJ3HFXw9pHEZ8U/zUmK0Ciu1YQWVSgidHxnyVIB4LwBR fIsbn8KXbXTIkb4rtVO2pgF2prwleMotNyB3l1yDg4kIhBJnrdKSS9xSZdHy4/LWzW6I 8/QiLLexW1RZagyur70q/BQc1JdqK6qpYCHmCsvllnhuN6594TVc/GBCIGWYW3vafuun gy3g== X-Forwarded-Encrypted: i=1; AJvYcCWaMVT06rVFgn+wm7FYOrGaQ5cxkPO0wL/U/iARjUw1xEiFMjtJV8qmUozqqSSvzgEq6uoddRi4cT4simMmrVboJSuZ X-Gm-Message-State: AOJu0YznCp0L7JU6fAmd2MjaUtq3GSOZk1Wcwznhj9Y1tMhq27Qm0+gT yKNp4q3iwpeQc8/yTujiTXlz7BSEcJBZdPLKd5IRSBB3zRMT7FabX4VW4Uy6vNw= X-Google-Smtp-Source: AGHT+IEgJdTI8rt+PyOgpO3hCB5yaM4NBY8HNxEVtviUMKGm932HnqQvCPkqFfiDWe+9Ou9Pw85Csg== X-Received: by 2002:a17:907:7244:b0:a58:c4f9:a2f7 with SMTP id ds4-20020a170907724400b00a58c4f9a2f7mr697418ejc.2.1714160717925; Fri, 26 Apr 2024 12:45:17 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id cd19-20020a170906b35300b00a4673706b4dsm10888091ejb.78.2024.04.26.12.45.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:17 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 33/38] exec: Restrict 'cpu_ldst.h' to TCG accelerator Date: Fri, 26 Apr 2024 21:41:53 +0200 Message-ID: <20240426194200.43723-34-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org "exec/cpu_ldst.h" is specific to TCG, do not allow its inclusion from other accelerators. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-6-philmd@linaro.org> --- include/exec/cpu_ldst.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 5b99666702..f3c2a3ca74 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -1,5 +1,5 @@ /* - * Software MMU support + * Software MMU support (per-target) * * This library is free software; you can redistribute it and/or * modify it under the terms of the GNU Lesser General Public @@ -62,6 +62,10 @@ #ifndef CPU_LDST_H #define CPU_LDST_H +#ifndef CONFIG_TCG +#error Can only include this header with TCG +#endif + #include "exec/memopidx.h" #include "exec/abi_ptr.h" #include "exec/mmu-access-type.h" From patchwork Fri Apr 26 19:41:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928345 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=aU4oToG0; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR3Cz0kpmz23rB for ; Sat, 27 Apr 2024 05:47:43 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RVk-0001i8-35; Fri, 26 Apr 2024 15:45:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RVg-0001PF-5j for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:45:28 -0400 Received: from mail-ej1-x630.google.com ([2a00:1450:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RVc-0004e7-UY for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:45:27 -0400 Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-a5200202c1bso326764066b.0 for ; Fri, 26 Apr 2024 12:45:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160723; x=1714765523; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bzDVxW+21MsfKgGbGkgEmh47Dcww+z+68N+3YiFHARY=; b=aU4oToG0tAKSlN1+wZj99F14T0UuHK/yWR7XAFa62V361kLivQda8O27WUvOBjfgie /NEsG/Z2/grqaAOXrldw0OEeePly8aGT9iMAaJk8M2zo491DkWF7CaLU5iHok8VWxmxo 14PDybByztY+HS8CGK8RlYh1QBEKHkRq+/h5soBfUbHJ9hcVeZP323W+SHFrUZmi+e1I eeAbcnpuApqtGZKJe17oi43Cxh/I5wrQYywtfevvT3DJwN8Kj2Z5C9T4jHsnjs3HhT+X VHrYhbEh3d+BYYw3abcy7fJ0MOqleYy4FkEYiqgzSXNPAWrIsolB86PmyEy+WoMAndX4 WT1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160723; x=1714765523; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bzDVxW+21MsfKgGbGkgEmh47Dcww+z+68N+3YiFHARY=; b=QQdKgdTKjjOxRXcet8t+0gOAXXOEkk9hrtbXEGTHiQtCOVF4tJ26glJQ5ZleJYrf6B gc/v7j7p+WbIW4T++1iMMTDcmY/7TF42b78/x4XdTsFUu5VBaK/WkNGZyDRNa32FeYHD rObFx+V1XL9pM/BTVWCmjSiWUDnleABgb0e0n9mVYCAFa+LE0j/PCKK5GizjiFyMBTsU M9gpVm/OJyAlp8NwmAdVYLTerWB5DvW0CIkD0c0UtftaLb1jNNQAWkTsd3MTPct4CWTD 2Jm6SejYUO5RU4gJfEklZ4Se2WC59qGR+1vG7BCp96J1zV1epe2e47M5c61409vM3zXB 7iAg== X-Forwarded-Encrypted: i=1; AJvYcCV5gwWwL0K51N8DLZBffPjdv6SnJLIzz5rpY9BaM0sOv6SKbZoGk7g/KoAcR4Ld3B8BbQLRLdmO78hDGhBgB1qUX0zp X-Gm-Message-State: AOJu0YzMxM8ExOXWUqf+pbAWo4HYCBH+AjEkm7uuUW8LvXLIP2aoWNW7 LkTa4fFPoK5QfGloDtRiofG0xybNleFl1XMW3C+debUMZur0pXqAyEEDr2DrEDU= X-Google-Smtp-Source: AGHT+IFbjzomzyAy10P5S8LAPy9pwi6u7Ad9NMmFM9toKajkmNMRwzbdJvq5YSQfLVs84Je6MszNjA== X-Received: by 2002:a17:906:459:b0:a58:7ea5:c49b with SMTP id e25-20020a170906045900b00a587ea5c49bmr3257788eja.42.1714160723638; Fri, 26 Apr 2024 12:45:23 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id z2-20020a1709063ac200b00a4e1a9e1ab4sm10875255ejd.157.2024.04.26.12.45.22 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Anton Johansson , Richard Henderson , Paolo Bonzini , Riku Voipio Subject: [PULL 34/38] exec: Rename 'exec/user/guest-base.h' as 'user/guest-base.h' Date: Fri, 26 Apr 2024 21:41:54 +0200 Message-ID: <20240426194200.43723-35-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::630; envelope-from=philmd@linaro.org; helo=mail-ej1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org The include/user/ directory contains the user-emulation specific headers. Move guest-base.h there too. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20240418192525.97451-15-philmd@linaro.org> --- include/exec/cpu-all.h | 2 +- include/{exec => }/user/guest-base.h | 4 ++-- tcg/tcg.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) rename include/{exec => }/user/guest-base.h (72%) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 78848f018c..027f19e052 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -65,7 +65,7 @@ #if defined(CONFIG_USER_ONLY) #include "exec/user/abitypes.h" -#include "exec/user/guest-base.h" +#include "user/guest-base.h" extern bool have_guest_base; diff --git a/include/exec/user/guest-base.h b/include/user/guest-base.h similarity index 72% rename from include/exec/user/guest-base.h rename to include/user/guest-base.h index afe2ab7fbb..1e42bca5db 100644 --- a/include/exec/user/guest-base.h +++ b/include/user/guest-base.h @@ -4,8 +4,8 @@ * Copyright (c) 2003 Fabrice Bellard */ -#ifndef EXEC_USER_GUEST_BASE_H -#define EXEC_USER_GUEST_BASE_H +#ifndef USER_GUEST_BASE_H +#define USER_GUEST_BASE_H extern uintptr_t guest_base; diff --git a/tcg/tcg.c b/tcg/tcg.c index 0c0bb9d169..6a32656cd4 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -57,7 +57,7 @@ #include "tcg-internal.h" #include "tcg/perf.h" #ifdef CONFIG_USER_ONLY -#include "exec/user/guest-base.h" +#include "user/guest-base.h" #endif /* Forward declarations for functions declared in tcg-target.c.inc and From patchwork Fri Apr 26 19:41:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928378 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=rD//d/EY; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id l10-20020a056402124a00b00571bec923bcsm10012663edw.93.2024.04.26.12.45.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:29 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Anton Johansson , Warner Losh , Kyle Evans , Paolo Bonzini , Riku Voipio , Laurent Vivier Subject: [PULL 35/38] exec: Restrict inclusion of 'user/guest-base.h' Date: Fri, 26 Apr 2024 21:41:55 +0200 Message-ID: <20240426194200.43723-36-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::236; envelope-from=philmd@linaro.org; helo=mail-lj1-x236.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Declare 'have_guest_base' in "user/guest-base.h". Very few files require this header, so explicitly include it there instead of "exec/cpu-all.h" which is used in many source files. Assert this user-specific header is only included from user emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-23-philmd@linaro.org> Reviewed-by: Anton Johansson --- include/exec/cpu-all.h | 3 --- include/exec/cpu_ldst.h | 2 ++ include/user/guest-base.h | 6 ++++++ bsd-user/main.c | 1 + linux-user/elfload.c | 1 + linux-user/main.c | 1 + 6 files changed, 11 insertions(+), 3 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 027f19e052..e75ec13cd0 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -65,9 +65,6 @@ #if defined(CONFIG_USER_ONLY) #include "exec/user/abitypes.h" -#include "user/guest-base.h" - -extern bool have_guest_base; /* * If non-zero, the guest virtual address space is a contiguous subset diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index f3c2a3ca74..7d0a0412ad 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -74,6 +74,8 @@ #if defined(CONFIG_USER_ONLY) +#include "user/guest-base.h" + #ifndef TARGET_TAGGED_ADDRESSES static inline abi_ptr cpu_untagged_addr(CPUState *cs, abi_ptr x) { diff --git a/include/user/guest-base.h b/include/user/guest-base.h index 1e42bca5db..055c1d14fe 100644 --- a/include/user/guest-base.h +++ b/include/user/guest-base.h @@ -7,6 +7,12 @@ #ifndef USER_GUEST_BASE_H #define USER_GUEST_BASE_H +#ifndef CONFIG_USER_ONLY +#error Cannot include this header from system emulation +#endif + extern uintptr_t guest_base; +extern bool have_guest_base; + #endif diff --git a/bsd-user/main.c b/bsd-user/main.c index 01b313756e..29a629d877 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -36,6 +36,7 @@ #include "qemu/help_option.h" #include "qemu/module.h" #include "exec/exec-all.h" +#include "user/guest-base.h" #include "tcg/startup.h" #include "qemu/timer.h" #include "qemu/envlist.h" diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 207455c1ba..f9461d2844 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -8,6 +8,7 @@ #include "qemu.h" #include "user/tswap-target.h" +#include "user/guest-base.h" #include "user-internals.h" #include "signal-common.h" #include "loader.h" diff --git a/linux-user/main.c b/linux-user/main.c index 149e35432e..94e4c47f05 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -38,6 +38,7 @@ #include "qemu/help_option.h" #include "qemu/module.h" #include "qemu/plugin.h" +#include "user/guest-base.h" #include "exec/exec-all.h" #include "exec/gdbstub.h" #include "gdbstub/user.h" From patchwork Fri Apr 26 19:41:56 2024 Content-Type: text/plain; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id fk6-20020a056402398600b00571ba529bbasm10313860edb.44.2024.04.26.12.45.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:34 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 36/38] exec: Move CPUTLBEntry helpers to cputlb.c Date: Fri, 26 Apr 2024 21:41:56 +0200 Message-ID: <20240426194200.43723-37-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=philmd@linaro.org; helo=mail-ed1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org The following CPUTLBEntry helpers are only used in accel/tcg/cputlb.c: - tlb_index() - tlb_entry() - tlb_read_idx() - tlb_addr_write() Move them to this file, allowing to remove the huge "cpu.h" header inclusion from "exec/cpu_ldst.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-13-philmd@linaro.org> --- include/exec/cpu_ldst.h | 55 ----------------------------------------- accel/tcg/cputlb.c | 51 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+), 55 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 7d0a0412ad..11ba3778ba 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -70,7 +70,6 @@ #include "exec/abi_ptr.h" #include "exec/mmu-access-type.h" #include "qemu/int128.h" -#include "cpu.h" #if defined(CONFIG_USER_ONLY) @@ -296,60 +295,6 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr, Int128 cmpv, Int128 newv, MemOpIdx oi, uintptr_t retaddr); -#if !defined(CONFIG_USER_ONLY) - -#include "tcg/oversized-guest.h" - -static inline uint64_t tlb_read_idx(const CPUTLBEntry *entry, - MMUAccessType access_type) -{ - /* Do not rearrange the CPUTLBEntry structure members. */ - QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_read) != - MMU_DATA_LOAD * sizeof(uint64_t)); - QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_write) != - MMU_DATA_STORE * sizeof(uint64_t)); - QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_code) != - MMU_INST_FETCH * sizeof(uint64_t)); - -#if TARGET_LONG_BITS == 32 - /* Use qatomic_read, in case of addr_write; only care about low bits. */ - const uint32_t *ptr = (uint32_t *)&entry->addr_idx[access_type]; - ptr += HOST_BIG_ENDIAN; - return qatomic_read(ptr); -#else - const uint64_t *ptr = &entry->addr_idx[access_type]; -# if TCG_OVERSIZED_GUEST - return *ptr; -# else - /* ofs might correspond to .addr_write, so use qatomic_read */ - return qatomic_read(ptr); -# endif -#endif -} - -static inline uint64_t tlb_addr_write(const CPUTLBEntry *entry) -{ - return tlb_read_idx(entry, MMU_DATA_STORE); -} - -/* Find the TLB index corresponding to the mmu_idx + address pair. */ -static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx, - vaddr addr) -{ - uintptr_t size_mask = cpu->neg.tlb.f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS; - - return (addr >> TARGET_PAGE_BITS) & size_mask; -} - -/* Find the TLB entry corresponding to the mmu_idx + address pair. */ -static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx, - vaddr addr) -{ - return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)]; -} - -#endif /* !defined(CONFIG_USER_ONLY) */ - #if TARGET_BIG_ENDIAN # define cpu_lduw_data cpu_lduw_be_data # define cpu_ldsw_data cpu_ldsw_be_data diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index e16d02a62c..953c437ba9 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -27,6 +27,9 @@ #include "exec/tb-flush.h" #include "exec/memory-internal.h" #include "exec/ram_addr.h" +#include "exec/mmu-access-type.h" +#include "exec/tlb-common.h" +#include "exec/vaddr.h" #include "tcg/tcg.h" #include "qemu/error-report.h" #include "exec/log.h" @@ -95,6 +98,54 @@ static inline size_t sizeof_tlb(CPUTLBDescFast *fast) return fast->mask + (1 << CPU_TLB_ENTRY_BITS); } +static inline uint64_t tlb_read_idx(const CPUTLBEntry *entry, + MMUAccessType access_type) +{ + /* Do not rearrange the CPUTLBEntry structure members. */ + QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_read) != + MMU_DATA_LOAD * sizeof(uint64_t)); + QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_write) != + MMU_DATA_STORE * sizeof(uint64_t)); + QEMU_BUILD_BUG_ON(offsetof(CPUTLBEntry, addr_code) != + MMU_INST_FETCH * sizeof(uint64_t)); + +#if TARGET_LONG_BITS == 32 + /* Use qatomic_read, in case of addr_write; only care about low bits. */ + const uint32_t *ptr = (uint32_t *)&entry->addr_idx[access_type]; + ptr += HOST_BIG_ENDIAN; + return qatomic_read(ptr); +#else + const uint64_t *ptr = &entry->addr_idx[access_type]; +# if TCG_OVERSIZED_GUEST + return *ptr; +# else + /* ofs might correspond to .addr_write, so use qatomic_read */ + return qatomic_read(ptr); +# endif +#endif +} + +static inline uint64_t tlb_addr_write(const CPUTLBEntry *entry) +{ + return tlb_read_idx(entry, MMU_DATA_STORE); +} + +/* Find the TLB index corresponding to the mmu_idx + address pair. */ +static inline uintptr_t tlb_index(CPUState *cpu, uintptr_t mmu_idx, + vaddr addr) +{ + uintptr_t size_mask = cpu->neg.tlb.f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS; + + return (addr >> TARGET_PAGE_BITS) & size_mask; +} + +/* Find the TLB entry corresponding to the mmu_idx + address pair. */ +static inline CPUTLBEntry *tlb_entry(CPUState *cpu, uintptr_t mmu_idx, + vaddr addr) +{ + return &cpu->neg.tlb.f[mmu_idx].table[tlb_index(cpu, mmu_idx, addr)]; +} + static void tlb_window_reset(CPUTLBDesc *desc, int64_t ns, size_t max_entries) { From patchwork Fri Apr 26 19:41:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928349 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=XcmflDGO; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; 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[176.184.11.147]) by smtp.gmail.com with ESMTPSA id se12-20020a170906ce4c00b00a587271f77dsm5326419ejb.176.2024.04.26.12.45.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:40 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Subject: [PULL 37/38] hw/core: Avoid including the full 'hw/core/cpu.h' in 'tcg-cpu-ops.h' Date: Fri, 26 Apr 2024 21:41:57 +0200 Message-ID: <20240426194200.43723-38-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=philmd@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Only include what is required, avoiding the full CPUState API from the huge "hw/core/cpu.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-4-philmd@linaro.org> --- include/hw/core/tcg-cpu-ops.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index dc1f16a977..9387d38748 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -10,7 +10,11 @@ #ifndef TCG_CPU_OPS_H #define TCG_CPU_OPS_H -#include "hw/core/cpu.h" +#include "exec/breakpoint.h" +#include "exec/hwaddr.h" +#include "exec/memattrs.h" +#include "exec/mmu-access-type.h" +#include "exec/vaddr.h" struct TCGCPUOps { /** From patchwork Fri Apr 26 19:41:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1928365 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=MnmuAFn3; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VR3H25JRfz1yZP for ; Sat, 27 Apr 2024 05:50:22 +1000 (AEST) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0RW5-0003Ud-0b; Fri, 26 Apr 2024 15:45:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0RW3-0003OR-3E for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:45:51 -0400 Received: from mail-lf1-x131.google.com ([2a00:1450:4864:20::131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0RW0-0004rf-5c for qemu-ppc@nongnu.org; Fri, 26 Apr 2024 15:45:50 -0400 Received: by mail-lf1-x131.google.com with SMTP id 2adb3069b0e04-51bae805c56so2915913e87.0 for ; Fri, 26 Apr 2024 12:45:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714160746; x=1714765546; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=q7YRlrLoDVqcKqwJc5XUnzy4U8ujSMb/8xBf3PSdyhk=; b=MnmuAFn3RzMmtPudj0mPg2amQIkZWLEM2+EKcx5M6L0cngtng5QrnyBkDK5/h1XCMY JVAKSQ6hueIEemEYOnjNopUWkObg97IvpgguhkM7izJjvtNgHa5c1EPZsYCQHSd4Rd47 a1nPvrNqLwEJT5OqWF5StRw3qMx0qLnp78xFPrvRYqJID6My0WkAH98/tywjWeaL85jP Luibf3m1KAs2uqwNXRMGv81BlbRZYTGXa1erjOQaxqkZ/aFA/XgcDNflmRaoc9A9naQg eRnnBBPT7+WW8DGvqJCG3oJFP6qMZz+Y9ZD2TxLlsBCF5aqiYKQkEmGSkBb8pBCnwNt3 7nwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714160746; x=1714765546; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=q7YRlrLoDVqcKqwJc5XUnzy4U8ujSMb/8xBf3PSdyhk=; b=qbLqEYmfE/m7LaVDPsWQKm7o6rWOGaHpw0uZRTFGKX5fl/dZ9GBZFoXfTV6kIA/x36 2a25Uda4B8sW/xwLp96WhElvuBNNatv+bOAUmqW/5CbG/ALw75vfoGu6hpWoCjXqSr83 Yxt7sUrwRXlJYWT/NqQt+xrW7Yr0DuuiFboRBoeQdATStcYdhOfRHaRgVEkoqIiA82v2 S4YK/YaLLx22xiejSVpS44TgDxjq8fyJPWYj8l5M1VJE3ENqu9aqQjxeUzmd0aZQ4Tzg WXCLH7L0fl4kSylr4afpUJA6qYC8KKy1l/uQaru33LQ8/jxczvdaDJ0deCyjvBP1hU4P m8Lg== X-Forwarded-Encrypted: i=1; AJvYcCW9GltQoWhTdUyiZBq3e8Ta7MX+AouHB+VIMdpk6+OdVZk2zCgJKjoeo3oVZDW4HBYGrLn0+3PseCmXJ9zpmaLP9pCL X-Gm-Message-State: AOJu0YwWyuUc0QflcqxAfWUxYWpkAuVxJXdSy1Z/brhrxD3OD9VuJzAD sCXCNKAY5Djy97OUbpLkzRyHc80+rL5CQt+NyqjmxHnnejhoyg5+1Yp2AtyEASZxG/+Hs/y8JNF 7YNM= X-Google-Smtp-Source: AGHT+IEizWECJiHFY2lqs+yjor1DElScPSkGynXQo4U3KncjdruIEQM1SaflMnx6CBfEWAUsmEZv3A== X-Received: by 2002:a05:6512:2c99:b0:51c:ee04:3732 with SMTP id dw25-20020a0565122c9900b0051cee043732mr969913lfb.7.1714160746403; Fri, 26 Apr 2024 12:45:46 -0700 (PDT) Received: from m1x-phil.lan (aul93-h02-176-184-11-147.dsl.sta.abo.bbox.fr. [176.184.11.147]) by smtp.gmail.com with ESMTPSA id g4-20020a056402320400b00572593ddf22sm854298eda.58.2024.04.26.12.45.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 26 Apr 2024 12:45:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson , Pierrick Bouvier Subject: [PULL 38/38] plugins: Include missing 'qemu/bitmap.h' header Date: Fri, 26 Apr 2024 21:41:58 +0200 Message-ID: <20240426194200.43723-39-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240426194200.43723-1-philmd@linaro.org> References: <20240426194200.43723-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::131; envelope-from=philmd@linaro.org; helo=mail-lf1-x131.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Since commit c006147122 ("plugins: create CPUPluginState and migrate plugin_mask") "qemu/plugin.h" uses DECLARE_BITMAP(), which is declared in "qemu/bitmap.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Pierrick Bouvier Message-Id: <20240418192525.97451-19-philmd@linaro.org> --- include/qemu/plugin.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 12a96cea2a..41db748eda 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -13,6 +13,7 @@ #include "qemu/queue.h" #include "qemu/option.h" #include "qemu/plugin-event.h" +#include "qemu/bitmap.h" #include "exec/memopidx.h" #include "hw/core/cpu.h"