From patchwork Thu Apr 18 12:42:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 1924977 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=zPUJY9DK; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 header.b=NuWAM3kD; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=patchwork.ozlabs.org) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VKyC15fKFz1ymh for ; Thu, 18 Apr 2024 22:44:13 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WbWD/NB6aKlnsWwlCYsVtgtIwP407zaTzpcCyXs+gcg=; b=zPUJY9DKdaaUBo ygcmLEA45XT5QH51fmzEPhdi+pAYRhxKZdazcWOILz7YX9Ll+aUo2UYPT3YilPIITQ5oxTGscCTqt 95P7Pebm8+A/LloHMSvFPZ5L0vfGQOl+bXX5MsXJk3C4Wz7x3+bfG0dcLSeWuU5ZXI2wbqz7Z9MlV cJGttkojGVsUonG7/pWXIHgK/bm5yKUGq16N/o4BALhborX6RmIwOR6D2MYbXUspae4UBxijI4luE XttH5bJnrjX56ux+cm9VEwTk/gK+xNsVoKHXPGvKDzDHWgZq6/YdMRYeNv1Q7k91XKyXoQXnrojw+ Srn8rscOudHJ+8jM3B9g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7b-00000002CbD-0e5v; Thu, 18 Apr 2024 12:44:11 +0000 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7Q-00000002CRK-0MWr for kvm-riscv@lists.infradead.org; Thu, 18 Apr 2024 12:44:03 +0000 Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-349a33a9667so113126f8f.3 for ; Thu, 18 Apr 2024 05:43:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1713444235; x=1714049035; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zrjU6l9W7DikYIaMYJG/SdZ2oUTcGtwCnDHe7Ekc7IE=; b=NuWAM3kDbx8VequTg93+Qo1r4b7sTaAVBx/d0NmHVpQhg01ajHoXxXCUclA8B5C+MW qi1py/TVNEcX8LeB3tKeTKdhnbVrId9Laxd6OROuM+dVTE0bkoyPM7WYC2tmA+Nfyae/ kQQI1I60so8otLtVH34ANkyB8RfYSWa4zKBa4Ob2HmTvj/8wF0i/gUQCYTQbfspNlgfN S49dn8svv0ZJ9NCX1PpIkg7lJ3nWjkCggpb9/PGD3y5D6SbBRm4ZRP8zN8s04C1+3eF4 lw9Q0Z82tAJ6ZqP6/uRapxX5zDaA58LS2IrZ4v8fYDf1BnQ3Yr3NswJ1sB9q1afATDBj rh4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713444235; x=1714049035; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zrjU6l9W7DikYIaMYJG/SdZ2oUTcGtwCnDHe7Ekc7IE=; b=hKdOHyPBXMvTjWUCcd+nFc7bSaJVc7wmCn4aE4u8OuZBvitwRy+SjM99Px0DN3EZlk o1xjL0srD/6qHlbbKkd8r4YgKFiGqNGnxZGNWjlqwZuBuEdLVG/6amRS1Z2c2kSF3YSE UfOfeB9f1sv/90NsxDK4rqa4ONpm1fQY6S7wngWg9Ke5DSnLLLrFh/Iv95RfXcfWKftJ Bv5naYBf3iMp/F5M+NRlHLcI3dRzSPJggFJpjr67HOVSGx3T+sehKv9vh1gJcxfVKjFP dqzWg4/HV1voft6F5Z40XqPRgw5I4/32RJf/YAVkiXyS8s7wxr3TkXMdljDOezBANzT1 22mg== X-Forwarded-Encrypted: i=1; AJvYcCUcj0alhmAdRAYRgir8j/PKaQomK67qSJrm9Q1lKGnMgq+HAUEanqwpFUOLBkdctN2HiPRfxcgJCj1ZSbfxXJS+X8qeW0R3mmBuOjIcbQ== X-Gm-Message-State: AOJu0YxvXdF0o0hzx3rP3TPDIvM2RpZ30II1G98GmGkqBZSkPxGTAWF9 +Hqsg0UoCpvJxiGvEVsQSrHo4Esau0jF4epqw0QyhF+mvLTnOOQpkGg/Nlxenl0= X-Google-Smtp-Source: AGHT+IFFx4DMJCN/eGlinw4D8WxSb2s5Led6zbc0ypunbHRPKVqfx9J88kY5VuS8nvJuPPTEq99jAg== X-Received: by 2002:a05:600c:55d7:b0:418:ef65:4b5f with SMTP id jq23-20020a05600c55d700b00418ef654b5fmr805438wmb.3.1713444235113; Thu, 18 Apr 2024 05:43:55 -0700 (PDT) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:7b64:4d1d:16d8:e38b]) by smtp.gmail.com with ESMTPSA id bi18-20020a05600c3d9200b00418d5b16fa2sm3373412wmb.30.2024.04.18.05.43.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 05:43:54 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Anup Patel , Shuah Khan Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Subject: [PATCH v2 01/12] dt-bindings: riscv: add Zca, Zcf, Zcd and Zcb ISA extension description Date: Thu, 18 Apr 2024 14:42:24 +0200 Message-ID: <20240418124300.1387978-2-cleger@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240418124300.1387978-1-cleger@rivosinc.com> References: <20240418124300.1387978-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240418_054400_329446_581180BE X-CRM114-Status: GOOD ( 10.67 ) X-Spam-Score: 0.0 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Add description for Zca, Zcf, Zcd and Zcb extensions which are part the Zc* standard extensions for code size reduction. Additional validation rules are added since Zcb depends on Zca, Zcf, depends on [...] Content analysis details: (0.0 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:42a listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Add description for Zca, Zcf, Zcd and Zcb extensions which are part the Zc* standard extensions for code size reduction. Additional validation rules are added since Zcb depends on Zca, Zcf, depends on Zca and F, Zcd depends on Zca and D and finally, Zcf can not be present on rv64. Signed-off-by: Clément Léger Reviewed-by: Conor Dooley --- .../devicetree/bindings/riscv/extensions.yaml | 78 +++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index 616370318a66..db7daf22b863 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -220,6 +220,38 @@ properties: instructions as ratified at commit 6d33919 ("Merge pull request #158 from hirooih/clmul-fix-loop-end-condition") of riscv-bitmanip. + - const: zca + description: | + The Zca extension part of Zc* standard extensions for code size + reduction, as ratified in commit 8be3419c1c0 ("Zcf doesn't exist on + RV64 as it contains no instructions") of riscv-code-size-reduction, + merged in the riscv-isa-manual by commit dbc79cf28a2 ("Initial seed + of zc.adoc to src tree."). + + - const: zcb + description: | + The Zcb extension part of Zc* standard extensions for code size + reduction, as ratified in commit 8be3419c1c0 ("Zcf doesn't exist on + RV64 as it contains no instructions") of riscv-code-size-reduction, + merged in the riscv-isa-manual by commit dbc79cf28a2 ("Initial seed + of zc.adoc to src tree."). + + - const: zcd + description: | + The Zcd extension part of Zc* standard extensions for code size + reduction, as ratified in commit 8be3419c1c0 ("Zcf doesn't exist on + RV64 as it contains no instructions") of riscv-code-size-reduction, + merged in the riscv-isa-manual by commit dbc79cf28a2 ("Initial seed + of zc.adoc to src tree."). + + - const: zcf + description: | + The Zcf extension part of Zc* standard extensions for code size + reduction, as ratified in commit 8be3419c1c0 ("Zcf doesn't exist on + RV64 as it contains no instructions") of riscv-code-size-reduction, + merged in the riscv-isa-manual by commit dbc79cf28a2 ("Initial seed + of zc.adoc to src tree."). + - const: zfa description: The standard Zfa extension for additional floating point @@ -489,5 +521,51 @@ properties: Registers in the AX45MP datasheet. https://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf + allOf: + # Zcb depends on Zca + - if: + contains: + const: zcb + then: + contains: + const: zca + # Zcd depends on Zca and D + - if: + contains: + const: zcd + then: + allOf: + - contains: + const: zca + - contains: + const: d + # Zcf depends on Zca and F + - if: + contains: + const: zcf + then: + allOf: + - contains: + const: zca + - contains: + const: f + +allOf: + # Zcf extension does not exists on rv64 + - if: + properties: + riscv,isa-extensions: + contains: + const: zcf + riscv,isa-base: + contains: + const: rv64i + then: + properties: + riscv,isa-extensions: + not: + contains: + const: zcf + additionalProperties: true ... From patchwork Thu Apr 18 12:42:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 1924981 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=ZyPUirNs; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 header.b=EzHiWobb; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=patchwork.ozlabs.org) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VKyC341Q4z23g7 for ; Thu, 18 Apr 2024 22:44:15 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=pCzmtVU6FPnC8ShDXB16X/OPHEmDr3YP1y4T0EpiaDE=; b=ZyPUirNsQGogYe pkO6mWojk1oKSg36iSrr3461cFpqGkBNbazV/idfTqER58tJqs+ShbysIJcVJoo7L2VcA3dUDXmO/ WStmTBzLC+UglmmYSxO/BQSpzuRwzf1Dn43RxNQ+Cn1jaA/z11vztWMG5ksFuLzEv82bGLLfAk9yj UsfgPIL11O5jLNswb5YZpOB3Zrt+i9/Vbp23iDa0EfKOnd5UnSCgjV69APz6hJ7w/uW3yeUZAcNdp xv0Mxh+7JecrDPkLr/MazrnKyIfU348dWiKtxn6MM7R4CJjeipjBPqa/QPmT8c4Qug0ptNEgQAQhd T8wGSbqCzJXKiPxxro8g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7d-00000002CeK-2rUk; Thu, 18 Apr 2024 12:44:13 +0000 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7Q-00000002CRL-0YG4 for kvm-riscv@lists.infradead.org; Thu, 18 Apr 2024 12:44:06 +0000 Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-349a35ae298so80020f8f.2 for ; Thu, 18 Apr 2024 05:43:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1713444236; x=1714049036; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oAl9pLtTmdQ7M+Wok6zdTTXvycSGmEGoH9Hb6PFq4BA=; b=EzHiWobbXpSXUHf0EAeOWQuDIVSAdSS41rj0YDVBo17Czk/9QzXjZ9BeIUhFaJYCNa bY320fgwADOmhhNdYWmBptigtI47Vykwuwn+Muw40SUvb1hExUKXxx7Hrx5FeXziUdxX tA+G+8xhBZlc6LRVBZ/Xql7uDeGA/bbRAZsCJllEuqeMfc65kl1NV9yzpGNf9iimUmrV L9fW8IJyHy5UCGmnY9SoAk5AntmL78W1DoZdJkUeyXZNhsRcr3iHW0UJE2qSjWYPajxn C1p3OOuh+Qo7PsYvUW6z8woP3729Dr7+bH4IVHYl/PaQ2+0StfrHtXxqYv+IzJ+dk/JM e8UQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713444236; x=1714049036; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oAl9pLtTmdQ7M+Wok6zdTTXvycSGmEGoH9Hb6PFq4BA=; b=uNQ8o887hYDQrOCSNwrQeb+b2lEWaxhjnBgHhr2iUHX52eJHewu3h0YW89BEXg1mqF 7wJz+Fzo7GngbANo3nfvxi/qyRgzFaOC5PiQzp9BeMC5bvwrhh12j05ifIFMKhbozphv Ty0oExBH4f31Zp7AwxX30J1RgzVtj8wv/2QFwPQ7oLYMbMdbWvsDybjsbIP9QKnHCFTX oe9yorZYMD50LuRF2n7I2rczJl8RvCZNnPKA2yFaMUjZH2irqkNfXMZNS8xRcRC1hRvb SBTpKTpfiV/setmOhFW9px+D6cygap52ZiFzVhSz9SqKQ5wU4BSOpEwPy21jtwYPy4i4 BaIA== X-Forwarded-Encrypted: i=1; AJvYcCWYxnHlwa+2db59/CMYvyzvtBxJ5Pt8Nxl6I3yg83yXzvRR+Oov3fXeSueq877o6r2sizjOJ5pj1BizsKMtDzVo0jYrMOsj0X9umhzhaA== X-Gm-Message-State: AOJu0YwuxSUcUe69weBV66AqmrZ2aJrnpLGfAk88U9ONsxyzObLVFJGa zou8VI1ltaz82Okabph2txoUncIrpsDFbJH+3Km2lHXy7UdN/hJeS5iDnmR8rio= X-Google-Smtp-Source: AGHT+IFKhZshgTTpNugctUIBKjo1ziNnne6N8VGVQW4Spy090KZRQKoznik9yMPwCUs6CVPn34LP8A== X-Received: by 2002:a5d:5989:0:b0:34a:513:5c46 with SMTP id n9-20020a5d5989000000b0034a05135c46mr1797065wri.5.1713444236215; Thu, 18 Apr 2024 05:43:56 -0700 (PDT) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:7b64:4d1d:16d8:e38b]) by smtp.gmail.com with ESMTPSA id bi18-20020a05600c3d9200b00418d5b16fa2sm3373412wmb.30.2024.04.18.05.43.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 05:43:55 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Anup Patel , Shuah Khan Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Subject: [PATCH v2 02/12] riscv: dts: enable Zc* extensions when needed Date: Thu, 18 Apr 2024 14:42:25 +0200 Message-ID: <20240418124300.1387978-3-cleger@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240418124300.1387978-1-cleger@rivosinc.com> References: <20240418124300.1387978-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240418_054400_411348_0C00525F X-CRM114-Status: GOOD ( 11.24 ) X-Spam-Score: 0.0 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: The Zc* spec states that: "The C extension is the superset of the following extensions: - Zca - Zcf if F is specified (RV32 only) - Zcd if D is specified As C defines the same instructions as Zca, Zcf and Zcd, the rule is that [...] Content analysis details: (0.0 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:42e listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org The Zc* spec states that: "The C extension is the superset of the following extensions: - Zca - Zcf if F is specified (RV32 only) - Zcd if D is specified As C defines the same instructions as Zca, Zcf and Zcd, the rule is that: - C always implies Zca - C+F implies Zcf (RV32 only)" Add these extensions to existing device-trees that contains "c" extension in "riscv,isa-extensions". Signed-off-by: Clément Léger --- arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 4 +- arch/riscv/boot/dts/microchip/mpfs.dtsi | 20 +- arch/riscv/boot/dts/renesas/r9a07g043f.dtsi | 4 +- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 20 +- arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 20 +- arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 4 +- arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi | 256 +++++++++--------- arch/riscv/boot/dts/starfive/jh7100.dtsi | 8 +- arch/riscv/boot/dts/starfive/jh7110.dtsi | 20 +- arch/riscv/boot/dts/thead/th1520.dtsi | 16 +- 10 files changed, 186 insertions(+), 186 deletions(-) diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi index 64c3c2e6cbe0..05e0e5f0eed7 100644 --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi @@ -26,8 +26,8 @@ cpu0: cpu@0 { operating-points-v2 = <&opp_table_cpu>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; #cooling-cells = <2>; cpu0_intc: interrupt-controller { diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi index 9883ca3554c5..82ac84afdda7 100644 --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi @@ -24,8 +24,8 @@ cpu0: cpu@0 { reg = <0>; riscv,isa = "rv64imac"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "c", "zicntr", "zicsr", "zifencei", - "zihpm"; + riscv,isa-extensions = "i", "m", "a", "c", "zca", "zicntr", "zicsr", + "zifencei", "zihpm"; clocks = <&clkcfg CLK_CPU>; status = "disabled"; @@ -53,8 +53,8 @@ cpu1: cpu@1 { reg = <1>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; clocks = <&clkcfg CLK_CPU>; tlb-split; next-level-cache = <&cctrllr>; @@ -84,8 +84,8 @@ cpu2: cpu@2 { reg = <2>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; clocks = <&clkcfg CLK_CPU>; tlb-split; next-level-cache = <&cctrllr>; @@ -115,8 +115,8 @@ cpu3: cpu@3 { reg = <3>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; clocks = <&clkcfg CLK_CPU>; tlb-split; next-level-cache = <&cctrllr>; @@ -146,8 +146,8 @@ cpu4: cpu@4 { reg = <4>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; clocks = <&clkcfg CLK_CPU>; tlb-split; next-level-cache = <&cctrllr>; diff --git a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi index f35324b9173c..b5e06fbfdf65 100644 --- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi +++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi @@ -26,8 +26,8 @@ cpu0: cpu@0 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm", "xandespmu"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm", "xandespmu"; mmu-type = "riscv,sv39"; i-cache-size = <0x8000>; i-cache-line-size = <0x40>; diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi index 156330a9bbf3..2872515dab17 100644 --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi @@ -31,8 +31,8 @@ cpu0: cpu@0 { reg = <0>; riscv,isa = "rv64imac"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "c", "zicntr", "zicsr", "zifencei", - "zihpm"; + riscv,isa-extensions = "i", "m", "a", "c", "zca", "zicntr", "zicsr", + "zifencei", "zihpm"; status = "disabled"; cpu0_intc: interrupt-controller { #interrupt-cells = <1>; @@ -57,8 +57,8 @@ cpu1: cpu@1 { reg = <1>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; tlb-split; next-level-cache = <&l2cache>; cpu1_intc: interrupt-controller { @@ -84,8 +84,8 @@ cpu2: cpu@2 { reg = <2>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; tlb-split; next-level-cache = <&l2cache>; cpu2_intc: interrupt-controller { @@ -111,8 +111,8 @@ cpu3: cpu@3 { reg = <3>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; tlb-split; next-level-cache = <&l2cache>; cpu3_intc: interrupt-controller { @@ -138,8 +138,8 @@ cpu4: cpu@4 { reg = <4>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; tlb-split; next-level-cache = <&l2cache>; cpu4_intc: interrupt-controller { diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi index 6150f3397bff..4336ed11db9a 100644 --- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi @@ -32,8 +32,8 @@ cpu0: cpu@0 { reg = <0x0>; riscv,isa = "rv64imac"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "c", "zicntr", "zicsr", "zifencei", - "zihpm"; + riscv,isa-extensions = "i", "m", "a", "c", "zca", "zicntr", "zicsr", + "zifencei", "zihpm"; status = "disabled"; cpu0_intc: interrupt-controller { #interrupt-cells = <1>; @@ -59,8 +59,8 @@ cpu1: cpu@1 { reg = <0x1>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; tlb-split; cpu1_intc: interrupt-controller { #interrupt-cells = <1>; @@ -86,8 +86,8 @@ cpu2: cpu@2 { reg = <0x2>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; tlb-split; cpu2_intc: interrupt-controller { #interrupt-cells = <1>; @@ -113,8 +113,8 @@ cpu3: cpu@3 { reg = <0x3>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; tlb-split; cpu3_intc: interrupt-controller { #interrupt-cells = <1>; @@ -140,8 +140,8 @@ cpu4: cpu@4 { reg = <0x4>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; tlb-split; cpu4_intc: interrupt-controller { #interrupt-cells = <1>; diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi index 2d6f4a4b1e58..1fa5c57acf48 100644 --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi @@ -28,8 +28,8 @@ cpu0: cpu@0 { mmu-type = "riscv,sv39"; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; cpu0_intc: interrupt-controller { compatible = "riscv,cpu-intc"; diff --git a/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi b/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi index b136b6c4128c..6d03076314aa 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi @@ -259,8 +259,8 @@ cpu0: cpu@0 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <0>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -284,8 +284,8 @@ cpu1: cpu@1 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <1>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -309,8 +309,8 @@ cpu2: cpu@2 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <2>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -334,8 +334,8 @@ cpu3: cpu@3 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <3>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -359,8 +359,8 @@ cpu4: cpu@4 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <4>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -384,8 +384,8 @@ cpu5: cpu@5 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <5>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -409,8 +409,8 @@ cpu6: cpu@6 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <6>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -434,8 +434,8 @@ cpu7: cpu@7 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <7>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -459,8 +459,8 @@ cpu8: cpu@8 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <8>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -484,8 +484,8 @@ cpu9: cpu@9 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <9>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -509,8 +509,8 @@ cpu10: cpu@10 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <10>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -534,8 +534,8 @@ cpu11: cpu@11 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <11>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -559,8 +559,8 @@ cpu12: cpu@12 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <12>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -584,8 +584,8 @@ cpu13: cpu@13 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <13>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -609,8 +609,8 @@ cpu14: cpu@14 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <14>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -634,8 +634,8 @@ cpu15: cpu@15 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <15>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -659,8 +659,8 @@ cpu16: cpu@16 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <16>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -684,8 +684,8 @@ cpu17: cpu@17 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <17>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -709,8 +709,8 @@ cpu18: cpu@18 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <18>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -734,8 +734,8 @@ cpu19: cpu@19 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <19>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -759,8 +759,8 @@ cpu20: cpu@20 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <20>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -784,8 +784,8 @@ cpu21: cpu@21 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <21>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -809,8 +809,8 @@ cpu22: cpu@22 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <22>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -834,8 +834,8 @@ cpu23: cpu@23 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <23>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -859,8 +859,8 @@ cpu24: cpu@24 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <24>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -884,8 +884,8 @@ cpu25: cpu@25 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <25>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -909,8 +909,8 @@ cpu26: cpu@26 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <26>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -934,8 +934,8 @@ cpu27: cpu@27 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <27>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -959,8 +959,8 @@ cpu28: cpu@28 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <28>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -984,8 +984,8 @@ cpu29: cpu@29 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <29>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1009,8 +1009,8 @@ cpu30: cpu@30 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <30>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1034,8 +1034,8 @@ cpu31: cpu@31 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <31>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1059,8 +1059,8 @@ cpu32: cpu@32 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <32>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1084,8 +1084,8 @@ cpu33: cpu@33 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <33>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1109,8 +1109,8 @@ cpu34: cpu@34 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <34>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1134,8 +1134,8 @@ cpu35: cpu@35 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <35>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1159,8 +1159,8 @@ cpu36: cpu@36 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <36>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1184,8 +1184,8 @@ cpu37: cpu@37 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <37>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1209,8 +1209,8 @@ cpu38: cpu@38 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <38>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1234,8 +1234,8 @@ cpu39: cpu@39 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <39>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1259,8 +1259,8 @@ cpu40: cpu@40 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <40>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1284,8 +1284,8 @@ cpu41: cpu@41 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <41>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1309,8 +1309,8 @@ cpu42: cpu@42 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <42>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1334,8 +1334,8 @@ cpu43: cpu@43 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <43>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1359,8 +1359,8 @@ cpu44: cpu@44 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <44>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1384,8 +1384,8 @@ cpu45: cpu@45 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <45>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1409,8 +1409,8 @@ cpu46: cpu@46 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <46>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1434,8 +1434,8 @@ cpu47: cpu@47 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <47>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1459,8 +1459,8 @@ cpu48: cpu@48 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <48>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1484,8 +1484,8 @@ cpu49: cpu@49 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <49>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1509,8 +1509,8 @@ cpu50: cpu@50 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <50>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1534,8 +1534,8 @@ cpu51: cpu@51 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <51>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1559,8 +1559,8 @@ cpu52: cpu@52 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <52>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1584,8 +1584,8 @@ cpu53: cpu@53 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <53>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1609,8 +1609,8 @@ cpu54: cpu@54 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <54>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1634,8 +1634,8 @@ cpu55: cpu@55 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <55>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1659,8 +1659,8 @@ cpu56: cpu@56 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <56>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1684,8 +1684,8 @@ cpu57: cpu@57 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <57>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1709,8 +1709,8 @@ cpu58: cpu@58 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <58>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1734,8 +1734,8 @@ cpu59: cpu@59 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <59>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1759,8 +1759,8 @@ cpu60: cpu@60 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <60>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1784,8 +1784,8 @@ cpu61: cpu@61 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <61>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1809,8 +1809,8 @@ cpu62: cpu@62 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <62>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -1834,8 +1834,8 @@ cpu63: cpu@63 { riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", - "zicntr", "zicsr", "zifencei", - "zihpm"; + "zca", "zcd", "zicntr", "zicsr", + "zifencei", "zihpm"; reg = <63>; i-cache-block-size = <64>; i-cache-size = <65536>; diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index 9a2e9583af88..7e53c539c871 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -35,8 +35,8 @@ U74_0: cpu@0 { next-level-cache = <&ccache>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; tlb-split; cpu0_intc: interrupt-controller { @@ -64,8 +64,8 @@ U74_1: cpu@1 { next-level-cache = <&ccache>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; tlb-split; cpu1_intc: interrupt-controller { diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 4a5708f7fcf7..f01024f50561 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -29,8 +29,8 @@ S7_0: cpu@0 { next-level-cache = <&ccache>; riscv,isa = "rv64imac_zba_zbb"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "c", "zba", "zbb", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "c", "zba", "zbb", "zca", "zicntr", + "zicsr", "zifencei", "zihpm"; status = "disabled"; cpu0_intc: interrupt-controller { @@ -58,8 +58,8 @@ U74_1: cpu@1 { next-level-cache = <&ccache>; riscv,isa = "rv64imafdc_zba_zbb"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr", - "zicsr", "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zca", + "zcd", "zicntr", "zicsr", "zifencei", "zihpm"; tlb-split; operating-points-v2 = <&cpu_opp>; clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; @@ -91,8 +91,8 @@ U74_2: cpu@2 { next-level-cache = <&ccache>; riscv,isa = "rv64imafdc_zba_zbb"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr", - "zicsr", "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zca", + "zcd", "zicntr", "zicsr", "zifencei", "zihpm"; tlb-split; operating-points-v2 = <&cpu_opp>; clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; @@ -124,8 +124,8 @@ U74_3: cpu@3 { next-level-cache = <&ccache>; riscv,isa = "rv64imafdc_zba_zbb"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr", - "zicsr", "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zca", + "zcd", "zicntr", "zicsr", "zifencei", "zihpm"; tlb-split; operating-points-v2 = <&cpu_opp>; clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; @@ -157,8 +157,8 @@ U74_4: cpu@4 { next-level-cache = <&ccache>; riscv,isa = "rv64imafdc_zba_zbb"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zicntr", - "zicsr", "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zba", "zbb", "zca", + "zcd", "zicntr", "zicsr", "zifencei", "zihpm"; tlb-split; operating-points-v2 = <&cpu_opp>; clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>; diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index 8b915e206f3a..530355bda7c1 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -21,8 +21,8 @@ c910_0: cpu@0 { device_type = "cpu"; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; reg = <0>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -45,8 +45,8 @@ c910_1: cpu@1 { device_type = "cpu"; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; reg = <1>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -69,8 +69,8 @@ c910_2: cpu@2 { device_type = "cpu"; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; reg = <2>; i-cache-block-size = <64>; i-cache-size = <65536>; @@ -93,8 +93,8 @@ c910_3: cpu@3 { device_type = "cpu"; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", "zcd", "zicntr", + "zicsr", "zifencei", "zihpm"; reg = <3>; i-cache-block-size = <64>; i-cache-size = <65536>; From patchwork Thu Apr 18 12:42:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 1924978 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=lyeTCl3n; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 header.b=ehXSDB06; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=patchwork.ozlabs.org) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VKyC169FYz23g3 for ; Thu, 18 Apr 2024 22:44:13 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=a83GPteGHNSiafJUSHT0S0jmblct8Tx5/GUmDltIgl4=; b=lyeTCl3ngEizG1 axA5WtzKlCatFzbL/yssd5exZs/cmGmmY1j3vo0EreX7yIkNVrSb1MwX/xDhm2/J3J1TWdf+X/Z25 srUVFTOR1AGE5Fml/7l0xNGYvMJHXzp1a2vPq0K6ISfMjRnGndjaHREsv5iUdvbsHLMKnwZ+GZQIt 164mQ1lrl+odgxUspT/mMjTZBREbRQfFUXFoZ4ifWPFcmSoBJRsMgvcjVb03vokKoD+fPDkak/ks9 ZrKBOKx8FZ6qnYwB/kdP9MUMnweSN5ErlNS5Q4Z4MB4m5Sje8fCTcme0YiD7/s7Ep+o6ztTqF29/z QPrCB1egaB3PBwXGTNSQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7c-00000002CcJ-0Nyo; Thu, 18 Apr 2024 12:44:12 +0000 Received: from mail-lj1-x22d.google.com ([2a00:1450:4864:20::22d]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7Q-00000002CRN-1oA3 for kvm-riscv@lists.infradead.org; Thu, 18 Apr 2024 12:44:03 +0000 Received: by mail-lj1-x22d.google.com with SMTP id 38308e7fff4ca-2dac628f08fso2491111fa.3 for ; Thu, 18 Apr 2024 05:43:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1713444237; x=1714049037; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VqinG7vx90NXqlB3cCAWzb6LZzjfwkXKYqGSSxQF2QU=; b=ehXSDB06S/Jdq+rbJDNIFRszt7gqHSFCRbGAQ0DD3ppmJMjkDrohLKK5uz2BxZ8H5i qd1IkoA0HiOIEpn0iY0Molwf+jGnO4ArgLVVW0NqGigLUhmz0EfZNAS6/6Az53PmRM3t vtmp1x1EAroVnUQxMUO//BAEI/CPGtBPM4B9fA91A/jDLpLiTCSybfUJd1LVsEnn2+zO zAxGuB1yTlN5YnotjKb3OLJWUllAheEfYHfUcfYpyzho1uCzYt8un/1UDtm02YU5phTJ SM7euEgn++ObUbRGLFrvOkPRSBWk/gJR2V9MOzxcpdH2DO6wKoRTGbtNHxUbQNTgWcDm K0sw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713444237; x=1714049037; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VqinG7vx90NXqlB3cCAWzb6LZzjfwkXKYqGSSxQF2QU=; b=GzvTotS6TUcLgQB6+Ln5fu/goqHKjSXYDsE6buS9K0bOmIJ+UfDOafby0CrX0/hdls K57SN1O62uBdPZd6oJ9kOcgVswFjou7HFupCQ1GFov9AJrf59q6fzvcSGP564G9CvNTe 3bc3QPfJ6oum8hpo6+0+d2PQjkooTWDOcl2rI7QtirKUYWT4u71a5bCqH2XuvogE/beO xx+bdH+CBw7dWAZCOLPOhusA5jRaaqo5Xq8TZ2SoKLWm7CKpAQElrnRJMk9kPILO1IGZ IKaX5vL2Fnwr4NNhvT1j0rzYSn1WVMdv0qaSfWbDA9IUDhtX7HopiAH8ZP0fn2jCpnRC LnsA== X-Forwarded-Encrypted: i=1; AJvYcCWwoJKSfyMpAh9C2fT10rejVM8iLg0ecbe32OntPMFWb/DRivw3akuJ+OIBIJg+RMCHxolSpiBjUk3DOTmsnUL11ozBmWepAwwRX5y6qg== X-Gm-Message-State: AOJu0YxA7Farq5d1HFt5cFeBPW2IR2rQ/HKbsPt22GQeF28doeKhR5cG 9juojpfTsbyQTVkf1ZhahJUsKoz74X8Cyol/PzxRKAN87uRr0hCwzcPRvwPzgBo= X-Google-Smtp-Source: AGHT+IFXBu2QshCmevcqDNI9qC29EYmJ3ZQBbQK0N8BE6U3hHj6+0OsosVqzAbOLR3+7A5/jwaHB/w== X-Received: by 2002:a2e:8387:0:b0:2d6:c59e:37c0 with SMTP id x7-20020a2e8387000000b002d6c59e37c0mr1507578ljg.2.1713444237161; Thu, 18 Apr 2024 05:43:57 -0700 (PDT) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:7b64:4d1d:16d8:e38b]) by smtp.gmail.com with ESMTPSA id bi18-20020a05600c3d9200b00418d5b16fa2sm3373412wmb.30.2024.04.18.05.43.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 05:43:56 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Anup Patel , Shuah Khan Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Subject: [PATCH v2 03/12] dt-bindings: riscv: add Zc* extension rules implied by C extension Date: Thu, 18 Apr 2024 14:42:26 +0200 Message-ID: <20240418124300.1387978-4-cleger@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240418124300.1387978-1-cleger@rivosinc.com> References: <20240418124300.1387978-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240418_054400_533855_A271C899 X-CRM114-Status: GOOD ( 11.22 ) X-Spam-Score: 0.0 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: As stated by Zc* spec: "As C defines the same instructions as Zca, Zcf and Zcd, the rule is that: - C always implies Zca - C+F implies Zcf (RV32 only) - C+D implies Zcd" Add additionnal validation rules to enforce this in dts. Content analysis details: (0.0 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:22d listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org As stated by Zc* spec: "As C defines the same instructions as Zca, Zcf and Zcd, the rule is that: - C always implies Zca - C+F implies Zcf (RV32 only) - C+D implies Zcd" Add additionnal validation rules to enforce this in dts. Signed-off-by: Clément Léger --- .../devicetree/bindings/riscv/cpus.yaml | 8 +++-- .../devicetree/bindings/riscv/extensions.yaml | 34 +++++++++++++++++++ 2 files changed, 39 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index d87dd50f1a4b..c4e2c65437b1 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -168,7 +168,7 @@ examples: i-cache-size = <16384>; reg = <0>; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "c"; + riscv,isa-extensions = "i", "m", "a", "c", "zca"; cpu_intc0: interrupt-controller { #interrupt-cells = <1>; @@ -194,7 +194,8 @@ examples: reg = <1>; tlb-split; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", + "zcd"; cpu_intc1: interrupt-controller { #interrupt-cells = <1>; @@ -215,7 +216,8 @@ examples: compatible = "riscv"; mmu-type = "riscv,sv48"; riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zca", + "zcd"; interrupt-controller { #interrupt-cells = <1>; diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index db7daf22b863..0172cbaa13ca 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -549,6 +549,23 @@ properties: const: zca - contains: const: f + # C extension implies Zca + - if: + contains: + const: c + then: + contains: + const: zca + # C extension implies Zcd if d + - if: + allOf: + - contains: + const: c + - contains: + const: d + then: + contains: + const: zcd allOf: # Zcf extension does not exists on rv64 @@ -566,6 +583,23 @@ allOf: not: contains: const: zcf + # C extension implies Zcf if f on rv32 only + - if: + properties: + riscv,isa-extensions: + allOf: + - contains: + const: c + - contains: + const: f + riscv,isa-base: + contains: + const: rv32i + then: + properties: + riscv,isa-extensions: + contains: + const: zcf additionalProperties: true ... From patchwork Thu Apr 18 12:42:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 1924982 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=lmy9z7eq; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 header.b=wnVYidbX; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=patchwork.ozlabs.org) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VKyC73gnNz1yPv for ; Thu, 18 Apr 2024 22:44:19 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=xcewQOesL8/OOb3cV7zp25VAnVPmyIANhCfGziwEjGs=; b=lmy9z7eqRWkb+S 2rNoGK7qA2wbULaYeOuVvKdAhP+ZjvBH9cbnY/Ic/WVU90pltNWt2CuFy66BM5mbN9bWYk50eZVnz 64mzXWT1DCJt3zTOg8Q8nada4kJy3pxO6rEJ/w1BW+uCZCysTaDrupYirZodiAIowVlMVESmDW0en 7Dk+A/oa3wf5xC3LfXHcumX6gKUI+uCrNpeW/4L0yiIPT3WY5jZ1CiSdTc/tFmqY/3rUg2RRQt6uz Y6uoi6ekUi0Qi2Xt4ET11Mr1jm0cgf6KJFN8CcBA6rTQnUR9WDUpCoOpVaG2/D9hL81DqdUsBIr6s 1d3hYNBy2nVmENLaJItQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7i-00000002CiT-0cMy; Thu, 18 Apr 2024 12:44:18 +0000 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7U-00000002CRU-2PqL for kvm-riscv@lists.infradead.org; Thu, 18 Apr 2024 12:44:07 +0000 Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-34801b1bc4aso150473f8f.0 for ; Thu, 18 Apr 2024 05:44:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1713444239; x=1714049039; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hAM+PbC/Wqgx6Q9RB0x39wuP2KdW0QgVrrLDnXaQ5i0=; b=wnVYidbXmNp1IhU/WYnCVFMlBTc+hKwJd6BPRESneAq+ZgFkfXOlEVs3/HMeoYaEgZ FzGKlrDDz3Sa2wPciQpU0IxW26FJixABu89QKnlqN404iXcorJwueFcs1eImRUavSkQD CIjGt03ekqiQ/601MHAD/0hinNZbyEUoZWkKOJtsiC/kpUGtRHXw3hr/yz78SZNPDIdT QfY3cgN194Qy3oA09WpBBXQZHCg5S6UhUzMp0MIacA+RmbOYG3JhGTLLgnKLdLHgDqNW oTl2KmmUVrSFgheDanRUpK3hkzV6GBtOr8ScPv6k7O+bT1H18BH0hBVw7Sa+vJD5u4l1 rqIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713444239; x=1714049039; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hAM+PbC/Wqgx6Q9RB0x39wuP2KdW0QgVrrLDnXaQ5i0=; b=v5dxdovc0JGE07CwxnRnw/oZ6zxqNvSYFuiO5hTfjdL/fkU7VnPuRDmFOYrSdOq988 3rLsgsbYxcfQTlsUvWAJ7unHWXxvIJd+E97S45ek19gOS+ICJtOulO0yO+w/pTgR6e/k voWN3r794ai9NtNxUXKXtR5Y1p7PNc5jHCHcvu22xiQYfCwWgLMDfUuAtMbWVMRonTjX AIdoEMAQuj8DbfXlsHPRGmfP8xhdNpcfsiKWAABm/yO38bYMuXwW8C2X7FJ5BeiE8sx9 Ecs5wq4yPQ6p1GWaUpqOKEqtjioWxg8OY8HO2vpQ/YkJp0VFl8MZgQiheucu2ejxRZQa efew== X-Forwarded-Encrypted: i=1; AJvYcCWOeQE/iysKeKNiKGs9ylP+A5l3H/veNT3guUcQGccpfr4BNRdtkCheo9GhdWw5EEcqsCw3REghHZQJv5ujuZEZMZwish8ufuM3IElxSg== X-Gm-Message-State: AOJu0YyB0Q+7+Xy++jn8MjcSVGjQnloEH3chLnQm1pYadOYWnZfvKrWF k+x2rCvrPICpQWyZZo71Ujy/B78fUJ3nUs+Pr87IrUiu7tDxe6JDLRGTWKByAM8= X-Google-Smtp-Source: AGHT+IEfRUjBsR081et3wJOadMgBsrPT+MF87MwTDvd2ymBdOvFDiLCp8AN/vnIfSdOc1TYzaATntQ== X-Received: by 2002:adf:f60c:0:b0:343:3f59:c97e with SMTP id t12-20020adff60c000000b003433f59c97emr1553063wrp.6.1713444238851; Thu, 18 Apr 2024 05:43:58 -0700 (PDT) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:7b64:4d1d:16d8:e38b]) by smtp.gmail.com with ESMTPSA id bi18-20020a05600c3d9200b00418d5b16fa2sm3373412wmb.30.2024.04.18.05.43.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 05:43:57 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Anup Patel , Shuah Khan Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Subject: [PATCH v2 04/12] riscv: add ISA parsing for Zca, Zcf, Zcd and Zcb Date: Thu, 18 Apr 2024 14:42:27 +0200 Message-ID: <20240418124300.1387978-5-cleger@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240418124300.1387978-1-cleger@rivosinc.com> References: <20240418124300.1387978-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240418_054404_699622_14C48DCD X-CRM114-Status: UNSURE ( 9.89 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.0 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: The Zc* standard extension for code reduction introduces new extensions. This patch adds support for Zca, Zcf, Zcd and Zcb. Zce, Zcmt and Zcmp are left out of this patch since they are targeting micro [...] Content analysis details: (0.0 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:42b listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org The Zc* standard extension for code reduction introduces new extensions. This patch adds support for Zca, Zcf, Zcd and Zcb. Zce, Zcmt and Zcmp are left out of this patch since they are targeting microcontrollers/ embedded CPUs instead of application processors. Signed-off-by: Clément Léger --- arch/riscv/include/asm/hwcap.h | 4 ++++ arch/riscv/kernel/cpufeature.c | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index 543e3ea2da0e..b7551bad341b 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -82,6 +82,10 @@ #define RISCV_ISA_EXT_ZACAS 73 #define RISCV_ISA_EXT_XANDESPMU 74 #define RISCV_ISA_EXT_ZIMOP 75 +#define RISCV_ISA_EXT_ZCA 76 +#define RISCV_ISA_EXT_ZCB 77 +#define RISCV_ISA_EXT_ZCD 78 +#define RISCV_ISA_EXT_ZCF 79 #define RISCV_ISA_EXT_XLINUXENVCFG 127 diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 115ba001f1bc..09dee071274d 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -261,6 +261,10 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { __RISCV_ISA_EXT_DATA(zfa, RISCV_ISA_EXT_ZFA), __RISCV_ISA_EXT_DATA(zfh, RISCV_ISA_EXT_ZFH), __RISCV_ISA_EXT_DATA(zfhmin, RISCV_ISA_EXT_ZFHMIN), + __RISCV_ISA_EXT_DATA(zca, RISCV_ISA_EXT_ZCA), + __RISCV_ISA_EXT_DATA(zcb, RISCV_ISA_EXT_ZCB), + __RISCV_ISA_EXT_DATA(zcd, RISCV_ISA_EXT_ZCD), + __RISCV_ISA_EXT_DATA(zcf, RISCV_ISA_EXT_ZCF), __RISCV_ISA_EXT_DATA(zba, RISCV_ISA_EXT_ZBA), __RISCV_ISA_EXT_DATA(zbb, RISCV_ISA_EXT_ZBB), __RISCV_ISA_EXT_DATA(zbc, RISCV_ISA_EXT_ZBC), From patchwork Thu Apr 18 12:42:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 1924984 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=aUXQzV7T; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 header.b=hiwvMnD9; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=patchwork.ozlabs.org) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VKyCK3Mynz1yPv for ; Thu, 18 Apr 2024 22:44:29 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=l8dqUF//lxrzhXfJq91r7I+YXQ86GWsQhTid3x2xs0Q=; b=aUXQzV7T4FtrNG j6GZtPq4fj4xBYSE/4xmixfjUoJggz8bhjntzLriqqhHzWGY5Lp7hiu8J71SDf/djHPtUmf4W/+YR JEFI73d1QnPrfiJi3D/xZm9z93z4jf+Z9VJMdQmOvmhJwVo1To9m8FIVHDmJTg+kHC98ANhfIZFe5 hqdvqTHnovGsBDNAIdhpGYMdFYWW5XQI05RE4ryCDVP6Qf9hhCM8j4A0Hnh/F+nVNy7JpfGATXLwW fIVom+EGCNHGP/ovW5jGvq+SNONaR+OjtUCUwcn5Q6qAW3QALN2zmACEGjHBHrYMdAq9G3tJc1cks Y8FhXquI4FewlUuVLuZQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7r-00000002Cr3-44AB; Thu, 18 Apr 2024 12:44:27 +0000 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7U-00000002CSd-3e8s for kvm-riscv@lists.infradead.org; Thu, 18 Apr 2024 12:44:09 +0000 Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-34a0cc29757so75309f8f.1 for ; Thu, 18 Apr 2024 05:44:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1713444240; x=1714049040; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=t82SHWSKnQwBrCB557sYOimgSCzDvuCob+i4t0Pqx/Q=; b=hiwvMnD9wVVFPdsdVjLO8J32Otc2VNJVmrREegGNcfgFoozQEynFEz83d8DqpMrVHE wcXbfYuOOS4ZbbTVuWxGqZy4oPj+DS9Y1PLcmhRTttP0jvO7sSxmOemtgQaoF9Txa0zP 0iR0Ij/lyoN+aHiq5BVO8PQe2xBlnh7G+FlBRmU3M0VziwEioKYWntonMl7sAfJi1A9D cpDJD8rQkR3c3OqGmNPB0WTPY6ecqBWADPkYdGBwHuftEXONB6ncO6Yr2Z8p2o/GbXkA zNKrR5oUPK8PJFyHU5jxC4g+25RsJWs++Lit3YvoX7sSn/v1LmNfZY0Y/kZyH5aPSZcL S1yQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713444240; x=1714049040; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=t82SHWSKnQwBrCB557sYOimgSCzDvuCob+i4t0Pqx/Q=; b=FLC6s+dATM6FMU971jqnj3w3PTDgfPy3pHdTu9A2nit/Jl7osbEdSwN7CtGJxoopzS 4DePMEl7t1EZ5dz+LJZuaoXmGXJnHUgWgh06VHzZpYwt8aMsI4nz+nlH65cwm3kLqO6C BtW5N3vMnKtJo5n8CXEailg6/MTdmT8K3vVah6YIwqRVr4RhTYO8ZsJNXSaJM0N4Mw+4 caxtSXIvuLTsZvQ6RdXklsrooj9OaluvSHsRhZ0Jc5U+sdqBuCZsRmgPVTIOy3sIhrz+ tqGtf1brrq/tNrH5A7IHyKMYYlQ+ytpMErrgqpyNd3Q0WH7aBOM/iRxvLj3o/o/xwJBY 9RzA== X-Forwarded-Encrypted: i=1; AJvYcCUJqSMfoOvso9a6Xp6UUxYjfjSbVW6nvpqQmk/v9jlv48/z3k1Y2oFuC2OAjkflpr9oO4fXYf3oPHpX3sNs5qWFw34HVCLbrFHCGd7kjA== X-Gm-Message-State: AOJu0YyuZ1xCK1PDEzI965jpuVhJ9VZS2xLsqavw/3fYTI3QGXdqupqH su+1vhUSGgZypc38uRzo5rll1O8HmhQkWH85X290KoztguRjb7luVYXZW1WC7qQ= X-Google-Smtp-Source: AGHT+IErS9LwS4/40J0dhVyrk/U2WpAaf5Tm6m07tMubctlbr1giuR0xo76AOxJlKf5jHdgFbxuJkw== X-Received: by 2002:a05:600c:5101:b0:416:a773:7d18 with SMTP id o1-20020a05600c510100b00416a7737d18mr1843734wms.0.1713444239836; Thu, 18 Apr 2024 05:43:59 -0700 (PDT) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:7b64:4d1d:16d8:e38b]) by smtp.gmail.com with ESMTPSA id bi18-20020a05600c3d9200b00418d5b16fa2sm3373412wmb.30.2024.04.18.05.43.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 05:43:59 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Anup Patel , Shuah Khan Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Subject: [PATCH v2 05/12] riscv: hwprobe: export Zca, Zcf, Zcd and Zcb ISA extensions Date: Thu, 18 Apr 2024 14:42:28 +0200 Message-ID: <20240418124300.1387978-6-cleger@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240418124300.1387978-1-cleger@rivosinc.com> References: <20240418124300.1387978-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240418_054404_987946_5F680098 X-CRM114-Status: GOOD ( 10.57 ) X-Spam-Score: 0.0 (/) X-Spam-Report: =?unknown-8bit?q?Spam_detection_software=2C_running_on_the_sy?= =?unknown-8bit?q?stem_=22bombadil=2Einfradead=2Eorg=22=2C?= =?unknown-8bit?q?_has_NOT_identified_this_incoming_email_as_spam=2E__The_ori?= =?unknown-8bit?q?ginal?= =?unknown-8bit?q?_message_has_been_attached_to_this_so_you_can_view_it_or_la?= =?unknown-8bit?q?bel?= =?unknown-8bit?q?_similar_future_email=2E__If_you_have_any_questions=2C_see?= =?unknown-8bit?q?_the_administrator_of_that_system_for_details=2E?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_preview=3A__Export_Zca=2C_Zcf=2C_Zcd_and_Zcb_ISA_e?= =?unknown-8bit?q?xtension_through_hwprobe=2E?= =?unknown-8bit?q?_Signed-off-by=3A_Cl=C3=A9ment_L=C3=A9ger_=3Ccleger=40rivos?= =?unknown-8bit?q?inc=2Ecom=3E_---_Documentation/arch/riscv/hwprobe=2Erst?= =?unknown-8bit?q?_=7C_20_++++++++++++++++++++_arch/riscv/include/uapi/asm/hw?= =?unknown-8bit?q?probe=2Eh_=7C_4_++++?= =?unknown-8bit?b?IGFyY2gvcmlzY3Yva2VybmVsL3N5c19od3Byb2JlLmMgfCBbLi4uXSA=?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_analysis_details=3A___=280=2E0_points=2C_5=2E0_req?= =?unknown-8bit?q?uired=29?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_pts_rule_name______________description?= =?unknown-8bit?q?_----_----------------------_------------------------------?= =?unknown-8bit?q?--------------------?= =?unknown-8bit?q?_-0=2E0_RCVD=5FIN=5FDNSWL=5FNONE_____RBL=3A_Sender_listed_a?= =?unknown-8bit?q?t_https=3A//www=2Ednswl=2Eorg/=2C_no?= =?unknown-8bit?q?_trust?= =?unknown-8bit?b?IFsyYTAwOjE0NTA6NDg2NDoyMDowOjA6MDo0MzIgbGlzdGVkIGluXQ==?= =?unknown-8bit?b?IFtsaXN0LmRuc3dsLm9yZ10=?= =?unknown-8bit?q?_0=2E0_SPF=5FHELO=5FNONE__________SPF=3A_HELO_does_not_publ?= =?unknown-8bit?q?ish_an_SPF_Record?= =?unknown-8bit?q?_-0=2E0_SPF=5FPASS_______________SPF=3A_sender_matches_SPF_?= =?unknown-8bit?q?record?= =?unknown-8bit?q?_-0=2E1_DKIM=5FVALID_____________Message_has_at_least_one_v?= =?unknown-8bit?q?alid_DKIM_or_DK_signature?= =?unknown-8bit?q?_0=2E1_DKIM=5FSIGNED____________Message_has_a_DKIM_or_DK_si?= =?unknown-8bit?q?gnature=2C_not_necessarily_valid?= X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Export Zca, Zcf, Zcd and Zcb ISA extension through hwprobe. Signed-off-by: Clément Léger --- Documentation/arch/riscv/hwprobe.rst | 20 ++++++++++++++++++++ arch/riscv/include/uapi/asm/hwprobe.h | 4 ++++ arch/riscv/kernel/sys_hwprobe.c | 4 ++++ 3 files changed, 28 insertions(+) diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst index 9ca5b093b6d5..bf96b4e8ba3b 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -192,6 +192,26 @@ The following keys are defined: supported as defined in the RISC-V ISA manual starting from commit 58220614a5f ("Zimop is ratified/1.0"). + * :c:macro:`RISCV_HWPROBE_EXT_ZCA`: The Zca extension part of Zc* standard + extensions for code size reduction, as ratified in commit 8be3419c1c0 + ("Zcf doesn't exist on RV64 as it contains no instructions") of + riscv-code-size-reduction. + + * :c:macro:`RISCV_HWPROBE_EXT_ZCB`: The Zcb extension part of Zc* standard + extensions for code size reduction, as ratified in commit 8be3419c1c0 + ("Zcf doesn't exist on RV64 as it contains no instructions") of + riscv-code-size-reduction. + + * :c:macro:`RISCV_HWPROBE_EXT_ZCD`: The Zcd extension part of Zc* standard + extensions for code size reduction, as ratified in commit 8be3419c1c0 + ("Zcf doesn't exist on RV64 as it contains no instructions") of + riscv-code-size-reduction. + + * :c:macro:`RISCV_HWPROBE_EXT_ZCF`: The Zcf extension part of Zc* standard + extensions for code size reduction, as ratified in commit 8be3419c1c0 + ("Zcf doesn't exist on RV64 as it contains no instructions") of + riscv-code-size-reduction. + * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance information about the selected set of processors. diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h index ac6874ab743a..dd4ad77faf49 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -60,6 +60,10 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34) #define RISCV_HWPROBE_EXT_ZICOND (1ULL << 35) #define RISCV_HWPROBE_EXT_ZIMOP (1ULL << 36) +#define RISCV_HWPROBE_EXT_ZCA (1ULL << 37) +#define RISCV_HWPROBE_EXT_ZCB (1ULL << 38) +#define RISCV_HWPROBE_EXT_ZCD (1ULL << 39) +#define RISCV_HWPROBE_EXT_ZCF (1ULL << 40) #define RISCV_HWPROBE_KEY_CPUPERF_0 5 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c index c99a4cf231c5..2ffa0fe5101e 100644 --- a/arch/riscv/kernel/sys_hwprobe.c +++ b/arch/riscv/kernel/sys_hwprobe.c @@ -112,6 +112,8 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, EXT_KEY(ZACAS); EXT_KEY(ZICOND); EXT_KEY(ZIMOP); + EXT_KEY(ZCA); + EXT_KEY(ZCB); if (has_vector()) { EXT_KEY(ZVBB); @@ -132,6 +134,8 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, EXT_KEY(ZFH); EXT_KEY(ZFHMIN); EXT_KEY(ZFA); + EXT_KEY(ZCD); + EXT_KEY(ZCF); } #undef EXT_KEY } From patchwork Thu Apr 18 12:42:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 1924983 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=EIF3eYfO; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=infradead.org header.i=@infradead.org header.a=rsa-sha256 header.s=desiato.20200630 header.b=KGPj18B4; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 header.b=Zm/JSt7A; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=patchwork.ozlabs.org) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VKyC82Xtrz1ymh for ; Thu, 18 Apr 2024 22:44:20 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=RpviNzSWEYZEfKapY2a91lBBnEicvBLgdVtLwvMauD4=; b=EIF3eYfOaQQ6Ik cC/xo7LfvdIZzyEEYsXq9tGjC2SoCylkJjoKJBxWTDrY9C20aYIqOrWwikCkQ5gjvltCLjsPfCnEv L0nYW9ej05zY4VWa7I4WtqR8pz+oQoUR9oqnlgNaZbZG4ixw1LWzAC0HoaaeRBjt52ZApgRg6RCWx qO6WlKSUx00U0AeTaYkR0qd3QKNUO70Meo1EvrJigoZFTeJEhn0p9MrB8DzjXVspLWrT8uL3RTtD/ LvlOXcq19HAVi7Z0QBwupfYytLmbZd+nbmHl+WqfhBkssUoVy2ncfqxS25caThavs7mANuQRYncr8 9m5v3SAdqFrgCsAXJXGQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7i-00000002Ciy-33eZ; Thu, 18 Apr 2024 12:44:18 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7X-00000002CY7-2tPP for kvm-riscv@bombadil.infradead.org; Thu, 18 Apr 2024 12:44:07 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:Content-Type :MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Sender:Reply-To:Content-ID:Content-Description; bh=av0fCRvJ5d6BdL5At0wE/CNS0oRVP43ZLfrJceTJ89w=; b=KGPj18B4QQ8SlDM+ZIxK0qddOB FzjblmshNpV1SWN+H8ZU1RBscY3/3/VSy/HoqwVuaBW+aGMqN6j2uwTXQJHlEuyc1RO2ec+eHn4Qj TLRRnQRCcmfW7kDkGqkNMfkjklCqaEl/eZSDl0XTx7S+5q/3AEt40w2qLcE1d0eQKmx3YmuncPat6 CKE+wTxHQ40WB9hQpXn3TA+ttNRBWXWoFGtwaNwvxxDlvIS+q9rLZLPMSIBZsPuQsWZVBHM1e71BQ 4SWqHI4oEY3VvKWutYN0PTEScH08CSSVEQm+I6IFr/gjVKbetNelmOe9bA5FJicyoLDfs0zw8T/mr VSUxPqxw==; Received: from mail-lj1-x22b.google.com ([2a00:1450:4864:20::22b]) by desiato.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7U-0000000Bzqo-1Ckx for kvm-riscv@lists.infradead.org; Thu, 18 Apr 2024 12:44:06 +0000 Received: by mail-lj1-x22b.google.com with SMTP id 38308e7fff4ca-2dac627e62dso235011fa.3 for ; Thu, 18 Apr 2024 05:44:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1713444241; x=1714049041; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=av0fCRvJ5d6BdL5At0wE/CNS0oRVP43ZLfrJceTJ89w=; b=Zm/JSt7AgCHSSwNhV9Zj6Y/sT3SPBttcqaDCdqOSggbMRlRiRiVeOsSA2hiLenxMUq p1arziri8oOeO6KbENI1a8Be0aFjDkVt1MlVmYH3ex4qJxh3AM+/rBMZd/Dikk0jCyaW FKdRgZUuWdFgv+xZqF1vTJbQ75mdQ5GNkHO7GSlaJZ2S2wznM7LBWm9HoBl0M9oWTOut 5FaP3SbtUSPoTMdu2jn7j7PR40tECV5DruoZz+k84xpprfm3E8UUaUGS5dLEcR38a+bI cFQ3yTW2/2ViptWdvoJZXPDOp7QHH9MBTe1s56o4ngwx/z8c+wUpqBferIuU3ejGKErn DKpg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713444241; x=1714049041; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=av0fCRvJ5d6BdL5At0wE/CNS0oRVP43ZLfrJceTJ89w=; b=EdHGzxeLsU66FNH0SLnUl6kYH9NAJwBo57vzb5AIsjy3UhwTBYC6si9soIYVJ+hajf iydtYtdGH33b10OTwHZ9M5+iVl+JCCFvEPsQ42pOl3Ofpj1ixdAVT5o1QaCYK+ZPtOfK ks7ZBNjG+Uj10tUyxPD92+5hY4BxdKPgzdC2U1atgSGTfrc6iCJfkgDMdwwcOjEp/40T Z8nKLUcpFKqGRrZ608kya7BUJvq6FzlZ3UH97Zm4jUM4jzv1mX7OFbYgOxVOhkFmKM8m snrvtMFguSTbFYh9pJweRq+9YT9Ff3aBTlPmg94SVUaih19q6yBMf5AgcCs6PBAIDEp4 XyjA== X-Forwarded-Encrypted: i=1; AJvYcCUGbCR+mhOV5wMbjzcVHYrPjnWSgFt/YYTLEp/8e65FMvobtbhaKTAkSRJPOXUDD9VRbldxasehnjQAWan1LGsYgocIhaDcnM8EmZ8+QA== X-Gm-Message-State: AOJu0Yyx3w9K+WIqvZ8mEwjaiT+qdVJEAvEcEaTAPBJY0bdLVGw2sqN2 2R/KzAMHXxA4M+0UnCNCZPtQZAZ8cZ0L/27/IFi4T2zy6qH7BOWVg41Tfv/Vruc= X-Google-Smtp-Source: AGHT+IHdzMsUCMCexL1xcSXK55gyqNVYHzfsqQON0oQtcwPFlYxqOUNzTjfk86rgRUdr+Vw8mFv+bw== X-Received: by 2002:a2e:3a19:0:b0:2da:320a:6739 with SMTP id h25-20020a2e3a19000000b002da320a6739mr1487240lja.1.1713444241121; Thu, 18 Apr 2024 05:44:01 -0700 (PDT) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:7b64:4d1d:16d8:e38b]) by smtp.gmail.com with ESMTPSA id bi18-20020a05600c3d9200b00418d5b16fa2sm3373412wmb.30.2024.04.18.05.43.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 05:44:00 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Anup Patel , Shuah Khan Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Subject: [PATCH v2 06/12] RISC-V: KVM: Allow Zca, Zcf, Zcd and Zcb extensions for Guest/VM Date: Thu, 18 Apr 2024 14:42:29 +0200 Message-ID: <20240418124300.1387978-7-cleger@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240418124300.1387978-1-cleger@rivosinc.com> References: <20240418124300.1387978-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240418_134404_602265_BBD35567 X-CRM114-Status: UNSURE ( 9.46 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.0 (/) X-Spam-Report: =?unknown-8bit?q?Spam_detection_software=2C_running_on_the_sy?= =?unknown-8bit?q?stem_=22desiato=2Einfradead=2Eorg=22=2C?= =?unknown-8bit?q?_has_NOT_identified_this_incoming_email_as_spam=2E__The_ori?= =?unknown-8bit?q?ginal?= =?unknown-8bit?q?_message_has_been_attached_to_this_so_you_can_view_it_or_la?= =?unknown-8bit?q?bel?= =?unknown-8bit?q?_similar_future_email=2E__If_you_have_any_questions=2C_see?= =?unknown-8bit?q?_the_administrator_of_that_system_for_details=2E?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_preview=3A__Extend_the_KVM_ISA_extension_ONE=5FREG?= =?unknown-8bit?q?_interface_to_allow_KVM?= =?unknown-8bit?q?_user_space_to_detect_and_enable_Zca=2C_Zcf=2C_Zcd_and_Zcb_?= =?unknown-8bit?q?extensions_for_Guest/VM=2E?= =?unknown-8bit?q?_Signed-off-by=3A_Cl=C3=A9ment_L=C3=A9ger_=3Ccleger=40rivos?= =?unknown-8bit?q?inc=2Ecom=3E_---_arch/riscv/include/uapi/asm/kvm=2Eh?= =?unknown-8bit?q?_=7C_4_++++_arch/riscv/kvm/vcpu=5Fonereg=2Ec_=7C_8_++++++++?= =?unknown-8bit?q?_2_files_changed=2C_12_insertions=28+=29?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_analysis_details=3A___=280=2E0_points=2C_5=2E0_req?= =?unknown-8bit?q?uired=29?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_pts_rule_name______________description?= =?unknown-8bit?q?_----_----------------------_------------------------------?= =?unknown-8bit?q?--------------------?= =?unknown-8bit?q?_0=2E0_SPF=5FHELO=5FNONE__________SPF=3A_HELO_does_not_publ?= =?unknown-8bit?q?ish_an_SPF_Record?= =?unknown-8bit?q?_-0=2E0_SPF=5FPASS_______________SPF=3A_sender_matches_SPF_?= =?unknown-8bit?q?record?= =?unknown-8bit?q?_-0=2E1_DKIM=5FVALID_____________Message_has_at_least_one_v?= =?unknown-8bit?q?alid_DKIM_or_DK_signature?= =?unknown-8bit?q?_0=2E1_DKIM=5FSIGNED____________Message_has_a_DKIM_or_DK_si?= =?unknown-8bit?q?gnature=2C_not_necessarily_valid?= =?unknown-8bit?q?_-0=2E0_RCVD=5FIN=5FDNSWL=5FNONE_____RBL=3A_Sender_listed_a?= =?unknown-8bit?q?t_https=3A//www=2Ednswl=2Eorg/=2C_no?= =?unknown-8bit?q?_trust?= =?unknown-8bit?b?IFsyYTAwOjE0NTA6NDg2NDoyMDowOjA6MDoyMmIgbGlzdGVkIGluXQ==?= =?unknown-8bit?b?IFtsaXN0LmRuc3dsLm9yZ10=?= X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Extend the KVM ISA extension ONE_REG interface to allow KVM user space to detect and enable Zca, Zcf, Zcd and Zcb extensions for Guest/VM. Signed-off-by: Clément Léger Reviewed-by: Anup Patel Acked-by: Anup Patel --- arch/riscv/include/uapi/asm/kvm.h | 4 ++++ arch/riscv/kvm/vcpu_onereg.c | 8 ++++++++ 2 files changed, 12 insertions(+) diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h index 35a12aa1953e..57db3fea679f 100644 --- a/arch/riscv/include/uapi/asm/kvm.h +++ b/arch/riscv/include/uapi/asm/kvm.h @@ -168,6 +168,10 @@ enum KVM_RISCV_ISA_EXT_ID { KVM_RISCV_ISA_EXT_ZTSO, KVM_RISCV_ISA_EXT_ZACAS, KVM_RISCV_ISA_EXT_ZIMOP, + KVM_RISCV_ISA_EXT_ZCA, + KVM_RISCV_ISA_EXT_ZCB, + KVM_RISCV_ISA_EXT_ZCD, + KVM_RISCV_ISA_EXT_ZCF, KVM_RISCV_ISA_EXT_MAX, }; diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 12436f6f0d20..a2747a6dbdb6 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -48,6 +48,10 @@ static const unsigned long kvm_isa_ext_arr[] = { KVM_ISA_EXT_ARR(ZBKC), KVM_ISA_EXT_ARR(ZBKX), KVM_ISA_EXT_ARR(ZBS), + KVM_ISA_EXT_ARR(ZCA), + KVM_ISA_EXT_ARR(ZCB), + KVM_ISA_EXT_ARR(ZCD), + KVM_ISA_EXT_ARR(ZCF), KVM_ISA_EXT_ARR(ZFA), KVM_ISA_EXT_ARR(ZFH), KVM_ISA_EXT_ARR(ZFHMIN), @@ -128,6 +132,10 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) case KVM_RISCV_ISA_EXT_ZBKC: case KVM_RISCV_ISA_EXT_ZBKX: case KVM_RISCV_ISA_EXT_ZBS: + case KVM_RISCV_ISA_EXT_ZCA: + case KVM_RISCV_ISA_EXT_ZCB: + case KVM_RISCV_ISA_EXT_ZCD: + case KVM_RISCV_ISA_EXT_ZCF: case KVM_RISCV_ISA_EXT_ZFA: case KVM_RISCV_ISA_EXT_ZFH: case KVM_RISCV_ISA_EXT_ZFHMIN: From patchwork Thu Apr 18 12:42:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 1924986 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=PdfduTwG; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 header.b=PKMkWbhN; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=patchwork.ozlabs.org) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VKyCQ73fjz1ymh for ; Thu, 18 Apr 2024 22:44:34 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=aEJ+PvBL6LTUwDF5Vk0UuH8HPPCWiVoDqa+WEVitwlE=; b=PdfduTwGRn208M i5FSYcZqIwmDaKv1Xxv6FOlP2Gt6xgGWLmAvqzEKRvutibaHdZo4U7SiChxHd8+uRaWw6ev+Dgbtn r7k03+nKsod/2zvvFvWrzLltIqhZvMKaUX9P6kW3qRBytHDJtFhlYKyacekBNkKSHrAbYjppWzw4L e8OuWtcDS7EY+JR7olo4WsSfhjqejluOcr2XbGBxHonZ7QJ8irWq2/WgX/EslaNdQbg8ROytdDOwk 88rv3QHbZXbGyaBjLMZ9UaLvfjmVkBXvaDHVOaITIU9pLNhNCu5lI+h9513kb8uOE+dche/9QkXrr yupJtepktKV+B+5Lbd0w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7x-00000002Cvv-1vcb; Thu, 18 Apr 2024 12:44:33 +0000 Received: from mail-lf1-f48.google.com ([209.85.167.48]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7W-00000002CVB-0D0S for kvm-riscv@lists.infradead.org; Thu, 18 Apr 2024 12:44:09 +0000 Received: by mail-lf1-f48.google.com with SMTP id 2adb3069b0e04-516d8764656so200733e87.1 for ; Thu, 18 Apr 2024 05:44:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1713444242; x=1714049042; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3Bj6qFEBTQkW22oNb4zguAXGn3Gn0KYF9aSmL0IcZwU=; b=PKMkWbhNlkp0Is1dF3CbmcQA0W40WBvo6Ne9t71v6C4PIKrIMM0PJ6X2g+UFggUu2M XJe4IDIzXkxKMlnpWTyJ+uyXWRH5H9EorEtsqTFoPWsQ/1tQZaAK8nCfiull6DI5FdGO Gpa2OArKQu66hUdtsNvwP6srfLaHgr29bT2AKPMei15PqkkXM3hKxu1RGMhXfqgZnGrz 4sBVMaSZNtvlBCx9yXFplHeCBb9wWFPCJyOyUdlpCE90u/O8KQ49sFe6AQCPbzFhYdNH Wjhv1GRyS2KtzEOYZVN5SwDtgInns864Wix1npMEyZ/wVmbU1KZa2/7J/udc8PMomXIo /a6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713444242; x=1714049042; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3Bj6qFEBTQkW22oNb4zguAXGn3Gn0KYF9aSmL0IcZwU=; b=qepyyFj+yNC+uHrDphNaOCv3nw9MqJcLfrHrElYOeb60lvrUOHvJXWlfZs2FLzzRr4 Zfd9zqOWFOTnOYk5AcVfHC//2QdbgUBeion9Lh1ElV0AXR/rU4Dxzo3EjBnTLKObwpsT jC5k7YXzg/HLK4s9fff/YnTcD8nicq/KJjUbqGhviXP4OQrANK1KYHc2KRmE7b0UEWRj axUAUZfcRrCgb290Jm/dkRJ0vU6Ezzz74PshZUnchGPA7+/At1CCQvMAskh9hn9zOCWF n6fwMiYfSPn/LBqVasRScBKTQTCQwC4cOu9mqKbpwL5XN4fk5Oxo8lyUuhNf6NOe6/0+ BVOA== X-Forwarded-Encrypted: i=1; AJvYcCXpO10XGBxGXFZYfVp4jVunzyYDs7NJFaCihLLfb/ZePOx5z3RG0CEyKX2KF56SPTsU3D2K5miaJza8BqAQYGnxY3p1SSO3Wp1t0qVd6Q== X-Gm-Message-State: AOJu0YzUTuMRZgYo3b6v1cNoeYw9xCae0rYMNjby7PStlxgDTPAYd797 KmHLxPAPbQOOsFU6g/AbS45cJIlCsCK5Sv4f/6kOJjBqnsvk0bBfjNjBdxid9bc= X-Google-Smtp-Source: AGHT+IGuPTx5xyQ5D84Wxe16Njbe8/Zc2rt6PLP6jz46BTrSDooOvgKGDoT7RA33/hfmMjVJRZ9Clg== X-Received: by 2002:a2e:7314:0:b0:2da:590:db77 with SMTP id o20-20020a2e7314000000b002da0590db77mr1413729ljc.0.1713444242557; Thu, 18 Apr 2024 05:44:02 -0700 (PDT) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:7b64:4d1d:16d8:e38b]) by smtp.gmail.com with ESMTPSA id bi18-20020a05600c3d9200b00418d5b16fa2sm3373412wmb.30.2024.04.18.05.44.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 05:44:01 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Anup Patel , Shuah Khan Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Subject: [PATCH v2 07/12] KVM: riscv: selftests: Add some Zc* extensions to get-reg-list test Date: Thu, 18 Apr 2024 14:42:30 +0200 Message-ID: <20240418124300.1387978-8-cleger@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240418124300.1387978-1-cleger@rivosinc.com> References: <20240418124300.1387978-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240418_054406_279975_8B2445D9 X-CRM114-Status: UNSURE ( 8.94 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.8 (/) X-Spam-Report: =?unknown-8bit?q?Spam_detection_software=2C_running_on_the_sy?= =?unknown-8bit?q?stem_=22bombadil=2Einfradead=2Eorg=22=2C?= =?unknown-8bit?q?_has_NOT_identified_this_incoming_email_as_spam=2E__The_ori?= =?unknown-8bit?q?ginal?= =?unknown-8bit?q?_message_has_been_attached_to_this_so_you_can_view_it_or_la?= =?unknown-8bit?q?bel?= =?unknown-8bit?q?_similar_future_email=2E__If_you_have_any_questions=2C_see?= =?unknown-8bit?q?_the_administrator_of_that_system_for_details=2E?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_preview=3A__The_KVM_RISC-V_allows_Zca=2C_Zcf=2C_Zc?= =?unknown-8bit?q?d_and_Zcb_extensions_for?= =?unknown-8bit?q?_Guest/VM_so_add_these_extensions_to_get-reg-list_test=2E_S?= =?unknown-8bit?q?igned-off-by=3A_Cl=C3=A9ment?= =?unknown-8bit?q?_L=C3=A9ger_=3Ccleger=40rivosinc=2Ecom=3E_---_tools/testing?= =?unknown-8bit?q?/selftests/kvm/riscv/get-reg-list=2Ec?= =?unknown-8bit?q?_=7C_16_++++++++++++++++_1_file_changed=2C_16_insertions=28?= =?unknown-8bit?q?+=29_?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_analysis_details=3A___=280=2E8_points=2C_5=2E0_req?= =?unknown-8bit?q?uired=29?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_pts_rule_name______________description?= =?unknown-8bit?q?_----_----------------------_------------------------------?= =?unknown-8bit?q?--------------------?= =?unknown-8bit?q?_-0=2E0_RCVD=5FIN=5FDNSWL=5FNONE_____RBL=3A_Sender_listed_a?= =?unknown-8bit?q?t_https=3A//www=2Ednswl=2Eorg/=2C_no?= =?unknown-8bit?q?_trust?= =?unknown-8bit?q?_=5B209=2E85=2E167=2E48_listed_in_list=2Ednswl=2Eorg=5D?= =?unknown-8bit?q?_0=2E0_SPF=5FHELO=5FNONE__________SPF=3A_HELO_does_not_publ?= =?unknown-8bit?q?ish_an_SPF_Record?= =?unknown-8bit?q?_-0=2E0_SPF=5FPASS_______________SPF=3A_sender_matches_SPF_?= =?unknown-8bit?q?record?= =?unknown-8bit?q?_-0=2E1_DKIM=5FVALID_____________Message_has_at_least_one_v?= =?unknown-8bit?q?alid_DKIM_or_DK_signature?= =?unknown-8bit?q?_0=2E1_DKIM=5FSIGNED____________Message_has_a_DKIM_or_DK_si?= =?unknown-8bit?q?gnature=2C_not_necessarily_valid?= =?unknown-8bit?q?_-0=2E0_RCVD=5FIN=5FMSPIKE=5FH2______RBL=3A_Average_reputat?= =?unknown-8bit?q?ion_=28+2=29?= =?unknown-8bit?q?_=5B209=2E85=2E167=2E48_listed_in_wl=2Emailspike=2Enet=5D?= =?unknown-8bit?q?_0=2E8_UPPERCASE=5F50=5F75________message_body_is_50-75=25_?= =?unknown-8bit?q?uppercase?= X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org The KVM RISC-V allows Zca, Zcf, Zcd and Zcb extensions for Guest/VM so add these extensions to get-reg-list test. Signed-off-by: Clément Léger Reviewed-by: Anup Patel Acked-by: Anup Patel --- tools/testing/selftests/kvm/riscv/get-reg-list.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c index 40107bb61975..61cad4514197 100644 --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c @@ -55,6 +55,10 @@ bool filter_reg(__u64 reg) case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBKC: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBKX: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZBS: + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCA: + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCB: + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCD: + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCF: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFA: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFH: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFHMIN: @@ -421,6 +425,10 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off) KVM_ISA_EXT_ARR(ZBKC), KVM_ISA_EXT_ARR(ZBKX), KVM_ISA_EXT_ARR(ZBS), + KVM_ISA_EXT_ARR(ZCA), + KVM_ISA_EXT_ARR(ZCB), + KVM_ISA_EXT_ARR(ZCD), + KVM_ISA_EXT_ARR(ZCF), KVM_ISA_EXT_ARR(ZFA), KVM_ISA_EXT_ARR(ZFH), KVM_ISA_EXT_ARR(ZFHMIN), @@ -945,6 +953,10 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zbkb, ZBKB); KVM_ISA_EXT_SIMPLE_CONFIG(zbkc, ZBKC); KVM_ISA_EXT_SIMPLE_CONFIG(zbkx, ZBKX); KVM_ISA_EXT_SIMPLE_CONFIG(zbs, ZBS); +KVM_ISA_EXT_SIMPLE_CONFIG(zca, ZCA), +KVM_ISA_EXT_SIMPLE_CONFIG(zcb, ZCB), +KVM_ISA_EXT_SIMPLE_CONFIG(zcd, ZCD), +KVM_ISA_EXT_SIMPLE_CONFIG(zcf, ZCF), KVM_ISA_EXT_SIMPLE_CONFIG(zfa, ZFA); KVM_ISA_EXT_SIMPLE_CONFIG(zfh, ZFH); KVM_ISA_EXT_SIMPLE_CONFIG(zfhmin, ZFHMIN); @@ -1001,6 +1013,10 @@ struct vcpu_reg_list *vcpu_configs[] = { &config_zbkc, &config_zbkx, &config_zbs, + &config_zca, + &config_zcb, + &config_zcd, + &config_zcf, &config_zfa, &config_zfh, &config_zfhmin, From patchwork Thu Apr 18 12:42:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 1924985 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=jYfKlMIw; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=infradead.org header.i=@infradead.org header.a=rsa-sha256 header.s=desiato.20200630 header.b=R9oCcBzl; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 header.b=i/C8DTe4; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=patchwork.ozlabs.org) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VKyCQ2L68z1yPv for ; Thu, 18 Apr 2024 22:44:34 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/1CZL+rkA8pAxc9q6cgzR28oGE1RTFnaR5epT7BGDSs=; b=jYfKlMIwig9oKf +v1DuSXUpIJBbac5bIQJBRnJ0wOh6UKa/rdlbSCHAY2jYGRbLRp5YdHG7xZk4SxOILbPlqN5fxKnn GsVfPbGp4tFvueVwVKyDRKCAOJjuwYc2hGMiK5eIgZP++/ZOoRLuDo3sqSvpdtZ0YhS2snGtTfq4Z 4gjCOmnUQXIbHZMNMZPmN5sZ2wR6jVDY9d9whdMHvMR3Ay8L2WqEH7wB1lqNTA+0v7bB8TnQJnIJM j9LrXFUrXPn3BpTx+5QHzbJ1y2gF6W6poevwrgEqP3rYVicx8zig96Hg7tdp6XqchHZOaGFRAY7XO qn+WlWOfJY8DyX0i/7Fg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7w-00000002CvR-3gp3; Thu, 18 Apr 2024 12:44:32 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7Z-00000002CZt-2J2k for kvm-riscv@bombadil.infradead.org; Thu, 18 Apr 2024 12:44:09 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:Content-Type :MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Sender:Reply-To:Content-ID:Content-Description; bh=HCF5E0lf403bRxRvK1+a63xMUHlXis3iiu/dcBPgPms=; b=R9oCcBzlQWdo9DlQuX9YkWNXLk nyUVexFO1rJ2OFuJXQu5Lok6BskpTWUsYSK75Dbpv/DN2BN87GbKxUH+VBMyDEOc+z2c7NMcu9Niw 5M45tu5/W3lG53haRje8BHDizxL77UNWU/aVA08Ct8ch4NQiQ1Oai/EaOqv0dgo58uoQcFC+jQdOz emNNtA3qh6ILtU6pKb3+JEFqvYCDPSH8XhdtjJyGb+yaCsg3U1pcuW+VnETZ3ydVcdp9AeGbhjKET HF65TgS/XQFaiSwF2E3Lc+Nr2Oe+h/2g+ayJIcecfzIhiK4E4asUBtsfJJdMa59nOPDeviAWpE0M7 lLg+bE1w==; Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by desiato.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7W-0000000Bzr7-0j9h for kvm-riscv@lists.infradead.org; Thu, 18 Apr 2024 12:44:08 +0000 Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-349bd110614so143280f8f.3 for ; Thu, 18 Apr 2024 05:44:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1713444244; x=1714049044; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HCF5E0lf403bRxRvK1+a63xMUHlXis3iiu/dcBPgPms=; b=i/C8DTe4A0WfdA3YiEhzRBmi3Y8kSKNNmY/CVY/oyHJSvOluMFklyGgfDVqUkXuLsN jIpcbvRW3kjKzg6UmYo6zWDciT8oHUYWoLVtBxP47WIOCFPUMvHNIFYPHFDx3NEZEDpc FgHUF+J7/dyhr3fVO2NS5JRZrEOqPDDFQazbKi6/mY1CrevrfkqJK7+r5OyjjdL/aXvO l0Y0l105syP98OKE7sPd8Ku5kRuDqgZHqrJGz0z4wjEfbRvPrZEQYvrA1miSzhhiETRi ECsOzXqwykC/eiSGzhrIrUQQSC/h0E6HUbdNy5NeUJ1KCchQkng/bBLzgJu4ZVOWl5wR odtw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713444244; x=1714049044; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HCF5E0lf403bRxRvK1+a63xMUHlXis3iiu/dcBPgPms=; b=bbU+VBOVv2CHpnMuJ6qO7f0vApgIgAgzE9PpLb9A0W1pqtQ+Xfga0H3V73cci9p2D6 MAde9yI2Bsl/+Ae855Gx1nGT5eU+MOC5ziXdisBgkG8A6PCR0d41JvDulENKCkvddJum LZuEo6HMe0/gsQBZWRCslu2tEpOdnehAUoonoQgcCvBIdRyKKsuf0kMjVk1xt9LI+z/Z 8DuREhElKiIzlxid2DtNFjUXg+/YpLJyJBVs5aF4ufnSBV2WWF/MG8JvdifMaAjafU9z UV1GQDDh4lpKD+fbRr2h+BmNa+4JcbxNV/ViB1ohZ+kZi2P9fGJIwc5Rmb7BKeYv6LOA 8UMA== X-Forwarded-Encrypted: i=1; AJvYcCVCWUQy0AGKCmWPu2biGP3w/BZAsChUREJomz0J+N/mgxRrouFLHzWNYNk0q9ina15O0joBB7kcuin7Ult6GjVnpU9GcZ5Jc//IweaErQ== X-Gm-Message-State: AOJu0YyjkwlqMvdVE/+7m7DItd3kaLAwKIZDzwID0iC1VuUqocXuHz/G CunlWM8xbMdBDJtX4NlH9hGp5ITgxLrMHrXPdmdy8fvWLGMEhH/rqhh7bSLRbaY= X-Google-Smtp-Source: AGHT+IHf5iuv0LIJwrYLLs/M29+a7bnqtqrULSppwC9XA+JzBmE6As/f1Ah2mDNqzxt/R7Bqm6p1VA== X-Received: by 2002:a5d:5046:0:b0:349:eb59:c185 with SMTP id h6-20020a5d5046000000b00349eb59c185mr1524481wrt.1.1713444244182; Thu, 18 Apr 2024 05:44:04 -0700 (PDT) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:7b64:4d1d:16d8:e38b]) by smtp.gmail.com with ESMTPSA id bi18-20020a05600c3d9200b00418d5b16fa2sm3373412wmb.30.2024.04.18.05.44.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 05:44:03 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Anup Patel , Shuah Khan Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Subject: [PATCH v2 08/12] dt-bindings: riscv: add Zcmop ISA extension description Date: Thu, 18 Apr 2024 14:42:31 +0200 Message-ID: <20240418124300.1387978-9-cleger@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240418124300.1387978-1-cleger@rivosinc.com> References: <20240418124300.1387978-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240418_134406_333165_7ECD5DA4 X-CRM114-Status: UNSURE ( 8.99 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.0 (/) X-Spam-Report: =?unknown-8bit?q?Spam_detection_software=2C_running_on_the_sy?= =?unknown-8bit?q?stem_=22desiato=2Einfradead=2Eorg=22=2C?= =?unknown-8bit?q?_has_NOT_identified_this_incoming_email_as_spam=2E__The_ori?= =?unknown-8bit?q?ginal?= =?unknown-8bit?q?_message_has_been_attached_to_this_so_you_can_view_it_or_la?= =?unknown-8bit?q?bel?= =?unknown-8bit?q?_similar_future_email=2E__If_you_have_any_questions=2C_see?= =?unknown-8bit?q?_the_administrator_of_that_system_for_details=2E?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_preview=3A__Add_description_for_the_Zcmop_=28Compr?= =?unknown-8bit?q?essed_May-Be-Operations=29?= =?unknown-8bit?q?_ISA_extension_which_was_ratified_in_commit_c732a4f39a4_=28?= =?unknown-8bit?q?=22Zcmop_is_ratified/1=2E0=22=29?= =?unknown-8bit?q?_of_the_riscv-isa-manual=2E_Signed-off-by=3A_Cl=C3=A9ment_L?= =?unknown-8bit?q?=C3=A9ger_=3Ccleger=40rivosinc=2Ecom=3E?= =?unknown-8bit?q?_---_=2E=2E=2E/devicetree/bindings/riscv/extensions=2Eyaml_?= =?unknown-8bit?q?=7C_12_++++++++++++_1_file?= =?unknown-8bit?q?_changed=2C_12_insertions=28+=29_?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_analysis_details=3A___=280=2E0_points=2C_5=2E0_req?= =?unknown-8bit?q?uired=29?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_pts_rule_name______________description?= =?unknown-8bit?q?_----_----------------------_------------------------------?= =?unknown-8bit?q?--------------------?= =?unknown-8bit?q?_-0=2E0_RCVD=5FIN=5FDNSWL=5FNONE_____RBL=3A_Sender_listed_a?= =?unknown-8bit?q?t_https=3A//www=2Ednswl=2Eorg/=2C_no?= =?unknown-8bit?q?_trust?= =?unknown-8bit?b?IFsyYTAwOjE0NTA6NDg2NDoyMDowOjA6MDo0MmEgbGlzdGVkIGluXQ==?= =?unknown-8bit?b?IFtsaXN0LmRuc3dsLm9yZ10=?= =?unknown-8bit?q?_0=2E0_SPF=5FHELO=5FNONE__________SPF=3A_HELO_does_not_publ?= =?unknown-8bit?q?ish_an_SPF_Record?= =?unknown-8bit?q?_-0=2E0_SPF=5FPASS_______________SPF=3A_sender_matches_SPF_?= =?unknown-8bit?q?record?= =?unknown-8bit?q?_-0=2E1_DKIM=5FVALID_____________Message_has_at_least_one_v?= =?unknown-8bit?q?alid_DKIM_or_DK_signature?= =?unknown-8bit?q?_0=2E1_DKIM=5FSIGNED____________Message_has_a_DKIM_or_DK_si?= =?unknown-8bit?q?gnature=2C_not_necessarily_valid?= X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Add description for the Zcmop (Compressed May-Be-Operations) ISA extension which was ratified in commit c732a4f39a4 ("Zcmop is ratified/1.0") of the riscv-isa-manual. Signed-off-by: Clément Léger Acked-by: Conor Dooley --- .../devicetree/bindings/riscv/extensions.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index 0172cbaa13ca..a0113cb46893 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -252,6 +252,11 @@ properties: merged in the riscv-isa-manual by commit dbc79cf28a2 ("Initial seed of zc.adoc to src tree."). + - const: zcmop + description: + The standard Zcmop extension version 1.0, as ratified in commit + c732a4f39a4 ("Zcmop is ratified/1.0") of the riscv-isa-manual. + - const: zfa description: The standard Zfa extension for additional floating point @@ -566,6 +571,13 @@ properties: then: contains: const: zcd + # Zcmop depends on Zca + - if: + contains: + const: zcmop + then: + contains: + const: zca allOf: # Zcf extension does not exists on rv64 From patchwork Thu Apr 18 12:42:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 1924987 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=vEMiHWtQ; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 header.b=h3AajMf0; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=patchwork.ozlabs.org) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VKyCg6HsNz1yPv for ; Thu, 18 Apr 2024 22:44:47 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Txy+Wdc7lbY7Be7N5MbvKMaEptvY/Y2Ternp+EeE/kA=; b=vEMiHWtQ7fZteP B5FKC5v1n42dmrWD9hcrczjUHDjftxj8yxPs7JZf7rhtfF5el0D+LqTxHvW1eEyV8LfzP4Ge2wIMC VVtPrT76DsE/0hcaDgo8Vy9SmE+bJWnAhAHJm6C0iz8mxngivF+bS2B9JIeJ4eGq8NdOACEfGgVAl JzPMpsE+5LqpX3Yufsqz2kxI+e6ji8Bsijw+G9OWJrZu/vHJxvujsD/etxMcnkW7oQ/Es+49yLiBt cHr8LnUqvaUyOb90BZxYvEjIBKqdJyyrxEIGzc1MqiNEtMsxcKcLg6yw3zOQsTOb+BUwwZVQsXCZb 0BF2ZpCK5G7TdBlNMXcQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR8A-00000002D7O-0Zin; Thu, 18 Apr 2024 12:44:46 +0000 Received: from mail-lj1-f176.google.com ([209.85.208.176]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7Y-00000002CXY-0eMd for kvm-riscv@lists.infradead.org; Thu, 18 Apr 2024 12:44:11 +0000 Received: by mail-lj1-f176.google.com with SMTP id 38308e7fff4ca-2dac628f081so2210951fa.2 for ; Thu, 18 Apr 2024 05:44:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1713444245; x=1714049045; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AJJluMz+u6UTg8XM641LtNTBq3D7zPplm+46K1BBT3g=; b=h3AajMf0R3IqZsLbddCI39mu5GWOuomWIRGSyiZqRHQx5OEqUn9fGhOAgNuMpkD2o/ k1bzvqb2K4auDpvfTB0ltonfSuEx0pHHKhbnyGrqx+GX3k6CNC9FkT4VNt5Ei6vJNXte H9hZeg4zgphQ1T7GfABYu6BrdFZO9lH9UBHcHtWDFCmW7L0QPYlzOvzNAU4D/4Zte2cc FIzoA7TspDGbdpcyvzBrNX6amzh6dXymInqAKbrPofOc8q84B+l3TTilGw7WFYK5nblM iNfkSssMgzJPIkhywkcenlDcS/0UTEObT3KAJYQVn00AAXuuRL/mHYgMZ8SDVDQi85ye ugKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713444245; x=1714049045; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AJJluMz+u6UTg8XM641LtNTBq3D7zPplm+46K1BBT3g=; b=l0Mt6CzKbCnoJ5zpNweviumP0F3GeBDZcBta0jPVu+7+BexFNvi/G1yDcFvCUmxaeQ +jlaXrbP5Ki0IAl3eJhyWs1pgrJzfsLVCrGxuLKgHxwqKkRy0nWu6mpWm5YSeO4GMDCG fkIs/YK8HphK8aFkbAGAgOkjJ7TLoId/pEQnaXdaNV6H+rVTCfwn8ccwW4qT0q8vlVF4 IpoGwT0xmzFzKI6rkvUfNMEIaykSbJv2EzqQ+Kv9IWGWiqldKWm9m7WHA2SPAmrX441h FsRpdWX+UMIHIpPeIhuI8HHEMOsfi0LHOT18Fc8QtNS7XCSLuN3HwJJGgZHV2yE6x/xV p+ow== X-Forwarded-Encrypted: i=1; AJvYcCUinu5PgcXXRAL6NjZdpINBYkRXa+I7OxO/wE0A9eoYFpFNMvdRoIupgYglfunlvmXQkFLKFX23nJHbPSpa2QGpRb0OsGMRNUq1BdHrpQ== X-Gm-Message-State: AOJu0YxcAdzLljVKWFhoQkb1n0pY1MKDP437xbMYE4mfqha/3ZIbx6y5 RM0QY0sCUDDUvw0itdUZ2WKd/yorQrCoLYHWj65GXoos6psedOA/9HXlxcNRwWI= X-Google-Smtp-Source: AGHT+IEA98F7NhkSpgbqjXTJDAARemLQxPRyTCHu7WNOEPKgiNpZ7WkvoQPUAaqjKtkLyPbtJUVEhQ== X-Received: by 2002:a2e:9ccf:0:b0:2d9:e54d:8208 with SMTP id g15-20020a2e9ccf000000b002d9e54d8208mr1639216ljj.0.1713444245128; Thu, 18 Apr 2024 05:44:05 -0700 (PDT) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:7b64:4d1d:16d8:e38b]) by smtp.gmail.com with ESMTPSA id bi18-20020a05600c3d9200b00418d5b16fa2sm3373412wmb.30.2024.04.18.05.44.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 05:44:04 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Anup Patel , Shuah Khan Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Subject: [PATCH v2 09/12] riscv: add ISA extension parsing for Zcmop Date: Thu, 18 Apr 2024 14:42:32 +0200 Message-ID: <20240418124300.1387978-10-cleger@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240418124300.1387978-1-cleger@rivosinc.com> References: <20240418124300.1387978-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240418_054408_447575_5B9AEA61 X-CRM114-Status: UNSURE ( 9.54 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.0 (/) X-Spam-Report: =?unknown-8bit?q?Spam_detection_software=2C_running_on_the_sy?= =?unknown-8bit?q?stem_=22bombadil=2Einfradead=2Eorg=22=2C?= =?unknown-8bit?q?_has_NOT_identified_this_incoming_email_as_spam=2E__The_ori?= =?unknown-8bit?q?ginal?= =?unknown-8bit?q?_message_has_been_attached_to_this_so_you_can_view_it_or_la?= =?unknown-8bit?q?bel?= =?unknown-8bit?q?_similar_future_email=2E__If_you_have_any_questions=2C_see?= =?unknown-8bit?q?_the_administrator_of_that_system_for_details=2E?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_preview=3A__Add_parsing_for_Zcmop_ISA_extension_wh?= =?unknown-8bit?q?ich_was_ratified_in?= =?unknown-8bit?q?_commit_b854a709c00_=28=22Zcmop_is_ratified/1=2E0=22=29_of_?= =?unknown-8bit?q?the_riscv-isa-manual=2E_Signed-off-by=3A?= =?unknown-8bit?q?_Cl=C3=A9ment_L=C3=A9ger_=3Ccleger=40rivosinc=2Ecom=3E_---_?= =?unknown-8bit?q?arch/riscv/include/asm/hwcap=2Eh?= =?unknown-8bit?q?_=7C_1_+_arch/riscv/kernel/cpufeature=2Ec_=7C_1_+_2_files_c?= =?unknown-8bit?q?hanged=2C_2_insertions=28+=29?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_analysis_details=3A___=28-0=2E0_points=2C_5=2E0_re?= =?unknown-8bit?q?quired=29?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_pts_rule_name______________description?= =?unknown-8bit?q?_----_----------------------_------------------------------?= =?unknown-8bit?q?--------------------?= =?unknown-8bit?q?_-0=2E0_RCVD=5FIN=5FDNSWL=5FNONE_____RBL=3A_Sender_listed_a?= =?unknown-8bit?q?t_https=3A//www=2Ednswl=2Eorg/=2C_no?= =?unknown-8bit?q?_trust?= =?unknown-8bit?q?_=5B209=2E85=2E208=2E176_listed_in_list=2Ednswl=2Eorg=5D?= =?unknown-8bit?q?_0=2E0_SPF=5FHELO=5FNONE__________SPF=3A_HELO_does_not_publ?= =?unknown-8bit?q?ish_an_SPF_Record?= =?unknown-8bit?q?_-0=2E0_SPF=5FPASS_______________SPF=3A_sender_matches_SPF_?= =?unknown-8bit?q?record?= =?unknown-8bit?q?_-0=2E0_RCVD=5FIN=5FMSPIKE=5FH2______RBL=3A_Average_reputat?= =?unknown-8bit?q?ion_=28+2=29?= =?unknown-8bit?q?_=5B209=2E85=2E208=2E176_listed_in_wl=2Emailspike=2Enet=5D?= =?unknown-8bit?q?_-0=2E1_DKIM=5FVALID_____________Message_has_at_least_one_v?= =?unknown-8bit?q?alid_DKIM_or_DK_signature?= =?unknown-8bit?q?_0=2E1_DKIM=5FSIGNED____________Message_has_a_DKIM_or_DK_si?= =?unknown-8bit?q?gnature=2C_not_necessarily_valid?= X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Add parsing for Zcmop ISA extension which was ratified in commit b854a709c00 ("Zcmop is ratified/1.0") of the riscv-isa-manual. Signed-off-by: Clément Léger --- arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/kernel/cpufeature.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index b7551bad341b..cff7660de268 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -86,6 +86,7 @@ #define RISCV_ISA_EXT_ZCB 77 #define RISCV_ISA_EXT_ZCD 78 #define RISCV_ISA_EXT_ZCF 79 +#define RISCV_ISA_EXT_ZCMOP 80 #define RISCV_ISA_EXT_XLINUXENVCFG 127 diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 09dee071274d..f1450cd7231e 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -265,6 +265,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { __RISCV_ISA_EXT_DATA(zcb, RISCV_ISA_EXT_ZCB), __RISCV_ISA_EXT_DATA(zcd, RISCV_ISA_EXT_ZCD), __RISCV_ISA_EXT_DATA(zcf, RISCV_ISA_EXT_ZCF), + __RISCV_ISA_EXT_DATA(zcmop, RISCV_ISA_EXT_ZCMOP), __RISCV_ISA_EXT_DATA(zba, RISCV_ISA_EXT_ZBA), __RISCV_ISA_EXT_DATA(zbb, RISCV_ISA_EXT_ZBB), __RISCV_ISA_EXT_DATA(zbc, RISCV_ISA_EXT_ZBC), From patchwork Thu Apr 18 12:42:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 1925022 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=BFTREzfi; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=infradead.org header.i=@infradead.org header.a=rsa-sha256 header.s=desiato.20200630 header.b=NwHav7Qh; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 header.b=XUjeQCkw; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=patchwork.ozlabs.org) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VKzZm3yk3z1yZx for ; Thu, 18 Apr 2024 23:46:22 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=SOdZsPzFtKcsiMbd5G5zJKf++zXV6bIRm5u5x/PjhI8=; b=BFTREzfirAuOAA cEKqw1tObFNLJz1WR3yMEqzYb4t/V5vzIeURri3FNfY/5uRgyUnNBFZ9hB2yVCwtTHxwSmFqMg8qe t3OUkp2aaXnZ9AGYhuApLJseYbQ4N1qtb0lJPaGeXggJCJS7vKW7xGggG18ypaRbhNoa5snH/Rck/ BbzXv54B9L3DmfnaoO16KH7BfofaC5yOd1LNS/dRTL2p26/7wshJhl30WK57ANqk2dVYU6EHcX3S9 gGvdcqh9TCzEZDG64xN+4zPK7YjTV16cDdTBILcZkOThhdM2QGiSYuBVtbnaBkSYWfyVtojOjTDhf u/ZLopBCTfyVied4IWTQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxS5j-00000002QUV-3upB; Thu, 18 Apr 2024 13:46:19 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7c-00000002Cbh-1r5r for kvm-riscv@bombadil.infradead.org; Thu, 18 Apr 2024 12:44:12 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:Content-Type :MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Sender:Reply-To:Content-ID:Content-Description; bh=rdCfPjm06PN8DLWdVlWU7iGB8QhHqS8f5T3HQCXkkpY=; b=NwHav7QhXtBOFGkNkCAtRRWIYw 2QjUTlwasgcmMyMHrpSg7wvOJGKo0rTm4F/M/TP/YY74Eb7/VRtLeKGrV2VZITQarBi2wqEVdoYNa OWMp+R8vAgLJLc+YdeV5gINHTJV76rGReBGmVX8l8GJPnkRlaOr7hckITV2jItidKltt8X4r1XCfT fH+/8gwGYRN6CQ26rmtCFlr5kDqyHq0RDy1Md8PotGtykQeKhhoD7lOslypA/Tc2TuVfWgrpgJjtL K6i3Y3uJBBd+MnAGAGE0AVXlHj5fU4LTg6Q84mkP9wXiS0/swoKQWTfHH2A22y/mmPhzw1O9HlzY4 mLxijDaw==; Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]) by desiato.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7Y-0000000Bzrc-1SwM for kvm-riscv@lists.infradead.org; Thu, 18 Apr 2024 12:44:11 +0000 Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-349a33a9667so113163f8f.3 for ; Thu, 18 Apr 2024 05:44:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1713444246; x=1714049046; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rdCfPjm06PN8DLWdVlWU7iGB8QhHqS8f5T3HQCXkkpY=; b=XUjeQCkwJVsSV6+XotCLWQw0aqwJplmmbSvvbOt59vu3bstz+/Nriet7B0i6c9P/BC e7xfzvorIeFtMlaRfK6uNJUZJMeAuyzuWOIP5DCzGT3pJzE4oLtD4ryzAzW14pZ8ssnf LVdSYARwF7sdWalyVm5tcv/W7XG6uD9VMeOXz/QhevdameuS5PmtA2WIW+TIvMNTjTce Pxgq+jbrs8iVh4Ufcu9w1B4J3jjlmEUlJI2AfKLzYmfKNN0mvE1CSwVG/+DWourjRaW0 JyQwUov+aY3b8PQY4kreA2gGFEo9ouWbcj5IpBKLhL8yHp/JeZszeLK1Y49QDemhVTaH PKVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713444246; x=1714049046; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rdCfPjm06PN8DLWdVlWU7iGB8QhHqS8f5T3HQCXkkpY=; b=peQRkiFmo4xyTQG7ujBEmuDgkMeKAVK5ex7c8QPs5XDeUVTtLLfuaUuP3om1VTe56U hmDBmoEr79GzuniKqiLZmb/faqQeNG8TpNTFuMJiU/UsoY5XkNVfmBLLtvWWpZiCgTEW bOlIkcFJAJ8S/zk7PHrJ+SzuEqyaquAxUDHRgcDURaP6PEhBjH4RudhrrUxZLCJ/jSF6 jSPHA631tG2tc9+pyKVPBBoWRxixdUw4ayzTl607pQjzrlBy6a7fzoR5D2ROetjoRsi7 YQFBX9wNM99aNXAPZoQ0wJ8q9DybeIQoaMaJF0FAWI9b9Zra7n66Sv2btWaBML7H6Q4G vTtA== X-Forwarded-Encrypted: i=1; AJvYcCX0ueSDNx7ShMt7S/aLHJlRuShY2QHo/OvXnoZ3AT9ErwmwGkBJCVn9U0Id3gCJ63/QimYQPgJTQAZYSssKxA1VfkdgpUvAUjBvN+g7Kw== X-Gm-Message-State: AOJu0YwKU2XyLdfVDtmHVM7H9AiKPJw+FxuYTnirHe1PdL03qaTz9Ew6 96ugkx7xSIfLb7V1ekimgvTYAlvqsjuWURvtfaY5Pq1t6ZM2a2gEUFj+z0W+9mI= X-Google-Smtp-Source: AGHT+IGMuL1VEcAVu36oqMeDfSFjQ3yk2Wj7i500rFn3wK2To4nptMyU7omA9B2isyVdkpsEUDxcgg== X-Received: by 2002:a05:600c:1ca2:b0:418:2a57:3806 with SMTP id k34-20020a05600c1ca200b004182a573806mr1932349wms.0.1713444246501; Thu, 18 Apr 2024 05:44:06 -0700 (PDT) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:7b64:4d1d:16d8:e38b]) by smtp.gmail.com with ESMTPSA id bi18-20020a05600c3d9200b00418d5b16fa2sm3373412wmb.30.2024.04.18.05.44.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 05:44:05 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Anup Patel , Shuah Khan Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Subject: [PATCH v2 10/12] riscv: hwprobe: export Zcmop ISA extension Date: Thu, 18 Apr 2024 14:42:33 +0200 Message-ID: <20240418124300.1387978-11-cleger@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240418124300.1387978-1-cleger@rivosinc.com> References: <20240418124300.1387978-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240418_134408_687788_A15C609B X-CRM114-Status: GOOD ( 11.08 ) X-Spam-Score: 0.0 (/) X-Spam-Report: =?unknown-8bit?q?Spam_detection_software=2C_running_on_the_sy?= =?unknown-8bit?q?stem_=22desiato=2Einfradead=2Eorg=22=2C?= =?unknown-8bit?q?_has_NOT_identified_this_incoming_email_as_spam=2E__The_ori?= =?unknown-8bit?q?ginal?= =?unknown-8bit?q?_message_has_been_attached_to_this_so_you_can_view_it_or_la?= =?unknown-8bit?q?bel?= =?unknown-8bit?q?_similar_future_email=2E__If_you_have_any_questions=2C_see?= =?unknown-8bit?q?_the_administrator_of_that_system_for_details=2E?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_preview=3A__Export_Zcmop_ISA_extension_through_hwp?= =?unknown-8bit?q?robe=2E_Signed-off-by=3A?= =?unknown-8bit?q?_Cl=C3=A9ment_L=C3=A9ger_=3Ccleger=40rivosinc=2Ecom=3E_---_?= =?unknown-8bit?q?Documentation/arch/riscv/hwprobe=2Erst?= =?unknown-8bit?q?_=7C_4_++++_arch/riscv/include/uapi/asm/hwprobe=2Eh_=7C_1_+?= =?unknown-8bit?q?_arch/riscv/kernel/sys=5Fhwprobe=2Ec?= =?unknown-8bit?b?IHwgMSArIDMgZmlsZXMgY2hhbmdlZCBbLi4uXSA=?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_analysis_details=3A___=280=2E0_points=2C_5=2E0_req?= =?unknown-8bit?q?uired=29?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_pts_rule_name______________description?= =?unknown-8bit?q?_----_----------------------_------------------------------?= =?unknown-8bit?q?--------------------?= =?unknown-8bit?q?_-0=2E0_RCVD=5FIN=5FDNSWL=5FNONE_____RBL=3A_Sender_listed_a?= =?unknown-8bit?q?t_https=3A//www=2Ednswl=2Eorg/=2C_no?= =?unknown-8bit?q?_trust?= =?unknown-8bit?b?IFsyYTAwOjE0NTA6NDg2NDoyMDowOjA6MDo0MmUgbGlzdGVkIGluXQ==?= =?unknown-8bit?b?IFtsaXN0LmRuc3dsLm9yZ10=?= =?unknown-8bit?q?_0=2E0_SPF=5FHELO=5FNONE__________SPF=3A_HELO_does_not_publ?= =?unknown-8bit?q?ish_an_SPF_Record?= =?unknown-8bit?q?_-0=2E0_SPF=5FPASS_______________SPF=3A_sender_matches_SPF_?= =?unknown-8bit?q?record?= =?unknown-8bit?q?_-0=2E1_DKIM=5FVALID_____________Message_has_at_least_one_v?= =?unknown-8bit?q?alid_DKIM_or_DK_signature?= =?unknown-8bit?q?_0=2E1_DKIM=5FSIGNED____________Message_has_a_DKIM_or_DK_si?= =?unknown-8bit?q?gnature=2C_not_necessarily_valid?= X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Export Zcmop ISA extension through hwprobe. Signed-off-by: Clément Léger --- Documentation/arch/riscv/hwprobe.rst | 4 ++++ arch/riscv/include/uapi/asm/hwprobe.h | 1 + arch/riscv/kernel/sys_hwprobe.c | 1 + 3 files changed, 6 insertions(+) diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst index bf96b4e8ba3b..e3187659a077 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -212,6 +212,10 @@ The following keys are defined: ("Zcf doesn't exist on RV64 as it contains no instructions") of riscv-code-size-reduction. + * :c:macro:`RISCV_HWPROBE_EXT_ZCMOP`: The Zcmop May-Be-Operations extension is + supported as defined in the RISC-V ISA manual starting from commit + c732a4f39a4 ("Zcmop is ratified/1.0"). + * :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance information about the selected set of processors. diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h index dd4ad77faf49..d97ac5436447 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -64,6 +64,7 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_EXT_ZCB (1ULL << 38) #define RISCV_HWPROBE_EXT_ZCD (1ULL << 39) #define RISCV_HWPROBE_EXT_ZCF (1ULL << 40) +#define RISCV_HWPROBE_EXT_ZCMOP (1ULL << 41) #define RISCV_HWPROBE_KEY_CPUPERF_0 5 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) #define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0) diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c index 2ffa0fe5101e..9457231bd1c0 100644 --- a/arch/riscv/kernel/sys_hwprobe.c +++ b/arch/riscv/kernel/sys_hwprobe.c @@ -114,6 +114,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, EXT_KEY(ZIMOP); EXT_KEY(ZCA); EXT_KEY(ZCB); + EXT_KEY(ZCMOP); if (has_vector()) { EXT_KEY(ZVBB); From patchwork Thu Apr 18 12:42:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 1924989 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=yQqR4U7e; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 header.b=FhN64NhQ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=patchwork.ozlabs.org) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VKyCq6fs4z1yPv for ; Thu, 18 Apr 2024 22:44:55 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=28YBZu3AqFiqEbsIyV0Khd/Dpy/Uli/DaO3uElshdJc=; b=yQqR4U7erjZvbe YmnR66ceIfFT/8ZxkSAYuhl7BTTzvhfnxqtfrD3HIQIlfEvDTjj0JSH35HvScYWLP7vm/Cm6Axtvh Ehd/VyDJ98Yh9OFIVK983yd+eRjSwQKV9HVxmvWRsPHaXCZJUFs/2wQbkDm1RP62TRiAIK/Sq94wJ ddyc2hnb+bb7Det5R0QLMKBBpu9kFrw5dpUSVy4DxWv78z7E8/OJkOS3pX6dqDtvcr8nZ7+UIx04t LfUZ0qit5enfGiGlRu0SeiK/hknci9JfVm+QQgwCDhjqSOqiD3QmdLuwAR7iAfLC1bAZG5VDNh/za cgZzfwJaZ6+2xZ9OrFoA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR8H-00000002DDR-48Z1; Thu, 18 Apr 2024 12:44:54 +0000 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7Z-00000002CZn-2Pgw for kvm-riscv@lists.infradead.org; Thu, 18 Apr 2024 12:44:11 +0000 Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-347c6d6fc02so116324f8f.1 for ; Thu, 18 Apr 2024 05:44:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1713444248; x=1714049048; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FohdVePPG5jzF3AfSRVe1tr20y+8LhH20P3MwlhF1eo=; b=FhN64NhQERRODOWG2fwEhqXJetf9KBT6bsBRzs+LVdJXlXClziGjuGs4iDf1iUp3tq xgjJUObfOYh1q2Nz3atKb3inix0q4Vb8nIVyY6UGAvXMdk59lvn5b1itAu3MdXOxOfYH U3t5fbpaGxrS0MtKkOkcoliKwqymyoRpxJmxeyZk8UPLI+wOZRAHTccGFQ+RxiPHxoFL yXHP5lYCVtmtUKZFcoVRe7K+9PaMK6DLs1TJMeeh494d31TPUtQr/YabGMJ0mippYv9L sDHK1DRZvlEON7CjSnuPWCrCi9MHXBolsWA86oRBsIM5Vb3LCwkz5ir3W3/bYyvVrEzn 7ZlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713444248; x=1714049048; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FohdVePPG5jzF3AfSRVe1tr20y+8LhH20P3MwlhF1eo=; b=pvtJTFIx5qW89xZ1GLzlZJSLg7pziv69+1gpuoWdjZ9vzgpowVTgTwDvSNPRn/eArk 4JUJb6bvXvSOCyKZHZ2l9jWDLdzaIvaw9skq4oq+29m41CQ+6KchuOsnObpLtgqL+crU lZHny+dNOmtxrcyTECe0GeLCv9gO68zHB4flllXXK42OIKZO24qLSo8rHHH8PpjYpocm DJyh/DB8qwMvU88dyHaYao3Si4pJxtUFWfo67bywNlXp66hGbYhNBgYz5O2k4l6oFITy k2m1ypJUHKcOPw4Fp2QLu6QAAMjf06phKGnME7eQhXAA8tjjfxMXpEj+d5Fgzq7g3ZH5 HfoQ== X-Forwarded-Encrypted: i=1; AJvYcCXJz5XBZeShuf+yqsDWFHhXvqvcvNho/pr0N+bLoe99PRn84KCbJjQDN3+OCJ2IZZcgsVIJbGbnbWJ7TEA+gIN/dA3u0NXlAqhTNjve3g== X-Gm-Message-State: AOJu0YwzSSJrr7H2ogP/UafywjQ04w3+iKrX0RDouzJwLX/3m3z8YRJ6 GkOabogivJiWUtuo6fAxXxDs4lhs87Ids3TnhXgsn1Joch9Kvps/z8tbOb9cM2Q= X-Google-Smtp-Source: AGHT+IF2De8slGmiEH7R+Sd8JWMFq3iRx3g2xhyGy7kAAvUUYk8LgiIFDjRM+gQKByYDrF2dau+9Wg== X-Received: by 2002:adf:f984:0:b0:343:f2e0:449c with SMTP id f4-20020adff984000000b00343f2e0449cmr1668881wrr.0.1713444248202; Thu, 18 Apr 2024 05:44:08 -0700 (PDT) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:7b64:4d1d:16d8:e38b]) by smtp.gmail.com with ESMTPSA id bi18-20020a05600c3d9200b00418d5b16fa2sm3373412wmb.30.2024.04.18.05.44.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 05:44:07 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Anup Patel , Shuah Khan Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Subject: [PATCH v2 11/12] RISC-V: KVM: Allow Zcmop extension for Guest/VM Date: Thu, 18 Apr 2024 14:42:34 +0200 Message-ID: <20240418124300.1387978-12-cleger@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240418124300.1387978-1-cleger@rivosinc.com> References: <20240418124300.1387978-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240418_054409_830237_B90E8BFB X-CRM114-Status: UNSURE ( 9.35 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.0 (/) X-Spam-Report: =?unknown-8bit?q?Spam_detection_software=2C_running_on_the_sy?= =?unknown-8bit?q?stem_=22bombadil=2Einfradead=2Eorg=22=2C?= =?unknown-8bit?q?_has_NOT_identified_this_incoming_email_as_spam=2E__The_ori?= =?unknown-8bit?q?ginal?= =?unknown-8bit?q?_message_has_been_attached_to_this_so_you_can_view_it_or_la?= =?unknown-8bit?q?bel?= =?unknown-8bit?q?_similar_future_email=2E__If_you_have_any_questions=2C_see?= =?unknown-8bit?q?_the_administrator_of_that_system_for_details=2E?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_preview=3A__Extend_the_KVM_ISA_extension_ONE=5FREG?= =?unknown-8bit?q?_interface_to_allow_KVM?= =?unknown-8bit?q?_user_space_to_detect_and_enable_Zcmop_extension_for_Guest/?= =?unknown-8bit?q?VM=2E_Signed-off-by=3A?= =?unknown-8bit?q?_Cl=C3=A9ment_L=C3=A9ger_=3Ccleger=40rivosinc=2Ecom=3E_---_?= =?unknown-8bit?q?arch/riscv/include/uapi/asm/kvm=2Eh?= =?unknown-8bit?q?_=7C_1_+_arch/riscv/kvm/vcpu=5Fonereg=2Ec_=7C_2_++_2_files_?= =?unknown-8bit?q?changed=2C_3_insertions=28+=29?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_analysis_details=3A___=280=2E0_points=2C_5=2E0_req?= =?unknown-8bit?q?uired=29?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_pts_rule_name______________description?= =?unknown-8bit?q?_----_----------------------_------------------------------?= =?unknown-8bit?q?--------------------?= =?unknown-8bit?q?_-0=2E0_RCVD=5FIN=5FDNSWL=5FNONE_____RBL=3A_Sender_listed_a?= =?unknown-8bit?q?t_https=3A//www=2Ednswl=2Eorg/=2C_no?= =?unknown-8bit?q?_trust?= =?unknown-8bit?b?IFsyYTAwOjE0NTA6NDg2NDoyMDowOjA6MDo0MzMgbGlzdGVkIGluXQ==?= =?unknown-8bit?b?IFtsaXN0LmRuc3dsLm9yZ10=?= =?unknown-8bit?q?_0=2E0_SPF=5FHELO=5FNONE__________SPF=3A_HELO_does_not_publ?= =?unknown-8bit?q?ish_an_SPF_Record?= =?unknown-8bit?q?_-0=2E0_SPF=5FPASS_______________SPF=3A_sender_matches_SPF_?= =?unknown-8bit?q?record?= =?unknown-8bit?q?_-0=2E1_DKIM=5FVALID_____________Message_has_at_least_one_v?= =?unknown-8bit?q?alid_DKIM_or_DK_signature?= =?unknown-8bit?q?_0=2E1_DKIM=5FSIGNED____________Message_has_a_DKIM_or_DK_si?= =?unknown-8bit?q?gnature=2C_not_necessarily_valid?= X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Extend the KVM ISA extension ONE_REG interface to allow KVM user space to detect and enable Zcmop extension for Guest/VM. Signed-off-by: Clément Léger Reviewed-by: Anup Patel Acked-by: Anup Patel --- arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kvm/vcpu_onereg.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h index 57db3fea679f..0366389a0bae 100644 --- a/arch/riscv/include/uapi/asm/kvm.h +++ b/arch/riscv/include/uapi/asm/kvm.h @@ -172,6 +172,7 @@ enum KVM_RISCV_ISA_EXT_ID { KVM_RISCV_ISA_EXT_ZCB, KVM_RISCV_ISA_EXT_ZCD, KVM_RISCV_ISA_EXT_ZCF, + KVM_RISCV_ISA_EXT_ZCMOP, KVM_RISCV_ISA_EXT_MAX, }; diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index a2747a6dbdb6..77a0d337faeb 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -52,6 +52,7 @@ static const unsigned long kvm_isa_ext_arr[] = { KVM_ISA_EXT_ARR(ZCB), KVM_ISA_EXT_ARR(ZCD), KVM_ISA_EXT_ARR(ZCF), + KVM_ISA_EXT_ARR(ZCMOP), KVM_ISA_EXT_ARR(ZFA), KVM_ISA_EXT_ARR(ZFH), KVM_ISA_EXT_ARR(ZFHMIN), @@ -136,6 +137,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) case KVM_RISCV_ISA_EXT_ZCB: case KVM_RISCV_ISA_EXT_ZCD: case KVM_RISCV_ISA_EXT_ZCF: + case KVM_RISCV_ISA_EXT_ZCMOP: case KVM_RISCV_ISA_EXT_ZFA: case KVM_RISCV_ISA_EXT_ZFH: case KVM_RISCV_ISA_EXT_ZFHMIN: From patchwork Thu Apr 18 12:42:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= X-Patchwork-Id: 1924990 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20210309 header.b=MTnS0Sq5; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.a=rsa-sha256 header.s=20230601 header.b=pNC+lqG3; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:3::133; helo=bombadil.infradead.org; envelope-from=kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=patchwork.ozlabs.org) Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:3::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4VKyDH0KhYz1yZx for ; Thu, 18 Apr 2024 22:45:19 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=VDc7l4sihryZg6p0B0kAEaqe07WQtKy7TSAxkTm1DDc=; b=MTnS0Sq5eHDzOB yPGOkvAgl5cNMdpyXAyIiJDlwyLoILJszvemrFeWxlqdz+0Q6LDcM8YLfvwiJEp6FArb7ZJEV/V3K 2ukig2ALjYqbgzaEg+RShVUdTQymUuSxOi58AprE5Yo3yRrd0flSS70JDRPbt2MjQH6aCJsaRzseY +0xtrBe7du6ekWI/h/1oBylN4zFZvzVXQUYeu5tci68Erqn/o1uHhfI9q//FE3khbr/vaa+8pwwEC 1MZTjAP1AacmzISyFYjnagzM/8R40IcVO1tLp1OPXMjzC3F7UxOvTsgelalBtQEUGSKjbiiAqhDz8 iRDts2vo7ggvvyZ01Ygw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR8f-00000002DWl-1XHx; Thu, 18 Apr 2024 12:45:17 +0000 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rxR7c-00000002Cao-1UHF for kvm-riscv@lists.infradead.org; Thu, 18 Apr 2024 12:44:15 +0000 Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-349bd110614so143293f8f.3 for ; Thu, 18 Apr 2024 05:44:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1713444249; x=1714049049; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OKIlCd7jL5ol5qvLgWGPfJLjgIu96MFC3958FRvJI8w=; b=pNC+lqG3JmePw6erqOzK6elephyHAYFEBBPYROdqPiRkUZzCwudIldHUXxbhKwmPca gQ6Z3A6H5fT9WjSV5cWp2BErND322j+4F9wFXvnx/3SZ8w/l8BdmbtuENhh7vHV0tHcf Zxd+I6+zJnHxiUGENdLABNSU5NPAzCMjwb3qb/SeVav9wiMNH2lLeyVv/xW5ddfYimDR mGjx4EkKIP3vtw1uHWzU4aqE0AK/IBXthYo/fKx6Do0wcv6uSKetKw7l7ZDUR97uGpX1 rPJn2z+ZLW8WjOqS6XARZ54QSH8L7KYAmfEii6Yfa49VRScVlGjkZtUOvURwMGJrFOLD sbAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713444249; x=1714049049; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OKIlCd7jL5ol5qvLgWGPfJLjgIu96MFC3958FRvJI8w=; b=wGHAqr84QIMu+hjVsTHikbPbu5oofBROWf/IKfcmqYU8cS2JgS9TF0Gd+y7vnHkPde LVw20wJJr5R0bUTbrYkSa1UGxCiD21QVGT1CeiS1XwU9oqB16bPL22LVCIKxI5cmA193 NKRQ14JuEKOiSOnAX5lwKOiRSfb7PUwMnM47dbdP9NdZDjkyw3vSi9Uypko4B8f9kbq9 X1oS7kWFmv/pVEUje4bhHBaWTLjDZnWwCAEdI61GZu2vzAsRG3W5DpB7DJnl6RTY2L2C mDYPj8jniSzGocSsDuwzZX4/dE56tvpiBgzwsWw+UIldZgbPrMTq1zsfcVq8KXF4tSjF x1KA== X-Forwarded-Encrypted: i=1; AJvYcCUT+kuCu7CNSTJnbgAxIL37DJMltviouvX8YhE80QP7Uh2QVVL/Q5aBE2GzCv3WZoYkHcvs6iRs/WaDasBcggOwTTGD0AKERg7Y9oRd1w== X-Gm-Message-State: AOJu0YyAwvmtR6juG/FC5Kb+vnF1j7jyeulS9d5vP2yg4u1Ytn3oiHlj U93/aGhCBp71wnra40a9LpFyPV80CfdDySqWCeLXJOJPShZQdEdiJeq10FZ9DBE= X-Google-Smtp-Source: AGHT+IEuz3T/wADyuU6lhNByO66nc3HwRSSRfc4RI/wUE1r6vwDm0YQy96IvGIrIEPLWf2aV5baVXg== X-Received: by 2002:a05:600c:47cf:b0:418:f991:70ff with SMTP id l15-20020a05600c47cf00b00418f99170ffmr135350wmo.1.1713444249424; Thu, 18 Apr 2024 05:44:09 -0700 (PDT) Received: from carbon-x1.. ([2a01:e0a:999:a3a0:7b64:4d1d:16d8:e38b]) by smtp.gmail.com with ESMTPSA id bi18-20020a05600c3d9200b00418d5b16fa2sm3373412wmb.30.2024.04.18.05.44.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Apr 2024 05:44:08 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= To: Jonathan Corbet , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Anup Patel , Shuah Khan Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Atish Patra , linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-kselftest@vger.kernel.org Subject: [PATCH v2 12/12] KVM: riscv: selftests: Add Zcmop extension to get-reg-list test Date: Thu, 18 Apr 2024 14:42:35 +0200 Message-ID: <20240418124300.1387978-13-cleger@rivosinc.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240418124300.1387978-1-cleger@rivosinc.com> References: <20240418124300.1387978-1-cleger@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240418_054412_634747_A6981629 X-CRM114-Status: UNSURE ( 9.24 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.8 (/) X-Spam-Report: =?unknown-8bit?q?Spam_detection_software=2C_running_on_the_sy?= =?unknown-8bit?q?stem_=22bombadil=2Einfradead=2Eorg=22=2C?= =?unknown-8bit?q?_has_NOT_identified_this_incoming_email_as_spam=2E__The_ori?= =?unknown-8bit?q?ginal?= =?unknown-8bit?q?_message_has_been_attached_to_this_so_you_can_view_it_or_la?= =?unknown-8bit?q?bel?= =?unknown-8bit?q?_similar_future_email=2E__If_you_have_any_questions=2C_see?= =?unknown-8bit?q?_the_administrator_of_that_system_for_details=2E?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_preview=3A__The_KVM_RISC-V_allows_Zcmop_extension_?= =?unknown-8bit?q?for_Guest/VM_so_add?= =?unknown-8bit?q?_this_extension_to_get-reg-list_test=2E_Signed-off-by=3A_Cl?= =?unknown-8bit?q?=C3=A9ment_L=C3=A9ger_=3Ccleger=40rivosinc=2Ecom=3E?= =?unknown-8bit?q?_---_tools/testing/selftests/kvm/riscv/get-reg-list=2Ec_=7C?= =?unknown-8bit?q?_4_++++_1_file_changed=2C?= =?unknown-8bit?q?_4_insertions=28+=29_?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_Content_analysis_details=3A___=280=2E8_points=2C_5=2E0_req?= =?unknown-8bit?q?uired=29?= =?unknown-8bit?q?_?= =?unknown-8bit?q?_pts_rule_name______________description?= =?unknown-8bit?q?_----_----------------------_------------------------------?= =?unknown-8bit?q?--------------------?= =?unknown-8bit?q?_-0=2E0_RCVD=5FIN=5FDNSWL=5FNONE_____RBL=3A_Sender_listed_a?= =?unknown-8bit?q?t_https=3A//www=2Ednswl=2Eorg/=2C_no?= =?unknown-8bit?q?_trust?= =?unknown-8bit?b?IFsyYTAwOjE0NTA6NDg2NDoyMDowOjA6MDo0MzYgbGlzdGVkIGluXQ==?= =?unknown-8bit?b?IFtsaXN0LmRuc3dsLm9yZ10=?= =?unknown-8bit?q?_0=2E0_SPF=5FHELO=5FNONE__________SPF=3A_HELO_does_not_publ?= =?unknown-8bit?q?ish_an_SPF_Record?= =?unknown-8bit?q?_-0=2E0_SPF=5FPASS_______________SPF=3A_sender_matches_SPF_?= =?unknown-8bit?q?record?= =?unknown-8bit?q?_-0=2E1_DKIM=5FVALID_____________Message_has_at_least_one_v?= =?unknown-8bit?q?alid_DKIM_or_DK_signature?= =?unknown-8bit?q?_0=2E1_DKIM=5FSIGNED____________Message_has_a_DKIM_or_DK_si?= =?unknown-8bit?q?gnature=2C_not_necessarily_valid?= =?unknown-8bit?q?_0=2E8_UPPERCASE=5F50=5F75________message_body_is_50-75=25_?= =?unknown-8bit?q?uppercase?= X-BeenThere: kvm-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "kvm-riscv" Errors-To: kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org The KVM RISC-V allows Zcmop extension for Guest/VM so add this extension to get-reg-list test. Signed-off-by: Clément Léger Reviewed-by: Anup Patel Acked-by: Anup Patel --- tools/testing/selftests/kvm/riscv/get-reg-list.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c index 61cad4514197..9604c8ece787 100644 --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c @@ -59,6 +59,7 @@ bool filter_reg(__u64 reg) case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCB: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCD: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCF: + case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZCMOP: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFA: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFH: case KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZFHMIN: @@ -429,6 +430,7 @@ static const char *isa_ext_single_id_to_str(__u64 reg_off) KVM_ISA_EXT_ARR(ZCB), KVM_ISA_EXT_ARR(ZCD), KVM_ISA_EXT_ARR(ZCF), + KVM_ISA_EXT_ARR(ZCMOP), KVM_ISA_EXT_ARR(ZFA), KVM_ISA_EXT_ARR(ZFH), KVM_ISA_EXT_ARR(ZFHMIN), @@ -957,6 +959,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zca, ZCA), KVM_ISA_EXT_SIMPLE_CONFIG(zcb, ZCB), KVM_ISA_EXT_SIMPLE_CONFIG(zcd, ZCD), KVM_ISA_EXT_SIMPLE_CONFIG(zcf, ZCF), +KVM_ISA_EXT_SIMPLE_CONFIG(zcmop, ZCMOP); KVM_ISA_EXT_SIMPLE_CONFIG(zfa, ZFA); KVM_ISA_EXT_SIMPLE_CONFIG(zfh, ZFH); KVM_ISA_EXT_SIMPLE_CONFIG(zfhmin, ZFHMIN); @@ -1017,6 +1020,7 @@ struct vcpu_reg_list *vcpu_configs[] = { &config_zcb, &config_zcd, &config_zcf, + &config_zcmop, &config_zfa, &config_zfh, &config_zfhmin,