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Date: Wed, 27 Mar 2024 18:00:31 +0800 X-OQ-MSGID: <20240327100031.938565-1-yangcheng.work@foxmail.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240327_030050_379812_1BEBF988 X-CRM114-Status: GOOD ( 19.34 ) X-Spam-Score: 3.4 (+++) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: The current mlevel imsic check is only for the platform, which may cause hart without imsic in the platform to trigger an illegal instruction exception when initializing imsic. For example, the platfo [...] Content analysis details: (3.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [203.205.221.221 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [yangcheng.work(at)foxmail.com] 0.4 RDNS_DYNAMIC Delivered to internal network by host with dynamic-looking rDNS 3.2 HELO_DYNAMIC_IPADDR Relay HELO'd using suspicious hostname (IP addr 1) X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org The current mlevel imsic check is only for the platform, which may cause hart without imsic in the platform to trigger an illegal instruction exception when initializing imsic. For example, the platform contains a management hart that only supports wired interrupts. This patch will check whether each hart has imsic according to fdt and record it in a bitmap, and only allow harts with imsic to initialize imsic to avoid triggering illegal instruction exceptions. Signed-off-by: Cheng Yang --- include/sbi/sbi_platform.h | 8 ++++-- include/sbi_utils/fdt/fdt_helper.h | 4 ++- lib/sbi/sbi_init.c | 2 +- lib/utils/fdt/fdt_helper.c | 44 ++++++++++++++++++++++++------ platform/generic/platform.c | 22 +++++++++++---- 5 files changed, 61 insertions(+), 19 deletions(-) diff --git a/include/sbi/sbi_platform.h b/include/sbi/sbi_platform.h index 581935a..f62d23d 100644 --- a/include/sbi/sbi_platform.h +++ b/include/sbi/sbi_platform.h @@ -75,7 +75,7 @@ struct sbi_platform_operations { bool (*cold_boot_allowed)(u32 hartid); /* Platform nascent initialization */ - int (*nascent_init)(void); + int (*nascent_init)(u32 hartid); /** Platform early initialization */ int (*early_init)(bool cold_boot); @@ -395,10 +395,12 @@ static inline bool sbi_platform_cold_boot_allowed( * * @return 0 on success and negative error code on failure */ -static inline int sbi_platform_nascent_init(const struct sbi_platform *plat) +static inline int sbi_platform_nascent_init( + const struct sbi_platform *plat, + u32 hartid) { if (plat && sbi_platform_ops(plat)->nascent_init) - return sbi_platform_ops(plat)->nascent_init(); + return sbi_platform_ops(plat)->nascent_init(hartid); return 0; } diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h index ab4a80f..1b7fdeb 100644 --- a/include/sbi_utils/fdt/fdt_helper.h +++ b/include/sbi_utils/fdt/fdt_helper.h @@ -12,6 +12,7 @@ #include #include +#include struct fdt_match { const char *compatible; @@ -89,7 +90,8 @@ int fdt_parse_aplic_node(void *fdt, int nodeoff, struct aplic_data *aplic); struct imsic_data; -bool fdt_check_imsic_mlevel(void *fdt); +int fdt_check_imsic_mlevel(void *fdt, struct sbi_platform *plat, + unsigned long *imsic_bitmap); int fdt_parse_imsic_node(void *fdt, int nodeoff, struct imsic_data *imsic); diff --git a/lib/sbi/sbi_init.c b/lib/sbi/sbi_init.c index 796cccc..8320f94 100644 --- a/lib/sbi/sbi_init.c +++ b/lib/sbi/sbi_init.c @@ -591,7 +591,7 @@ void __noreturn sbi_init(struct sbi_scratch *scratch) * that platform can initialize platform specific per-HART CSRs * or per-HART devices. */ - if (sbi_platform_nascent_init(plat)) + if (sbi_platform_nascent_init(plat, hartid)) sbi_hart_hang(); if (coldboot) diff --git a/lib/utils/fdt/fdt_helper.c b/lib/utils/fdt/fdt_helper.c index a0e93b9..6e81ea6 100644 --- a/lib/utils/fdt/fdt_helper.c +++ b/lib/utils/fdt/fdt_helper.c @@ -764,27 +764,53 @@ skip_delegate_parse: return 0; } -bool fdt_check_imsic_mlevel(void *fdt) +int fdt_check_imsic_mlevel(void *fdt, struct sbi_platform *plat, unsigned long *imsic_bitmap) { const fdt32_t *val; - int i, len, noff = 0; + int i, len, err, cpu_offset, cpu_intc_offset, noff = 0; + u32 phandle, hwirq, hartid; + + bitmap_zero(imsic_bitmap, SBI_HARTMASK_MAX_BITS); if (!fdt) - return false; + return SBI_ENODEV; while ((noff = fdt_node_offset_by_compatible(fdt, noff, "riscv,imsics")) >= 0) { val = fdt_getprop(fdt, noff, "interrupts-extended", &len); - if (val && len > sizeof(fdt32_t)) { - len = len / sizeof(fdt32_t); - for (i = 0; i < len; i += 2) { - if (fdt32_to_cpu(val[i + 1]) == IRQ_M_EXT) - return true; + if (!val || len < sizeof(fdt32_t)) + continue; + + len = len / sizeof(fdt32_t); + for (i = 0; i < len; i += 2) { + phandle = fdt32_to_cpu(val[i]); + hwirq = fdt32_to_cpu(val[i + 1]); + + if (hwirq != IRQ_M_EXT) + continue; + + cpu_intc_offset = fdt_node_offset_by_phandle(fdt, phandle); + if (cpu_intc_offset < 0) + continue; + + cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset); + if (cpu_offset < 0) + continue; + + err = fdt_parse_hart_id(fdt, cpu_offset, &hartid); + if (err) + return SBI_EINVAL; + + for (int i = 0; i < plat->hart_count; i++) { + if (hartid == plat->hart_index2id[i]) { + bitmap_set(imsic_bitmap, i, 1); + break; + } } } } - return false; + return SBI_OK; } int fdt_parse_imsic_node(void *fdt, int nodeoff, struct imsic_data *imsic) diff --git a/platform/generic/platform.c b/platform/generic/platform.c index 1f46b76..015e01d 100644 --- a/platform/generic/platform.c +++ b/platform/generic/platform.c @@ -70,10 +70,10 @@ static u32 fw_platform_calculate_heap_size(u32 hart_count) } extern struct sbi_platform platform; -static bool platform_has_mlevel_imsic = false; static u32 generic_hart_index2id[SBI_HARTMASK_MAX_BITS] = { 0 }; static DECLARE_BITMAP(generic_coldboot_harts, SBI_HARTMASK_MAX_BITS); +static DECLARE_BITMAP(generic_hart_has_mlevel_imsic, SBI_HARTMASK_MAX_BITS); /* * The fw_platform_coldboot_harts_init() function is called by fw_platform_init() @@ -186,7 +186,11 @@ unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1, platform.hart_count = hart_count; platform.heap_size = fw_platform_calculate_heap_size(hart_count); - platform_has_mlevel_imsic = fdt_check_imsic_mlevel(fdt); + + rc = fdt_check_imsic_mlevel(fdt, &platform, + generic_hart_has_mlevel_imsic); + if (rc) + goto fail; fw_platform_coldboot_harts_init(fdt); @@ -212,10 +216,18 @@ static bool generic_cold_boot_allowed(u32 hartid) return false; } -static int generic_nascent_init(void) +static int generic_nascent_init(u32 hartid) { - if (platform_has_mlevel_imsic) - imsic_local_irqchip_init(); + for (int i = 0; i < platform.hart_count; i++) { + if (hartid != platform.hart_index2id[i]) + continue; + + if (bitmap_test(generic_hart_has_mlevel_imsic, i)) { + imsic_local_irqchip_init(); + break; + } + } + return 0; }