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([2409:40f4:37:3d1f:3a25:2b3d:10de:3da2]) by smtp.gmail.com with ESMTPSA id y12-20020a17090a8b0c00b0029baf24ee51sm649437pjn.48.2024.03.26.22.40.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 22:40:35 -0700 (PDT) From: Animesh Agarwal To: Cc: animeshagarwal28@gmail.com, Damien Le Moal , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] dt-bindings: ata: ahci-da850: Convert to dtschema Date: Wed, 27 Mar 2024 11:10:10 +0530 Message-ID: <20240327054014.36864-1-animeshagarwal28@gmail.com> X-Mailer: git-send-email 2.44.0 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert the ahci-da850 bindings to DT schema. Signed-off-by: Animesh Agarwal --- Changes in v2: - Added description for reg property items. --- .../devicetree/bindings/ata/ahci-da850.txt | 18 --------- .../bindings/ata/ti,da850-ahci.yaml | 38 +++++++++++++++++++ 2 files changed, 38 insertions(+), 18 deletions(-) delete mode 100644 Documentation/devicetree/bindings/ata/ahci-da850.txt create mode 100644 Documentation/devicetree/bindings/ata/ti,da850-ahci.yaml diff --git a/Documentation/devicetree/bindings/ata/ahci-da850.txt b/Documentation/devicetree/bindings/ata/ahci-da850.txt deleted file mode 100644 index 5f8193417725..000000000000 --- a/Documentation/devicetree/bindings/ata/ahci-da850.txt +++ /dev/null @@ -1,18 +0,0 @@ -Device tree binding for the TI DA850 AHCI SATA Controller ---------------------------------------------------------- - -Required properties: - - compatible: must be "ti,da850-ahci" - - reg: physical base addresses and sizes of the two register regions - used by the controller: the register map as defined by the - AHCI 1.1 standard and the Power Down Control Register (PWRDN) - for enabling/disabling the SATA clock receiver - - interrupts: interrupt specifier (refer to the interrupt binding) - -Example: - - sata: sata@218000 { - compatible = "ti,da850-ahci"; - reg = <0x218000 0x2000>, <0x22c018 0x4>; - interrupts = <67>; - }; diff --git a/Documentation/devicetree/bindings/ata/ti,da850-ahci.yaml b/Documentation/devicetree/bindings/ata/ti,da850-ahci.yaml new file mode 100644 index 000000000000..b8f31187f34b --- /dev/null +++ b/Documentation/devicetree/bindings/ata/ti,da850-ahci.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/ti,da850-ahci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI DA850 AHCI SATA Controller + +maintainers: + - Animesh Agarwal + +properties: + compatible: + const: ti,da850-ahci + + reg: + items: + - description: Address and size of the register map as defined by the AHCI 1.1 standard. + - description: | + Address and size of Power Down Control Register (PWRDN) for enabling/disabling the SATA clock receiver. + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + sata@218000 { + compatible = "ti,da850-ahci"; + reg = <0x218000 0x2000>, <0x22c018 0x4>; + interrupts = <67>; + };