From patchwork Tue Mar 26 14:04:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 1916182 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256 header.s=gm1 header.b=HYWa+s8h; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=147.75.80.249; helo=am.mirrors.kernel.org; envelope-from=devicetree+bounces-53431-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [147.75.80.249]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4V3s5c14z3z1yWy for ; Wed, 27 Mar 2024 01:05:40 +1100 (AEDT) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 889E81F67AD3 for ; Tue, 26 Mar 2024 14:05:37 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 041FC81744; Tue, 26 Mar 2024 14:05:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="HYWa+s8h" X-Original-To: devicetree@vger.kernel.org Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A434B75814; Tue, 26 Mar 2024 14:04:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711461899; cv=none; b=mL7RYHuZlF3ezMbtFZeu5IdwuHESlf7qJj6lThbCthRRJDTBQwLZBM6TLy+mJoDRSJJr4+cCoiuRINXZm8JYyVfU05Hleot5a83O863sLe1yqauYK2fYuaFvC7/+wMV26b+5EqFpGr/ommazoxbezHQutK9BZoISaBzCBn1+J8E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711461899; c=relaxed/simple; bh=2g+Rb4k6mwvnytIx+JbzdLKgrPbH2TQlVYzTmvcdeio=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rPhnbz6MsZ4WNJ6y2Ua778GW46W3sRS4FPEb34zRK4ojdnHtZ24HBlcT0FGJ+2AaEdcVLOctu+pbk3Tc3XXhLzFwoqYj1FwxfDTTPdVRrlV2UJAojX8TNxcOCmDv50t+xGAs3wa+CiEewZ2r/fYms3pNWs2jrVfk9fk3OJ79rQI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=HYWa+s8h; arc=none smtp.client-ip=217.70.183.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id B9B641C0009; Tue, 26 Mar 2024 14:04:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1711461889; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yVKg1srvGV0u9Yby6NC6W19LV5l9sd0ycpn/q/ojt4I=; b=HYWa+s8hsWSFlC/DftzHqY1shXFc7Rbix12mT9oLWsinklkh3isV3LFIPSxIKQno7EjYaW VtW2xrEDLY59Mbve/VorK6jcyzNiPQsMIcAUr+WiYQHTUp9APmxMN82RVgg8TSzacHNlIT nL3VrgTzAH4dlaKfOVI5rJZL0TZv8Xy4dvYj0r0bONj8jfKQUH22lXZGHjNMi+5X5DFguC kWODYh6Mb9mMjZWlW4aedeGyltB/K28OZAhTDNicO1sOcsUvbkyYyKHBsh/0PVuyHiVsbG hB5aalx9fXTRdDuCRhX4inN4PazOv8xBeKt3grM8hRMVsaOsSp6du855p1qlCg== From: Kory Maincent Date: Tue, 26 Mar 2024 15:04:39 +0100 Subject: [PATCH net-next v6 02/17] of: property: Add fw_devlink support for pse parent Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240326-feature_poe-v6-2-c1011b6ea1cb@bootlin.com> References: <20240326-feature_poe-v6-0-c1011b6ea1cb@bootlin.com> In-Reply-To: <20240326-feature_poe-v6-0-c1011b6ea1cb@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Luis Chamberlain , Russ Weight , Greg Kroah-Hartman , "Rafael J. Wysocki" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Oleksij Rempel , Mark Brown , Frank Rowand , Andrew Lunn , Heiner Kallweit , Russell King Cc: Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, devicetree@vger.kernel.org, Dent Project , Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) This allows fw_devlink to create device links between consumers of a PSE and the supplier of the PSE. Reviewed-by: Andrew Lunn Signed-off-by: Kory Maincent --- Changes in v3: - New patch --- drivers/of/property.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/of/property.c b/drivers/of/property.c index a6358ee99b74..cc064151853e 100644 --- a/drivers/of/property.c +++ b/drivers/of/property.c @@ -1252,6 +1252,7 @@ DEFINE_SIMPLE_PROP(backlight, "backlight", NULL) DEFINE_SIMPLE_PROP(panel, "panel", NULL) DEFINE_SIMPLE_PROP(msi_parent, "msi-parent", "#msi-cells") DEFINE_SIMPLE_PROP(post_init_providers, "post-init-providers", NULL) +DEFINE_SIMPLE_PROP(pses, "pses", "#pse-cells") DEFINE_SUFFIX_PROP(regulators, "-supply", NULL) DEFINE_SUFFIX_PROP(gpio, "-gpio", "#gpio-cells") @@ -1357,6 +1358,7 @@ static const struct supplier_bindings of_supplier_bindings[] = { { .parse_prop = parse_backlight, }, { .parse_prop = parse_panel, }, { .parse_prop = parse_msi_parent, }, + { .parse_prop = parse_pses, }, { .parse_prop = parse_gpio_compat, }, { .parse_prop = parse_interrupts, }, { .parse_prop = parse_regulators, }, From patchwork Tue Mar 26 14:04:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 1916183 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256 header.s=gm1 header.b=llMM3thR; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:4601:e00::3; helo=am.mirrors.kernel.org; envelope-from=devicetree+bounces-53437-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [IPv6:2604:1380:4601:e00::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4V3s895fjmz1yWy for ; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id 339291C0004; Tue, 26 Mar 2024 14:05:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1711461901; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+SQitOyCBH8wPtwseaDfK9i9RhZlx9iW982a7XaITzs=; b=llMM3thRUwhNszenhipigSWEu5EXOdRXpGca+pmJTIk5XUMzGKepxRuOj3JmSBmg7/J8tS 4FOoMWT+imJUaM4OPMSSTvO/3SFXIFTIejaVFNWB4wdyJx5nCnIi8/CTXqK+zelvR53sr8 Abb5w8TxmgZspKnM1J0LWD+dXBz1BD+9l07xdQ256Hup9aGSv3Om1COrRbvffGFZXOzF8A d0mrUpU0I6mkuYs3fdDZArh7ezwRTQB/HsNN2X1QPUfDMs663eoC7iPC1+VFoPqHCMN7Mb hT1T11kS8RhX82ZkCnc47NOpeWXlg04Pd370vjLRJYVExN6rL68ED3OqJtFQwQ== From: Kory Maincent Date: Tue, 26 Mar 2024 15:04:48 +0100 Subject: [PATCH net-next v6 11/17] dt-bindings: net: pse-pd: Add another way of describing several PSE PIs Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240326-feature_poe-v6-11-c1011b6ea1cb@bootlin.com> References: <20240326-feature_poe-v6-0-c1011b6ea1cb@bootlin.com> In-Reply-To: <20240326-feature_poe-v6-0-c1011b6ea1cb@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Luis Chamberlain , Russ Weight , Greg Kroah-Hartman , "Rafael J. Wysocki" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Oleksij Rempel , Mark Brown , Frank Rowand , Andrew Lunn , Heiner Kallweit , Russell King Cc: Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, devicetree@vger.kernel.org, Dent Project , Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) PSE PI setup may encompass multiple PSE controllers or auxiliary circuits that collectively manage power delivery to one Ethernet port. Such configurations might support a range of PoE standards and require the capability to dynamically configure power delivery based on the operational mode (e.g., PoE2 versus PoE4) or specific requirements of connected devices. In these instances, a dedicated PSE PI node becomes essential for accurately documenting the system architecture. This node would serve to detail the interactions between different PSE controllers, the support for various PoE modes, and any additional logic required to coordinate power delivery across the network infrastructure. The old usage of "#pse-cells" is unsuficient as it carries only the PSE PI index information. Signed-off-by: Kory Maincent --- Changes in v3: - New patch Changes in v4: - Remove $def - Fix pairset-names item list - Upgrade few properties description - Update the commit message Changes in v5: - Fix yamllint error. - Replace underscore by dash in properties names. - Add polarity-supported property. Changes in v6: - Reorder the pairset pinout table documentation to shrink the lines size. - Remove pairset and polarity as required fields. - Add vpwr-supply regulator supply. --- .../bindings/net/pse-pd/pse-controller.yaml | 102 ++++++++++++++++++++- 1 file changed, 99 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml b/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml index 2d382faca0e6..03f7f215c162 100644 --- a/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml +++ b/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml @@ -13,6 +13,7 @@ description: Binding for the Power Sourcing Equipment (PSE) as defined in the maintainers: - Oleksij Rempel + - Kory Maincent properties: $nodename: @@ -22,11 +23,106 @@ properties: description: Used to uniquely identify a PSE instance within an IC. Will be 0 on PSE nodes with only a single output and at least 1 on nodes - controlling several outputs. + controlling several outputs which are not described in the pse-pis + subnode. This property is deprecated, please use pse-pis instead. enum: [0, 1] -required: - - "#pse-cells" + pse-pis: + type: object + description: + Overview of the PSE PIs provided by the controller. + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + required: + - "#address-cells" + - "#size-cells" + + patternProperties: + "^pse-pi@[0-9a-f]+$": + type: object + description: + PSE PI for power delivery via pairsets, compliant with IEEE + 802.3-2022, Section 145.2.4. Each pairset comprises a positive and + a negative VPSE pair, adhering to the pinout configurations + detailed in the standard. + See Documentation/networking/pse-pd/pse-pi.rst for details. + + properties: + reg: + description: + Address describing the PSE PI index. + maxItems: 1 + + "#pse-cells": + const: 0 + + pairset-names: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Names of the pairsets as per IEEE 802.3-2022, Section 145.2.4. + Valid values are "alternative-a" and "alternative-b". Each name + should correspond to a phandle in the 'pairset' property + pointing to the power supply for that pairset. + minItems: 1 + maxItems: 2 + items: + enum: + - alternative-a + - alternative-b + + pairsets: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + List of phandles, each pointing to the power supply for the + corresponding pairset named in 'pairset-names'. This property + aligns with IEEE 802.3-2022, Section 33.2.3 and 145.2.4. + PSE Pinout Alternatives (as per IEEE 802.3-2022 Table 145\u20133) + |-----------|---------------|---------------|---------------|---------------| + | Conductor | Alternative A | Alternative A | Alternative B | Alternative B | + | | (MDI-X) | (MDI) | (X) | (S) | + |-----------|---------------|---------------|---------------|---------------| + | 1 | Negative VPSE | Positive VPSE | \u2014 | \u2014 | + | 2 | Negative VPSE | Positive VPSE | \u2014 | \u2014 | + | 3 | Positive VPSE | Negative VPSE | \u2014 | \u2014 | + | 4 | \u2014 | \u2014 | Negative VPSE | Positive VPSE | + | 5 | \u2014 | \u2014 | Negative VPSE | Positive VPSE | + | 6 | Positive VPSE | Negative VPSE | \u2014 | \u2014 | + | 7 | \u2014 | \u2014 | Positive VPSE | Negative VPSE | + | 8 | \u2014 | \u2014 | Positive VPSE | Negative VPSE | + minItems: 1 + maxItems: 2 + + polarity-supported: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Polarity configuration supported by the PSE PI pairsets. + minItems: 1 + maxItems: 4 + items: + enum: + - MDI-X + - MDI + - X + - S + + vpwr-supply: + description: Regulator power supply for the PSE PI. + + required: + - reg + - "#pse-cells" + +oneOf: + - required: + - "#pse-cells" + - required: + - pse-pis additionalProperties: true From patchwork Tue Mar 26 14:04:51 2024 Content-Type: text/plain; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id D92251C000A; Tue, 26 Mar 2024 14:05:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1711461905; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JLeZSfa1oadxgzZdMz17QIBeCZtH39eC4E0W8mr1/dY=; b=HZ5AvwwN0nU4Bu8ILarA1Bg0aWTU1W16/qfm3Pa+b7jFkMJoGf8MaOndH2xPxNpNpKzvoG qP/ni3KG2bnhJA4LOb36NMm2JaQTk9DU/8M+WGIyrzulvj88Dh8IVFZrX1iG7iP1/z75qJ ix8+QKIThL98a/gwBJkhEY9FORADamPCvzD5SzsRbOOpXiI0XQ9IE62a+t/dgkX+XrnrzF csnocQ3feO5R1MXH9D2ySUEcO23hdlzaX2hh5/ev/dd7iUPMw2KiZ9QHhZjGZzOGDfL16U ressTQDu8J7IHte97WyvuJJMNa1UgeTxLkSu3PZxm7orijho93UkmXhI36j8xQ== From: Kory Maincent Date: Tue, 26 Mar 2024 15:04:51 +0100 Subject: [PATCH net-next v6 14/17] dt-bindings: net: pse-pd: Add bindings for PD692x0 PSE controller Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240326-feature_poe-v6-14-c1011b6ea1cb@bootlin.com> References: <20240326-feature_poe-v6-0-c1011b6ea1cb@bootlin.com> In-Reply-To: <20240326-feature_poe-v6-0-c1011b6ea1cb@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Luis Chamberlain , Russ Weight , Greg Kroah-Hartman , "Rafael J. Wysocki" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Oleksij Rempel , Mark Brown , Frank Rowand , Andrew Lunn , Heiner Kallweit , Russell King Cc: Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, devicetree@vger.kernel.org, Dent Project , Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) Add the PD692x0 I2C Power Sourcing Equipment controller device tree bindings documentation. Signed-off-by: Kory Maincent Reviewed-by: Andrew Lunn --- Changes in v2: - Enhance ports-matrix description. - Replace additionalProperties by unevaluatedProperties. - Drop i2c suffix. Changes in v3: - Remove ports-matrix parameter. - Add description of all physical ports and managers. - Add pse_pis subnode moving to the API of pse-controller binding. - Remove the MAINTAINERS section for this driver as I will be maintaining all pse-pd subsystem. Changes in v5: - Remove defs used only once. - Replace underscore by dash. - Add description. --- .../bindings/net/pse-pd/microchip,pd692x0.yaml | 158 +++++++++++++++++++++ 1 file changed, 158 insertions(+) diff --git a/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml b/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml new file mode 100644 index 000000000000..62ea4363cba3 --- /dev/null +++ b/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml @@ -0,0 +1,158 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/pse-pd/microchip,pd692x0.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip PD692x0 Power Sourcing Equipment controller + +maintainers: + - Kory Maincent + +allOf: + - $ref: pse-controller.yaml# + +properties: + compatible: + enum: + - microchip,pd69200 + - microchip,pd69210 + - microchip,pd69220 + + reg: + maxItems: 1 + + managers: + type: object + description: + List of the PD69208T4/PD69204T4/PD69208M PSE managers. Each manager + have 4 or 8 physical ports according to the chip version. No need to + specify the SPI chip select as it is automatically detected by the + PD692x0 PSE controller. The PSE managers have to be described from + the lowest chip select to the greatest one, which is the detection + behavior of the PD692x0 PSE controller. The PD692x0 support up to + 12 PSE managers which can expose up to 96 physical ports. All + physical ports available on a manager have to be described in the + incremental order even if they are not used. + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + required: + - "#address-cells" + - "#size-cells" + + patternProperties: + "^manager@0[0-9]|1[0-2]$": + $ref: /schemas/graph.yaml#/properties/ports + description: + PD69208T4/PD69204T4/PD69208M PSE manager exposing 4 or 8 physical + ports. + + properties: + reg: + description: + Incremental index of the PSE manager starting from 0, ranging + from lowest to highest chip select, up to 12. + maxItems: 1 + + patternProperties: + '^port@[0-7]$': + type: object + required: + - reg + + required: + - reg + +required: + - compatible + - reg + - pse-pis + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-pse@3c { + compatible = "microchip,pd69200"; + reg = <0x3c>; + + managers { + #address-cells = <1>; + #size-cells = <0>; + + manager@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + phys0: port@0 { + reg = <0>; + }; + + phys1: port@1 { + reg = <1>; + }; + + phys2: port@2 { + reg = <2>; + }; + + phys3: port@3 { + reg = <3>; + }; + }; + + manager@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + phys4: port@0 { + reg = <0>; + }; + + phys5: port@1 { + reg = <1>; + }; + + phys6: port@2 { + reg = <2>; + }; + + phys7: port@3 { + reg = <3>; + }; + }; + }; + + pse-pis { + #address-cells = <1>; + #size-cells = <0>; + + pse_pi0: pse-pi@0 { + reg = <0>; + #pse-cells = <0>; + pairset-names = "alternative-a", "alternative-b"; + pairsets = <&phys0>, <&phys1>; + polarity-supported = "MDI", "S"; + }; + pse_pi1: pse-pi@1 { + reg = <1>; + #pse-cells = <0>; + pairset-names = "alternative-a"; + pairsets = <&phys2>; + polarity-supported = "MDI"; + }; + }; + }; + }; From patchwork Tue Mar 26 14:04:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 1916185 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1711461907; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=d/ASpFMpw2FzAH0ULdRz8SPxrRr4gayZF5XpSUrq6cA=; b=SbzQC1SclIb8VpyD6B46zlpxoA01kl89WI2JmUZHD/yzzBhHLDsTMxsj6XOEI90YB3Wb1M aHl1ObmLi57pHjp8edPmsyAVipTTRCdkwkj+oyTloggzyWffRFX69+fcpsS8kfEGJ8WXea XZ/Nmy9Gl62XpQlig7N+vplcvezBNlRAR4tMe9PGw26SlBU0E4jJxIjQ9/IASr6a0sV1Pq DqdQJeL7IcAW2IThvsQDLzZpoRsgO2q6UM57o4Q4VJ1KRpXiZ4oN53cXlfWDG7d6c74tIk MgWeuOb6H2I7wx5nzGe3Wx+gSqz0jPqYGj2JOd9wSg0Dl3+Le2WtGxpidxKOIw== From: Kory Maincent Date: Tue, 26 Mar 2024 15:04:53 +0100 Subject: [PATCH net-next v6 16/17] dt-bindings: net: pse-pd: Add bindings for TPS23881 PSE controller Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240326-feature_poe-v6-16-c1011b6ea1cb@bootlin.com> References: <20240326-feature_poe-v6-0-c1011b6ea1cb@bootlin.com> In-Reply-To: <20240326-feature_poe-v6-0-c1011b6ea1cb@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Jonathan Corbet , Luis Chamberlain , Russ Weight , Greg Kroah-Hartman , "Rafael J. Wysocki" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Oleksij Rempel , Mark Brown , Frank Rowand , Andrew Lunn , Heiner Kallweit , Russell King Cc: Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, devicetree@vger.kernel.org, Dent Project , Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com From: Kory Maincent (Dent Project) Add the TPS23881 I2C Power Sourcing Equipment controller device tree bindings documentation. Signed-off-by: Kory Maincent Reviewed-by: Andrew Lunn --- Change in v3: - New patch. Change in v4: - Rename the file to ti,tps23881 as it support only this version of the PSE controller. --- .../bindings/net/pse-pd/ti,tps23881.yaml | 93 ++++++++++++++++++++++ 1 file changed, 93 insertions(+) diff --git a/Documentation/devicetree/bindings/net/pse-pd/ti,tps23881.yaml b/Documentation/devicetree/bindings/net/pse-pd/ti,tps23881.yaml new file mode 100644 index 000000000000..b8891d109e51 --- /dev/null +++ b/Documentation/devicetree/bindings/net/pse-pd/ti,tps23881.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/pse-pd/ti,tps23881.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI TPS23881 Power Sourcing Equipment controller + +maintainers: + - Kory Maincent + +allOf: + - $ref: pse-controller.yaml# + +properties: + compatible: + enum: + - ti,tps23881 + + reg: + maxItems: 1 + + '#pse-cells': + const: 1 + + channels: + description: each set of 8 ports can be assigned to one physical + channels or two for PoE4. This parameter describes the configuration + of the ports conversion matrix that establishes relationship between + the logical ports and the physical channels. + type: object + + patternProperties: + '^channel@[0-7]$': + type: object + required: + - reg + +unevaluatedProperties: false + +required: + - compatible + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-pse@20 { + compatible = "ti,tps23881"; + reg = <0x20>; + + channels { + #address-cells = <1>; + #size-cells = <0>; + + phys0: channel@0 { + reg = <0>; + }; + + phys1: channel@1 { + reg = <1>; + }; + + phys2: channel@2 { + reg = <2>; + }; + }; + + pse-pis { + #address-cells = <1>; + #size-cells = <0>; + + pse_pi0: pse-pi@0 { + reg = <0>; + #pse-cells = <0>; + pairset-names = "alternative-a", "alternative-b"; + pairsets = <&phys0>, <&phys1>; + polarity-supported = "MDI", "S"; + }; + + pse_pi1: pse-pi@1 { + reg = <1>; + #pse-cells = <0>; + pairset-names = "alternative-a"; + pairsets = <&phys2>; + polarity-supported = "MDI"; + }; + }; + }; + };