From patchwork Tue Feb 27 14:43:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905162 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=TGBjAvyq; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgQk38lJz23qQ for ; Wed, 28 Feb 2024 01:50:54 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reygj-0005Vm-3S; Tue, 27 Feb 2024 09:44:09 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reyge-0005Sj-N9 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:05 -0500 Received: from mail-lj1-x231.google.com ([2a00:1450:4864:20::231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygJ-0001yq-SD for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:04 -0500 Received: by mail-lj1-x231.google.com with SMTP id 38308e7fff4ca-2d09cf00214so67110241fa.0 for ; Tue, 27 Feb 2024 06:43:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045020; x=1709649820; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eLoCVfGQA0B56KJFSLQeHKi/nYPeRXMDk6OZ3NrpqZo=; b=TGBjAvyqhGDi10r2ZEdby2m6MBJ6pz1iin5L1dfgJkWCG3IIMwAnoi1rFuaFk2r0wd fZMZ7f12lnT6udeQEeoJpBLwugkyucOXePFxxMwWMC9XzH61DvyUEFv6hS87vPd+JrGO u3TUh4WMBBDboEYttfyoI/UAym78Duame9iZw2XpdfLsjs+tM9alLZnPRAaq+wagQMAQ TBYeF/oDcgdm9i1rrW0GED4MGstUDfuyxjzmXC7f0HEDe+7ekGrbFE8yAfrJZWASBBmW szZKzxlbwZ0Oo6Y7mh3Y0Iz0TD+8MUOxjh1AMeQag58CIUF4IFIftdRk/ZqNjMLOQITL 2BXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045020; x=1709649820; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eLoCVfGQA0B56KJFSLQeHKi/nYPeRXMDk6OZ3NrpqZo=; b=fpD8lLQAxnxA2kcTU8K5BNd+qP7oJ+y7L2l2lFlFfHb6qckk6+fuddz+1KwgTQmZeJ c6Oum5MUXvManThLLyIp21gw/nlppo8mvrBjtvURrhP7wrTYUwVBLEqwcR0hG/N5EFoQ bpFhBC41qF3HIOc3EFCSx3ga1Xw05ImW4mZydXDufB6KuzUwbwPSdwMlZ3dU7wkSqAxi EWn41+O8/Gi4OcNLaSsOY2DVJztJNbhV1Ra+HNGNB0fpu6XUkz4y8NfAE2DkaPCurkpG HxCJrq/iQV8Jxf4nitaWqPDPNvQm/xM86NMhROkt/1QD4rNKYq4F0wkrGnlUmXF2/B/D 2aRw== X-Gm-Message-State: AOJu0YzFOeGXYIp1Yy5PXXlsKr2Z8NBbJnBvhgSju0KiNIQA9dsuStbl XXleV/7jxV6tgS8BnWueauSXdlD/pL4nKH0UxKaK8L1FjUnqvVai1i9GWFiMIRc= X-Google-Smtp-Source: AGHT+IFUd+aQ2PitlRWZbYFRylnmOVIiEn7GhRufCJxst4nc/9lVXYgVB+N6ysXyMKWmQsn9Gc7rMA== X-Received: by 2002:a05:651c:2211:b0:2d2:8814:e3fb with SMTP id y17-20020a05651c221100b002d28814e3fbmr5427334ljq.49.1709045020102; Tue, 27 Feb 2024 06:43:40 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id fa20-20020a05600c519400b00412acb0b323sm2237909wmb.26.2024.02.27.06.43.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:36 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 85B085F8ED; Tue, 27 Feb 2024 14:43:35 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 01/29] tests/tcg: update licenses to GPLv2 as intended Date: Tue, 27 Feb 2024 14:43:07 +0000 Message-Id: <20240227144335.1196131-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::231; envelope-from=alex.bennee@linaro.org; helo=mail-lj1-x231.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org My default header template is GPLv3 but for QEMU code we really should stick to GPLv2-or-later (allowing others to up-license it if they wish). While this is test code we should still be consistent on the source distribution. I wrote all of this code so its not a problem. However there remains one GPLv3 file left which is the crt0-tc2x.S for TriCore. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Alex Bennée Message-Id: <20240215184036.214065-1-alex.bennee@linaro.org> --- tests/tcg/aarch64/semicall.h | 4 ++-- tests/tcg/arm/semicall.h | 4 ++-- tests/tcg/multiarch/float_helpers.h | 4 ++-- tests/tcg/riscv64/semicall.h | 4 ++-- tests/tcg/multiarch/arm-compat-semi/semiconsole.c | 4 ++-- tests/tcg/multiarch/arm-compat-semi/semihosting.c | 4 ++-- tests/tcg/multiarch/float_convd.c | 4 ++-- tests/tcg/multiarch/float_convs.c | 4 ++-- tests/tcg/multiarch/float_madds.c | 4 ++-- tests/tcg/multiarch/libs/float_helpers.c | 4 ++-- tests/tcg/i386/system/boot.S | 6 +++--- tests/tcg/x86_64/system/boot.S | 6 +++--- 12 files changed, 26 insertions(+), 26 deletions(-) diff --git a/tests/tcg/aarch64/semicall.h b/tests/tcg/aarch64/semicall.h index 8a3fce35c5f..30d4de9a549 100644 --- a/tests/tcg/aarch64/semicall.h +++ b/tests/tcg/aarch64/semicall.h @@ -1,10 +1,10 @@ /* * Semihosting Tests - AArch64 helper * - * Copyright (c) 2019 + * Copyright (c) 2019, 2024 * Written by Alex Bennée * - * SPDX-License-Identifier: GPL-3.0-or-later + * SPDX-License-Identifier: GPL-2.0-or-later */ uintptr_t __semi_call(uintptr_t type, uintptr_t arg0) diff --git a/tests/tcg/arm/semicall.h b/tests/tcg/arm/semicall.h index ad8ac51310b..624937c5577 100644 --- a/tests/tcg/arm/semicall.h +++ b/tests/tcg/arm/semicall.h @@ -1,10 +1,10 @@ /* * Semihosting Tests - ARM Helper * - * Copyright (c) 2019 + * Copyright (c) 2019, 2024 * Written by Alex Bennée * - * SPDX-License-Identifier: GPL-3.0-or-later + * SPDX-License-Identifier: GPL-2.0-or-later */ uintptr_t __semi_call(uintptr_t type, uintptr_t arg0) diff --git a/tests/tcg/multiarch/float_helpers.h b/tests/tcg/multiarch/float_helpers.h index 309f3f4bf10..c42ebe64b9e 100644 --- a/tests/tcg/multiarch/float_helpers.h +++ b/tests/tcg/multiarch/float_helpers.h @@ -1,9 +1,9 @@ /* * Common Float Helpers * - * Copyright (c) 2019 Linaro + * Copyright (c) 2019, 2024 Linaro * - * SPDX-License-Identifier: GPL-3.0-or-later + * SPDX-License-Identifier: GPL-2.0-or-later */ #include diff --git a/tests/tcg/riscv64/semicall.h b/tests/tcg/riscv64/semicall.h index f8c88f32dc5..11d0650cb06 100644 --- a/tests/tcg/riscv64/semicall.h +++ b/tests/tcg/riscv64/semicall.h @@ -1,10 +1,10 @@ /* * Semihosting Tests - RiscV64 Helper * - * Copyright (c) 2021 + * Copyright (c) 2021, 2024 * Written by Alex Bennée * - * SPDX-License-Identifier: GPL-3.0-or-later + * SPDX-License-Identifier: GPL-2.0-or-later */ uintptr_t __semi_call(uintptr_t type, uintptr_t arg0) diff --git a/tests/tcg/multiarch/arm-compat-semi/semiconsole.c b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c index 1d82efc589d..1e2268f4b75 100644 --- a/tests/tcg/multiarch/arm-compat-semi/semiconsole.c +++ b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c @@ -1,10 +1,10 @@ /* * linux-user semihosting console * - * Copyright (c) 2019 + * Copyright (c) 2024 * Written by Alex Bennée * - * SPDX-License-Identifier: GPL-3.0-or-later + * SPDX-License-Identifier: GPL-2.0-or-later */ #define SYS_READC 0x07 diff --git a/tests/tcg/multiarch/arm-compat-semi/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c index 8627eee3cf7..f609c01341a 100644 --- a/tests/tcg/multiarch/arm-compat-semi/semihosting.c +++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c @@ -1,10 +1,10 @@ /* * linux-user semihosting checks * - * Copyright (c) 2019 + * Copyright (c) 2019, 2024 * Written by Alex Bennée * - * SPDX-License-Identifier: GPL-3.0-or-later + * SPDX-License-Identifier: GPL-2.0-or-later */ #define SYS_WRITE0 0x04 diff --git a/tests/tcg/multiarch/float_convd.c b/tests/tcg/multiarch/float_convd.c index 0a1f0f93dc5..58d7f8b4c58 100644 --- a/tests/tcg/multiarch/float_convd.c +++ b/tests/tcg/multiarch/float_convd.c @@ -1,9 +1,9 @@ /* * Floating Point Convert Doubles to Various * - * Copyright (c) 2019 Linaro + * Copyright (c) 2019, 2024 Linaro * - * SPDX-License-Identifier: GPL-3.0-or-later + * SPDX-License-Identifier: GPL-2.0-or-later */ #include diff --git a/tests/tcg/multiarch/float_convs.c b/tests/tcg/multiarch/float_convs.c index 2e4fa55324d..cb1fdd439e3 100644 --- a/tests/tcg/multiarch/float_convs.c +++ b/tests/tcg/multiarch/float_convs.c @@ -1,9 +1,9 @@ /* * Floating Point Convert Single to Various * - * Copyright (c) 2019 Linaro + * Copyright (c) 2019, 2024 Linaro * - * SPDX-License-Identifier: GPL-3.0-or-later + * SPDX-License-Identifier: GPL-2.0-or-later */ #include diff --git a/tests/tcg/multiarch/float_madds.c b/tests/tcg/multiarch/float_madds.c index 4888f8641f4..a692e052d5b 100644 --- a/tests/tcg/multiarch/float_madds.c +++ b/tests/tcg/multiarch/float_madds.c @@ -1,9 +1,9 @@ /* * Fused Multiply Add (Single) * - * Copyright (c) 2019 Linaro + * Copyright (c) 2019, 2024 Linaro * - * SPDX-License-Identifier: GPL-3.0-or-later + * SPDX-License-Identifier: GPL-2.0-or-later */ #include diff --git a/tests/tcg/multiarch/libs/float_helpers.c b/tests/tcg/multiarch/libs/float_helpers.c index 4e68d2b6598..fad5fc98933 100644 --- a/tests/tcg/multiarch/libs/float_helpers.c +++ b/tests/tcg/multiarch/libs/float_helpers.c @@ -5,9 +5,9 @@ * floating point constants useful for exercising the edge cases in * floating point tests. * - * Copyright (c) 2019 Linaro + * Copyright (c) 2019, 2024 Linaro * - * SPDX-License-Identifier: GPL-3.0-or-later + * SPDX-License-Identifier: GPL-2.0-or-later */ /* we want additional float type definitions */ diff --git a/tests/tcg/i386/system/boot.S b/tests/tcg/i386/system/boot.S index 9e8920cbfe0..28902c400d8 100644 --- a/tests/tcg/i386/system/boot.S +++ b/tests/tcg/i386/system/boot.S @@ -2,12 +2,12 @@ * i386 boot code, based on qemu-bmibug. * * Copyright 2019 Doug Gale - * Copyright 2019 Linaro + * Copyright 2019, 2024 Linaro * - * This work is licensed under the terms of the GNU GPL, version 3 or later. + * This work is licensed under the terms of the GNU GPL, version 2 or later. * See the COPYING file in the top-level directory. * - * SPDX-License-Identifier: GPL-3.0-or-later + * SPDX-License-Identifier: GPL-2.0-or-later */ .section .head diff --git a/tests/tcg/x86_64/system/boot.S b/tests/tcg/x86_64/system/boot.S index dac9bd534d7..7213aec63b2 100644 --- a/tests/tcg/x86_64/system/boot.S +++ b/tests/tcg/x86_64/system/boot.S @@ -1,16 +1,16 @@ /* * x86_64 boot and support code * - * Copyright 2019 Linaro + * Copyright 2019, 2024 Linaro * - * This work is licensed under the terms of the GNU GPL, version 3 or later. + * This work is licensed under the terms of the GNU GPL, version 2 or later. * See the COPYING file in the top-level directory. * * Unlike the i386 version we instead use Xen's PVHVM booting header * which should drop us automatically into 32 bit mode ready to go. I've * nabbed bits of the Linux kernel setup to achieve this. * - * SPDX-License-Identifier: GPL-3.0-or-later + * SPDX-License-Identifier: GPL-2.0-or-later */ .section .head From patchwork Tue Feb 27 14:43:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905132 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=zrs+lQTv; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgKs2KbJz1yX0 for ; Wed, 28 Feb 2024 01:46:41 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reygf-0005TS-G0; Tue, 27 Feb 2024 09:44:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reyga-0005QI-DQ for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:00 -0500 Received: from mail-lf1-x133.google.com ([2a00:1450:4864:20::133]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygG-0001xa-U3 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:00 -0500 Received: by mail-lf1-x133.google.com with SMTP id 2adb3069b0e04-513143d3c40so433603e87.3 for ; Tue, 27 Feb 2024 06:43:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045017; x=1709649817; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3AL8+zOsLCpeNoayTmXUJHUL825fMKeEAoMnkSikBrE=; b=zrs+lQTveRicLO/PHwGjuJ9b4oOFwlMBLaJe2IzrEe9w2S2Jj0ZXMJql3UwGFJ4b0B MKBaD3dmVyCLUElwbpeKqS2bdZAf9O9YE93vLwCtOJn2D/G9LEcvmceuF7bJhxFV5F1M vpzgo9PgRaFxoRNlKGi98beoR/RzQI7bXFv4d3GoKDiRz7+eYd7ZXNsx6nUmc57+xPyK 25SZjX1q0LqchSbks6Frl/zDDP/HVLnn9ZhG4NW+izJf9FeVXP3lbJ2+gB6//iEwUjnN Yem1fRDhNcU1rRBqhnxdisRDGxiCllcoqR+gU/4I2eyuZOAmbdWK8gd67zCurngXB7HL aksg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045017; x=1709649817; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3AL8+zOsLCpeNoayTmXUJHUL825fMKeEAoMnkSikBrE=; b=J8s2UEkjsAGBp4ul3BiL/ihVBZkBwXInao9/n8a8pd77izO9CoRBoBVBtO01c96q1L oTwbZY0oRLr97Uv4+2ercVhDzFjLIIspgBDDldI6iObi6UJ2o+GDefGZBsgViVgbX8PA XDEMELjRlAcDgjtaG/tM789p4jxkhrwLcmabOabrLjuyOg3vr9EVBGiQNZdbU3Ik5MI8 atFUIc+4oxZ2KvclfhCVJBVecl8whUtXHTSfJRBOlLxEbOghif4G6WvrmOsuQmNWl3MD CX4LSqMa9Locs1ioNARsbTtaI+TfXxIMpUsvMU64kwWDCGidO4lyAq2D6/MIzSandqc8 1bEw== X-Gm-Message-State: AOJu0YwGhEc0xgh26XvhFNfe8aCjuQbpJUn6BZPrIl9mGtrXJmFQSaS6 +GAXkjOUZ9cRB/8c+Er5rP31P5MlTjW3iz2USrIiOMIf8X6XkPeSGsWIiih1YrY= X-Google-Smtp-Source: AGHT+IF7+UTFJoEc0G4DDoYiqAaS+sAzWfXkGkrxGq3YDrPP/2VvSz0vVcjGUlJzkkSGrEj4kruWCw== X-Received: by 2002:a05:6512:ea5:b0:512:fc6a:2d10 with SMTP id bi37-20020a0565120ea500b00512fc6a2d10mr5074942lfb.40.1709045016834; Tue, 27 Feb 2024 06:43:36 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a2-20020a5d5702000000b0033ce5b3390esm11537174wrv.38.2024.02.27.06.43.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:36 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 9CA7F5F8F7; Tue, 27 Feb 2024 14:43:35 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 02/29] tests/tcg: bump TCG test timeout to 120s Date: Tue, 27 Feb 2024 14:43:08 +0000 Message-Id: <20240227144335.1196131-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::133; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x133.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org This is less than ideal but easier than making sure we get all the iterations of the memory test. Update the comment accordingly. Message-Id: <20240223162202.1936541-3-alex.bennee@linaro.org> Signed-off-by: Alex Bennée Reviewed-by: Thomas Huth --- tests/tcg/Makefile.target | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/tests/tcg/Makefile.target b/tests/tcg/Makefile.target index 8cf65f68dd8..a4c25908fb7 100644 --- a/tests/tcg/Makefile.target +++ b/tests/tcg/Makefile.target @@ -93,12 +93,9 @@ QEMU_OPTS= # If TCG debugging, or TCI is enabled things are a lot slower -# ??? Makefile no longer has any indication that TCI is enabled, -# but for the record: -# 15s original default -# 60s with --enable-debug -# 90s with --enable-tcg-interpreter -TIMEOUT=90 +# so we have to set our timeout for that. The current worst case +# offender is the system memory test running under TCI. +TIMEOUT=120 ifeq ($(filter %-softmmu, $(TARGET)),) # The order we include is important. We include multiarch first and From patchwork Tue Feb 27 14:43:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905148 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=SWNq0+p4; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgNt21mZz1yX0 for ; Wed, 28 Feb 2024 01:49:18 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reygL-0005EN-M2; Tue, 27 Feb 2024 09:43:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reygJ-0005Cg-UR for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:43:44 -0500 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygF-0001xI-BM for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:43:43 -0500 Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-33d6bd39470so2402370f8f.3 for ; Tue, 27 Feb 2024 06:43:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045016; x=1709649816; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CRiAaEWLbPdwH7MCuFZoee4IvGVtzFJe6l3ojpTWHyo=; b=SWNq0+p4xVne2WkB+gqFd2Vg+VPdsKv+uI+zEAVc5TOtUlTelkLc8y+o2ra6aj1Qqr /8exY9xAutr2r6LH4Rr9h0FMLqY8t99stNxiRX5N5f9rmVGjonD2PiSxfd/nkRKXo3ze FsuZi2M7ZQNrYS7l9QAREkjlMDhK5Tvp9FCMK1pD95tpFRGW5zpfLQyMi5g7vrWCYk3F 034JQ+oUyIk/nkO2Hn4zjSfIGMhXwK8O0mb4dB0Vwkdl2zW203QdWOOUfGwurvQfYDri KotheSdfLy0Fly2EAxUqzecJD1FWT+4/qoOJ5lIfNJkKn4fn+eQ3y6W6XtT1OK7HlZEN Ex8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045016; x=1709649816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CRiAaEWLbPdwH7MCuFZoee4IvGVtzFJe6l3ojpTWHyo=; b=cmXifgLOb4WYAKvRDyYby+3EuFF51DRO+keMAwQFnuCccr7LcEfYHMRQyHm+WOzQ9D G87C1i5n8ue3rB/RxoAgRRWrQ2OFikw7orVPrPK0vi/SORqKl4N5h6iGCxDfOX7dytyV e/zxnTaO0/3Or7tcWrwtIWRSe9CIDE1JA/FkuLZefIw4d3skmy8gVh/BKxanX5ee8oI3 D+saZ2EClWJCn54yAzg0R7WwWkE+MgbISd9hdTLVgSxiPIeYfYocNg1joQLAI7RdXvXu xdz8ngiP/aR8B0BmvE6q8LZIutFEhGJv70aR/sTxRXfST05kaKanzcu6035U5GVHLvZx ZVWA== X-Gm-Message-State: AOJu0YyhkJebr1T08R/MdmOnt4Yb9bGVQXEulkODHfZrx0CQzP7TJXfq Y7i913pdXv0I2NFCj+wY75DSD1rY7exzANOmFmbUqXqe+HoWN8e/SAX1GX6hC0c= X-Google-Smtp-Source: AGHT+IHtxOUM6bJrKXQa2pXx+TpjrveJUAUmzCZuLVzZ8zVZGAt9Io79u7D4R36LKQfBwXDzcNVnuA== X-Received: by 2002:a05:6000:dcf:b0:33d:f457:ab45 with SMTP id dw15-20020a0560000dcf00b0033df457ab45mr1051504wrb.43.1709045016596; Tue, 27 Feb 2024 06:43:36 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id bn23-20020a056000061700b0033d1f25b798sm11768370wrb.82.2024.02.27.06.43.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:36 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id B09155F8F9; Tue, 27 Feb 2024 14:43:35 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 03/29] tests/vm: avoid re-building the VM images all the time Date: Tue, 27 Feb 2024 14:43:09 +0000 Message-Id: <20240227144335.1196131-4-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org The main problem is that "check-venv" is a .PHONY target will always evaluate and trigger a full re-build of the VM images. While its tempting to drop it from the dependencies that does introduce a breakage on freshly configured builds. Fortunately we do have the otherwise redundant --force flag for the script which up until now was always on. If we make the usage of --force conditional on dependencies other than check-venv triggering the update we can avoid the costly rebuild and still run cleanly on a fresh checkout. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2118 Signed-off-by: Alex Bennée Reviewed-by: Thomas Huth --- tests/vm/Makefile.include | 2 +- tests/vm/basevm.py | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/tests/vm/Makefile.include b/tests/vm/Makefile.include index bf12e0fa3c5..ac56824a87d 100644 --- a/tests/vm/Makefile.include +++ b/tests/vm/Makefile.include @@ -102,7 +102,7 @@ $(IMAGES_DIR)/%.img: $(SRC_PATH)/tests/vm/% \ $(if $(LOG_CONSOLE),--log-console) \ --source-path $(SRC_PATH) \ --image "$@" \ - --force \ + $(if $(filter-out check-venv, $?), --force) \ --build-image $@, \ " VM-IMAGE $*") diff --git a/tests/vm/basevm.py b/tests/vm/basevm.py index c0d62c08031..f8fd751eb14 100644 --- a/tests/vm/basevm.py +++ b/tests/vm/basevm.py @@ -646,9 +646,9 @@ def main(vmcls, config=None): vm = vmcls(args, config=config) if args.build_image: if os.path.exists(args.image) and not args.force: - sys.stderr.writelines(["Image file exists: %s\n" % args.image, + sys.stderr.writelines(["Image file exists, skipping build: %s\n" % args.image, "Use --force option to overwrite\n"]) - return 1 + return 0 return vm.build_image(args.image) if args.build_qemu: vm.add_source_dir(args.build_qemu) From patchwork Tue Feb 27 14:43:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905125 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=vJchKstr; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgHq5F5zz23qP for ; Wed, 28 Feb 2024 01:44:55 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reygS-0005Lf-5Q; Tue, 27 Feb 2024 09:43:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reygO-0005G3-Hf for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:43:48 -0500 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygF-0001xA-B6 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:43:48 -0500 Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-41298159608so22067615e9.0 for ; Tue, 27 Feb 2024 06:43:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045016; x=1709649816; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ij5ZdnIJjaB2d5j9f+EAx/syvnIPQ+iaNJFFiZwFn30=; b=vJchKstrVNiNk53ZAd2oONmiMJyS/I5gLDGVsQwqyRj7Dx7OQ198eqyjtNxc0Q/mNP Oy9boSu84k1WlnBhS1uECN+JT7VlxyH2eepUg/q9AnTwc4buaWAFsYpBzusPWE5wqbKD ASTAJ7aQTxpOnrKcYsi7F0BQc6+A8be/MJjs4om6Vu41Q6drmKqs3O5GEi9xZPI9tKA1 XAlk3VMHUrc7Iclt3a1CM/cxpVjfdyDUp2qhYfCpentnFXQuRL2SOknhjfjBI1Qy014O i+pJVoeqFQlIwzXJ1mcmO85gWWYtOoxi0T04WPHCoJHYlnShdhH2a25cKz5t+AJhqzEM bKoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045016; x=1709649816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ij5ZdnIJjaB2d5j9f+EAx/syvnIPQ+iaNJFFiZwFn30=; b=VBnKOCMUnoSo3dU0Zed8qoDuy1++dJssPDcIVjhr9AvthgbHQatDtp1Z45rtpJOT1S 0G2+9n1BdMrn+UHvDoCJ/jBTvD8lI+pYuTkA50n/kB4bI0ufUO5MpT23CiYftMTxqo4m mRNqH9ylWe4plnG06dKjAGUTng8Yx7EaKSTxh7893tz5mjrIOygVBR3dV+8gAWnzWa2N P9I3nI7ihQSOG3834rsLzM2uKaJOE0P4SXFG8KoPctWC+z7OWzVUHi5I9Uo2MsIr204K ERYij4D287LQhwf3NknrB8W1bFDIy9t0zD++NmwGqQCk7fLXH8NwYAmTi1SCcR1/jLDQ ks3A== X-Gm-Message-State: AOJu0Yw6fHyaaSr8YaxZmMhvSY+I3lfbb6ieEhg9v+FF7B8CyyfrH0Iw AfTZtbSM5nRT26wvviDXm994YQcLaT5Hc55F0YE1QtZrMEA5DJ99I9u7l4XrKMo= X-Google-Smtp-Source: AGHT+IEGS2vftHGUTYkCBG6KHKkHoYCekFxa+LvbTXnZSRBpQQ3AZilviHOmiwHXb7kn03s57jN0vg== X-Received: by 2002:a05:600c:4591:b0:412:a332:e1cf with SMTP id r17-20020a05600c459100b00412a332e1cfmr6651963wmo.1.1709045016391; Tue, 27 Feb 2024 06:43:36 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id l20-20020a7bc454000000b0041249ea88b9sm11378267wmi.16.2024.02.27.06.43.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:36 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id C47C05F8FC; Tue, 27 Feb 2024 14:43:35 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 04/29] tests/vm: update openbsd image to 7.4 Date: Tue, 27 Feb 2024 14:43:10 +0000 Message-Id: <20240227144335.1196131-5-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org The old links are dead so even if we have the ISO cached we can't finish the install. Update to the current stable and tweak the install strings. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2192 Signed-off-by: Alex Bennée Tested-by: Thomas Huth Reviewed-by: Thomas Huth --- tests/vm/openbsd | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/tests/vm/openbsd b/tests/vm/openbsd index 85c5bb3536c..85c98636332 100755 --- a/tests/vm/openbsd +++ b/tests/vm/openbsd @@ -22,8 +22,8 @@ class OpenBSDVM(basevm.BaseVM): name = "openbsd" arch = "x86_64" - link = "https://cdn.openbsd.org/pub/OpenBSD/7.2/amd64/install72.iso" - csum = "0369ef40a3329efcb978c578c7fdc7bda71e502aecec930a74b44160928c91d3" + link = "https://cdn.openbsd.org/pub/OpenBSD/7.4/amd64/install74.iso" + csum = "a1001736ed9fe2307965b5fcdb426ae11f9b80d26eb21e404a705144a0a224a0" size = "20G" pkgs = [ # tools @@ -99,10 +99,10 @@ class OpenBSDVM(basevm.BaseVM): self.console_wait_send("(I)nstall", "i\n") self.console_wait_send("Terminal type", "xterm\n") self.console_wait_send("System hostname", "openbsd\n") - self.console_wait_send("Which network interface", "vio0\n") + self.console_wait_send("Network interface to configure", "vio0\n") self.console_wait_send("IPv4 address", "autoconf\n") self.console_wait_send("IPv6 address", "none\n") - self.console_wait_send("Which network interface", "done\n") + self.console_wait_send("Network interface to configure", "done\n") self.console_wait("Password for root account") self.console_send("%s\n" % self._config["root_pass"]) self.console_wait("Password for root account") @@ -124,6 +124,7 @@ class OpenBSDVM(basevm.BaseVM): self.console_wait_send("Allow root ssh login", "yes\n") self.console_wait_send("timezone", "UTC\n") self.console_wait_send("root disk", "\n") + self.console_wait_send("Encrypt the root disk with a passphrase", "no\n") self.console_wait_send("(W)hole disk", "\n") self.console_wait_send("(A)uto layout", "c\n") From patchwork Tue Feb 27 14:43:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905128 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=VrlQ8/mJ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgKT0wXyz1yX0 for ; Wed, 28 Feb 2024 01:46:21 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reyh0-00062S-AN; Tue, 27 Feb 2024 09:44:26 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reygy-00061V-Qd for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:24 -0500 Received: from mail-lj1-x231.google.com ([2a00:1450:4864:20::231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygM-000221-GP for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:24 -0500 Received: by mail-lj1-x231.google.com with SMTP id 38308e7fff4ca-2d23a22233fso44706701fa.2 for ; Tue, 27 Feb 2024 06:43:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045024; x=1709649824; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hEkB87vjsQGzSl3E7O7wQIu148BX3ny3/hCUqbep6mw=; b=VrlQ8/mJhrBnqCjNT8ZhJCoXeHBj2Y9rLsGthrCxBPsjMUGHje7ELIB5wULG58KicI 0e413uHYTSDlkhJNLKQ5A8y2DNvWh1VeMEDNa9g7NvB/aJTuCBxGSTVT6Od3+jwYIGmU XWLD2KAKWls8aYYQkspskYfp/kp8ncwIn7cWXS3KWuwz0v/S04VcMoJU2dJxZjZIEhdJ sCwEXBztFgbyoY6DhQuU2ttuwoLvrib4SQCsy4TDD4LzORpJM3f+jMV2J0jypGMNSNAP 6NPp32iY2HOurNwQBssF8XRRnkTZ40oWB5ZgL/fO8qVcUTENpMdhA0LZ5TrkvnV5/VMz PrpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045024; x=1709649824; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hEkB87vjsQGzSl3E7O7wQIu148BX3ny3/hCUqbep6mw=; b=hnHLkD2/YDZMVen/NKwCm0AuJ4ZM2jEonK8GvCtwfliHGCr1L61864rHq9PqLNOFzh lW2YJWqEI2mt+Mi+PsebHOpQn1/nCAXmzaavRAZz/sR9Zubcv0gCKqJSPiIhlGacXw3z O5ecfPYmITRZFNYLcCyQ4A932HZiwoqjcM6+aiUwBlFNRy4tmDxIZ+kNa+4I38sSmgxP KtaA82xrd610hNbgFAZOZElLdpv+Yx1DzfQdxjJCYjWJ2+d9AVQXWhaeQNOCsab2cLLS 3FSJNfBlLtDOusNQJ5XUATtmTS9S/f+Oigyhm3k7oyEh67V3CsLRGDyuRPGuJsLqBo6O GCWw== X-Gm-Message-State: AOJu0YyuWSzCj1pXGgf1NbiETFfSXpBHpoULXt1/Vjm4p4tSWSVDtdHc unmWXfnkvMiE2+a3ZQPeBwZxNtTg4JEjWE/3Skj+X5xZ7nSN3BeoZEE5lVcQxY0= X-Google-Smtp-Source: AGHT+IFETPpP6IKVGROjZ80HoeQNKA/D8ZB6fkZOqMjJ5qKcpIJrxG2/VcOzhosV2eOTfU0SAtxACg== X-Received: by 2002:a05:651c:220a:b0:2d2:4374:b71 with SMTP id y10-20020a05651c220a00b002d243740b71mr8103548ljq.11.1709045024490; Tue, 27 Feb 2024 06:43:44 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id w15-20020a05600c474f00b004129860d532sm11612767wmo.2.2024.02.27.06.43.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:40 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id DC70B5F8FE; Tue, 27 Feb 2024 14:43:35 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour , Akihiko Odaki Subject: [PATCH v4 05/29] target/arm: Use GDBFeature for dynamic XML Date: Tue, 27 Feb 2024 14:43:11 +0000 Message-Id: <20240227144335.1196131-6-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::231; envelope-from=alex.bennee@linaro.org; helo=mail-lj1-x231.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Akihiko Odaki In preparation for a change to use GDBFeature as a parameter of gdb_register_coprocessor(), convert the internal representation of dynamic feature from plain XML to GDBFeature. Signed-off-by: Akihiko Odaki Acked-by: Richard Henderson Message-Id: <20240103173349.398526-27-alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-1-777047380591@daynix.com> Signed-off-by: Alex Bennée --- target/arm/cpu.h | 21 +++--- target/arm/internals.h | 2 +- target/arm/gdbstub.c | 142 ++++++++++++++++++++--------------------- target/arm/gdbstub64.c | 95 +++++++++++++-------------- 4 files changed, 123 insertions(+), 137 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 63f31e0d984..508a9c1e0d6 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -25,6 +25,7 @@ #include "hw/registerfields.h" #include "cpu-qom.h" #include "exec/cpu-defs.h" +#include "exec/gdbstub.h" #include "qapi/qapi-types-common.h" #include "target/arm/multiprocessing.h" #include "target/arm/gtimer.h" @@ -117,23 +118,21 @@ */ /** - * DynamicGDBXMLInfo: - * @desc: Contains the XML descriptions. - * @num: Number of the registers in this XML seen by GDB. + * DynamicGDBFeatureInfo: + * @desc: Contains the feature descriptions. * @data: A union with data specific to the set of registers * @cpregs_keys: Array that contains the corresponding Key of * a given cpreg with the same order of the cpreg * in the XML description. */ -typedef struct DynamicGDBXMLInfo { - char *desc; - int num; +typedef struct DynamicGDBFeatureInfo { + GDBFeature desc; union { struct { uint32_t *keys; } cpregs; } data; -} DynamicGDBXMLInfo; +} DynamicGDBFeatureInfo; /* CPU state for each instance of a generic timer (in cp15 c14) */ typedef struct ARMGenericTimer { @@ -855,10 +854,10 @@ struct ArchCPU { uint64_t *cpreg_vmstate_values; int32_t cpreg_vmstate_array_len; - DynamicGDBXMLInfo dyn_sysreg_xml; - DynamicGDBXMLInfo dyn_svereg_xml; - DynamicGDBXMLInfo dyn_m_systemreg_xml; - DynamicGDBXMLInfo dyn_m_secextreg_xml; + DynamicGDBFeatureInfo dyn_sysreg_feature; + DynamicGDBFeatureInfo dyn_svereg_feature; + DynamicGDBFeatureInfo dyn_m_systemreg_feature; + DynamicGDBFeatureInfo dyn_m_secextreg_feature; /* Timers used by the generic (architected) timer */ QEMUTimer *gt_timer[NUM_GTIMERS]; diff --git a/target/arm/internals.h b/target/arm/internals.h index 50bff445494..05eb9daac7d 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1451,7 +1451,7 @@ static inline uint64_t pmu_counter_mask(CPUARMState *env) } #ifdef TARGET_AARCH64 -int arm_gen_dynamic_svereg_xml(CPUState *cpu, int base_reg); +GDBFeature *arm_gen_dynamic_svereg_feature(CPUState *cpu, int base_reg); int aarch64_gdb_get_sve_reg(CPUARMState *env, GByteArray *buf, int reg); int aarch64_gdb_set_sve_reg(CPUARMState *env, uint8_t *buf, int reg); int aarch64_gdb_get_fpu_reg(CPUARMState *env, GByteArray *buf, int reg); diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c index 28f546a5ff9..5949adfb31a 100644 --- a/target/arm/gdbstub.c +++ b/target/arm/gdbstub.c @@ -26,11 +26,11 @@ #include "cpu-features.h" #include "cpregs.h" -typedef struct RegisterSysregXmlParam { +typedef struct RegisterSysregFeatureParam { CPUState *cs; - GString *s; + GDBFeatureBuilder builder; int n; -} RegisterSysregXmlParam; +} RegisterSysregFeatureParam; /* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect whatever the target description contains. Due to a historical mishap @@ -216,7 +216,7 @@ static int arm_gdb_get_sysreg(CPUARMState *env, GByteArray *buf, int reg) const ARMCPRegInfo *ri; uint32_t key; - key = cpu->dyn_sysreg_xml.data.cpregs.keys[reg]; + key = cpu->dyn_sysreg_feature.data.cpregs.keys[reg]; ri = get_arm_cp_reginfo(cpu->cp_regs, key); if (ri) { if (cpreg_field_is_64bit(ri)) { @@ -233,34 +233,32 @@ static int arm_gdb_set_sysreg(CPUARMState *env, uint8_t *buf, int reg) return 0; } -static void arm_gen_one_xml_sysreg_tag(GString *s, DynamicGDBXMLInfo *dyn_xml, +static void arm_gen_one_feature_sysreg(GDBFeatureBuilder *builder, + DynamicGDBFeatureInfo *dyn_feature, ARMCPRegInfo *ri, uint32_t ri_key, - int bitsize, int regnum) + int bitsize, int n) { - g_string_append_printf(s, "name); - g_string_append_printf(s, " bitsize=\"%d\"", bitsize); - g_string_append_printf(s, " regnum=\"%d\"", regnum); - g_string_append_printf(s, " group=\"cp_regs\"/>"); - dyn_xml->data.cpregs.keys[dyn_xml->num] = ri_key; - dyn_xml->num++; + gdb_feature_builder_append_reg(builder, ri->name, bitsize, n, + "int", "cp_regs"); + + dyn_feature->data.cpregs.keys[n] = ri_key; } -static void arm_register_sysreg_for_xml(gpointer key, gpointer value, - gpointer p) +static void arm_register_sysreg_for_feature(gpointer key, gpointer value, + gpointer p) { uint32_t ri_key = (uintptr_t)key; ARMCPRegInfo *ri = value; - RegisterSysregXmlParam *param = (RegisterSysregXmlParam *)p; - GString *s = param->s; + RegisterSysregFeatureParam *param = p; ARMCPU *cpu = ARM_CPU(param->cs); CPUARMState *env = &cpu->env; - DynamicGDBXMLInfo *dyn_xml = &cpu->dyn_sysreg_xml; + DynamicGDBFeatureInfo *dyn_feature = &cpu->dyn_sysreg_feature; if (!(ri->type & (ARM_CP_NO_RAW | ARM_CP_NO_GDB))) { if (arm_feature(env, ARM_FEATURE_AARCH64)) { if (ri->state == ARM_CP_STATE_AA64) { - arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 64, - param->n++); + arm_gen_one_feature_sysreg(¶m->builder, dyn_feature, + ri, ri_key, 64, param->n++); } } else { if (ri->state == ARM_CP_STATE_AA32) { @@ -269,32 +267,32 @@ static void arm_register_sysreg_for_xml(gpointer key, gpointer value, return; } if (ri->type & ARM_CP_64BIT) { - arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 64, - param->n++); + arm_gen_one_feature_sysreg(¶m->builder, dyn_feature, + ri, ri_key, 64, param->n++); } else { - arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 32, - param->n++); + arm_gen_one_feature_sysreg(¶m->builder, dyn_feature, + ri, ri_key, 32, param->n++); } } } } } -static int arm_gen_dynamic_sysreg_xml(CPUState *cs, int base_reg) +static GDBFeature *arm_gen_dynamic_sysreg_feature(CPUState *cs, int base_reg) { ARMCPU *cpu = ARM_CPU(cs); - GString *s = g_string_new(NULL); - RegisterSysregXmlParam param = {cs, s, base_reg}; - - cpu->dyn_sysreg_xml.num = 0; - cpu->dyn_sysreg_xml.data.cpregs.keys = g_new(uint32_t, g_hash_table_size(cpu->cp_regs)); - g_string_printf(s, ""); - g_string_append_printf(s, ""); - g_string_append_printf(s, ""); - g_hash_table_foreach(cpu->cp_regs, arm_register_sysreg_for_xml, ¶m); - g_string_append_printf(s, ""); - cpu->dyn_sysreg_xml.desc = g_string_free(s, false); - return cpu->dyn_sysreg_xml.num; + RegisterSysregFeatureParam param = {cs}; + gsize num_regs = g_hash_table_size(cpu->cp_regs); + + gdb_feature_builder_init(¶m.builder, + &cpu->dyn_sysreg_feature.desc, + "org.qemu.gdb.arm.sys.regs", + "system-registers.xml", + base_reg); + cpu->dyn_sysreg_feature.data.cpregs.keys = g_new(uint32_t, num_regs); + g_hash_table_foreach(cpu->cp_regs, arm_register_sysreg_for_feature, ¶m); + gdb_feature_builder_end(¶m.builder); + return &cpu->dyn_sysreg_feature.desc; } #ifdef CONFIG_TCG @@ -386,31 +384,29 @@ static int arm_gdb_set_m_systemreg(CPUARMState *env, uint8_t *buf, int reg) return 0; /* TODO */ } -static int arm_gen_dynamic_m_systemreg_xml(CPUState *cs, int orig_base_reg) +static GDBFeature *arm_gen_dynamic_m_systemreg_feature(CPUState *cs, + int base_reg) { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; - GString *s = g_string_new(NULL); - int base_reg = orig_base_reg; + GDBFeatureBuilder builder; + int reg = 0; int i; - g_string_printf(s, ""); - g_string_append_printf(s, ""); - g_string_append_printf(s, "\n"); + gdb_feature_builder_init(&builder, &cpu->dyn_m_systemreg_feature.desc, + "org.gnu.gdb.arm.m-system", "arm-m-system.xml", + base_reg); for (i = 0; i < ARRAY_SIZE(m_sysreg_def); i++) { if (arm_feature(env, m_sysreg_def[i].feature)) { - g_string_append_printf(s, - "\n", - m_sysreg_def[i].name, base_reg++); + gdb_feature_builder_append_reg(&builder, m_sysreg_def[i].name, 32, + reg++, "int", NULL); } } - g_string_append_printf(s, ""); - cpu->dyn_m_systemreg_xml.desc = g_string_free(s, false); - cpu->dyn_m_systemreg_xml.num = base_reg - orig_base_reg; + gdb_feature_builder_end(&builder); - return cpu->dyn_m_systemreg_xml.num; + return &cpu->dyn_m_systemreg_feature.desc; } #ifndef CONFIG_USER_ONLY @@ -428,31 +424,31 @@ static int arm_gdb_set_m_secextreg(CPUARMState *env, uint8_t *buf, int reg) return 0; /* TODO */ } -static int arm_gen_dynamic_m_secextreg_xml(CPUState *cs, int orig_base_reg) +static GDBFeature *arm_gen_dynamic_m_secextreg_feature(CPUState *cs, + int base_reg) { ARMCPU *cpu = ARM_CPU(cs); - GString *s = g_string_new(NULL); - int base_reg = orig_base_reg; + GDBFeatureBuilder builder; + char *name; + int reg = 0; int i; - g_string_printf(s, ""); - g_string_append_printf(s, ""); - g_string_append_printf(s, "\n"); + gdb_feature_builder_init(&builder, &cpu->dyn_m_secextreg_feature.desc, + "org.gnu.gdb.arm.secext", "arm-m-secext.xml", + base_reg); for (i = 0; i < ARRAY_SIZE(m_sysreg_def); i++) { - g_string_append_printf(s, - "\n", - m_sysreg_def[i].name, base_reg++); - g_string_append_printf(s, - "\n", - m_sysreg_def[i].name, base_reg++); + name = g_strconcat(m_sysreg_def[i].name, "_ns", NULL); + gdb_feature_builder_append_reg(&builder, name, 32, reg++, + "int", NULL); + name = g_strconcat(m_sysreg_def[i].name, "_s", NULL); + gdb_feature_builder_append_reg(&builder, name, 32, reg++, + "int", NULL); } - g_string_append_printf(s, ""); - cpu->dyn_m_secextreg_xml.desc = g_string_free(s, false); - cpu->dyn_m_secextreg_xml.num = base_reg - orig_base_reg; + gdb_feature_builder_end(&builder); - return cpu->dyn_m_secextreg_xml.num; + return &cpu->dyn_m_secextreg_feature.desc; } #endif #endif /* CONFIG_TCG */ @@ -462,14 +458,14 @@ const char *arm_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname) ARMCPU *cpu = ARM_CPU(cs); if (strcmp(xmlname, "system-registers.xml") == 0) { - return cpu->dyn_sysreg_xml.desc; + return cpu->dyn_sysreg_feature.desc.xml; } else if (strcmp(xmlname, "sve-registers.xml") == 0) { - return cpu->dyn_svereg_xml.desc; + return cpu->dyn_svereg_feature.desc.xml; } else if (strcmp(xmlname, "arm-m-system.xml") == 0) { - return cpu->dyn_m_systemreg_xml.desc; + return cpu->dyn_m_systemreg_feature.desc.xml; #ifndef CONFIG_USER_ONLY } else if (strcmp(xmlname, "arm-m-secext.xml") == 0) { - return cpu->dyn_m_secextreg_xml.desc; + return cpu->dyn_m_secextreg_feature.desc.xml; #endif } return NULL; @@ -487,7 +483,7 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) */ #ifdef TARGET_AARCH64 if (isar_feature_aa64_sve(&cpu->isar)) { - int nreg = arm_gen_dynamic_svereg_xml(cs, cs->gdb_num_regs); + int nreg = arm_gen_dynamic_svereg_feature(cs, cs->gdb_num_regs)->num_regs; gdb_register_coprocessor(cs, aarch64_gdb_get_sve_reg, aarch64_gdb_set_sve_reg, nreg, "sve-registers.xml", 0); @@ -533,20 +529,20 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) 1, "arm-m-profile-mve.xml", 0); } gdb_register_coprocessor(cs, arm_gdb_get_sysreg, arm_gdb_set_sysreg, - arm_gen_dynamic_sysreg_xml(cs, cs->gdb_num_regs), + arm_gen_dynamic_sysreg_feature(cs, cs->gdb_num_regs)->num_regs, "system-registers.xml", 0); #ifdef CONFIG_TCG if (arm_feature(env, ARM_FEATURE_M) && tcg_enabled()) { gdb_register_coprocessor(cs, arm_gdb_get_m_systemreg, arm_gdb_set_m_systemreg, - arm_gen_dynamic_m_systemreg_xml(cs, cs->gdb_num_regs), + arm_gen_dynamic_m_systemreg_feature(cs, cs->gdb_num_regs)->num_regs, "arm-m-system.xml", 0); #ifndef CONFIG_USER_ONLY if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { gdb_register_coprocessor(cs, arm_gdb_get_m_secextreg, arm_gdb_set_m_secextreg, - arm_gen_dynamic_m_secextreg_xml(cs, cs->gdb_num_regs), + arm_gen_dynamic_m_secextreg_feature(cs, cs->gdb_num_regs)->num_regs, "arm-m-secext.xml", 0); } #endif diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c index d7b79a6589b..5286d5c6043 100644 --- a/target/arm/gdbstub64.c +++ b/target/arm/gdbstub64.c @@ -247,7 +247,7 @@ int aarch64_gdb_set_pauth_reg(CPUARMState *env, uint8_t *buf, int reg) return 0; } -static void output_vector_union_type(GString *s, int reg_width, +static void output_vector_union_type(GDBFeatureBuilder *builder, int reg_width, const char *name) { struct TypeSize { @@ -282,10 +282,10 @@ static void output_vector_union_type(GString *s, int reg_width, /* First define types and totals in a whole VL */ for (i = 0; i < ARRAY_SIZE(vec_lanes); i++) { - g_string_append_printf(s, - "", - name, vec_lanes[i].sz, vec_lanes[i].suffix, - vec_lanes[i].gdb_type, reg_width / vec_lanes[i].size); + gdb_feature_builder_append_tag( + builder, "", + name, vec_lanes[i].sz, vec_lanes[i].suffix, + vec_lanes[i].gdb_type, reg_width / vec_lanes[i].size); } /* @@ -296,86 +296,77 @@ static void output_vector_union_type(GString *s, int reg_width, for (i = 0; i < ARRAY_SIZE(suf); i++) { int bits = 8 << i; - g_string_append_printf(s, "", name, suf[i]); + gdb_feature_builder_append_tag(builder, "", + name, suf[i]); for (j = 0; j < ARRAY_SIZE(vec_lanes); j++) { if (vec_lanes[j].size == bits) { - g_string_append_printf(s, "", - vec_lanes[j].suffix, name, - vec_lanes[j].sz, vec_lanes[j].suffix); + gdb_feature_builder_append_tag( + builder, "", + vec_lanes[j].suffix, name, + vec_lanes[j].sz, vec_lanes[j].suffix); } } - g_string_append(s, ""); + gdb_feature_builder_append_tag(builder, ""); } /* And now the final union of unions */ - g_string_append_printf(s, "", name); + gdb_feature_builder_append_tag(builder, "", name); for (i = ARRAY_SIZE(suf) - 1; i >= 0; i--) { - g_string_append_printf(s, "", - suf[i], name, suf[i]); + gdb_feature_builder_append_tag(builder, + "", + suf[i], name, suf[i]); } - g_string_append(s, ""); + gdb_feature_builder_append_tag(builder, ""); } -int arm_gen_dynamic_svereg_xml(CPUState *cs, int orig_base_reg) +GDBFeature *arm_gen_dynamic_svereg_feature(CPUState *cs, int base_reg) { ARMCPU *cpu = ARM_CPU(cs); - GString *s = g_string_new(NULL); - DynamicGDBXMLInfo *info = &cpu->dyn_svereg_xml; int reg_width = cpu->sve_max_vq * 128; int pred_width = cpu->sve_max_vq * 16; - int base_reg = orig_base_reg; + GDBFeatureBuilder builder; + char *name; + int reg = 0; int i; - g_string_printf(s, ""); - g_string_append_printf(s, ""); - g_string_append_printf(s, ""); + gdb_feature_builder_init(&builder, &cpu->dyn_svereg_feature.desc, + "org.gnu.gdb.aarch64.sve", "sve-registers.xml", + base_reg); /* Create the vector union type. */ - output_vector_union_type(s, reg_width, "svev"); + output_vector_union_type(&builder, reg_width, "svev"); /* Create the predicate vector type. */ - g_string_append_printf(s, - "", - pred_width / 8); + gdb_feature_builder_append_tag( + &builder, "", + pred_width / 8); /* Define the vector registers. */ for (i = 0; i < 32; i++) { - g_string_append_printf(s, - "", - i, reg_width, base_reg++); + name = g_strdup_printf("z%d", i); + gdb_feature_builder_append_reg(&builder, name, reg_width, reg++, + "svev", NULL); } /* fpscr & status registers */ - g_string_append_printf(s, "", base_reg++); - g_string_append_printf(s, "", base_reg++); + gdb_feature_builder_append_reg(&builder, "fpsr", 32, reg++, + "int", "float"); + gdb_feature_builder_append_reg(&builder, "fpcr", 32, reg++, + "int", "float"); /* Define the predicate registers. */ for (i = 0; i < 16; i++) { - g_string_append_printf(s, - "", - i, pred_width, base_reg++); + name = g_strdup_printf("p%d", i); + gdb_feature_builder_append_reg(&builder, name, pred_width, reg++, + "svep", NULL); } - g_string_append_printf(s, - "", - pred_width, base_reg++); + gdb_feature_builder_append_reg(&builder, "ffr", pred_width, reg++, + "svep", "vector"); /* Define the vector length pseudo-register. */ - g_string_append_printf(s, - "", - base_reg++); + gdb_feature_builder_append_reg(&builder, "vg", 64, reg++, "int", NULL); - g_string_append_printf(s, ""); + gdb_feature_builder_end(&builder); - info->desc = g_string_free(s, false); - info->num = base_reg - orig_base_reg; - return info->num; + return &cpu->dyn_svereg_feature.desc; } From patchwork Tue Feb 27 14:43:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905129 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=w2jkjJ8R; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgKY1Kw6z1yX0 for ; Wed, 28 Feb 2024 01:46:25 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reyhJ-0006X4-A2; Tue, 27 Feb 2024 09:44:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reyhA-0006HC-GS for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:36 -0500 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygP-00023W-Ge for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:36 -0500 Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-412af2c7902so3745395e9.3 for ; Tue, 27 Feb 2024 06:43:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045027; x=1709649827; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/6OMZ0loRFGpvJj8x2xSy3ZdDA+ZTmmsIgUpBxK3Sio=; b=w2jkjJ8RYPF9N6fumKmuwf3/48Rp1oruev6SiCRoINpATQdsKW2ytRbLHcCqvzviJh 8mAywgb42uS9YGoRprTAjzj7ug0C384G2fKEDFR09UnEQYNbKXyMWiD38ABVfJIHpcM8 SGrlLpFtPNH1dwWgjhrllfvHfcmUEH/KiXpiMoAPzbQ/6wxwzAg3HQBQTlDOggB7AG/b eSYUSxANjGbBSt3DePIg7bQKCA9331GP2iVbdMoLu7qExrfl97J24+GXCjufa9ZtyBsJ LE9gqZnJDsg/1QtkLvu24uE9nhHrVrPmVvmy098V7ip7OY/2b/32TzGUDBLqWmrxNl4E 6A0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045027; x=1709649827; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/6OMZ0loRFGpvJj8x2xSy3ZdDA+ZTmmsIgUpBxK3Sio=; b=q+wf/J4FcDxQiGDOSeUvRtPY4jjP9pgcwJqz7qdB76U3slQJB96eCYHqW9J5dxsfN8 bNvJwQU7cPX3sTo7Ziz1L+vmD1N2brevtb1Xh7PTCJ99pMLji2M5uv/Vc3MKEhaiTUD5 oVC9OJJAwLHumiP6AX9Cb9lAfajehGL6XELUPVCXaU8DJaEAvJ0SYaqKOkz1D2PpSGHk EmN12BWuNOBu55PDTxCgREvemMzlTx0bqpBSSga/uBrc6YpTdySFMAjk9XPKyt+03QRx jGcrOxf6nhgY+yL41q7e3HQcA3tfG08SmTpQnEcMw+oyvDxFaal+f+v3nr5roBS840/D w5FQ== X-Gm-Message-State: AOJu0Yz3HcpdRVYjY1qgnGDD8pvL6fa1Yl2N3ne9u3h+06YpI5V1QAbY rsEPBKIDCuRKF/Vwu120KiWxoqm6DO0CfKYAGQDfj+qowwrr3ShrN43RNJ2BfGA= X-Google-Smtp-Source: AGHT+IG8I1+aVwhFGLTMbBzvBWRdErnSfLLuYn8YtuxVvShoL2hJNf92Rs6gghvry29w/qMdVzPilA== X-Received: by 2002:a05:600c:5408:b0:412:9868:97ed with SMTP id he8-20020a05600c540800b00412986897edmr7673124wmb.9.1709045027449; Tue, 27 Feb 2024 06:43:47 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id n1-20020a05600c4f8100b004127ead18aasm11648151wmq.22.2024.02.27.06.43.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:40 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id F34D55F900; Tue, 27 Feb 2024 14:43:35 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour , Akihiko Odaki Subject: [PATCH v4 06/29] target/ppc: Use GDBFeature for dynamic XML Date: Tue, 27 Feb 2024 14:43:12 +0000 Message-Id: <20240227144335.1196131-7-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Akihiko Odaki In preparation for a change to use GDBFeature as a parameter of gdb_register_coprocessor(), convert the internal representation of dynamic feature from plain XML to GDBFeature. Signed-off-by: Akihiko Odaki Reviewed-by: Richard Henderson Message-Id: <20240103173349.398526-28-alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-2-777047380591@daynix.com> Signed-off-by: Alex Bennée --- target/ppc/cpu-qom.h | 1 + target/ppc/cpu.h | 4 +--- target/ppc/cpu_init.c | 4 ---- target/ppc/gdbstub.c | 51 ++++++++++++++++--------------------------- 4 files changed, 21 insertions(+), 39 deletions(-) diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index 0241609efef..8247fa23367 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -20,6 +20,7 @@ #ifndef QEMU_PPC_CPU_QOM_H #define QEMU_PPC_CPU_QOM_H +#include "exec/gdbstub.h" #include "hw/core/cpu.h" #ifdef TARGET_PPC64 diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index ec14574d142..c66989a5e60 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1492,8 +1492,7 @@ struct PowerPCCPUClass { int bfd_mach; uint32_t l1_dcache_size, l1_icache_size; #ifndef CONFIG_USER_ONLY - unsigned int gdb_num_sprs; - const char *gdb_spr_xml; + GDBFeature gdb_spr; #endif const PPCHash64Options *hash64_opts; struct ppc_radix_page_info *radix_page_info; @@ -1546,7 +1545,6 @@ int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg); #ifndef CONFIG_USER_ONLY hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); -void ppc_gdb_gen_spr_xml(PowerPCCPU *cpu); const char *ppc_gdb_get_dynamic_xml(CPUState *cs, const char *xml_name); #endif int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 9bccddb350c..5f0ecf443d8 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6682,10 +6682,6 @@ static void init_ppc_proc(PowerPCCPU *cpu) /* PowerPC implementation specific initialisations (SPRs, timers, ...) */ (*pcc->init_proc)(env); -#if !defined(CONFIG_USER_ONLY) - ppc_gdb_gen_spr_xml(cpu); -#endif - /* MSR bits & flags consistency checks */ if (env->msr_mask & (1 << 25)) { switch (env->flags & (POWERPC_FLAG_SPE | POWERPC_FLAG_VRE)) { diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c index dfe31d0f47f..c4c55961083 100644 --- a/target/ppc/gdbstub.c +++ b/target/ppc/gdbstub.c @@ -300,15 +300,23 @@ int ppc_cpu_gdb_write_register_apple(CPUState *cs, uint8_t *mem_buf, int n) } #ifndef CONFIG_USER_ONLY -void ppc_gdb_gen_spr_xml(PowerPCCPU *cpu) +static void gdb_gen_spr_feature(CPUState *cs) { - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs); + PowerPCCPU *cpu = POWERPC_CPU(cs); CPUPPCState *env = &cpu->env; - GString *xml; - char *spr_name; + GDBFeatureBuilder builder; unsigned int num_regs = 0; int i; + if (pcc->gdb_spr.xml) { + return; + } + + gdb_feature_builder_init(&builder, &pcc->gdb_spr, + "org.qemu.power.spr", "power-spr.xml", + cs->gdb_num_regs); + for (i = 0; i < ARRAY_SIZE(env->spr_cb); i++) { ppc_spr_t *spr = &env->spr_cb[i]; @@ -326,35 +334,13 @@ void ppc_gdb_gen_spr_xml(PowerPCCPU *cpu) */ spr->gdb_id = num_regs; num_regs++; - } - - if (pcc->gdb_spr_xml) { - return; - } - xml = g_string_new(""); - g_string_append(xml, ""); - g_string_append(xml, ""); - - for (i = 0; i < ARRAY_SIZE(env->spr_cb); i++) { - ppc_spr_t *spr = &env->spr_cb[i]; - - if (!spr->name) { - continue; - } - - spr_name = g_ascii_strdown(spr->name, -1); - g_string_append_printf(xml, ""); + gdb_feature_builder_append_reg(&builder, g_ascii_strdown(spr->name, -1), + TARGET_LONG_BITS, num_regs, + "int", "spr"); } - g_string_append(xml, ""); - - pcc->gdb_num_sprs = num_regs; - pcc->gdb_spr_xml = g_string_free(xml, false); + gdb_feature_builder_end(&builder); } const char *ppc_gdb_get_dynamic_xml(CPUState *cs, const char *xml_name) @@ -362,7 +348,7 @@ const char *ppc_gdb_get_dynamic_xml(CPUState *cs, const char *xml_name) PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs); if (strcmp(xml_name, "power-spr.xml") == 0) { - return pcc->gdb_spr_xml; + return pcc->gdb_spr.xml; } return NULL; } @@ -635,7 +621,8 @@ void ppc_gdb_init(CPUState *cs, PowerPCCPUClass *pcc) 32, "power-vsx.xml", 0); } #ifndef CONFIG_USER_ONLY + gdb_gen_spr_feature(cs); gdb_register_coprocessor(cs, gdb_get_spr_reg, gdb_set_spr_reg, - pcc->gdb_num_sprs, "power-spr.xml", 0); + pcc->gdb_spr.num_regs, "power-spr.xml", 0); #endif } From patchwork Tue Feb 27 14:43:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905155 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=ZHhYmuxV; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgPX6S4Kz1yX0 for ; Wed, 28 Feb 2024 01:49:52 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reygu-0005rW-Nc; Tue, 27 Feb 2024 09:44:20 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reygt-0005kh-KM for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:19 -0500 Received: from mail-lj1-x229.google.com ([2a00:1450:4864:20::229]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygK-000207-8c for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:19 -0500 Received: by mail-lj1-x229.google.com with SMTP id 38308e7fff4ca-2d269b2ff48so51853311fa.3 for ; Tue, 27 Feb 2024 06:43:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045022; x=1709649822; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LdcVDf8Ux5HUL43SJs6bcSDbxjQQY72FOgDdjsf9tWM=; b=ZHhYmuxVqFA1xkctJ4ZlFximwlV2W6ZDpVp3DZ3aeEOxAqIZEe/FZ+PI78+E9IeQ9w FLaXF7mx55zP5BrcsoNNhVSDWR4Zg34UJZwKGimQo6/EJJckWxKQ7wSkVlWkONwl1ZUp 7WvihTRb13TVNBFN2H/C5H1DzQCwWM/ZiiyzIjTw7BH84J0DZifTJHEdC4J/y1pY3AqC JBnZou0kSRs9cT6L4TYftVwGzOGYK4/tagtV+m0LAscpYGsco/iVMFd6Lwk8pCemkh+F W0n/1WT7hnKqtBukTD88lUa0R04ZtrbZTRTbd77XWZfQZD7eC37ZtSkcizCvNfzLz/2s NMAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045022; x=1709649822; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LdcVDf8Ux5HUL43SJs6bcSDbxjQQY72FOgDdjsf9tWM=; b=dT1KNH16NJCz5K3JaSntL7IWGiPgBq1n1JvAUiAB+rZ5AGGlhIMvNgEY9DA3B+vyA6 /3hxWQVU8qsM7PvAWM7eUoct0BugrfO+dQszIcNj5VHWViuaHsO8GW9LWnwL5ycYukd1 D9Cu433ynLYZ03B1B4dpHiUFRvyz/VqE27c+msCX8WBdKZ2lquGDozoSYF5+lXLSehLh g9wLsu+sKCnwUOW/uYsum9FY0N6qYEaDTPYczQ2EIuBje5P/1FFZ72ftBKUxvR9Zx9g1 HU0q7nV2wUd5bI4Lo9nPmBjGidKuQZILc6zqh3j8h4lRT/o2KPSjZzDezn3xwsTcX2dc LXfg== X-Gm-Message-State: AOJu0Ywn+nZYHmV+kR9d+5kC4Nft/HHnZ9C82UeJ05ReSMwo0LqyP3Ka IV+4//TVXophjbhJuxQxNliYCnUnLlo9hkaHmW0LwMTy9/vve6khGZfyJyMiZ9Q= X-Google-Smtp-Source: AGHT+IE0ugw1zS4G7EcQTQGkyH0uFPMGTJfguSW0yYQ2r269n0o+k9QSGkqpNQu3rOxEsF/DH/7kGA== X-Received: by 2002:a2e:2c13:0:b0:2d2:4f8d:3633 with SMTP id s19-20020a2e2c13000000b002d24f8d3633mr5990232ljs.52.1709045022163; Tue, 27 Feb 2024 06:43:42 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id k22-20020a7bc416000000b0041061f094a2sm15024919wmi.11.2024.02.27.06.43.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:40 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 14DE35F902; Tue, 27 Feb 2024 14:43:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour , Akihiko Odaki Subject: [PATCH v4 07/29] target/riscv: Use GDBFeature for dynamic XML Date: Tue, 27 Feb 2024 14:43:13 +0000 Message-Id: <20240227144335.1196131-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::229; envelope-from=alex.bennee@linaro.org; helo=mail-lj1-x229.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Akihiko Odaki In preparation for a change to use GDBFeature as a parameter of gdb_register_coprocessor(), convert the internal representation of dynamic feature from plain XML to GDBFeature. Signed-off-by: Akihiko Odaki Message-Id: <20240103173349.398526-29-alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-3-777047380591@daynix.com> Signed-off-by: Alex Bennée --- target/riscv/cpu.h | 5 +-- target/riscv/cpu.c | 4 +-- target/riscv/gdbstub.c | 81 +++++++++++++++++++----------------------- 3 files changed, 41 insertions(+), 49 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index f52dce78baa..5d291a70925 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -24,6 +24,7 @@ #include "hw/registerfields.h" #include "hw/qdev-properties.h" #include "exec/cpu-defs.h" +#include "exec/gdbstub.h" #include "qemu/cpu-float.h" #include "qom/object.h" #include "qemu/int128.h" @@ -445,8 +446,8 @@ struct ArchCPU { CPURISCVState env; - char *dyn_csr_xml; - char *dyn_vreg_xml; + GDBFeature dyn_csr_feature; + GDBFeature dyn_vreg_feature; /* Configuration Settings */ RISCVCPUConfig cfg; diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 1b8d001d237..1b62e269b90 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2305,9 +2305,9 @@ static const char *riscv_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname) RISCVCPU *cpu = RISCV_CPU(cs); if (strcmp(xmlname, "riscv-csr.xml") == 0) { - return cpu->dyn_csr_xml; + return cpu->dyn_csr_feature.xml; } else if (strcmp(xmlname, "riscv-vector.xml") == 0) { - return cpu->dyn_vreg_xml; + return cpu->dyn_vreg_feature.xml; } return NULL; diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index ca9b71f7bbc..d8da84fa52e 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -214,14 +214,15 @@ static int riscv_gdb_set_virtual(CPURISCVState *cs, uint8_t *mem_buf, int n) return 0; } -static int riscv_gen_dynamic_csr_xml(CPUState *cs, int base_reg) +static GDBFeature *riscv_gen_dynamic_csr_feature(CPUState *cs, int base_reg) { RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cs); RISCVCPU *cpu = RISCV_CPU(cs); CPURISCVState *env = &cpu->env; - GString *s = g_string_new(NULL); + GDBFeatureBuilder builder; riscv_csr_predicate_fn predicate; int bitsize = riscv_cpu_max_xlen(mcc); + const char *name; int i; #if !defined(CONFIG_USER_ONLY) @@ -233,9 +234,9 @@ static int riscv_gen_dynamic_csr_xml(CPUState *cs, int base_reg) bitsize = 64; } - g_string_printf(s, ""); - g_string_append_printf(s, ""); - g_string_append_printf(s, ""); + gdb_feature_builder_init(&builder, &cpu->dyn_csr_feature, + "org.gnu.gdb.riscv.csr", "riscv-csr.xml", + base_reg); for (i = 0; i < CSR_TABLE_SIZE; i++) { if (env->priv_ver < csr_ops[i].min_priv_ver) { @@ -243,72 +244,64 @@ static int riscv_gen_dynamic_csr_xml(CPUState *cs, int base_reg) } predicate = csr_ops[i].predicate; if (predicate && (predicate(env, i) == RISCV_EXCP_NONE)) { - if (csr_ops[i].name) { - g_string_append_printf(s, "", base_reg + i); + + gdb_feature_builder_append_reg(&builder, name, bitsize, i, + "int", NULL); } } - g_string_append_printf(s, ""); - - cpu->dyn_csr_xml = g_string_free(s, false); + gdb_feature_builder_end(&builder); #if !defined(CONFIG_USER_ONLY) env->debugger = false; #endif - return CSR_TABLE_SIZE; + return &cpu->dyn_csr_feature; } -static int ricsv_gen_dynamic_vector_xml(CPUState *cs, int base_reg) +static GDBFeature *ricsv_gen_dynamic_vector_feature(CPUState *cs, int base_reg) { RISCVCPU *cpu = RISCV_CPU(cs); - GString *s = g_string_new(NULL); - g_autoptr(GString) ts = g_string_new(""); - int reg_width = cpu->cfg.vlenb << 3; - int num_regs = 0; + int reg_width = cpu->cfg.vlenb; + GDBFeatureBuilder builder; int i; - g_string_printf(s, ""); - g_string_append_printf(s, ""); - g_string_append_printf(s, ""); + gdb_feature_builder_init(&builder, &cpu->dyn_vreg_feature, + "org.gnu.gdb.riscv.vector", "riscv-vector.xml", + base_reg); /* First define types and totals in a whole VL */ for (i = 0; i < ARRAY_SIZE(vec_lanes); i++) { int count = reg_width / vec_lanes[i].size; - g_string_printf(ts, "%s", vec_lanes[i].id); - g_string_append_printf(s, - "", - ts->str, vec_lanes[i].gdb_type, count); + gdb_feature_builder_append_tag( + &builder, "", + vec_lanes[i].id, vec_lanes[i].gdb_type, count); } /* Define unions */ - g_string_append_printf(s, ""); + gdb_feature_builder_append_tag(&builder, ""); for (i = 0; i < ARRAY_SIZE(vec_lanes); i++) { - g_string_append_printf(s, "", - vec_lanes[i].suffix, - vec_lanes[i].id); + gdb_feature_builder_append_tag(&builder, + "", + vec_lanes[i].suffix, vec_lanes[i].id); } - g_string_append(s, ""); + gdb_feature_builder_append_tag(&builder, ""); /* Define vector registers */ for (i = 0; i < 32; i++) { - g_string_append_printf(s, - "", - i, reg_width, base_reg++); - num_regs++; + gdb_feature_builder_append_reg(&builder, g_strdup_printf("v%d", i), + reg_width, i, "riscv_vector", "vector"); } - g_string_append_printf(s, ""); + gdb_feature_builder_end(&builder); - cpu->dyn_vreg_xml = g_string_free(s, false); - return num_regs; + return &cpu->dyn_vreg_feature; } void riscv_cpu_register_gdb_regs_for_features(CPUState *cs) @@ -324,10 +317,9 @@ void riscv_cpu_register_gdb_regs_for_features(CPUState *cs) 32, "riscv-32bit-fpu.xml", 0); } if (env->misa_ext & RVV) { - int base_reg = cs->gdb_num_regs; gdb_register_coprocessor(cs, riscv_gdb_get_vector, riscv_gdb_set_vector, - ricsv_gen_dynamic_vector_xml(cs, base_reg), + ricsv_gen_dynamic_vector_feature(cs, cs->gdb_num_regs)->num_regs, "riscv-vector.xml", 0); } switch (mcc->misa_mxl_max) { @@ -347,9 +339,8 @@ void riscv_cpu_register_gdb_regs_for_features(CPUState *cs) } if (cpu->cfg.ext_zicsr) { - int base_reg = cs->gdb_num_regs; gdb_register_coprocessor(cs, riscv_gdb_get_csr, riscv_gdb_set_csr, - riscv_gen_dynamic_csr_xml(cs, base_reg), + riscv_gen_dynamic_csr_feature(cs, cs->gdb_num_regs)->num_regs, "riscv-csr.xml", 0); } } From patchwork Tue Feb 27 14:43:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905159 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=ZyGLX749; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgQY00jcz1yX4 for ; Wed, 28 Feb 2024 01:50:44 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reyh7-0006Cj-V2; Tue, 27 Feb 2024 09:44:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reyh6-00069x-QM for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:32 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygP-00023C-09 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:32 -0500 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-33d6f26ff33so3072618f8f.0 for ; Tue, 27 Feb 2024 06:43:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045027; x=1709649827; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rjr9OC5Xz6b+rRWzYWkX5eP3RARDFcB2hEKUoICFAA0=; b=ZyGLX7496vyRzpt0A/YHZBx5xnYIxTQIqWpvfpa8AdSyB7ca3Gg7wcUw6sw48Uw0lc 5BSQBtuX+H37PIuUEAft9nm0ZnhqAHViBAEMvIMzRfTpald63EX9bjNIu83IsMnjrH/m PpOPKWvdyYwKPrBJlJ/Jl/NO0tlRH0FsSRAQn3zmDDb863sRNDQ0luAu+6TaBIcRPCHx IRRqk9HKszMPdW/xg4X3kQzkSywuiulf7Z+VewJC0LZloD/jCzKmQS8sL+c4ccvmoWok 0glYTLuY7MZ29HsfnNipI3aPbQiBGrzwDqFugx8RKCcxo62f3W/IaCEiv4dK4uMVdS4P 6Yww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045027; x=1709649827; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rjr9OC5Xz6b+rRWzYWkX5eP3RARDFcB2hEKUoICFAA0=; b=toLzLIS0JcGSDRVtuxnNJw072kuM47sKHgKlVQi5XYLO1LpjGLruoC2xRr6b9TaZWZ zH0C5hWBv9klSnaJh3JAl/U7zbMkwnnZZ0w5HvV0rxfSe1xu+iKx89C0ObvjWNIT6fbI jWdSGROEpXO7YOnoZzPv1AQ0d2VjgZ7kqFQBv5TT5KF2CvTj89gQooVmgGaKbFCVn5Pj 9rz+rQtUvE89BKbeTd6z9d5tJWaXft88ZEg0S1swrL3eGTYpHkMt5mEA0bam2L09MwiU Xy80rx3tsUK20CtBayl7xL9EbGShfTYh3CmuL+dBjoDvg7CuhxV2b9JI1DEO1BgCplj8 bssA== X-Gm-Message-State: AOJu0YxHx6Ag3iNffNpSfNTpj27Yhx3BwdaUn5oloj516MduuL01vpSn I+sXEgKWkCPUFqlOTiiX4K2Iu1Bt+MWzT8r4PLzPPMWudM66jRB6kjbYYXq2Moo= X-Google-Smtp-Source: AGHT+IESLBVX+ktxSUQ/3q2aKkB7lIJ0OJy6ptFNC27eZm8bcNa9A5fGpTzqfk0ya5km35cqo5I82Q== X-Received: by 2002:adf:ec8d:0:b0:33d:f457:ab55 with SMTP id z13-20020adfec8d000000b0033df457ab55mr1099685wrn.52.1709045027198; Tue, 27 Feb 2024 06:43:47 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id bu25-20020a056000079900b0033d8a17a710sm11921316wrb.88.2024.02.27.06.43.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:40 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 351805F904; Tue, 27 Feb 2024 14:43:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour , Akihiko Odaki Subject: [PATCH v4 08/29] gdbstub: Use GDBFeature for gdb_register_coprocessor Date: Tue, 27 Feb 2024 14:43:14 +0000 Message-Id: <20240227144335.1196131-9-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Akihiko Odaki This is a tree-wide change to introduce GDBFeature parameter to gdb_register_coprocessor(). The new parameter just replaces num_regs and xml parameters for now. GDBFeature will be utilized to simplify XML lookup in a following change. Signed-off-by: Akihiko Odaki Acked-by: Alex Bennée Message-Id: <20240103173349.398526-30-alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-4-777047380591@daynix.com> Signed-off-by: Alex Bennée --- include/exec/gdbstub.h | 2 +- gdbstub/gdbstub.c | 13 +++++++------ target/arm/gdbstub.c | 35 +++++++++++++++++++---------------- target/hexagon/cpu.c | 3 +-- target/loongarch/gdbstub.c | 2 +- target/m68k/helper.c | 6 +++--- target/microblaze/cpu.c | 5 +++-- target/ppc/gdbstub.c | 11 ++++++----- target/riscv/gdbstub.c | 20 ++++++++++++-------- target/s390x/gdbstub.c | 28 +++++++--------------------- 10 files changed, 60 insertions(+), 65 deletions(-) diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h index d8a3c56fa2b..ac6fce99a64 100644 --- a/include/exec/gdbstub.h +++ b/include/exec/gdbstub.h @@ -38,7 +38,7 @@ typedef int (*gdb_set_reg_cb)(CPUArchState *env, uint8_t *buf, int reg); */ void gdb_register_coprocessor(CPUState *cpu, gdb_get_reg_cb get_reg, gdb_set_reg_cb set_reg, - int num_regs, const char *xml, int g_pos); + const GDBFeature *feature, int g_pos); /** * gdbserver_start: start the gdb server diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c index 7e73e916bdc..256599c8dfb 100644 --- a/gdbstub/gdbstub.c +++ b/gdbstub/gdbstub.c @@ -544,7 +544,7 @@ static int gdb_write_register(CPUState *cpu, uint8_t *mem_buf, int reg) void gdb_register_coprocessor(CPUState *cpu, gdb_get_reg_cb get_reg, gdb_set_reg_cb set_reg, - int num_regs, const char *xml, int g_pos) + const GDBFeature *feature, int g_pos) { GDBRegisterState *s; guint i; @@ -553,7 +553,7 @@ void gdb_register_coprocessor(CPUState *cpu, for (i = 0; i < cpu->gdb_regs->len; i++) { /* Check for duplicates. */ s = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); - if (strcmp(s->xml, xml) == 0) { + if (strcmp(s->xml, feature->xmlname) == 0) { return; } } @@ -565,17 +565,18 @@ void gdb_register_coprocessor(CPUState *cpu, g_array_set_size(cpu->gdb_regs, i + 1); s = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); s->base_reg = cpu->gdb_num_regs; - s->num_regs = num_regs; + s->num_regs = feature->num_regs; s->get_reg = get_reg; s->set_reg = set_reg; - s->xml = xml; + s->xml = feature->xml; /* Add to end of list. */ - cpu->gdb_num_regs += num_regs; + cpu->gdb_num_regs += feature->num_regs; if (g_pos) { if (g_pos != s->base_reg) { error_report("Error: Bad gdb register numbering for '%s', " - "expected %d got %d", xml, g_pos, s->base_reg); + "expected %d got %d", feature->xml, + g_pos, s->base_reg); } else { cpu->gdb_num_g_regs = cpu->gdb_num_regs; } diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c index 5949adfb31a..f2b201d3125 100644 --- a/target/arm/gdbstub.c +++ b/target/arm/gdbstub.c @@ -483,14 +483,14 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) */ #ifdef TARGET_AARCH64 if (isar_feature_aa64_sve(&cpu->isar)) { - int nreg = arm_gen_dynamic_svereg_feature(cs, cs->gdb_num_regs)->num_regs; + GDBFeature *feature = arm_gen_dynamic_svereg_feature(cs, cs->gdb_num_regs); gdb_register_coprocessor(cs, aarch64_gdb_get_sve_reg, - aarch64_gdb_set_sve_reg, nreg, - "sve-registers.xml", 0); + aarch64_gdb_set_sve_reg, feature, 0); } else { gdb_register_coprocessor(cs, aarch64_gdb_get_fpu_reg, aarch64_gdb_set_fpu_reg, - 34, "aarch64-fpu.xml", 0); + gdb_find_static_feature("aarch64-fpu.xml"), + 0); } /* * Note that we report pauth information via the feature name @@ -501,19 +501,22 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) if (isar_feature_aa64_pauth(&cpu->isar)) { gdb_register_coprocessor(cs, aarch64_gdb_get_pauth_reg, aarch64_gdb_set_pauth_reg, - 4, "aarch64-pauth.xml", 0); + gdb_find_static_feature("aarch64-pauth.xml"), + 0); } #endif } else { if (arm_feature(env, ARM_FEATURE_NEON)) { gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg, - 49, "arm-neon.xml", 0); + gdb_find_static_feature("arm-neon.xml"), + 0); } else if (cpu_isar_feature(aa32_simd_r32, cpu)) { gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg, - 33, "arm-vfp3.xml", 0); + gdb_find_static_feature("arm-vfp3.xml"), + 0); } else if (cpu_isar_feature(aa32_vfp_simd, cpu)) { gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg, - 17, "arm-vfp.xml", 0); + gdb_find_static_feature("arm-vfp.xml"), 0); } if (!arm_feature(env, ARM_FEATURE_M)) { /* @@ -521,29 +524,29 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) * expose to gdb. */ gdb_register_coprocessor(cs, vfp_gdb_get_sysreg, vfp_gdb_set_sysreg, - 2, "arm-vfp-sysregs.xml", 0); + gdb_find_static_feature("arm-vfp-sysregs.xml"), + 0); } } if (cpu_isar_feature(aa32_mve, cpu) && tcg_enabled()) { gdb_register_coprocessor(cs, mve_gdb_get_reg, mve_gdb_set_reg, - 1, "arm-m-profile-mve.xml", 0); + gdb_find_static_feature("arm-m-profile-mve.xml"), + 0); } gdb_register_coprocessor(cs, arm_gdb_get_sysreg, arm_gdb_set_sysreg, - arm_gen_dynamic_sysreg_feature(cs, cs->gdb_num_regs)->num_regs, - "system-registers.xml", 0); + arm_gen_dynamic_sysreg_feature(cs, cs->gdb_num_regs), + 0); #ifdef CONFIG_TCG if (arm_feature(env, ARM_FEATURE_M) && tcg_enabled()) { gdb_register_coprocessor(cs, arm_gdb_get_m_systemreg, arm_gdb_set_m_systemreg, - arm_gen_dynamic_m_systemreg_feature(cs, cs->gdb_num_regs)->num_regs, - "arm-m-system.xml", 0); + arm_gen_dynamic_m_systemreg_feature(cs, cs->gdb_num_regs), 0); #ifndef CONFIG_USER_ONLY if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { gdb_register_coprocessor(cs, arm_gdb_get_m_secextreg, arm_gdb_set_m_secextreg, - arm_gen_dynamic_m_secextreg_feature(cs, cs->gdb_num_regs)->num_regs, - "arm-m-secext.xml", 0); + arm_gen_dynamic_m_secextreg_feature(cs, cs->gdb_num_regs), 0); } #endif } diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 759ea62814d..ebe804e2931 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -319,8 +319,7 @@ static void hexagon_cpu_realize(DeviceState *dev, Error **errp) gdb_register_coprocessor(cs, hexagon_hvx_gdb_read_register, hexagon_hvx_gdb_write_register, - NUM_VREGS + NUM_QREGS, - "hexagon-hvx.xml", 0); + gdb_find_static_feature("hexagon-hvx.xml"), 0); qemu_init_vcpu(cs); cpu_reset(cs); diff --git a/target/loongarch/gdbstub.c b/target/loongarch/gdbstub.c index 5fc2f19e965..843a869450e 100644 --- a/target/loongarch/gdbstub.c +++ b/target/loongarch/gdbstub.c @@ -118,5 +118,5 @@ static int loongarch_gdb_set_fpu(CPULoongArchState *env, void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs) { gdb_register_coprocessor(cs, loongarch_gdb_get_fpu, loongarch_gdb_set_fpu, - 41, "loongarch-fpu.xml", 0); + gdb_find_static_feature("loongarch-fpu.xml"), 0); } diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 14508dfa118..9808d676a22 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -112,10 +112,10 @@ void m68k_cpu_init_gdb(M68kCPU *cpu) if (m68k_feature(env, M68K_FEATURE_CF_FPU)) { gdb_register_coprocessor(cs, cf_fpu_gdb_get_reg, cf_fpu_gdb_set_reg, - 11, "cf-fp.xml", 18); + gdb_find_static_feature("cf-fp.xml"), 18); } else if (m68k_feature(env, M68K_FEATURE_FPU)) { - gdb_register_coprocessor(cs, m68k_fpu_gdb_get_reg, - m68k_fpu_gdb_set_reg, 11, "m68k-fp.xml", 18); + gdb_register_coprocessor(cs, m68k_fpu_gdb_get_reg, m68k_fpu_gdb_set_reg, + gdb_find_static_feature("m68k-fp.xml"), 18); } /* TODO: Add [E]MAC registers. */ } diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 2002231a6b4..2c62cf048c2 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -313,8 +313,9 @@ static void mb_cpu_initfn(Object *obj) CPUMBState *env = &cpu->env; gdb_register_coprocessor(CPU(cpu), mb_cpu_gdb_read_stack_protect, - mb_cpu_gdb_write_stack_protect, 2, - "microblaze-stack-protect.xml", 0); + mb_cpu_gdb_write_stack_protect, + gdb_find_static_feature("microblaze-stack-protect.xml"), + 0); set_float_rounding_mode(float_round_nearest_even, &env->fp_status); diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c index c4c55961083..625ccf96c5b 100644 --- a/target/ppc/gdbstub.c +++ b/target/ppc/gdbstub.c @@ -606,23 +606,24 @@ void ppc_gdb_init(CPUState *cs, PowerPCCPUClass *pcc) { if (pcc->insns_flags & PPC_FLOAT) { gdb_register_coprocessor(cs, gdb_get_float_reg, gdb_set_float_reg, - 33, "power-fpu.xml", 0); + gdb_find_static_feature("power-fpu.xml"), 0); } if (pcc->insns_flags & PPC_ALTIVEC) { gdb_register_coprocessor(cs, gdb_get_avr_reg, gdb_set_avr_reg, - 34, "power-altivec.xml", 0); + gdb_find_static_feature("power-altivec.xml"), + 0); } if (pcc->insns_flags & PPC_SPE) { gdb_register_coprocessor(cs, gdb_get_spe_reg, gdb_set_spe_reg, - 34, "power-spe.xml", 0); + gdb_find_static_feature("power-spe.xml"), 0); } if (pcc->insns_flags2 & PPC2_VSX) { gdb_register_coprocessor(cs, gdb_get_vsx_reg, gdb_set_vsx_reg, - 32, "power-vsx.xml", 0); + gdb_find_static_feature("power-vsx.xml"), 0); } #ifndef CONFIG_USER_ONLY gdb_gen_spr_feature(cs); gdb_register_coprocessor(cs, gdb_get_spr_reg, gdb_set_spr_reg, - pcc->gdb_spr.num_regs, "power-spr.xml", 0); + &pcc->gdb_spr, 0); #endif } diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index d8da84fa52e..ec1fc6a29da 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -311,28 +311,32 @@ void riscv_cpu_register_gdb_regs_for_features(CPUState *cs) CPURISCVState *env = &cpu->env; if (env->misa_ext & RVD) { gdb_register_coprocessor(cs, riscv_gdb_get_fpu, riscv_gdb_set_fpu, - 32, "riscv-64bit-fpu.xml", 0); + gdb_find_static_feature("riscv-64bit-fpu.xml"), + 0); } else if (env->misa_ext & RVF) { gdb_register_coprocessor(cs, riscv_gdb_get_fpu, riscv_gdb_set_fpu, - 32, "riscv-32bit-fpu.xml", 0); + gdb_find_static_feature("riscv-32bit-fpu.xml"), + 0); } if (env->misa_ext & RVV) { gdb_register_coprocessor(cs, riscv_gdb_get_vector, riscv_gdb_set_vector, - ricsv_gen_dynamic_vector_feature(cs, cs->gdb_num_regs)->num_regs, - "riscv-vector.xml", 0); + ricsv_gen_dynamic_vector_feature(cs, cs->gdb_num_regs), + 0); } switch (mcc->misa_mxl_max) { case MXL_RV32: gdb_register_coprocessor(cs, riscv_gdb_get_virtual, riscv_gdb_set_virtual, - 1, "riscv-32bit-virtual.xml", 0); + gdb_find_static_feature("riscv-32bit-virtual.xml"), + 0); break; case MXL_RV64: case MXL_RV128: gdb_register_coprocessor(cs, riscv_gdb_get_virtual, riscv_gdb_set_virtual, - 1, "riscv-64bit-virtual.xml", 0); + gdb_find_static_feature("riscv-64bit-virtual.xml"), + 0); break; default: g_assert_not_reached(); @@ -340,7 +344,7 @@ void riscv_cpu_register_gdb_regs_for_features(CPUState *cs) if (cpu->cfg.ext_zicsr) { gdb_register_coprocessor(cs, riscv_gdb_get_csr, riscv_gdb_set_csr, - riscv_gen_dynamic_csr_feature(cs, cs->gdb_num_regs)->num_regs, - "riscv-csr.xml", 0); + riscv_gen_dynamic_csr_feature(cs, cs->gdb_num_regs), + 0); } } diff --git a/target/s390x/gdbstub.c b/target/s390x/gdbstub.c index f02fa316e53..256f1c7c6db 100644 --- a/target/s390x/gdbstub.c +++ b/target/s390x/gdbstub.c @@ -67,8 +67,6 @@ int s390_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) /* the values represent the positions in s390-acr.xml */ #define S390_A0_REGNUM 0 #define S390_A15_REGNUM 15 -/* total number of registers in s390-acr.xml */ -#define S390_NUM_AC_REGS 16 static int cpu_read_ac_reg(CPUS390XState *env, GByteArray *buf, int n) { @@ -96,8 +94,6 @@ static int cpu_write_ac_reg(CPUS390XState *env, uint8_t *mem_buf, int n) #define S390_FPC_REGNUM 0 #define S390_F0_REGNUM 1 #define S390_F15_REGNUM 16 -/* total number of registers in s390-fpr.xml */ -#define S390_NUM_FP_REGS 17 static int cpu_read_fp_reg(CPUS390XState *env, GByteArray *buf, int n) { @@ -130,8 +126,6 @@ static int cpu_write_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n) #define S390_V15L_REGNUM 15 #define S390_V16_REGNUM 16 #define S390_V31_REGNUM 31 -/* total number of registers in s390-vx.xml */ -#define S390_NUM_VREGS 32 static int cpu_read_vreg(CPUS390XState *env, GByteArray *buf, int n) { @@ -170,8 +164,6 @@ static int cpu_write_vreg(CPUS390XState *env, uint8_t *mem_buf, int n) /* the values represent the positions in s390-cr.xml */ #define S390_C0_REGNUM 0 #define S390_C15_REGNUM 15 -/* total number of registers in s390-cr.xml */ -#define S390_NUM_C_REGS 16 #ifndef CONFIG_USER_ONLY static int cpu_read_c_reg(CPUS390XState *env, GByteArray *buf, int n) @@ -204,8 +196,6 @@ static int cpu_write_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n) #define S390_VIRT_CPUTM_REGNUM 1 #define S390_VIRT_BEA_REGNUM 2 #define S390_VIRT_PREFIX_REGNUM 3 -/* total number of registers in s390-virt.xml */ -#define S390_NUM_VIRT_REGS 4 static int cpu_read_virt_reg(CPUS390XState *env, GByteArray *mem_buf, int n) { @@ -252,8 +242,6 @@ static int cpu_write_virt_reg(CPUS390XState *env, uint8_t *mem_buf, int n) #define S390_VIRT_KVM_PFT_REGNUM 1 #define S390_VIRT_KVM_PFS_REGNUM 2 #define S390_VIRT_KVM_PFC_REGNUM 3 -/* total number of registers in s390-virt-kvm.xml */ -#define S390_NUM_VIRT_KVM_REGS 4 static int cpu_read_virt_kvm_reg(CPUS390XState *env, GByteArray *mem_buf, int n) { @@ -301,8 +289,6 @@ static int cpu_write_virt_kvm_reg(CPUS390XState *env, uint8_t *mem_buf, int n) #define S390_GS_GSD_REGNUM 1 #define S390_GS_GSSM_REGNUM 2 #define S390_GS_GSEPLA_REGNUM 3 -/* total number of registers in s390-gs.xml */ -#define S390_NUM_GS_REGS 4 static int cpu_read_gs_reg(CPUS390XState *env, GByteArray *buf, int n) { @@ -320,33 +306,33 @@ void s390_cpu_gdb_init(CPUState *cs) { gdb_register_coprocessor(cs, cpu_read_ac_reg, cpu_write_ac_reg, - S390_NUM_AC_REGS, "s390-acr.xml", 0); + gdb_find_static_feature("s390-acr.xml"), 0); gdb_register_coprocessor(cs, cpu_read_fp_reg, cpu_write_fp_reg, - S390_NUM_FP_REGS, "s390-fpr.xml", 0); + gdb_find_static_feature("s390-fpr.xml"), 0); gdb_register_coprocessor(cs, cpu_read_vreg, cpu_write_vreg, - S390_NUM_VREGS, "s390-vx.xml", 0); + gdb_find_static_feature("s390-vx.xml"), 0); gdb_register_coprocessor(cs, cpu_read_gs_reg, cpu_write_gs_reg, - S390_NUM_GS_REGS, "s390-gs.xml", 0); + gdb_find_static_feature("s390-gs.xml"), 0); #ifndef CONFIG_USER_ONLY gdb_register_coprocessor(cs, cpu_read_c_reg, cpu_write_c_reg, - S390_NUM_C_REGS, "s390-cr.xml", 0); + gdb_find_static_feature("s390-cr.xml"), 0); gdb_register_coprocessor(cs, cpu_read_virt_reg, cpu_write_virt_reg, - S390_NUM_VIRT_REGS, "s390-virt.xml", 0); + gdb_find_static_feature("s390-virt.xml"), 0); if (kvm_enabled()) { gdb_register_coprocessor(cs, cpu_read_virt_kvm_reg, cpu_write_virt_kvm_reg, - S390_NUM_VIRT_KVM_REGS, "s390-virt-kvm.xml", + gdb_find_static_feature("s390-virt-kvm.xml"), 0); } #endif From patchwork Tue Feb 27 14:43:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905163 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=PVpfK/J5; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgQy3lvQz1yX4 for ; Wed, 28 Feb 2024 01:51:06 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reygj-0005Vs-9F; Tue, 27 Feb 2024 09:44:09 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reygg-0005U7-6e for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:06 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygK-00020Y-54 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:05 -0500 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-33d90dfe73cso2970925f8f.0 for ; Tue, 27 Feb 2024 06:43:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045022; x=1709649822; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sYddgSiv4TdBqJm1PnHuh0lKMNJczxN97MFaER3IoIY=; b=PVpfK/J5bG06QD3WWztQQ3QFD5ZszBY8g0Sgg6Nfx/c4qelzoMtq35y7Gp29mNgceS yd842+cObNK9L5JEpoaH9tdjTxVq3K0GforJ/lnXIJSM2uGTiE1Zj7q8AF1FCYX0ud4P BqTWODwC2BPxl6X4EF+CAsdfIZNqDMIuTYYvS3jnYSRzMO0hHRE6BZNEAGcHX6p5Ht3c 3cZrztvXhbGuDJJwAYhHSgZwpqWjz7/6lQsSEwtAk73voBMcflISZrcgUjrhneXa7SRr 2v03QUYsnt7/d5pY7G/tQpVyxIzCxZI4gBn8sQG0bJxC5NSh2a5XWYa+y9HzuN+MZBLV AwKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045022; x=1709649822; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sYddgSiv4TdBqJm1PnHuh0lKMNJczxN97MFaER3IoIY=; b=M0uid59bleqG/YkTth13tucXBI6SzD48YdAxgkmAp3xjtt06ZShuLyXFq83gxPAAgI XpPXAQk651ega69kUhWs54KnYJJAbIUIODP1IEWjalYsWBJsXSEMav4v2k8042JvjyC9 qEmtXyYYDjEuXovThaKMmmzVc6JrM52zy2VdEeIxCU7gwUlpLm2QCe4/WgzVWZ9GsCld +aSOPH8wT6yyABG+LGZB81COH6/z+6RSCbsyGCAIyKX6PROA2XLavNO2hUf8yuK/0hRg 4zVETp+vGG3KQ6fKTXGN+USflrzkM3Zp3P+B5I5swcAHJG6bvAlbFh8qx+6tKaKAiEiN L4+w== X-Gm-Message-State: AOJu0Yy3UaKEF1+jeTXsl9Cb1KY0ulfs+E/an2QpW8Jt3pZyiuQliveG opZLWjvgORvdBuIzBVRO3Qyz3+y5AsdFwO7bxEcEXJ0qzq2KmQiRuP8f4VK7SfA= X-Google-Smtp-Source: AGHT+IECzYG42nEazD+SUl9ftmRSFHb5xRFlboJn/nUFM0jQC+F2d8P+jg5nIhzavhVImsFa+l4Bew== X-Received: by 2002:a5d:4bc5:0:b0:33d:d793:a210 with SMTP id l5-20020a5d4bc5000000b0033dd793a210mr5838575wrt.6.1709045022645; Tue, 27 Feb 2024 06:43:42 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id n1-20020a05600c4f8100b004127ead18aasm11648171wmq.22.2024.02.27.06.43.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:40 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 4B0CA5F909; Tue, 27 Feb 2024 14:43:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour , Akihiko Odaki Subject: [PATCH v4 09/29] gdbstub: Use GDBFeature for GDBRegisterState Date: Tue, 27 Feb 2024 14:43:15 +0000 Message-Id: <20240227144335.1196131-10-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Akihiko Odaki Simplify GDBRegisterState by replacing num_regs and xml members with one member that points to GDBFeature. Signed-off-by: Akihiko Odaki Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20240103173349.398526-31-alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-5-777047380591@daynix.com> Signed-off-by: Alex Bennée --- gdbstub/gdbstub.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c index 256599c8dfb..0ea417b2c9a 100644 --- a/gdbstub/gdbstub.c +++ b/gdbstub/gdbstub.c @@ -47,10 +47,9 @@ typedef struct GDBRegisterState { int base_reg; - int num_regs; gdb_get_reg_cb get_reg; gdb_set_reg_cb set_reg; - const char *xml; + const GDBFeature *feature; } GDBRegisterState; GDBState gdbserver_state; @@ -391,7 +390,7 @@ static const char *get_feature_xml(const char *p, const char **newp, g_ptr_array_add( xml, g_markup_printf_escaped("", - r->xml)); + r->feature->xmlname)); } } g_ptr_array_add(xml, g_strdup("")); @@ -513,7 +512,7 @@ static int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) if (cpu->gdb_regs) { for (guint i = 0; i < cpu->gdb_regs->len; i++) { r = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); - if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) { + if (r->base_reg <= reg && reg < r->base_reg + r->feature->num_regs) { return r->get_reg(env, buf, reg - r->base_reg); } } @@ -534,7 +533,7 @@ static int gdb_write_register(CPUState *cpu, uint8_t *mem_buf, int reg) if (cpu->gdb_regs) { for (guint i = 0; i < cpu->gdb_regs->len; i++) { r = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); - if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) { + if (r->base_reg <= reg && reg < r->base_reg + r->feature->num_regs) { return r->set_reg(env, mem_buf, reg - r->base_reg); } } @@ -553,7 +552,7 @@ void gdb_register_coprocessor(CPUState *cpu, for (i = 0; i < cpu->gdb_regs->len; i++) { /* Check for duplicates. */ s = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); - if (strcmp(s->xml, feature->xmlname) == 0) { + if (s->feature == feature) { return; } } @@ -565,10 +564,9 @@ void gdb_register_coprocessor(CPUState *cpu, g_array_set_size(cpu->gdb_regs, i + 1); s = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); s->base_reg = cpu->gdb_num_regs; - s->num_regs = feature->num_regs; s->get_reg = get_reg; s->set_reg = set_reg; - s->xml = feature->xml; + s->feature = feature; /* Add to end of list. */ cpu->gdb_num_regs += feature->num_regs; From patchwork Tue Feb 27 14:43:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905131 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=LqKOrlpd; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgKn1CbLz1yX0 for ; Wed, 28 Feb 2024 01:46:37 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reyh2-00066e-M6; Tue, 27 Feb 2024 09:44:28 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reyh1-00064e-6K for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:27 -0500 Received: from mail-lj1-x230.google.com ([2a00:1450:4864:20::230]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygM-00022J-HK for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:26 -0500 Received: by mail-lj1-x230.google.com with SMTP id 38308e7fff4ca-2d27fef509eso39183151fa.3 for ; Tue, 27 Feb 2024 06:43:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045025; x=1709649825; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ocHyVrXQIxfxknsvuM70+Uj3BEMOP1UKIXbWV0hdTOI=; b=LqKOrlpdGtdKKZZPoitvmEU2053CW312MErpnV3wB479NeANcB+1ecy033DaTR6p5V ZHxXZTuCRGNZfF1gqwnoiV3hVXF5+tj2RwQvil9mMwTB01vD8Lgv2sMXXa6NI7INgOLs hdd5+M0LdH3Y282lcHup9jj1DaJb2gPtV+b36/cSIA29GUwjE6wzhATENKjs1mhH/uym Q6sAaMd82KgFb0ClOePdSLKSLYudMhbrsyNYI636qV5SYeIWtYcPjZEn/wZDUgHJ+WPC BnRTjtZI6DmRQ7LnU6LyPTOGvorc6YcUP8WJRcklv9b/VywngjF4Froqc1YQ7P3RBbFR ZJZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045025; x=1709649825; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ocHyVrXQIxfxknsvuM70+Uj3BEMOP1UKIXbWV0hdTOI=; b=wTU8ggwzW+t7brlae4iopjRzYYePqjM15vzJpJeaz5jbprMoxc8jfWnVsBWBgfKVOt si0aK/bOz+f88nPf1tISw2cOMX3HSnjTokxlLdSkfX/t2ldNGIQR972VtUj7mvoa7PG9 ITuKtUMnD9lInDH+jZfYkj8iMPdzOTv42+mrZYIUKz6bO/qQug8EkvTRhcjyoLfXmV5L hk8M1ZDQYoFmAq3pcMi4Wa0bkEEuSTc6Wjlhph0fKLfrme0NsCh93VClvns2aVxiTTS2 F+dD3adjoNMAHC3TlxaRy4V1pzVVpmbC2WduZL7DaMtfeVtZ2LbqswhQ7C2IvEBPhS2c GXjg== X-Gm-Message-State: AOJu0Yz0/LrvC4asnjXVDlXROz5mwRylQCsOA3k71wUi9aegVwiHXDva wGFkz6DLMHHUAjiLgUrrjDEjBUN+8WZzZkag5Ll3Uh0iF5Qx2pCF0p0kMjNCGFY= X-Google-Smtp-Source: AGHT+IE0n6Lu49Vi3rl6EkDPgM6CVSShhLjIciv1F2iFwW5mSjeWJTpor737igzHtLsNYIvIIofyJQ== X-Received: by 2002:a2e:9c8a:0:b0:2d2:31e2:ec00 with SMTP id x10-20020a2e9c8a000000b002d231e2ec00mr5797979lji.30.1709045024758; Tue, 27 Feb 2024 06:43:44 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id d16-20020a05600c34d000b004129e8af6absm10983527wmq.33.2024.02.27.06.43.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:40 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 717F85F753; Tue, 27 Feb 2024 14:43:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour , Akihiko Odaki Subject: [PATCH v4 10/29] gdbstub: Change gdb_get_reg_cb and gdb_set_reg_cb Date: Tue, 27 Feb 2024 14:43:16 +0000 Message-Id: <20240227144335.1196131-11-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::230; envelope-from=alex.bennee@linaro.org; helo=mail-lj1-x230.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Akihiko Odaki Align the parameters of gdb_get_reg_cb and gdb_set_reg_cb with the gdb_read_register and gdb_write_register members of CPUClass to allow to unify the logic to access registers of the core and coprocessors in the future. Signed-off-by: Akihiko Odaki Reviewed-by: Alex Bennée Message-Id: <20240103173349.398526-32-alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-6-777047380591@daynix.com> Signed-off-by: Alex Bennée --- include/exec/gdbstub.h | 4 +- target/arm/internals.h | 12 +++--- target/hexagon/internal.h | 4 +- target/microblaze/cpu.h | 4 +- gdbstub/gdbstub.c | 6 +-- target/arm/gdbstub.c | 51 ++++++++++++++++-------- target/arm/gdbstub64.c | 27 +++++++++---- target/hexagon/gdbstub.c | 10 ++++- target/loongarch/gdbstub.c | 11 ++++-- target/m68k/helper.c | 20 ++++++++-- target/microblaze/gdbstub.c | 9 ++++- target/ppc/gdbstub.c | 46 +++++++++++++++++----- target/riscv/gdbstub.c | 50 +++++++++++++++++------- target/s390x/gdbstub.c | 77 ++++++++++++++++++++++++++++--------- 14 files changed, 238 insertions(+), 93 deletions(-) diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h index ac6fce99a64..bcaab1bc750 100644 --- a/include/exec/gdbstub.h +++ b/include/exec/gdbstub.h @@ -24,8 +24,8 @@ typedef struct GDBFeatureBuilder { /* Get or set a register. Returns the size of the register. */ -typedef int (*gdb_get_reg_cb)(CPUArchState *env, GByteArray *buf, int reg); -typedef int (*gdb_set_reg_cb)(CPUArchState *env, uint8_t *buf, int reg); +typedef int (*gdb_get_reg_cb)(CPUState *cpu, GByteArray *buf, int reg); +typedef int (*gdb_set_reg_cb)(CPUState *cpu, uint8_t *buf, int reg); /** * gdb_register_coprocessor() - register a supplemental set of registers diff --git a/target/arm/internals.h b/target/arm/internals.h index 05eb9daac7d..860bcc0c664 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -1452,12 +1452,12 @@ static inline uint64_t pmu_counter_mask(CPUARMState *env) #ifdef TARGET_AARCH64 GDBFeature *arm_gen_dynamic_svereg_feature(CPUState *cpu, int base_reg); -int aarch64_gdb_get_sve_reg(CPUARMState *env, GByteArray *buf, int reg); -int aarch64_gdb_set_sve_reg(CPUARMState *env, uint8_t *buf, int reg); -int aarch64_gdb_get_fpu_reg(CPUARMState *env, GByteArray *buf, int reg); -int aarch64_gdb_set_fpu_reg(CPUARMState *env, uint8_t *buf, int reg); -int aarch64_gdb_get_pauth_reg(CPUARMState *env, GByteArray *buf, int reg); -int aarch64_gdb_set_pauth_reg(CPUARMState *env, uint8_t *buf, int reg); +int aarch64_gdb_get_sve_reg(CPUState *cs, GByteArray *buf, int reg); +int aarch64_gdb_set_sve_reg(CPUState *cs, uint8_t *buf, int reg); +int aarch64_gdb_get_fpu_reg(CPUState *cs, GByteArray *buf, int reg); +int aarch64_gdb_set_fpu_reg(CPUState *cs, uint8_t *buf, int reg); +int aarch64_gdb_get_pauth_reg(CPUState *cs, GByteArray *buf, int reg); +int aarch64_gdb_set_pauth_reg(CPUState *cs, uint8_t *buf, int reg); void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp); void arm_cpu_sme_finalize(ARMCPU *cpu, Error **errp); void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp); diff --git a/target/hexagon/internal.h b/target/hexagon/internal.h index d732b6bb3c7..beb08cb7e38 100644 --- a/target/hexagon/internal.h +++ b/target/hexagon/internal.h @@ -33,8 +33,8 @@ int hexagon_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int hexagon_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); -int hexagon_hvx_gdb_read_register(CPUHexagonState *env, GByteArray *mem_buf, int n); -int hexagon_hvx_gdb_write_register(CPUHexagonState *env, uint8_t *mem_buf, int n); +int hexagon_hvx_gdb_read_register(CPUState *env, GByteArray *mem_buf, int n); +int hexagon_hvx_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n); void hexagon_debug_vreg(CPUHexagonState *env, int regnum); void hexagon_debug_qreg(CPUHexagonState *env, int regnum); diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 446af5dd4ca..c0c7574dbd5 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -381,8 +381,8 @@ G_NORETURN void mb_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, void mb_cpu_dump_state(CPUState *cpu, FILE *f, int flags); int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); -int mb_cpu_gdb_read_stack_protect(CPUArchState *cpu, GByteArray *buf, int reg); -int mb_cpu_gdb_write_stack_protect(CPUArchState *cpu, uint8_t *buf, int reg); +int mb_cpu_gdb_read_stack_protect(CPUState *cs, GByteArray *buf, int reg); +int mb_cpu_gdb_write_stack_protect(CPUState *cs, uint8_t *buf, int reg); static inline uint32_t mb_cpu_read_msr(const CPUMBState *env) { diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c index 0ea417b2c9a..486ceb52d2e 100644 --- a/gdbstub/gdbstub.c +++ b/gdbstub/gdbstub.c @@ -502,7 +502,6 @@ const GDBFeature *gdb_find_static_feature(const char *xmlname) static int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) { CPUClass *cc = CPU_GET_CLASS(cpu); - CPUArchState *env = cpu_env(cpu); GDBRegisterState *r; if (reg < cc->gdb_num_core_regs) { @@ -513,7 +512,7 @@ static int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) for (guint i = 0; i < cpu->gdb_regs->len; i++) { r = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); if (r->base_reg <= reg && reg < r->base_reg + r->feature->num_regs) { - return r->get_reg(env, buf, reg - r->base_reg); + return r->get_reg(cpu, buf, reg - r->base_reg); } } } @@ -523,7 +522,6 @@ static int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) static int gdb_write_register(CPUState *cpu, uint8_t *mem_buf, int reg) { CPUClass *cc = CPU_GET_CLASS(cpu); - CPUArchState *env = cpu_env(cpu); GDBRegisterState *r; if (reg < cc->gdb_num_core_regs) { @@ -534,7 +532,7 @@ static int gdb_write_register(CPUState *cpu, uint8_t *mem_buf, int reg) for (guint i = 0; i < cpu->gdb_regs->len; i++) { r = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); if (r->base_reg <= reg && reg < r->base_reg + r->feature->num_regs) { - return r->set_reg(env, mem_buf, reg - r->base_reg); + return r->set_reg(cpu, mem_buf, reg - r->base_reg); } } } diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c index f2b201d3125..059d84f98e5 100644 --- a/target/arm/gdbstub.c +++ b/target/arm/gdbstub.c @@ -106,9 +106,10 @@ int arm_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) return 0; } -static int vfp_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg) +static int vfp_gdb_get_reg(CPUState *cs, GByteArray *buf, int reg) { - ARMCPU *cpu = env_archcpu(env); + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; int nregs = cpu_isar_feature(aa32_simd_r32, cpu) ? 32 : 16; /* VFP data registers are always little-endian. */ @@ -130,9 +131,10 @@ static int vfp_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg) return 0; } -static int vfp_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg) +static int vfp_gdb_set_reg(CPUState *cs, uint8_t *buf, int reg) { - ARMCPU *cpu = env_archcpu(env); + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; int nregs = cpu_isar_feature(aa32_simd_r32, cpu) ? 32 : 16; if (reg < nregs) { @@ -156,8 +158,11 @@ static int vfp_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg) return 0; } -static int vfp_gdb_get_sysreg(CPUARMState *env, GByteArray *buf, int reg) +static int vfp_gdb_get_sysreg(CPUState *cs, GByteArray *buf, int reg) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; + switch (reg) { case 0: return gdb_get_reg32(buf, env->vfp.xregs[ARM_VFP_FPSID]); @@ -167,8 +172,11 @@ static int vfp_gdb_get_sysreg(CPUARMState *env, GByteArray *buf, int reg) return 0; } -static int vfp_gdb_set_sysreg(CPUARMState *env, uint8_t *buf, int reg) +static int vfp_gdb_set_sysreg(CPUState *cs, uint8_t *buf, int reg) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; + switch (reg) { case 0: env->vfp.xregs[ARM_VFP_FPSID] = ldl_p(buf); @@ -180,8 +188,11 @@ static int vfp_gdb_set_sysreg(CPUARMState *env, uint8_t *buf, int reg) return 0; } -static int mve_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg) +static int mve_gdb_get_reg(CPUState *cs, GByteArray *buf, int reg) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; + switch (reg) { case 0: return gdb_get_reg32(buf, env->v7m.vpr); @@ -190,8 +201,11 @@ static int mve_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg) } } -static int mve_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg) +static int mve_gdb_set_reg(CPUState *cs, uint8_t *buf, int reg) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; + switch (reg) { case 0: env->v7m.vpr = ldl_p(buf); @@ -210,9 +224,10 @@ static int mve_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg) * We return the number of bytes copied */ -static int arm_gdb_get_sysreg(CPUARMState *env, GByteArray *buf, int reg) +static int arm_gdb_get_sysreg(CPUState *cs, GByteArray *buf, int reg) { - ARMCPU *cpu = env_archcpu(env); + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; const ARMCPRegInfo *ri; uint32_t key; @@ -228,7 +243,7 @@ static int arm_gdb_get_sysreg(CPUARMState *env, GByteArray *buf, int reg) return 0; } -static int arm_gdb_set_sysreg(CPUARMState *env, uint8_t *buf, int reg) +static int arm_gdb_set_sysreg(CPUState *cs, uint8_t *buf, int reg) { return 0; } @@ -367,8 +382,11 @@ static int m_sysreg_get(CPUARMState *env, GByteArray *buf, return gdb_get_reg32(buf, *ptr); } -static int arm_gdb_get_m_systemreg(CPUARMState *env, GByteArray *buf, int reg) +static int arm_gdb_get_m_systemreg(CPUState *cs, GByteArray *buf, int reg) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; + /* * Here, we emulate MRS instruction, where CONTROL has a mix of * banked and non-banked bits. @@ -379,7 +397,7 @@ static int arm_gdb_get_m_systemreg(CPUARMState *env, GByteArray *buf, int reg) return m_sysreg_get(env, buf, reg, env->v7m.secure); } -static int arm_gdb_set_m_systemreg(CPUARMState *env, uint8_t *buf, int reg) +static int arm_gdb_set_m_systemreg(CPUState *cs, uint8_t *buf, int reg) { return 0; /* TODO */ } @@ -414,12 +432,15 @@ static GDBFeature *arm_gen_dynamic_m_systemreg_feature(CPUState *cs, * For user-only, we see the non-secure registers via m_systemreg above. * For secext, encode the non-secure view as even and secure view as odd. */ -static int arm_gdb_get_m_secextreg(CPUARMState *env, GByteArray *buf, int reg) +static int arm_gdb_get_m_secextreg(CPUState *cs, GByteArray *buf, int reg) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; + return m_sysreg_get(env, buf, reg >> 1, reg & 1); } -static int arm_gdb_set_m_secextreg(CPUARMState *env, uint8_t *buf, int reg) +static int arm_gdb_set_m_secextreg(CPUState *cs, uint8_t *buf, int reg) { return 0; /* TODO */ } diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c index 5286d5c6043..caa31ff3fa1 100644 --- a/target/arm/gdbstub64.c +++ b/target/arm/gdbstub64.c @@ -72,8 +72,11 @@ int aarch64_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) return 0; } -int aarch64_gdb_get_fpu_reg(CPUARMState *env, GByteArray *buf, int reg) +int aarch64_gdb_get_fpu_reg(CPUState *cs, GByteArray *buf, int reg) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; + switch (reg) { case 0 ... 31: { @@ -92,8 +95,11 @@ int aarch64_gdb_get_fpu_reg(CPUARMState *env, GByteArray *buf, int reg) } } -int aarch64_gdb_set_fpu_reg(CPUARMState *env, uint8_t *buf, int reg) +int aarch64_gdb_set_fpu_reg(CPUState *cs, uint8_t *buf, int reg) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; + switch (reg) { case 0 ... 31: /* 128 bit FP register */ @@ -116,9 +122,10 @@ int aarch64_gdb_set_fpu_reg(CPUARMState *env, uint8_t *buf, int reg) } } -int aarch64_gdb_get_sve_reg(CPUARMState *env, GByteArray *buf, int reg) +int aarch64_gdb_get_sve_reg(CPUState *cs, GByteArray *buf, int reg) { - ARMCPU *cpu = env_archcpu(env); + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; switch (reg) { /* The first 32 registers are the zregs */ @@ -164,9 +171,10 @@ int aarch64_gdb_get_sve_reg(CPUARMState *env, GByteArray *buf, int reg) return 0; } -int aarch64_gdb_set_sve_reg(CPUARMState *env, uint8_t *buf, int reg) +int aarch64_gdb_set_sve_reg(CPUState *cs, uint8_t *buf, int reg) { - ARMCPU *cpu = env_archcpu(env); + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; /* The first 32 registers are the zregs */ switch (reg) { @@ -210,8 +218,11 @@ int aarch64_gdb_set_sve_reg(CPUARMState *env, uint8_t *buf, int reg) return 0; } -int aarch64_gdb_get_pauth_reg(CPUARMState *env, GByteArray *buf, int reg) +int aarch64_gdb_get_pauth_reg(CPUState *cs, GByteArray *buf, int reg) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; + switch (reg) { case 0: /* pauth_dmask */ case 1: /* pauth_cmask */ @@ -241,7 +252,7 @@ int aarch64_gdb_get_pauth_reg(CPUARMState *env, GByteArray *buf, int reg) } } -int aarch64_gdb_set_pauth_reg(CPUARMState *env, uint8_t *buf, int reg) +int aarch64_gdb_set_pauth_reg(CPUState *cs, uint8_t *buf, int reg) { /* All pseudo registers are read-only. */ return 0; diff --git a/target/hexagon/gdbstub.c b/target/hexagon/gdbstub.c index 54d37e006e0..6007e6462b9 100644 --- a/target/hexagon/gdbstub.c +++ b/target/hexagon/gdbstub.c @@ -81,8 +81,11 @@ static int gdb_get_qreg(CPUHexagonState *env, GByteArray *mem_buf, int n) return total; } -int hexagon_hvx_gdb_read_register(CPUHexagonState *env, GByteArray *mem_buf, int n) +int hexagon_hvx_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { + HexagonCPU *cpu = HEXAGON_CPU(cs); + CPUHexagonState *env = &cpu->env; + if (n < NUM_VREGS) { return gdb_get_vreg(env, mem_buf, n); } @@ -115,8 +118,11 @@ static int gdb_put_qreg(CPUHexagonState *env, uint8_t *mem_buf, int n) return MAX_VEC_SIZE_BYTES / 8; } -int hexagon_hvx_gdb_write_register(CPUHexagonState *env, uint8_t *mem_buf, int n) +int hexagon_hvx_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) { + HexagonCPU *cpu = HEXAGON_CPU(cs); + CPUHexagonState *env = &cpu->env; + if (n < NUM_VREGS) { return gdb_put_vreg(env, mem_buf, n); } diff --git a/target/loongarch/gdbstub.c b/target/loongarch/gdbstub.c index 843a869450e..22c6889011e 100644 --- a/target/loongarch/gdbstub.c +++ b/target/loongarch/gdbstub.c @@ -84,9 +84,11 @@ int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) return length; } -static int loongarch_gdb_get_fpu(CPULoongArchState *env, - GByteArray *mem_buf, int n) +static int loongarch_gdb_get_fpu(CPUState *cs, GByteArray *mem_buf, int n) { + LoongArchCPU *cpu = LOONGARCH_CPU(cs); + CPULoongArchState *env = &cpu->env; + if (0 <= n && n < 32) { return gdb_get_reg64(mem_buf, env->fpr[n].vreg.D(0)); } else if (32 <= n && n < 40) { @@ -97,9 +99,10 @@ static int loongarch_gdb_get_fpu(CPULoongArchState *env, return 0; } -static int loongarch_gdb_set_fpu(CPULoongArchState *env, - uint8_t *mem_buf, int n) +static int loongarch_gdb_set_fpu(CPUState *cs, uint8_t *mem_buf, int n) { + LoongArchCPU *cpu = LOONGARCH_CPU(cs); + CPULoongArchState *env = &cpu->env; int length = 0; if (0 <= n && n < 32) { diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 9808d676a22..1c33995e5da 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -29,8 +29,11 @@ #define SIGNBIT (1u << 31) -static int cf_fpu_gdb_get_reg(CPUM68KState *env, GByteArray *mem_buf, int n) +static int cf_fpu_gdb_get_reg(CPUState *cs, GByteArray *mem_buf, int n) { + M68kCPU *cpu = M68K_CPU(cs); + CPUM68KState *env = &cpu->env; + if (n < 8) { float_status s; return gdb_get_reg64(mem_buf, floatx80_to_float64(env->fregs[n].d, &s)); @@ -46,8 +49,11 @@ static int cf_fpu_gdb_get_reg(CPUM68KState *env, GByteArray *mem_buf, int n) return 0; } -static int cf_fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n) +static int cf_fpu_gdb_set_reg(CPUState *cs, uint8_t *mem_buf, int n) { + M68kCPU *cpu = M68K_CPU(cs); + CPUM68KState *env = &cpu->env; + if (n < 8) { float_status s; env->fregs[n].d = float64_to_floatx80(ldq_p(mem_buf), &s); @@ -66,8 +72,11 @@ static int cf_fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n) return 0; } -static int m68k_fpu_gdb_get_reg(CPUM68KState *env, GByteArray *mem_buf, int n) +static int m68k_fpu_gdb_get_reg(CPUState *cs, GByteArray *mem_buf, int n) { + M68kCPU *cpu = M68K_CPU(cs); + CPUM68KState *env = &cpu->env; + if (n < 8) { int len = gdb_get_reg16(mem_buf, env->fregs[n].l.upper); len += gdb_get_reg16(mem_buf, 0); @@ -85,8 +94,11 @@ static int m68k_fpu_gdb_get_reg(CPUM68KState *env, GByteArray *mem_buf, int n) return 0; } -static int m68k_fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n) +static int m68k_fpu_gdb_set_reg(CPUState *cs, uint8_t *mem_buf, int n) { + M68kCPU *cpu = M68K_CPU(cs); + CPUM68KState *env = &cpu->env; + if (n < 8) { env->fregs[n].l.upper = lduw_be_p(mem_buf); env->fregs[n].l.lower = ldq_be_p(mem_buf + 4); diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c index 29ac6e9c0f7..6ffc5ad0752 100644 --- a/target/microblaze/gdbstub.c +++ b/target/microblaze/gdbstub.c @@ -94,8 +94,10 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) return gdb_get_reg32(mem_buf, val); } -int mb_cpu_gdb_read_stack_protect(CPUMBState *env, GByteArray *mem_buf, int n) +int mb_cpu_gdb_read_stack_protect(CPUState *cs, GByteArray *mem_buf, int n) { + MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); + CPUMBState *env = &cpu->env; uint32_t val; switch (n) { @@ -153,8 +155,11 @@ int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) return 4; } -int mb_cpu_gdb_write_stack_protect(CPUMBState *env, uint8_t *mem_buf, int n) +int mb_cpu_gdb_write_stack_protect(CPUState *cs, uint8_t *mem_buf, int n) { + MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); + CPUMBState *env = &cpu->env; + switch (n) { case GDB_SP_SHL: env->slr = ldl_p(mem_buf); diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c index 625ccf96c5b..43f61130c5f 100644 --- a/target/ppc/gdbstub.c +++ b/target/ppc/gdbstub.c @@ -369,8 +369,10 @@ static int gdb_find_spr_idx(CPUPPCState *env, int n) return -1; } -static int gdb_get_spr_reg(CPUPPCState *env, GByteArray *buf, int n) +static int gdb_get_spr_reg(CPUState *cs, GByteArray *buf, int n) { + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; int reg; int len; @@ -410,8 +412,10 @@ static int gdb_get_spr_reg(CPUPPCState *env, GByteArray *buf, int n) return len; } -static int gdb_set_spr_reg(CPUPPCState *env, uint8_t *mem_buf, int n) +static int gdb_set_spr_reg(CPUState *cs, uint8_t *mem_buf, int n) { + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; int reg; int len; @@ -439,8 +443,10 @@ static int gdb_set_spr_reg(CPUPPCState *env, uint8_t *mem_buf, int n) } #endif -static int gdb_get_float_reg(CPUPPCState *env, GByteArray *buf, int n) +static int gdb_get_float_reg(CPUState *cs, GByteArray *buf, int n) { + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; uint8_t *mem_buf; if (n < 32) { gdb_get_reg64(buf, *cpu_fpr_ptr(env, n)); @@ -457,8 +463,11 @@ static int gdb_get_float_reg(CPUPPCState *env, GByteArray *buf, int n) return 0; } -static int gdb_set_float_reg(CPUPPCState *env, uint8_t *mem_buf, int n) +static int gdb_set_float_reg(CPUState *cs, uint8_t *mem_buf, int n) { + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + if (n < 32) { ppc_maybe_bswap_register(env, mem_buf, 8); *cpu_fpr_ptr(env, n) = ldq_p(mem_buf); @@ -472,8 +481,10 @@ static int gdb_set_float_reg(CPUPPCState *env, uint8_t *mem_buf, int n) return 0; } -static int gdb_get_avr_reg(CPUPPCState *env, GByteArray *buf, int n) +static int gdb_get_avr_reg(CPUState *cs, GByteArray *buf, int n) { + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; uint8_t *mem_buf; if (n < 32) { @@ -498,8 +509,11 @@ static int gdb_get_avr_reg(CPUPPCState *env, GByteArray *buf, int n) return 0; } -static int gdb_set_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n) +static int gdb_set_avr_reg(CPUState *cs, uint8_t *mem_buf, int n) { + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + if (n < 32) { ppc_avr_t *avr = cpu_avr_ptr(env, n); ppc_maybe_bswap_register(env, mem_buf, 16); @@ -520,8 +534,11 @@ static int gdb_set_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n) return 0; } -static int gdb_get_spe_reg(CPUPPCState *env, GByteArray *buf, int n) +static int gdb_get_spe_reg(CPUState *cs, GByteArray *buf, int n) { + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + if (n < 32) { #if defined(TARGET_PPC64) gdb_get_reg32(buf, env->gpr[n] >> 32); @@ -544,8 +561,11 @@ static int gdb_get_spe_reg(CPUPPCState *env, GByteArray *buf, int n) return 0; } -static int gdb_set_spe_reg(CPUPPCState *env, uint8_t *mem_buf, int n) +static int gdb_set_spe_reg(CPUState *cs, uint8_t *mem_buf, int n) { + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + if (n < 32) { #if defined(TARGET_PPC64) target_ulong lo = (uint32_t)env->gpr[n]; @@ -573,8 +593,11 @@ static int gdb_set_spe_reg(CPUPPCState *env, uint8_t *mem_buf, int n) return 0; } -static int gdb_get_vsx_reg(CPUPPCState *env, GByteArray *buf, int n) +static int gdb_get_vsx_reg(CPUState *cs, GByteArray *buf, int n) { + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + if (n < 32) { gdb_get_reg64(buf, *cpu_vsrl_ptr(env, n)); ppc_maybe_bswap_register(env, gdb_get_reg_ptr(buf, 8), 8); @@ -583,8 +606,11 @@ static int gdb_get_vsx_reg(CPUPPCState *env, GByteArray *buf, int n) return 0; } -static int gdb_set_vsx_reg(CPUPPCState *env, uint8_t *mem_buf, int n) +static int gdb_set_vsx_reg(CPUState *cs, uint8_t *mem_buf, int n) { + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + if (n < 32) { ppc_maybe_bswap_register(env, mem_buf, 8); *cpu_vsrl_ptr(env, n) = ldq_p(mem_buf); diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index ec1fc6a29da..546e8692d17 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -108,8 +108,11 @@ int riscv_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) return length; } -static int riscv_gdb_get_fpu(CPURISCVState *env, GByteArray *buf, int n) +static int riscv_gdb_get_fpu(CPUState *cs, GByteArray *buf, int n) { + RISCVCPU *cpu = RISCV_CPU(cs); + CPURISCVState *env = &cpu->env; + if (n < 32) { if (env->misa_ext & RVD) { return gdb_get_reg64(buf, env->fpr[n]); @@ -121,8 +124,11 @@ static int riscv_gdb_get_fpu(CPURISCVState *env, GByteArray *buf, int n) return 0; } -static int riscv_gdb_set_fpu(CPURISCVState *env, uint8_t *mem_buf, int n) +static int riscv_gdb_set_fpu(CPUState *cs, uint8_t *mem_buf, int n) { + RISCVCPU *cpu = RISCV_CPU(cs); + CPURISCVState *env = &cpu->env; + if (n < 32) { env->fpr[n] = ldq_p(mem_buf); /* always 64-bit */ return sizeof(uint64_t); @@ -130,9 +136,11 @@ static int riscv_gdb_set_fpu(CPURISCVState *env, uint8_t *mem_buf, int n) return 0; } -static int riscv_gdb_get_vector(CPURISCVState *env, GByteArray *buf, int n) +static int riscv_gdb_get_vector(CPUState *cs, GByteArray *buf, int n) { - uint16_t vlenb = riscv_cpu_cfg(env)->vlenb; + RISCVCPU *cpu = RISCV_CPU(cs); + CPURISCVState *env = &cpu->env; + uint16_t vlenb = cpu->cfg.vlenb; if (n < 32) { int i; int cnt = 0; @@ -146,9 +154,11 @@ static int riscv_gdb_get_vector(CPURISCVState *env, GByteArray *buf, int n) return 0; } -static int riscv_gdb_set_vector(CPURISCVState *env, uint8_t *mem_buf, int n) +static int riscv_gdb_set_vector(CPUState *cs, uint8_t *mem_buf, int n) { - uint16_t vlenb = riscv_cpu_cfg(env)->vlenb; + RISCVCPU *cpu = RISCV_CPU(cs); + CPURISCVState *env = &cpu->env; + uint16_t vlenb = cpu->cfg.vlenb; if (n < 32) { int i; for (i = 0; i < vlenb; i += 8) { @@ -160,8 +170,11 @@ static int riscv_gdb_set_vector(CPURISCVState *env, uint8_t *mem_buf, int n) return 0; } -static int riscv_gdb_get_csr(CPURISCVState *env, GByteArray *buf, int n) +static int riscv_gdb_get_csr(CPUState *cs, GByteArray *buf, int n) { + RISCVCPU *cpu = RISCV_CPU(cs); + CPURISCVState *env = &cpu->env; + if (n < CSR_TABLE_SIZE) { target_ulong val = 0; int result; @@ -174,8 +187,11 @@ static int riscv_gdb_get_csr(CPURISCVState *env, GByteArray *buf, int n) return 0; } -static int riscv_gdb_set_csr(CPURISCVState *env, uint8_t *mem_buf, int n) +static int riscv_gdb_set_csr(CPUState *cs, uint8_t *mem_buf, int n) { + RISCVCPU *cpu = RISCV_CPU(cs); + CPURISCVState *env = &cpu->env; + if (n < CSR_TABLE_SIZE) { target_ulong val = ldtul_p(mem_buf); int result; @@ -188,25 +204,31 @@ static int riscv_gdb_set_csr(CPURISCVState *env, uint8_t *mem_buf, int n) return 0; } -static int riscv_gdb_get_virtual(CPURISCVState *cs, GByteArray *buf, int n) +static int riscv_gdb_get_virtual(CPUState *cs, GByteArray *buf, int n) { if (n == 0) { #ifdef CONFIG_USER_ONLY return gdb_get_regl(buf, 0); #else - return gdb_get_regl(buf, cs->priv); + RISCVCPU *cpu = RISCV_CPU(cs); + CPURISCVState *env = &cpu->env; + + return gdb_get_regl(buf, env->priv); #endif } return 0; } -static int riscv_gdb_set_virtual(CPURISCVState *cs, uint8_t *mem_buf, int n) +static int riscv_gdb_set_virtual(CPUState *cs, uint8_t *mem_buf, int n) { if (n == 0) { #ifndef CONFIG_USER_ONLY - cs->priv = ldtul_p(mem_buf) & 0x3; - if (cs->priv == PRV_RESERVED) { - cs->priv = PRV_S; + RISCVCPU *cpu = RISCV_CPU(cs); + CPURISCVState *env = &cpu->env; + + env->priv = ldtul_p(mem_buf) & 0x3; + if (env->priv == PRV_RESERVED) { + env->priv = PRV_S; } #endif return sizeof(target_ulong); diff --git a/target/s390x/gdbstub.c b/target/s390x/gdbstub.c index 256f1c7c6db..a9f4eb92adf 100644 --- a/target/s390x/gdbstub.c +++ b/target/s390x/gdbstub.c @@ -68,8 +68,11 @@ int s390_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) #define S390_A0_REGNUM 0 #define S390_A15_REGNUM 15 -static int cpu_read_ac_reg(CPUS390XState *env, GByteArray *buf, int n) +static int cpu_read_ac_reg(CPUState *cs, GByteArray *buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; + switch (n) { case S390_A0_REGNUM ... S390_A15_REGNUM: return gdb_get_reg32(buf, env->aregs[n]); @@ -78,8 +81,11 @@ static int cpu_read_ac_reg(CPUS390XState *env, GByteArray *buf, int n) } } -static int cpu_write_ac_reg(CPUS390XState *env, uint8_t *mem_buf, int n) +static int cpu_write_ac_reg(CPUState *cs, uint8_t *mem_buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; + switch (n) { case S390_A0_REGNUM ... S390_A15_REGNUM: env->aregs[n] = ldl_p(mem_buf); @@ -95,8 +101,11 @@ static int cpu_write_ac_reg(CPUS390XState *env, uint8_t *mem_buf, int n) #define S390_F0_REGNUM 1 #define S390_F15_REGNUM 16 -static int cpu_read_fp_reg(CPUS390XState *env, GByteArray *buf, int n) +static int cpu_read_fp_reg(CPUState *cs, GByteArray *buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; + switch (n) { case S390_FPC_REGNUM: return gdb_get_reg32(buf, env->fpc); @@ -107,8 +116,11 @@ static int cpu_read_fp_reg(CPUS390XState *env, GByteArray *buf, int n) } } -static int cpu_write_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n) +static int cpu_write_fp_reg(CPUState *cs, uint8_t *mem_buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; + switch (n) { case S390_FPC_REGNUM: env->fpc = ldl_p(mem_buf); @@ -127,8 +139,10 @@ static int cpu_write_fp_reg(CPUS390XState *env, uint8_t *mem_buf, int n) #define S390_V16_REGNUM 16 #define S390_V31_REGNUM 31 -static int cpu_read_vreg(CPUS390XState *env, GByteArray *buf, int n) +static int cpu_read_vreg(CPUState *cs, GByteArray *buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; int ret; switch (n) { @@ -146,8 +160,11 @@ static int cpu_read_vreg(CPUS390XState *env, GByteArray *buf, int n) return ret; } -static int cpu_write_vreg(CPUS390XState *env, uint8_t *mem_buf, int n) +static int cpu_write_vreg(CPUState *cs, uint8_t *mem_buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; + switch (n) { case S390_V0L_REGNUM ... S390_V15L_REGNUM: env->vregs[n][1] = ldtul_p(mem_buf + 8); @@ -166,8 +183,11 @@ static int cpu_write_vreg(CPUS390XState *env, uint8_t *mem_buf, int n) #define S390_C15_REGNUM 15 #ifndef CONFIG_USER_ONLY -static int cpu_read_c_reg(CPUS390XState *env, GByteArray *buf, int n) +static int cpu_read_c_reg(CPUState *cs, GByteArray *buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; + switch (n) { case S390_C0_REGNUM ... S390_C15_REGNUM: return gdb_get_regl(buf, env->cregs[n]); @@ -176,8 +196,11 @@ static int cpu_read_c_reg(CPUS390XState *env, GByteArray *buf, int n) } } -static int cpu_write_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n) +static int cpu_write_c_reg(CPUState *cs, uint8_t *mem_buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; + switch (n) { case S390_C0_REGNUM ... S390_C15_REGNUM: env->cregs[n] = ldtul_p(mem_buf); @@ -197,8 +220,11 @@ static int cpu_write_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n) #define S390_VIRT_BEA_REGNUM 2 #define S390_VIRT_PREFIX_REGNUM 3 -static int cpu_read_virt_reg(CPUS390XState *env, GByteArray *mem_buf, int n) +static int cpu_read_virt_reg(CPUState *cs, GByteArray *mem_buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; + switch (n) { case S390_VIRT_CKC_REGNUM: return gdb_get_regl(mem_buf, env->ckc); @@ -213,24 +239,27 @@ static int cpu_read_virt_reg(CPUS390XState *env, GByteArray *mem_buf, int n) } } -static int cpu_write_virt_reg(CPUS390XState *env, uint8_t *mem_buf, int n) +static int cpu_write_virt_reg(CPUState *cs, uint8_t *mem_buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; + switch (n) { case S390_VIRT_CKC_REGNUM: env->ckc = ldtul_p(mem_buf); - cpu_synchronize_post_init(env_cpu(env)); + cpu_synchronize_post_init(cs); return 8; case S390_VIRT_CPUTM_REGNUM: env->cputm = ldtul_p(mem_buf); - cpu_synchronize_post_init(env_cpu(env)); + cpu_synchronize_post_init(cs); return 8; case S390_VIRT_BEA_REGNUM: env->gbea = ldtul_p(mem_buf); - cpu_synchronize_post_init(env_cpu(env)); + cpu_synchronize_post_init(cs); return 8; case S390_VIRT_PREFIX_REGNUM: env->psa = ldtul_p(mem_buf); - cpu_synchronize_post_init(env_cpu(env)); + cpu_synchronize_post_init(cs); return 8; default: return 0; @@ -243,8 +272,11 @@ static int cpu_write_virt_reg(CPUS390XState *env, uint8_t *mem_buf, int n) #define S390_VIRT_KVM_PFS_REGNUM 2 #define S390_VIRT_KVM_PFC_REGNUM 3 -static int cpu_read_virt_kvm_reg(CPUS390XState *env, GByteArray *mem_buf, int n) +static int cpu_read_virt_kvm_reg(CPUState *cs, GByteArray *mem_buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; + switch (n) { case S390_VIRT_KVM_PP_REGNUM: return gdb_get_regl(mem_buf, env->pp); @@ -259,8 +291,11 @@ static int cpu_read_virt_kvm_reg(CPUS390XState *env, GByteArray *mem_buf, int n) } } -static int cpu_write_virt_kvm_reg(CPUS390XState *env, uint8_t *mem_buf, int n) +static int cpu_write_virt_kvm_reg(CPUState *cs, uint8_t *mem_buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; + switch (n) { case S390_VIRT_KVM_PP_REGNUM: env->pp = ldtul_p(mem_buf); @@ -290,13 +325,19 @@ static int cpu_write_virt_kvm_reg(CPUS390XState *env, uint8_t *mem_buf, int n) #define S390_GS_GSSM_REGNUM 2 #define S390_GS_GSEPLA_REGNUM 3 -static int cpu_read_gs_reg(CPUS390XState *env, GByteArray *buf, int n) +static int cpu_read_gs_reg(CPUState *cs, GByteArray *buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; + return gdb_get_regl(buf, env->gscb[n]); } -static int cpu_write_gs_reg(CPUS390XState *env, uint8_t *mem_buf, int n) +static int cpu_write_gs_reg(CPUState *cs, uint8_t *mem_buf, int n) { + S390CPU *cpu = S390_CPU(cs); + CPUS390XState *env = &cpu->env; + env->gscb[n] = ldtul_p(mem_buf); cpu_synchronize_post_init(env_cpu(env)); return 8; From patchwork Tue Feb 27 14:43:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905137 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=ugwl+HgR; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgMG5kccz1yX0 for ; Wed, 28 Feb 2024 01:47:54 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reygh-0005V0-La; Tue, 27 Feb 2024 09:44:07 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reyge-0005Sh-35 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:04 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygK-00020N-0z for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:03 -0500 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-33d6fe64a9bso3325819f8f.0 for ; Tue, 27 Feb 2024 06:43:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045022; x=1709649822; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hxDVqDXi3LGJSJYkq05RZi8ehgH06PAsi/NzuX8UMrA=; b=ugwl+HgRfQh7bL7L0lBDQyRpjUE7qomkfF2LbCJ2wNetpEq3uCSPNdW8xm1PFnhIlV lYWUVM2fcYU5Zt9qUq/HlGsnfYrpJtQ2cVnOePVRFJFgDuq56R2Uv/uTP6tkJChc3+Qr 8ydTCcSX4uW1+D/Bz08yA3yNJTOwxNOfsBRxc0vk1i6n6esykdw7JCvVeezoZ6Ha2AQa Lnf6RWeGWzVbLUJghezzJ/ssWQidMJ96/ticvh8dUtWQvqYxsNQeL0z+2Ci7vxqNSWSq 4ruIt8yzTU0xmXx9M0Okt3PtDvZvNx1nK9cztSyP671LMRb6KZtnlyY44ejNMg3jCsMg YBnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045022; x=1709649822; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hxDVqDXi3LGJSJYkq05RZi8ehgH06PAsi/NzuX8UMrA=; b=FcRRywaDChuEf39CC7mCeyRkOLB5earrDsluFOFkeqBHij5bVHOFVTmWDit31awKrx 8nqyfNo8r+msfdBIIT/3FHvyZG4DAlIK4xlPvl0DquqAhjwBcR4GC1mX18jj9psERhcN UJ0gtd9Z2La9RucrCRgNYORWLKniO53ewzXrhZ+l6rioVAiRCcy1BbJyvLY+km/Kv0ih XQR9cQdzJQe7sC41hxkY9rniPKZk2y0eiDiEWzN1Gn+djuAigJ1tark4fVtNTk3aPY3v GwFT3cjcJ0dfEWWI7TbCkpHJf+OlRF1EWcBDhDVpwnJWjxa5k7beoD2sPdVQ6tYu3SiW COEQ== X-Gm-Message-State: AOJu0YzxEGZ64ZHSbXMDHIlnYSjnEaJ/UBdlR+aUVqPf7UV/OwaJfH6D TRVk4x+qdUooxB9a/QFkJ3Q0BrLADdiPqsfbqiSP90EykhIx88iyaItZocAhedE= X-Google-Smtp-Source: AGHT+IEacG6jW3pkVUqXRpBiljitqFwKN4RhVp1BxiQrkK9uyPw+9aYn2eOY4WuGvU4uG/rtrDLgXA== X-Received: by 2002:adf:ef87:0:b0:33d:a011:ae42 with SMTP id d7-20020adfef87000000b0033da011ae42mr6990698wro.38.1709045022399; Tue, 27 Feb 2024 06:43:42 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id d14-20020a5d538e000000b0033d4deb2356sm11489452wrv.56.2024.02.27.06.43.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:40 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 88BCC5F90B; Tue, 27 Feb 2024 14:43:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour , Akihiko Odaki Subject: [PATCH v4 11/29] gdbstub: Simplify XML lookup Date: Tue, 27 Feb 2024 14:43:17 +0000 Message-Id: <20240227144335.1196131-12-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Akihiko Odaki Now we know all instances of GDBFeature that is used in CPU so we can traverse them to find XML. This removes the need for a CPU-specific lookup function for dynamic XMLs. Signed-off-by: Akihiko Odaki Reviewed-by: Alex Bennée Message-Id: <20240103173349.398526-33-alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-7-777047380591@daynix.com> Signed-off-by: Alex Bennée --- include/exec/gdbstub.h | 6 +++ gdbstub/gdbstub.c | 118 +++++++++++++++++++++-------------------- hw/core/cpu-common.c | 5 +- 3 files changed, 69 insertions(+), 60 deletions(-) diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h index bcaab1bc750..82a8afa237f 100644 --- a/include/exec/gdbstub.h +++ b/include/exec/gdbstub.h @@ -27,6 +27,12 @@ typedef struct GDBFeatureBuilder { typedef int (*gdb_get_reg_cb)(CPUState *cpu, GByteArray *buf, int reg); typedef int (*gdb_set_reg_cb)(CPUState *cpu, uint8_t *buf, int reg); +/** + * gdb_init_cpu(): Initialize the CPU for gdbstub. + * @cpu: The CPU to be initialized. + */ +void gdb_init_cpu(CPUState *cpu); + /** * gdb_register_coprocessor() - register a supplemental set of registers * @cpu - the CPU associated with registers diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c index 486ceb52d2e..d573f808d2e 100644 --- a/gdbstub/gdbstub.c +++ b/gdbstub/gdbstub.c @@ -352,6 +352,7 @@ static const char *get_feature_xml(const char *p, const char **newp, { CPUState *cpu = gdb_get_first_cpu_in_process(process); CPUClass *cc = CPU_GET_CLASS(cpu); + GDBRegisterState *r; size_t len; /* @@ -365,7 +366,6 @@ static const char *get_feature_xml(const char *p, const char **newp, /* Is it the main target xml? */ if (strncmp(p, "target.xml", len) == 0) { if (!process->target_xml) { - GDBRegisterState *r; g_autoptr(GPtrArray) xml = g_ptr_array_new_with_free_func(g_free); g_ptr_array_add( @@ -380,18 +380,12 @@ static const char *get_feature_xml(const char *p, const char **newp, g_markup_printf_escaped("%s", cc->gdb_arch_name(cpu))); } - g_ptr_array_add( - xml, - g_markup_printf_escaped("", - cc->gdb_core_xml_file)); - if (cpu->gdb_regs) { - for (guint i = 0; i < cpu->gdb_regs->len; i++) { - r = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); - g_ptr_array_add( - xml, - g_markup_printf_escaped("", - r->feature->xmlname)); - } + for (guint i = 0; i < cpu->gdb_regs->len; i++) { + r = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); + g_ptr_array_add( + xml, + g_markup_printf_escaped("", + r->feature->xmlname)); } g_ptr_array_add(xml, g_strdup("")); g_ptr_array_add(xml, NULL); @@ -400,20 +394,11 @@ static const char *get_feature_xml(const char *p, const char **newp, } return process->target_xml; } - /* Is it dynamically generated by the target? */ - if (cc->gdb_get_dynamic_xml) { - g_autofree char *xmlname = g_strndup(p, len); - const char *xml = cc->gdb_get_dynamic_xml(cpu, xmlname); - if (xml) { - return xml; - } - } - /* Is it one of the encoded gdb-xml/ files? */ - for (int i = 0; gdb_static_features[i].xmlname; i++) { - const char *name = gdb_static_features[i].xmlname; - if ((strncmp(name, p, len) == 0) && - strlen(name) == len) { - return gdb_static_features[i].xml; + /* Is it one of the features? */ + for (guint i = 0; i < cpu->gdb_regs->len; i++) { + r = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); + if (strncmp(p, r->feature->xmlname, len) == 0) { + return r->feature->xml; } } @@ -508,12 +493,10 @@ static int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) return cc->gdb_read_register(cpu, buf, reg); } - if (cpu->gdb_regs) { - for (guint i = 0; i < cpu->gdb_regs->len; i++) { - r = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); - if (r->base_reg <= reg && reg < r->base_reg + r->feature->num_regs) { - return r->get_reg(cpu, buf, reg - r->base_reg); - } + for (guint i = 0; i < cpu->gdb_regs->len; i++) { + r = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); + if (r->base_reg <= reg && reg < r->base_reg + r->feature->num_regs) { + return r->get_reg(cpu, buf, reg - r->base_reg); } } return 0; @@ -528,51 +511,70 @@ static int gdb_write_register(CPUState *cpu, uint8_t *mem_buf, int reg) return cc->gdb_write_register(cpu, mem_buf, reg); } - if (cpu->gdb_regs) { - for (guint i = 0; i < cpu->gdb_regs->len; i++) { - r = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); - if (r->base_reg <= reg && reg < r->base_reg + r->feature->num_regs) { - return r->set_reg(cpu, mem_buf, reg - r->base_reg); - } + for (guint i = 0; i < cpu->gdb_regs->len; i++) { + r = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); + if (r->base_reg <= reg && reg < r->base_reg + r->feature->num_regs) { + return r->set_reg(cpu, mem_buf, reg - r->base_reg); } } return 0; } +static void gdb_register_feature(CPUState *cpu, int base_reg, + gdb_get_reg_cb get_reg, gdb_set_reg_cb set_reg, + const GDBFeature *feature) +{ + GDBRegisterState s = { + .base_reg = base_reg, + .get_reg = get_reg, + .set_reg = set_reg, + .feature = feature + }; + + g_array_append_val(cpu->gdb_regs, s); +} + +void gdb_init_cpu(CPUState *cpu) +{ + CPUClass *cc = CPU_GET_CLASS(cpu); + const GDBFeature *feature; + + cpu->gdb_regs = g_array_new(false, false, sizeof(GDBRegisterState)); + + if (cc->gdb_core_xml_file) { + feature = gdb_find_static_feature(cc->gdb_core_xml_file); + gdb_register_feature(cpu, 0, + cc->gdb_read_register, cc->gdb_write_register, + feature); + } + + cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs; +} + void gdb_register_coprocessor(CPUState *cpu, gdb_get_reg_cb get_reg, gdb_set_reg_cb set_reg, const GDBFeature *feature, int g_pos) { GDBRegisterState *s; guint i; + int base_reg = cpu->gdb_num_regs; - if (cpu->gdb_regs) { - for (i = 0; i < cpu->gdb_regs->len; i++) { - /* Check for duplicates. */ - s = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); - if (s->feature == feature) { - return; - } + for (i = 0; i < cpu->gdb_regs->len; i++) { + /* Check for duplicates. */ + s = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); + if (s->feature == feature) { + return; } - } else { - cpu->gdb_regs = g_array_new(false, false, sizeof(GDBRegisterState)); - i = 0; } - g_array_set_size(cpu->gdb_regs, i + 1); - s = &g_array_index(cpu->gdb_regs, GDBRegisterState, i); - s->base_reg = cpu->gdb_num_regs; - s->get_reg = get_reg; - s->set_reg = set_reg; - s->feature = feature; + gdb_register_feature(cpu, base_reg, get_reg, set_reg, feature); /* Add to end of list. */ cpu->gdb_num_regs += feature->num_regs; if (g_pos) { - if (g_pos != s->base_reg) { + if (g_pos != base_reg) { error_report("Error: Bad gdb register numbering for '%s', " - "expected %d got %d", feature->xml, - g_pos, s->base_reg); + "expected %d got %d", feature->xml, g_pos, base_reg); } else { cpu->gdb_num_g_regs = cpu->gdb_num_regs; } diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 67db07741d7..fe16d0d9df8 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -27,6 +27,7 @@ #include "qemu/main-loop.h" #include "exec/log.h" #include "exec/cpu-common.h" +#include "exec/gdbstub.h" #include "qemu/error-report.h" #include "qemu/qemu-print.h" #include "sysemu/tcg.h" @@ -240,11 +241,10 @@ static void cpu_common_unrealizefn(DeviceState *dev) static void cpu_common_initfn(Object *obj) { CPUState *cpu = CPU(obj); - CPUClass *cc = CPU_GET_CLASS(obj); + gdb_init_cpu(cpu); cpu->cpu_index = UNASSIGNED_CPU_INDEX; cpu->cluster_index = UNASSIGNED_CLUSTER_INDEX; - cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs; /* user-mode doesn't have configurable SMP topology */ /* the default value is changed by qemu_init_vcpu() for system-mode */ cpu->nr_cores = 1; @@ -264,6 +264,7 @@ static void cpu_common_finalize(Object *obj) { CPUState *cpu = CPU(obj); + g_array_free(cpu->gdb_regs, TRUE); qemu_lockcnt_destroy(&cpu->in_ioctl_lock); qemu_mutex_destroy(&cpu->work_mutex); } From patchwork Tue Feb 27 14:43:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905126 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=WKvCDqEj; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgJ21qzjz1yX0 for ; Wed, 28 Feb 2024 01:45:06 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reygv-0005wF-L3; Tue, 27 Feb 2024 09:44:21 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reygu-0005mx-0m for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:20 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygM-00021m-0N for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:19 -0500 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-412a9a61545so10577505e9.2 for ; Tue, 27 Feb 2024 06:43:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045024; x=1709649824; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bDjjTqMhYKHCzkLVMWR5TnRDxMdOCstiIUzTCMYj9VU=; b=WKvCDqEj873VlxGMmasluT6QWjIlPX3Xe3u0B743mLkH4caWX6mLHD3D3nbngv7hXt DtR0B0bT3nbmJ687LGXjIaZGKk1BoDE1rvcaYVC+5vI/d5eENk+5FI5XsBWklBC2f9Ev 45W9BJA3XxSMJvzgGzt+zwK8FlSA18m/7v0KpdTQXlTD82W7m56QBZmBrk4HiNlBrWNB fs6Q/XR8k2zvtuhSLCInRFTP7e60KnA8mWc2shsJK0nmIh/XsXwe4n5CSgs1wzjmfRg7 oDZXiauxKOV91636Kc3X+TvJfJUM0QPaxFN8yP0BxEJePoD+949T/WoIKfmjI8GeTR/s LVug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045024; x=1709649824; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bDjjTqMhYKHCzkLVMWR5TnRDxMdOCstiIUzTCMYj9VU=; b=XnVCLMgKsJ+upSUklUw/uzm5qhcC44kPgJFdFMtfz4QAqgaTXoRvuPB8pPpHA2JRXW WmZKhKeEziuBZBuLz2WPsBTKRZ9Xetv4xHXdUmvOdEPiq5Yc/J6UC89+KzP8k0iH2T1y 8VCk4HyweowEDf8ezjAZo20Q5o8T/BDC6W7VC9xvBsRgxWw8z4acRONr798waYrk2LgB gT2xaExuMSDwOUjkvtgGaiu+YowplEzu1MmU1EK+cyIHEBrKQramZTvFlfbw8bKVDxgJ J/zrz2zGVwIwyNqtSd4n2NV9SStmL9+YcXximmKAJ5tVsfZR2nCAVIBcd/u6H39FTaKA tqTQ== X-Gm-Message-State: AOJu0Yze7lxyJEZWtIDJv668fB90nYn6buoKexUimFbKZd6p5zFZ3sbo bUew08VrLZK1B9l7ITz+6RyQOye9Uv/7ICbbgvkhLPAIl/SMSPuAfIbeEGPWLC8= X-Google-Smtp-Source: AGHT+IHsA5Bz/phvju6tzTpA7Td3fqaLqq/dwwrSnQInb9Zk43rrXTSyRsUGn9mWuS0Mk4ipHtX2zg== X-Received: by 2002:a05:600c:5021:b0:412:a451:d32f with SMTP id n33-20020a05600c502100b00412a451d32fmr4837977wmr.20.1709045024263; Tue, 27 Feb 2024 06:43:44 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id y9-20020a7bcd89000000b00412706c3ddasm14924278wmj.18.2024.02.27.06.43.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:40 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id ADD4C5F8FC; Tue, 27 Feb 2024 14:43:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour , Akihiko Odaki Subject: [PATCH v4 12/29] gdbstub: Infer number of core registers from XML Date: Tue, 27 Feb 2024 14:43:18 +0000 Message-Id: <20240227144335.1196131-13-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Akihiko Odaki GDBFeature has the num_regs member so use it where applicable to remove magic numbers. Signed-off-by: Akihiko Odaki Message-Id: <20240103173349.398526-34-alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-8-777047380591@daynix.com> [AJB: remove core reg check from microblaze read reg] Signed-off-by: Alex Bennée --- include/hw/core/cpu.h | 3 ++- target/s390x/cpu.h | 2 -- gdbstub/gdbstub.c | 5 ++++- target/arm/cpu.c | 1 - target/arm/cpu64.c | 1 - target/avr/cpu.c | 1 - target/hexagon/cpu.c | 1 - target/i386/cpu.c | 2 -- target/loongarch/cpu.c | 2 -- target/m68k/cpu.c | 1 - target/microblaze/cpu.c | 1 - target/microblaze/gdbstub.c | 5 ----- target/riscv/cpu.c | 1 - target/rx/cpu.c | 1 - target/s390x/cpu.c | 1 - 15 files changed, 6 insertions(+), 22 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 4385ce54c99..1bbf21b2201 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -126,7 +126,8 @@ struct SysemuCPUOps; * @gdb_adjust_breakpoint: Callback for adjusting the address of a * breakpoint. Used by AVR to handle a gdb mis-feature with * its Harvard architecture split code and data. - * @gdb_num_core_regs: Number of core registers accessible to GDB. + * @gdb_num_core_regs: Number of core registers accessible to GDB or 0 to infer + * from @gdb_core_xml_file. * @gdb_core_xml_file: File name for core registers GDB XML description. * @gdb_stop_before_watchpoint: Indicates whether GDB expects the CPU to stop * before the insn which triggers a watchpoint rather than after it. diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index d37a49b4d92..43a46a5a068 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -491,8 +491,6 @@ static inline void cpu_get_tb_cpu_state(CPUS390XState *env, vaddr *pc, #define S390_R13_REGNUM 15 #define S390_R14_REGNUM 16 #define S390_R15_REGNUM 17 -/* Total Core Registers. */ -#define S390_NUM_CORE_REGS 18 static inline void setcc(S390CPU *cpu, uint64_t cc) { diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c index d573f808d2e..f766ee277a0 100644 --- a/gdbstub/gdbstub.c +++ b/gdbstub/gdbstub.c @@ -546,9 +546,12 @@ void gdb_init_cpu(CPUState *cpu) gdb_register_feature(cpu, 0, cc->gdb_read_register, cc->gdb_write_register, feature); + cpu->gdb_num_regs = cpu->gdb_num_g_regs = feature->num_regs; } - cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs; + if (cc->gdb_num_core_regs) { + cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs; + } } void gdb_register_coprocessor(CPUState *cpu, diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 5fa86bc8d55..84887084d95 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2515,7 +2515,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) #ifndef CONFIG_USER_ONLY cc->sysemu_ops = &arm_sysemu_ops; #endif - cc->gdb_num_core_regs = 26; cc->gdb_arch_name = arm_gdb_arch_name; cc->gdb_get_dynamic_xml = arm_gdb_get_dynamic_xml; cc->gdb_stop_before_watchpoint = true; diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 8e30a7993ea..869d8dd24ee 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -793,7 +793,6 @@ static void aarch64_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_read_register = aarch64_cpu_gdb_read_register; cc->gdb_write_register = aarch64_cpu_gdb_write_register; - cc->gdb_num_core_regs = 34; cc->gdb_core_xml_file = "aarch64-core.xml"; cc->gdb_arch_name = aarch64_gdb_arch_name; diff --git a/target/avr/cpu.c b/target/avr/cpu.c index a40f445af21..a50170bc69a 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -251,7 +251,6 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data) cc->gdb_read_register = avr_cpu_gdb_read_register; cc->gdb_write_register = avr_cpu_gdb_write_register; cc->gdb_adjust_breakpoint = avr_cpu_gdb_adjust_breakpoint; - cc->gdb_num_core_regs = 35; cc->gdb_core_xml_file = "avr-cpu.xml"; cc->tcg_ops = &avr_tcg_ops; } diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index ebe804e2931..a10d87b8220 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -362,7 +362,6 @@ static void hexagon_cpu_class_init(ObjectClass *c, void *data) cc->get_pc = hexagon_cpu_get_pc; cc->gdb_read_register = hexagon_gdb_read_register; cc->gdb_write_register = hexagon_gdb_write_register; - cc->gdb_num_core_regs = TOTAL_PER_THREAD_REGS; cc->gdb_stop_before_watchpoint = true; cc->gdb_core_xml_file = "hexagon-core.xml"; cc->disas_set_info = hexagon_cpu_disas_set_info; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 7f908236767..733254fab57 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7990,10 +7990,8 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->gdb_arch_name = x86_gdb_arch_name; #ifdef TARGET_X86_64 cc->gdb_core_xml_file = "i386-64bit.xml"; - cc->gdb_num_core_regs = 66; #else cc->gdb_core_xml_file = "i386-32bit.xml"; - cc->gdb_num_core_regs = 50; #endif cc->disas_set_info = x86_disas_set_info; diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 7dc50bf35fc..bc2684179f2 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -815,7 +815,6 @@ static void loongarch32_cpu_class_init(ObjectClass *c, void *data) { CPUClass *cc = CPU_CLASS(c); - cc->gdb_num_core_regs = 35; cc->gdb_core_xml_file = "loongarch-base32.xml"; cc->gdb_arch_name = loongarch32_gdb_arch_name; } @@ -829,7 +828,6 @@ static void loongarch64_cpu_class_init(ObjectClass *c, void *data) { CPUClass *cc = CPU_CLASS(c); - cc->gdb_num_core_regs = 35; cc->gdb_core_xml_file = "loongarch-base64.xml"; cc->gdb_arch_name = loongarch64_gdb_arch_name; } diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index d5a71c63152..cc6e4537be5 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -570,7 +570,6 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data) #endif cc->disas_set_info = m68k_cpu_disas_set_info; - cc->gdb_num_core_regs = 18; cc->tcg_ops = &m68k_tcg_ops; } diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 2c62cf048c2..e533e7a95ec 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -444,7 +444,6 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) cc->sysemu_ops = &mb_sysemu_ops; #endif device_class_set_props(dc, mb_properties); - cc->gdb_num_core_regs = 32 + 25; cc->gdb_core_xml_file = "microblaze-core.xml"; cc->disas_set_info = mb_disas_set_info; diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c index 6ffc5ad0752..eb168d10070 100644 --- a/target/microblaze/gdbstub.c +++ b/target/microblaze/gdbstub.c @@ -49,14 +49,9 @@ enum { int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); - CPUClass *cc = CPU_GET_CLASS(cs); CPUMBState *env = &cpu->env; uint32_t val; - if (n > cc->gdb_num_core_regs) { - return 0; - } - switch (n) { case 1 ... 31: val = env->regs[n]; diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 1b62e269b90..dd8a0e94897 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2352,7 +2352,6 @@ static void riscv_cpu_common_class_init(ObjectClass *c, void *data) cc->get_pc = riscv_cpu_get_pc; cc->gdb_read_register = riscv_cpu_gdb_read_register; cc->gdb_write_register = riscv_cpu_gdb_write_register; - cc->gdb_num_core_regs = 33; cc->gdb_stop_before_watchpoint = true; cc->disas_set_info = riscv_cpu_disas_set_info; #ifndef CONFIG_USER_ONLY diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 5205167da17..2f878d08d6d 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -221,7 +221,6 @@ static void rx_cpu_class_init(ObjectClass *klass, void *data) cc->gdb_write_register = rx_cpu_gdb_write_register; cc->disas_set_info = rx_cpu_disas_set_info; - cc->gdb_num_core_regs = 26; cc->gdb_core_xml_file = "rx-core.xml"; cc->tcg_ops = &rx_tcg_ops; } diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 49a2341accf..f7194534aeb 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -368,7 +368,6 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) s390_cpu_class_init_sysemu(cc); #endif cc->disas_set_info = s390_cpu_disas_set_info; - cc->gdb_num_core_regs = S390_NUM_CORE_REGS; cc->gdb_core_xml_file = "s390x-core64.xml"; cc->gdb_arch_name = s390_gdb_arch_name; From patchwork Tue Feb 27 14:43:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905144 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=cEVmMrpd; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgND4M4Sz1yX0 for ; Wed, 28 Feb 2024 01:48:44 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reyhc-0007GY-Mk; Tue, 27 Feb 2024 09:45:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reyhG-0006Ow-Au for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:45 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygR-00025W-0Q for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:41 -0500 Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-33d6f26ff33so3072639f8f.0 for ; Tue, 27 Feb 2024 06:43:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045029; x=1709649829; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=m5QrhORKQXYv0pzCl6ansjRiTWdObzMQswF5xvhKoks=; b=cEVmMrpdSp678cheGt2sFWb0hancWpb8+oK46+Vh26v2cNoEbo8njheJRzvWNlr+gp EkLgXq93hkowjTrqZBaVgR5O7KSwofpb7nSYiJ7hOJz38FkP7ajyn9yoH+LYo3BIq05+ olmgD9wJKUSM9qelyurVgmoveOeFieUWZ2pp4cHGfUXvEm4wxXM9vpV0VP5Uy8LKXvW+ IFHDLhCwhbq4p6SXm0FDlc443FombNABQbhG1+D9EGtUqPM0jEj1WZNBSYemXuGjyDJ+ RXBzjv4LQuRSEMYLh05Duf2vsNrulzJpSsykZ9XKTG8Rk69uxa1FF8nHlsZrPyzh4KqB 9w6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045029; x=1709649829; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=m5QrhORKQXYv0pzCl6ansjRiTWdObzMQswF5xvhKoks=; b=ZDTQ/eM4Xm7qRCBNVcnRwIL9+Z+1BEYElr5V/4iqDRwshEjNbhlLUKn0pqs6OwNHY8 RZeLflbfhmwvztry9tCOH035bObWzwmLos9bNrAV2zY3SDCeGOx4r2a86GYVllL6y9Df ksCtLywK8g3kCzNLGGXSybC2h41SsdCyrQfhP5f6DYZZPt2KMTanM9FHvycgjZeP1Pjv rbjrGWNL7/AeuJOX3l1n+dQVIAE3GbezUjiyzr1xxhm/rLfHCp3oOujSppX/Jpn4VCJ5 DGCeb2nn6XVbAh/JCYuBa6w7hE6pqVg7kGRZBFLw2NVbgZOooj83aVyS2o7ZHRL8Q4mM gNFQ== X-Gm-Message-State: AOJu0Ywhs0vhU2qVBRKVuRR6t+f6VriWnUeq9VVhQhNP/YoZmvQw0WjC 4v56whzJ+3QWJFBB8ThqTQ84z8pm2LXz+UQDVI/xY1Rb5eHk5rOLddIDgCzosqE= X-Google-Smtp-Source: AGHT+IHY35rpROmG9o2nsZAfwHQ9rTgZhSYzc+HDgUb+eDnFJds19Li3g4Hmq4xoPZQKbY/kb2l5yQ== X-Received: by 2002:a05:6000:24a:b0:33d:9eef:4f25 with SMTP id m10-20020a056000024a00b0033d9eef4f25mr6899885wrz.51.1709045029442; Tue, 27 Feb 2024 06:43:49 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id u3-20020adfed43000000b0033d9ee09b7asm11413268wro.107.2024.02.27.06.43.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:47 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id CB3A55F8F9; Tue, 27 Feb 2024 14:43:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour , Akihiko Odaki Subject: [PATCH v4 13/29] hw/core/cpu: Remove gdb_get_dynamic_xml member Date: Tue, 27 Feb 2024 14:43:19 +0000 Message-Id: <20240227144335.1196131-14-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Akihiko Odaki This function is no longer used. Signed-off-by: Akihiko Odaki Reviewed-by: Alex Bennée Message-Id: <20240103173349.398526-35-alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-9-777047380591@daynix.com> Signed-off-by: Alex Bennée --- include/hw/core/cpu.h | 4 ---- target/arm/cpu.h | 6 ------ target/ppc/cpu.h | 1 - target/arm/cpu.c | 1 - target/arm/gdbstub.c | 18 ------------------ target/ppc/cpu_init.c | 3 --- target/ppc/gdbstub.c | 10 ---------- target/riscv/cpu.c | 14 -------------- 8 files changed, 57 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 1bbf21b2201..4b659799b00 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -133,9 +133,6 @@ struct SysemuCPUOps; * before the insn which triggers a watchpoint rather than after it. * @gdb_arch_name: Optional callback that returns the architecture name known * to GDB. The caller must free the returned string with g_free. - * @gdb_get_dynamic_xml: Callback to return dynamically generated XML for the - * gdb stub. Returns a pointer to the XML contents for the specified XML file - * or NULL if the CPU doesn't have a dynamically generated content for it. * @disas_set_info: Setup architecture specific components of disassembly info * @adjust_watchpoint_address: Perform a target-specific adjustment to an * address before attempting to match it against watchpoints. @@ -167,7 +164,6 @@ struct CPUClass { const char *gdb_core_xml_file; const gchar * (*gdb_arch_name)(CPUState *cpu); - const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname); void (*disas_set_info)(CPUState *cpu, disassemble_info *info); diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 508a9c1e0d6..a5b3d8f7da7 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1159,12 +1159,6 @@ hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, int arm_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int arm_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); -/* Returns the dynamically generated XML for the gdb stub. - * Returns a pointer to the XML contents for the specified XML file or NULL - * if the XML name doesn't match the predefined one. - */ -const char *arm_gdb_get_dynamic_xml(CPUState *cpu, const char *xmlname); - int arm_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, int cpuid, DumpState *s); int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs, diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index c66989a5e60..0133da4e079 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1545,7 +1545,6 @@ int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg); #ifndef CONFIG_USER_ONLY hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); -const char *ppc_gdb_get_dynamic_xml(CPUState *cs, const char *xml_name); #endif int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, int cpuid, DumpState *s); diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 84887084d95..b2ea5d65132 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2516,7 +2516,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->sysemu_ops = &arm_sysemu_ops; #endif cc->gdb_arch_name = arm_gdb_arch_name; - cc->gdb_get_dynamic_xml = arm_gdb_get_dynamic_xml; cc->gdb_stop_before_watchpoint = true; cc->disas_set_info = arm_disas_set_info; diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c index 059d84f98e5..a3bb73cfa7c 100644 --- a/target/arm/gdbstub.c +++ b/target/arm/gdbstub.c @@ -474,24 +474,6 @@ static GDBFeature *arm_gen_dynamic_m_secextreg_feature(CPUState *cs, #endif #endif /* CONFIG_TCG */ -const char *arm_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname) -{ - ARMCPU *cpu = ARM_CPU(cs); - - if (strcmp(xmlname, "system-registers.xml") == 0) { - return cpu->dyn_sysreg_feature.desc.xml; - } else if (strcmp(xmlname, "sve-registers.xml") == 0) { - return cpu->dyn_svereg_feature.desc.xml; - } else if (strcmp(xmlname, "arm-m-system.xml") == 0) { - return cpu->dyn_m_systemreg_feature.desc.xml; -#ifndef CONFIG_USER_ONLY - } else if (strcmp(xmlname, "arm-m-secext.xml") == 0) { - return cpu->dyn_m_secextreg_feature.desc.xml; -#endif - } - return NULL; -} - void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) { CPUState *cs = CPU(cpu); diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 5f0ecf443d8..1d3d1db7c31 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7385,9 +7385,6 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) #endif cc->gdb_num_core_regs = 71; -#ifndef CONFIG_USER_ONLY - cc->gdb_get_dynamic_xml = ppc_gdb_get_dynamic_xml; -#endif #ifdef USE_APPLE_GDB cc->gdb_read_register = ppc_cpu_gdb_read_register_apple; cc->gdb_write_register = ppc_cpu_gdb_write_register_apple; diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c index 43f61130c5f..122ea9d0c00 100644 --- a/target/ppc/gdbstub.c +++ b/target/ppc/gdbstub.c @@ -342,16 +342,6 @@ static void gdb_gen_spr_feature(CPUState *cs) gdb_feature_builder_end(&builder); } - -const char *ppc_gdb_get_dynamic_xml(CPUState *cs, const char *xml_name) -{ - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs); - - if (strcmp(xml_name, "power-spr.xml") == 0) { - return pcc->gdb_spr.xml; - } - return NULL; -} #endif #if !defined(CONFIG_USER_ONLY) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index dd8a0e94897..5ff0192c527 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2300,19 +2300,6 @@ static const gchar *riscv_gdb_arch_name(CPUState *cs) } } -static const char *riscv_gdb_get_dynamic_xml(CPUState *cs, const char *xmlname) -{ - RISCVCPU *cpu = RISCV_CPU(cs); - - if (strcmp(xmlname, "riscv-csr.xml") == 0) { - return cpu->dyn_csr_feature.xml; - } else if (strcmp(xmlname, "riscv-vector.xml") == 0) { - return cpu->dyn_vreg_feature.xml; - } - - return NULL; -} - #ifndef CONFIG_USER_ONLY static int64_t riscv_get_arch_id(CPUState *cs) { @@ -2359,7 +2346,6 @@ static void riscv_cpu_common_class_init(ObjectClass *c, void *data) cc->get_arch_id = riscv_get_arch_id; #endif cc->gdb_arch_name = riscv_gdb_arch_name; - cc->gdb_get_dynamic_xml = riscv_gdb_get_dynamic_xml; device_class_set_props(dc, riscv_cpu_properties); } From patchwork Tue Feb 27 14:43:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905145 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=ZiHlygWy; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgND6hwzz23qQ for ; Wed, 28 Feb 2024 01:48:44 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reyhd-0007L8-7p; Tue, 27 Feb 2024 09:45:05 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reyhI-0006VD-58 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:45 -0500 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygR-00025B-KE for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:43 -0500 Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-412ae087378so4852145e9.3 for ; Tue, 27 Feb 2024 06:43:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045029; x=1709649829; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BKaOfkzsaddgrw5PBxNyKChRzqPSwV94abl+cum6jxg=; b=ZiHlygWyS5GaXej0u5EzmeMGl5q1yTzo8GMkU9lTP9LWvpC4pHZQXOyzJCczwTNuz8 efb97XDZKf3qyhwFVYMFOgKqpqbzKz7tJlJyTr2h4vTyk1UMCVnLxaqWDTfAXfGmef9p OZER5UbZoDo/ASF7oHZ7eGP5ltPGv2ZVeOD3pUlhLABEId6PzMbN8U6U7dgyJl0i/aBA av79vXZ5zlHaXHCF7dnfImJSVVlfwt4GOf6E8bpBWqHVH4LkfW7N3a2I01zv1OUs3xa+ 4TO+Xsb/cMK+wqPROPcU9MT0iEZ7Gr6oSn5e0zfCBIZu8RaHUd9SsoY8ljHfE0kc1mRH RnKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045029; x=1709649829; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BKaOfkzsaddgrw5PBxNyKChRzqPSwV94abl+cum6jxg=; b=Bbt1mJV8ShoT1qwyuaFBNxNSWbpqOmCQFke6yoTxbrcioiasu+z6vp9WEtFAFiHkD/ ME25iQM+guPVXUVFwzRcC7Zlo7ejWKCg5drAJ+Hk4Rl6JrreuwvHzYaTTGgP/wT2O58h k/plUVKemLzD3PrZrCLLAngi3+w+hh5NDi2eGI6ZmBUhg8Gaq8ioQ+3ILOj/pRNfeTlE 1xqsXWUIsWu1sT+grDB1KKaWaunmnv0q198JDG3ySL/xCQJLzT0T5eMhBotYqIW4VVZB 0bz+//yyvugaC5iolAhm3uq5eAG1u8iUt4kJqjejgYGL5JyUoDrrQEiRNgZYvtIMJvGV coxg== X-Gm-Message-State: AOJu0YxGemD/yRnPQ50ns0SQT3kJV2jjC1od+9kY0spQVsg0hGwMSUgt sW0l3UgY8/48EZ3QlpYKf5/6rDYkjMsZXr3wFf9nruLDyc8a1vKftc8nOxE9Ckk= X-Google-Smtp-Source: AGHT+IHF24oXmg4oTsfs3p6t0gGQ6iFGEvLFvPVBPGb7lUUqT+XjoWzoGTRMsotpqWoc4ncPH8OuOw== X-Received: by 2002:a05:600c:1394:b0:410:c25d:37e9 with SMTP id u20-20020a05600c139400b00410c25d37e9mr7463181wmf.16.1709045028932; Tue, 27 Feb 2024 06:43:48 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id y23-20020a1c4b17000000b0041253d0acd6sm15208159wma.47.2024.02.27.06.43.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:47 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id E2E445F90D; Tue, 27 Feb 2024 14:43:36 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour , Akihiko Odaki Subject: [PATCH v4 14/29] gdbstub: Add members to identify registers to GDBFeature Date: Tue, 27 Feb 2024 14:43:20 +0000 Message-Id: <20240227144335.1196131-15-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Akihiko Odaki These members will be used to help plugins to identify registers. The added members in instances of GDBFeature dynamically generated by CPUs will be filled in later changes. Signed-off-by: Akihiko Odaki Message-Id: <20240103173349.398526-36-alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-10-777047380591@daynix.com> Signed-off-by: Alex Bennée --- include/exec/gdbstub.h | 3 +++ gdbstub/gdbstub.c | 12 +++++++++--- target/riscv/gdbstub.c | 4 +--- scripts/feature_to_c.py | 14 +++++++++++++- 4 files changed, 26 insertions(+), 7 deletions(-) diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h index 82a8afa237f..da9ddfe54c5 100644 --- a/include/exec/gdbstub.h +++ b/include/exec/gdbstub.h @@ -13,12 +13,15 @@ typedef struct GDBFeature { const char *xmlname; const char *xml; + const char *name; + const char * const *regs; int num_regs; } GDBFeature; typedef struct GDBFeatureBuilder { GDBFeature *feature; GPtrArray *xml; + GPtrArray *regs; int base_reg; } GDBFeatureBuilder; diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c index f766ee277a0..a55b5e6581a 100644 --- a/gdbstub/gdbstub.c +++ b/gdbstub/gdbstub.c @@ -419,9 +419,10 @@ void gdb_feature_builder_init(GDBFeatureBuilder *builder, GDBFeature *feature, builder->feature = feature; builder->xml = g_ptr_array_new(); g_ptr_array_add(builder->xml, header); + builder->regs = g_ptr_array_new(); builder->base_reg = base_reg; feature->xmlname = xmlname; - feature->num_regs = 0; + feature->name = name; } void gdb_feature_builder_append_tag(const GDBFeatureBuilder *builder, @@ -440,10 +441,12 @@ void gdb_feature_builder_append_reg(const GDBFeatureBuilder *builder, const char *type, const char *group) { - if (builder->feature->num_regs < regnum) { - builder->feature->num_regs = regnum; + if (builder->regs->len <= regnum) { + g_ptr_array_set_size(builder->regs, regnum + 1); } + builder->regs->pdata[regnum] = (gpointer *)name; + if (group) { gdb_feature_builder_append_tag( builder, @@ -469,6 +472,9 @@ void gdb_feature_builder_end(const GDBFeatureBuilder *builder) } g_ptr_array_free(builder->xml, TRUE); + + builder->feature->num_regs = builder->regs->len; + builder->feature->regs = (void *)g_ptr_array_free(builder->regs, FALSE); } const GDBFeature *gdb_find_static_feature(const char *xmlname) diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index 546e8692d17..be7a02cd903 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -266,11 +266,9 @@ static GDBFeature *riscv_gen_dynamic_csr_feature(CPUState *cs, int base_reg) } predicate = csr_ops[i].predicate; if (predicate && (predicate(env, i) == RISCV_EXCP_NONE)) { - g_autofree char *dynamic_name = NULL; name = csr_ops[i].name; if (!name) { - dynamic_name = g_strdup_printf("csr%03x", i); - name = dynamic_name; + name = g_strdup_printf("csr%03x", i); } gdb_feature_builder_append_reg(&builder, name, bitsize, i, diff --git a/scripts/feature_to_c.py b/scripts/feature_to_c.py index e04d6b2df7f..807af0e685c 100644 --- a/scripts/feature_to_c.py +++ b/scripts/feature_to_c.py @@ -50,7 +50,9 @@ def writeliteral(indent, bytes): sys.stderr.write(f'unexpected start tag: {element.tag}\n') exit(1) + feature_name = element.attrib['name'] regnum = 0 + regnames = [] regnums = [] tags = ['feature'] for event, element in events: @@ -67,6 +69,7 @@ def writeliteral(indent, bytes): if 'regnum' in element.attrib: regnum = int(element.attrib['regnum']) + regnames.append(element.attrib['name']) regnums.append(regnum) regnum += 1 @@ -85,6 +88,15 @@ def writeliteral(indent, bytes): writeliteral(8, bytes(os.path.basename(input), 'utf-8')) sys.stdout.write(',\n') writeliteral(8, read) - sys.stdout.write(f',\n {num_regs},\n }},\n') + sys.stdout.write(',\n') + writeliteral(8, bytes(feature_name, 'utf-8')) + sys.stdout.write(',\n (const char * const []) {\n') + + for index, regname in enumerate(regnames): + sys.stdout.write(f' [{regnums[index] - base_reg}] =\n') + writeliteral(16, bytes(regname, 'utf-8')) + sys.stdout.write(',\n') + + sys.stdout.write(f' }},\n {num_regs},\n }},\n') sys.stdout.write(' { NULL }\n};\n') From patchwork Tue Feb 27 14:43:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905165 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=c2W/+rAm; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgR71QZzz1yX4 for ; Wed, 28 Feb 2024 01:51:15 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reyir-0000da-Va; Tue, 27 Feb 2024 09:46:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reyhL-0006cF-Vh for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:49 -0500 Received: from mail-lj1-x230.google.com ([2a00:1450:4864:20::230]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygU-00027o-32 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:47 -0500 Received: by mail-lj1-x230.google.com with SMTP id 38308e7fff4ca-2d28051376eso40112871fa.0 for ; Tue, 27 Feb 2024 06:43:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045032; x=1709649832; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8VoWfZh+ZjeHnIZS/0T0SSPiqruErjk06xElhK1rNbU=; b=c2W/+rAmt6JTDeja5yfQOrc+skJ6wjtghyJbi11bv3dviEWGcn0UpGyFP81OjZxMvu F312v7hZQ6qT/5yQ3X3YlsSnSQPQCov6Y64g2tjP301DFCIQQtZ60VlujbxYvhl3cvKe DD868o3MCTM+Oy3JLIFQuOyQAEOzNYJvfry57HI/WSVoXQYPE+/+59eATNjJe6FgbFNL +hJycESwaDCJilYEZVRD1k1ZW87G4cTP4IMFIoEZroDaQhpK7d/pPZ2gFbgXAZhMfA/9 NTe0TDbCzPNbFqZH0v5tn97BO82AMkNczpgqq7jehv3sOGZoD6jb1kl4/EnueN5jK3hs /dXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045032; x=1709649832; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8VoWfZh+ZjeHnIZS/0T0SSPiqruErjk06xElhK1rNbU=; b=V9uIIClUtzY6ObpUg37fPajh+o/aUB0F7cJgXwyi/qvMPz7YCCa5SEmOlmCicKNxfl C2Tn3bTVDryDDmbvk2AsLoGYc3mvyaGV5kPxJQyPaY7DykE9Qw0NvEVmA5OU04Atr/TE vxrP8cjl+guw9hdMn7pvhtR2PMOsxNh48+D3GxEADDo0RCQq0aqpAjnVAO2sXmQw8Owv ra3zJkButgv023142GFBOB7XCfg72T1SRGtHqxd7iKk6GknvbuLprSsYgauXvOFKhb1M u2LWd0sxIQRqmQEUzKFCh2yw8O4XOdk3e8Lp7eScBKaIyw2a9loetIqngG8Gy4nU2z6/ ubZg== X-Gm-Message-State: AOJu0YxZ2Aa75vIlexBo0UBn8mRXWDCl/5TEWf6pl3iDCnCX8JzQt/p5 wAmxa2fSvaYh4sei1tfUCR4MoiAK+/g7LrSsafUKitmaHZMXU7bAjesQwON0vJ4= X-Google-Smtp-Source: AGHT+IHknx+LqXL3Q4Ng1ItwEbvm5vYdlBF3ZeI/fkv31spuGKiqN4pzUPkNCiN0f1ENhSRjfjCpLw== X-Received: by 2002:a2e:a1c9:0:b0:2d2:3a7b:a78d with SMTP id c9-20020a2ea1c9000000b002d23a7ba78dmr6255906ljm.33.1709045031694; Tue, 27 Feb 2024 06:43:51 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a20-20020a05600c225400b00410df4bf22esm15302166wmm.38.2024.02.27.06.43.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:47 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 070475F90F; Tue, 27 Feb 2024 14:43:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 15/29] plugins: remove previous n_vcpus functions from API Date: Tue, 27 Feb 2024 14:43:21 +0000 Message-Id: <20240227144335.1196131-16-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::230; envelope-from=alex.bennee@linaro.org; helo=mail-lj1-x230.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Pierrick Bouvier This information is already accessible using qemu_info_t during plugin install. We will introduce another function (qemu_plugin_num_vcpus) which represent how many cpus were enabled, by tracking new cpu indexes. It's a breaking change, so we bump API version. Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson Message-Id: <20240213094009.150349-2-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée --- include/qemu/qemu-plugin.h | 10 +++------- plugins/plugin.h | 2 +- contrib/plugins/cache.c | 2 +- plugins/api.c | 30 ------------------------------ plugins/qemu-plugins.symbols | 2 -- 5 files changed, 5 insertions(+), 41 deletions(-) diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h index 4daab6efd29..e45181c793c 100644 --- a/include/qemu/qemu-plugin.h +++ b/include/qemu/qemu-plugin.h @@ -50,11 +50,13 @@ typedef uint64_t qemu_plugin_id_t; * * The plugins export the API they were built against by exposing the * symbol qemu_plugin_version which can be checked. + * + * version 2: removed qemu_plugin_n_vcpus and qemu_plugin_n_max_vcpus */ extern QEMU_PLUGIN_EXPORT int qemu_plugin_version; -#define QEMU_PLUGIN_VERSION 1 +#define QEMU_PLUGIN_VERSION 2 /** * struct qemu_info_t - system information for plugins @@ -643,12 +645,6 @@ QEMU_PLUGIN_API void qemu_plugin_register_atexit_cb(qemu_plugin_id_t id, qemu_plugin_udata_cb_t cb, void *userdata); -/* returns -1 in user-mode */ -int qemu_plugin_n_vcpus(void); - -/* returns -1 in user-mode */ -int qemu_plugin_n_max_vcpus(void); - /** * qemu_plugin_outs() - output string via QEMU's logging system * @string: a string diff --git a/plugins/plugin.h b/plugins/plugin.h index 5eb2fdbc85e..90f3f324ab6 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -15,7 +15,7 @@ #include #include "qemu/qht.h" -#define QEMU_PLUGIN_MIN_VERSION 0 +#define QEMU_PLUGIN_MIN_VERSION 2 /* global state */ struct qemu_plugin_state { diff --git a/contrib/plugins/cache.c b/contrib/plugins/cache.c index 9e7ade3b374..c5c8ac75a9c 100644 --- a/contrib/plugins/cache.c +++ b/contrib/plugins/cache.c @@ -767,7 +767,7 @@ int qemu_plugin_install(qemu_plugin_id_t id, const qemu_info_t *info, policy = LRU; - cores = sys ? qemu_plugin_n_vcpus() : 1; + cores = sys ? info->system.smp_vcpus : 1; for (i = 0; i < argc; i++) { char *opt = argv[i]; diff --git a/plugins/api.c b/plugins/api.c index 5521b0ad36c..2926b1961a8 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -342,36 +342,6 @@ const char *qemu_plugin_hwaddr_device_name(const struct qemu_plugin_hwaddr *h) #endif } -/* - * Queries to the number and potential maximum number of vCPUs there - * will be. This helps the plugin dimension per-vcpu arrays. - */ - -#ifndef CONFIG_USER_ONLY -static MachineState * get_ms(void) -{ - return MACHINE(qdev_get_machine()); -} -#endif - -int qemu_plugin_n_vcpus(void) -{ -#ifdef CONFIG_USER_ONLY - return -1; -#else - return get_ms()->smp.cpus; -#endif -} - -int qemu_plugin_n_max_vcpus(void) -{ -#ifdef CONFIG_USER_ONLY - return -1; -#else - return get_ms()->smp.max_cpus; -#endif -} - /* * Plugin output */ diff --git a/plugins/qemu-plugins.symbols b/plugins/qemu-plugins.symbols index 71f6c90549d..ca806000d54 100644 --- a/plugins/qemu-plugins.symbols +++ b/plugins/qemu-plugins.symbols @@ -16,8 +16,6 @@ qemu_plugin_mem_is_sign_extended; qemu_plugin_mem_is_store; qemu_plugin_mem_size_shift; - qemu_plugin_n_max_vcpus; - qemu_plugin_n_vcpus; qemu_plugin_outs; qemu_plugin_path_to_binary; qemu_plugin_register_atexit_cb; From patchwork Tue Feb 27 14:43:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905143 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=AgWPV9pf; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgN939c4z1yX0 for ; Wed, 28 Feb 2024 01:48:41 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reyiU-00080Y-4A; Tue, 27 Feb 2024 09:46:02 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reyhK-0006Zl-5n for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:49 -0500 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygT-00026w-1K for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:44 -0500 Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-412a588c8b4so14751185e9.0 for ; Tue, 27 Feb 2024 06:43:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045031; x=1709649831; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=O9WREwsMrt85roF9DpcRAV7U4Bq5TV/wSmpsUdovSGg=; b=AgWPV9pfuvU43azC87ybVbPTU5KbZRDiq5uTZ+PzA2sPMcilpfF04J3cPpnsT431GH qY4aflkR0f6X9ITFY8VU1wINjl+VYEtUo/jhQ4N+EbfxktuFjMZlksbmNLUqtA6Gkirt xgcM0xZMHdsgy25NKPxDps/pgNf97+gwVhjUFPEK6fFGhxVZjhDsAsl6n05FORl0qfTP MfR6oH0Ly5axd6sD/NL3Q0rYlyrmMOwG7AgItTiKFHJsZ9fYEIgpOwXIVlDzLxkUPqLU d+H2tWTC3WhAEOUJjcCQjiqaPyq5QqDFdy8yckcJuhSaBnqq0iVpdabanxg8kEwgbkee xINA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045031; x=1709649831; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=O9WREwsMrt85roF9DpcRAV7U4Bq5TV/wSmpsUdovSGg=; b=V1BHZ+C6MzfnuZw5drV4/J6CnxhhTLZjZ5dGk5ntBiMc+Nhrv8dQe1+YGoH0pdWcVK FmYPwI3PCRuxGf+nXBRsL945+6CayaoXoBVE699GrcJrFVRWzbDj7kqY2vWspl3Le1wB icIwHAoACZ5z5qAEPi4stAQzX8cDFi8UKif+ZKOsp85/pnqRDSpDxv+tS+pyM66yjJ80 2WlDjB5o8V9lFXDrU48aCtMnYGxmAGhJ1JgY2cok638wVz1ZtwnTHSeZillVXkjA7+Qt OlhsqRVl4IsDe21/7EGQKtbCoBzLImL5MU5m8N/HLAEdWxgEh03Wd4sUiVmaZv1tFYvJ ifog== X-Gm-Message-State: AOJu0YyEi8pMvIFlmQZo54YrchARYE8M7gg5LlHQERiqVe3ESoDcD4kS EpGp5Wg5ksD+m+hPqNg1i0yjWjjFIWOqAOdPUxQlW5GPsn8O/6jV2ter45zYqTU= X-Google-Smtp-Source: AGHT+IHC2ctZlSxVMNqs7Thj8Bia/Eikbx5IWYxhjKYmf2HaHd+c83+sMztE+z/zJVi9OFYkxvHizg== X-Received: by 2002:a05:6000:c91:b0:33d:b2ef:aca8 with SMTP id dp17-20020a0560000c9100b0033db2efaca8mr6767259wrb.19.1709045031466; Tue, 27 Feb 2024 06:43:51 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id k3-20020adff5c3000000b0033d8ce120f2sm11507653wrp.95.2024.02.27.06.43.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:47 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 203F75F8F7; Tue, 27 Feb 2024 14:43:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 16/29] plugins: add qemu_plugin_num_vcpus function Date: Tue, 27 Feb 2024 14:43:22 +0000 Message-Id: <20240227144335.1196131-17-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Pierrick Bouvier We now keep track of how many vcpus were started. This way, a plugin can easily query number of any vcpus at any point of execution, which unifies user and system mode workflows. Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson Message-Id: <20240213094009.150349-3-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée --- include/qemu/qemu-plugin.h | 3 +++ plugins/plugin.h | 4 ++++ plugins/api.c | 5 +++++ plugins/core.c | 6 ++++++ plugins/qemu-plugins.symbols | 1 + 5 files changed, 19 insertions(+) diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h index e45181c793c..93981f8f89f 100644 --- a/include/qemu/qemu-plugin.h +++ b/include/qemu/qemu-plugin.h @@ -645,6 +645,9 @@ QEMU_PLUGIN_API void qemu_plugin_register_atexit_cb(qemu_plugin_id_t id, qemu_plugin_udata_cb_t cb, void *userdata); +/* returns how many vcpus were started at this point */ +int qemu_plugin_num_vcpus(void); + /** * qemu_plugin_outs() - output string via QEMU's logging system * @string: a string diff --git a/plugins/plugin.h b/plugins/plugin.h index 90f3f324ab6..00b3509f708 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -44,6 +44,8 @@ struct qemu_plugin_state { * the code cache is flushed. */ struct qht dyn_cb_arr_ht; + /* How many vcpus were started */ + int num_vcpus; }; @@ -97,4 +99,6 @@ void plugin_register_vcpu_mem_cb(GArray **arr, void exec_inline_op(struct qemu_plugin_dyn_cb *cb); +int plugin_num_vcpus(void); + #endif /* PLUGIN_H */ diff --git a/plugins/api.c b/plugins/api.c index 2926b1961a8..116b8bd603c 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -342,6 +342,11 @@ const char *qemu_plugin_hwaddr_device_name(const struct qemu_plugin_hwaddr *h) #endif } +int qemu_plugin_num_vcpus(void) +{ + return plugin_num_vcpus(); +} + /* * Plugin output */ diff --git a/plugins/core.c b/plugins/core.c index ee2fa41af9e..caa66311351 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -213,6 +213,7 @@ void qemu_plugin_vcpu_init_hook(CPUState *cpu) bool success; qemu_rec_mutex_lock(&plugin.lock); + plugin.num_vcpus = MAX(plugin.num_vcpus, cpu->cpu_index + 1); plugin_cpu_update__locked(&cpu->cpu_index, NULL, NULL); success = g_hash_table_insert(plugin.cpu_ht, &cpu->cpu_index, &cpu->cpu_index); @@ -570,3 +571,8 @@ static void __attribute__((__constructor__)) plugin_init(void) QHT_MODE_AUTO_RESIZE); atexit(qemu_plugin_atexit_cb); } + +int plugin_num_vcpus(void) +{ + return plugin.num_vcpus; +} diff --git a/plugins/qemu-plugins.symbols b/plugins/qemu-plugins.symbols index ca806000d54..adb67608598 100644 --- a/plugins/qemu-plugins.symbols +++ b/plugins/qemu-plugins.symbols @@ -16,6 +16,7 @@ qemu_plugin_mem_is_sign_extended; qemu_plugin_mem_is_store; qemu_plugin_mem_size_shift; + qemu_plugin_num_vcpus; qemu_plugin_outs; qemu_plugin_path_to_binary; qemu_plugin_register_atexit_cb; From patchwork Tue Feb 27 14:43:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905152 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=L3J5VTxO; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgP35srjz23qQ for ; Wed, 28 Feb 2024 01:49:27 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reyin-0008NT-E8; Tue, 27 Feb 2024 09:46:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reyhG-0006Ou-A7 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:45 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygR-00025L-0n for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:40 -0500 Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-412949fd224so23006855e9.1 for ; Tue, 27 Feb 2024 06:43:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045029; x=1709649829; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Xq3bg3O489fduJkQRD4v3a7EWyBdeXHXm96vjazL+zo=; b=L3J5VTxOC6jMoyQJ0Kkk2Z1Z4/v6tyTaBJkuSAudOgKY9DGK0MBDbHh8FXceOnlAsW z+L2nD+oedCwz7A0DHpgaYwsKXG699Vrk0pc9mWF3nFUUn82eNMBXO2SI/AFwPgon2OF KCOmP+jC4+rvNoFVAMi5YMRmARisqBMss04jhbLoswJQRBy+FjucxLIlpplMpg9JYZYE sEj0ING/vRxulvlhr9aXDRORWPAArzZiFZa8wJsnooz32YWxv40DAZptBrau1fSqi3YX Zv8t3P6FHQu3AknMF7w3QkXcMwdDJSY/AYUUhb1b5O930GxY38V4xTYQAQYJTJtp17aG Kt4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045029; x=1709649829; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Xq3bg3O489fduJkQRD4v3a7EWyBdeXHXm96vjazL+zo=; b=e82NgPsU5ZeLWES9Yr4HDgA/8KsOkxPOKOa4dZZCgtuEVec6zNolZ2D2Hm0hw6Iy3A oC1liCoinLKXQj6K9YZMgA6XwxN3qFYqmQ/rh4DJH0chA+zWPwIQ76iFlJQ0oRh8DBWI hrv0MpO2R5f6Jol5pIFCK9Hh8WaWYm0JicnpN7kHzBmdvhMKkXGJFGMrqRChqhu5UX1s TDPTY4tndREvgHOgfVwaYGaPGOfdxBRAf9dM39GUDgHbo78Yg76rBPh2At4dKADB6Uy0 iGyLC5K7+ittg3mRt9sPlDBnDxiNnQILbCM34MkWftNDxNO8MXctU9yIFqoTnLNIK7t0 LoRg== X-Gm-Message-State: AOJu0Yw+UqEOMreHr+OcaH+EDG3Qs0bN/Y+slGJHcAFDLt5rk4HcIAXm TiGgguxuyrQhTYgxFM+UJ72dlGE0Bez9TYx1JIxmtKQeeufRWlJt2xIaH+dVOac= X-Google-Smtp-Source: AGHT+IHAP/lXe8u8rlHOfjZw5wX2x+OUcDl7++VcvhLOhxgjU7nMjI2JgtSrKQ9SQcBK+dkjg9AeQQ== X-Received: by 2002:a05:600c:35c6:b0:412:a3f2:d641 with SMTP id r6-20020a05600c35c600b00412a3f2d641mr6178315wmq.19.1709045029237; Tue, 27 Feb 2024 06:43:49 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id fm6-20020a05600c0c0600b00412a5b6ac5csm5958110wmb.36.2024.02.27.06.43.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:47 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 333CD5F911; Tue, 27 Feb 2024 14:43:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 17/29] plugins: fix order of init/idle/resume callback Date: Tue, 27 Feb 2024 14:43:23 +0000 Message-Id: <20240227144335.1196131-18-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Pierrick Bouvier We found that vcpu_init_hook was called *after* idle callback. vcpu_init is called from cpu_realize_fn, while idle/resume cb are called from qemu_wait_io_event (in vcpu thread). This change ensures we only call idle and resume cb only once a plugin was init for a given vcpu. Next change in the series will run vcpu_init asynchronously, which will make it run *after* resume callback as well. So we fix this now. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240213094009.150349-4-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée --- plugins/core.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/plugins/core.c b/plugins/core.c index caa66311351..2392bbb8889 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -391,12 +391,17 @@ void qemu_plugin_vcpu_syscall_ret(CPUState *cpu, int64_t num, int64_t ret) void qemu_plugin_vcpu_idle_cb(CPUState *cpu) { - plugin_vcpu_cb__simple(cpu, QEMU_PLUGIN_EV_VCPU_IDLE); + /* idle and resume cb may be called before init, ignore in this case */ + if (cpu->cpu_index < plugin.num_vcpus) { + plugin_vcpu_cb__simple(cpu, QEMU_PLUGIN_EV_VCPU_IDLE); + } } void qemu_plugin_vcpu_resume_cb(CPUState *cpu) { - plugin_vcpu_cb__simple(cpu, QEMU_PLUGIN_EV_VCPU_RESUME); + if (cpu->cpu_index < plugin.num_vcpus) { + plugin_vcpu_cb__simple(cpu, QEMU_PLUGIN_EV_VCPU_RESUME); + } } void qemu_plugin_register_vcpu_idle_cb(qemu_plugin_id_t id, From patchwork Tue Feb 27 14:43:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905200 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=l8FQOhMD; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgYZ2JPsz23qP for ; Wed, 28 Feb 2024 01:56:50 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reypk-0005Ag-9y; Tue, 27 Feb 2024 09:53:28 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reypd-0004VD-Hm for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:21 -0500 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reypK-0004ro-03 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:21 -0500 Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-412acb93e2aso5918895e9.3 for ; Tue, 27 Feb 2024 06:53:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045580; x=1709650380; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DS/EGY2tGxoW2u4p636lnzJLhbzW+SUrMSj5Qfa0kZY=; b=l8FQOhMDo1lm41CiXYfdGTQNHNVSgqtKbLGr9K+9kIRB6RIZ9675k6Y1CePVXD4VXW UBRT5jNVhuhI6R7c9OIBE1ssWO8gSG2XCuqxHWTq6wm/t1RwOpGsYFktsa7E7HxFbRGP +lAuS+zO8kxpNwHDdgNGb0FC+qj4ubLjQhyMGwi2iz3ZHYHOXIlpPuQWMd4tWgg5cKJN RVkvIoIj9lqtVHrFuw9UWB4+bej2/DGZ3IPJAUkzhz5MCPvvwVjHsprrdCxmGsF6dBk4 xisrt+9QRYFBCVw3YmU2Hu61s4CdXmVqnOucB8btjvQY2ffDK6r47ENRDPubg8I/yx2e f7bQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045580; x=1709650380; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DS/EGY2tGxoW2u4p636lnzJLhbzW+SUrMSj5Qfa0kZY=; b=sxCKkniHmiH7bDYeQ3N8+vaNTqKt8IYPk9R1PIgfVHAc+w4de2Mhq6EYrYb8nHiItM WIkhgju3uz3lg6w1RdjDKRn7DmUMVPxLzBFqcQl0gPIAvFhewWNylW9fhwvm4c9r40Qv maBurxM/eT61BA0uijmQz/4k1RLFzZwBMVe26KOZkpdUjUvOC7yEJ8T8lOKWNzBWg8q2 dGQVR66JpBU7v08SBCi2pcKYkHzG8w6LC54GxNwkvbhWxpi/NSnJK/bbqIYyQaHZdTSO MXEMEZXlbXSvg7Mzk8EU6I2CUR6+8kpxnE9Ky5uoFylKWKbQalYhqlOvhPmGE6VN4muK YQHA== X-Gm-Message-State: AOJu0Yy7r4MCgYMDz01viAFlsX+Jg3Uk6VgK2IX3kkA5aF99wFhbuz/h UQVOElBM4HAZpeucjeY0XNLlYegh4ZOIIF3o/WhGpIGQ6q/KLQryBkEfW8IngwQ= X-Google-Smtp-Source: AGHT+IFp2qY1yTh7nKe5J3lMjvBCga2j9Q4uCpSn8lGlJYyYv0WrUhHFgAWJOyBSxlFBOVTJrrh/+g== X-Received: by 2002:a05:600c:1e1f:b0:412:a9b1:148a with SMTP id ay31-20020a05600c1e1f00b00412a9b1148amr1993642wmb.23.1709045580107; Tue, 27 Feb 2024 06:53:00 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id m9-20020a05600c4f4900b00412a013817esm9639489wmq.7.2024.02.27.06.52.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:52:53 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 489D95F920; Tue, 27 Feb 2024 14:43:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 18/29] linux-user: ensure nios2 processes queued work Date: Tue, 27 Feb 2024 14:43:24 +0000 Message-Id: <20240227144335.1196131-19-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org While async processes are rare for linux-user we do use them from time to time. The most obvious one is tb_flush when we run out of translation space. We will also need this when we move plugin vcpu_init to an async task. Fix nios2 to follow its older, wiser and more stable siblings. Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- linux-user/nios2/cpu_loop.c | 1 + 1 file changed, 1 insertion(+) diff --git a/linux-user/nios2/cpu_loop.c b/linux-user/nios2/cpu_loop.c index da77ede76bd..7fe08c87501 100644 --- a/linux-user/nios2/cpu_loop.c +++ b/linux-user/nios2/cpu_loop.c @@ -32,6 +32,7 @@ void cpu_loop(CPUNios2State *env) cpu_exec_start(cs); trapnr = cpu_exec(cs); cpu_exec_end(cs); + process_queued_cpu_work(cs); switch (trapnr) { case EXCP_INTERRUPT: From patchwork Tue Feb 27 14:43:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905177 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=WpE3xPi+; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgTn0qbDz23qQ for ; Wed, 28 Feb 2024 01:53:33 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reypU-0003rj-Di; Tue, 27 Feb 2024 09:53:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reypN-0003BW-CY for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:05 -0500 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reypD-0004mw-5S for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:04 -0500 Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-40fd72f7125so34792335e9.1 for ; Tue, 27 Feb 2024 06:52:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045571; x=1709650371; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LY87PsqI5CseL6bunSV/a+wwJBYv7wofoTM3s0oA7jk=; b=WpE3xPi+wpaqIEdhOzo5JmMHLxtVyQ+fI4mWd0vJVyu4f70mJQeMd06BPOqVss4UT8 YSmo82IEC/z/jLWQOrebAdtdwu1l0m9mfzYsX5mN+rKvVOncRZAQzgEKnPX/ACcE1eRt E/x8YZ7B3dbj8FhorCCVHQLH91+n9H0eChPuDuTUEqYIDN/kojz7eaSoAdF+WPX93T6e LCb5IKrnk+EJEk8DpNn2hMvAUGL30oNxsh3pFHe6DzZJ2+dlTQTtA8EPC/n1tefwgiFI nuuGG5SOKlAabK5/TNe4avv3aErFWmaHhkcSYzeH6rc3L2z8KsqCEJV9jWGGG5SF7NA7 MgGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045571; x=1709650371; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LY87PsqI5CseL6bunSV/a+wwJBYv7wofoTM3s0oA7jk=; b=jW9cLng9d6rY6Z0DNGNbSbNk8h1f+kHwo+GNB52gkk6/SDOtFdKgAhiu8PGsR1x17h ysfrvxKr3Bra4ckTaDlHNJF6JBIzth7y/XMKshZ1MFaeUbwtxRzBadaXbEKY6nNPxdG/ 3F9hqjmbd24PFBVpdjCjWNOPIVGrWd97VFt3Yld6CX7Ca+06QdokTtabxo1f7rDc59ll EKBvU+WB7kbmA7WqAuu7aD4NMCWsjN3+COndah8gPo10e61zojddIcAuGF7NkxLkOVhe QfWKOvJaQnpf8+n2Zds1wUzbj9nIOjnGOTU89fnt9Le4PWMUgzb/2XGmIpCW2dkYn5CK 2whw== X-Gm-Message-State: AOJu0YycaGZsHOxRbb2YLGLGsey1dUc2KcPugySFw4W/pWpuqAkagIjn XcKaxdP3+D+dxFIWFUj2ooBPA/JE0R9c2ra7uQ73g/ZTU/wKGpT6ELPrzCahGx4= X-Google-Smtp-Source: AGHT+IHbvfRK+W3sbbX597Xd664p4Zgx2ror9Jp92I+pRQYcvikt8w0hNQFgUIQxsFqNpf4Gton/9g== X-Received: by 2002:a05:600c:5021:b0:412:a451:d32f with SMTP id n33-20020a05600c502100b00412a451d32fmr4857772wmr.20.1709045571014; Tue, 27 Feb 2024 06:52:51 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id co2-20020a0560000a0200b0033d70dd0e04sm11964404wrb.8.2024.02.27.06.52.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:52:50 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 5B1915F923; Tue, 27 Feb 2024 14:43:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 19/29] cpu: call plugin init hook asynchronously Date: Tue, 27 Feb 2024 14:43:25 +0000 Message-Id: <20240227144335.1196131-20-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Pierrick Bouvier This ensures we run during a cpu_exec, which allows to call start/end exclusive from this init hook (needed for new scoreboard API introduced later). async work is run before any tb is translated/executed, so we can guarantee plugin init will be called before any other hook. The previous change made sure that any idle/resume cb call will not be done before initializing plugin for a given vcpu. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240213094009.150349-5-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée --- hw/core/cpu-common.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index fe16d0d9df8..68786360ea5 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -194,6 +194,11 @@ static void cpu_common_parse_features(const char *typename, char *features, } } +static void qemu_plugin_vcpu_init__async(CPUState *cpu, run_on_cpu_data unused) +{ + qemu_plugin_vcpu_init_hook(cpu); +} + static void cpu_common_realizefn(DeviceState *dev, Error **errp) { CPUState *cpu = CPU(dev); @@ -217,9 +222,9 @@ static void cpu_common_realizefn(DeviceState *dev, Error **errp) cpu_resume(cpu); } - /* Plugin initialization must wait until the cpu is fully realized. */ + /* Plugin initialization must wait until the cpu start executing code */ if (tcg_enabled()) { - qemu_plugin_vcpu_init_hook(cpu); + async_run_on_cpu(cpu, qemu_plugin_vcpu_init__async, RUN_ON_CPU_NULL); } /* NOTE: latest generic point where the cpu is fully realized */ From patchwork Tue Feb 27 14:43:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905180 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=XyBZKdYU; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgW66Xllz1yX4 for ; Wed, 28 Feb 2024 01:54:42 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reypW-00040I-Af; Tue, 27 Feb 2024 09:53:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reypR-0003bD-Ft for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:09 -0500 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reypG-0004q3-5A for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:09 -0500 Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-33d118a181fso2884465f8f.1 for ; Tue, 27 Feb 2024 06:52:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045576; x=1709650376; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Nsgms6L+voXWYAHkd/mUu1uICRrRzOf2k5zfNnIBA/s=; b=XyBZKdYUwuhk5oEajl2y7KNy5QXSgJZY5XEDaU6zMC4Fe2t2W6Ms74Jd/sMwNeh4cZ t4icoytAnhDmUAMyO7LwwndXrQC5VzR3INPimOE9WIMuxVU/IPY45PJS6m0yLZVZQ0vs 1sUf/mBL8s5b3ZD6pyHTllSi0paV2rrwnNOp2IVArqcexhaIeQY6v4cZC6jQEA4dtm/Z EUvWTa8XCie1BZ57CB8GelX/OdKrDSGfWbK7h0uigtL67Mz5gZP89b5WdA6j/mTIOHtR 6x5qnpTJTyk7ssOmsYFWCrLbegq1DRe0CNJP5QleUvY3o+jj0zjJCIjNRMMy6OodlkGD 58+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045576; x=1709650376; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Nsgms6L+voXWYAHkd/mUu1uICRrRzOf2k5zfNnIBA/s=; b=LWrRDMWcoJeBQF9RhOJXOOYMd+AsVp5VNDj2wd0O3vC4YQsLBqH4hkcwAnDhMTmpGJ HTbiNSVgHVMTUMSK3M6J6ywqcZM3NT3GbqBT9anZWlbmwLD8VpKayfSqjf0Wxst+Hf7e M3jmRcksdSOtQjoAO8i3/PQ8nw5GEMKljpCfGIuKUO6jQ1hef5jSzUar6kvevSFr8TNy AQquqz1I7zhmrGnmvMM7BrUvKy2vMEj6K+pCk9qkM764i2fUozjpFSPuxliDlOnuQyzu lO3uxv80y8N9u+bbKpD/5B3S9Ad937DYI/YuGHhYba+nOL4sIb2mP9801QM3Cdk40w7E P6Og== X-Gm-Message-State: AOJu0YycEMMEFS0oI+5MR4QPDMEGV3GO1TjwnpE8OHkg6sC/MZWfH7qx SLoJkaNdOxfDiubORnUY48SteTQy9MWBenHTXKHneM5RC6BWy0Rl/Ov8uKbBPKQ= X-Google-Smtp-Source: AGHT+IE8ra3cOSnLun74BVwMnCNFMZOt6poJLru191t0TnMevFQWATTAV7Tis9x6GphBLjtcipdQIA== X-Received: by 2002:a05:6000:1243:b0:33d:b2d7:306a with SMTP id j3-20020a056000124300b0033db2d7306amr6809941wrx.5.1709045576418; Tue, 27 Feb 2024 06:52:56 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id v6-20020a5d59c6000000b0033b47ee01f1sm11914727wry.49.2024.02.27.06.52.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:52:53 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 72BEF5F924; Tue, 27 Feb 2024 14:43:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour , Akihiko Odaki Subject: [PATCH v4 20/29] plugins: Use different helpers when reading registers Date: Tue, 27 Feb 2024 14:43:26 +0000 Message-Id: <20240227144335.1196131-21-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Akihiko Odaki This avoids optimizations incompatible when reading registers. Signed-off-by: Akihiko Odaki Reviewed-by: Pierrick Bouvier Message-Id: <20240103173349.398526-37-alex.bennee@linaro.org> Message-Id: <20231213-gdb-v17-12-777047380591@daynix.com> Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- accel/tcg/plugin-helpers.h | 3 ++- include/qemu/plugin.h | 1 + accel/tcg/plugin-gen.c | 43 ++++++++++++++++++++++++++++++++++---- plugins/api.c | 12 +++++++++-- 4 files changed, 52 insertions(+), 7 deletions(-) diff --git a/accel/tcg/plugin-helpers.h b/accel/tcg/plugin-helpers.h index 8e685e06545..11796436f35 100644 --- a/accel/tcg/plugin-helpers.h +++ b/accel/tcg/plugin-helpers.h @@ -1,4 +1,5 @@ #ifdef CONFIG_PLUGIN -DEF_HELPER_FLAGS_2(plugin_vcpu_udata_cb, TCG_CALL_NO_RWG | TCG_CALL_PLUGIN, void, i32, ptr) +DEF_HELPER_FLAGS_2(plugin_vcpu_udata_cb_no_wg, TCG_CALL_NO_WG | TCG_CALL_PLUGIN, void, i32, ptr) +DEF_HELPER_FLAGS_2(plugin_vcpu_udata_cb_no_rwg, TCG_CALL_NO_RWG | TCG_CALL_PLUGIN, void, i32, ptr) DEF_HELPER_FLAGS_4(plugin_vcpu_mem_cb, TCG_CALL_NO_RWG | TCG_CALL_PLUGIN, void, i32, i32, i64, ptr) #endif diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 7fdc3a4849f..b0c5ac68293 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -73,6 +73,7 @@ enum plugin_dyn_cb_type { enum plugin_dyn_cb_subtype { PLUGIN_CB_REGULAR, + PLUGIN_CB_REGULAR_R, PLUGIN_CB_INLINE, PLUGIN_N_CB_SUBTYPES, }; diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 78b331b2510..b37ce7683e6 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -79,6 +79,7 @@ enum plugin_gen_from { enum plugin_gen_cb { PLUGIN_GEN_CB_UDATA, + PLUGIN_GEN_CB_UDATA_R, PLUGIN_GEN_CB_INLINE, PLUGIN_GEN_CB_MEM, PLUGIN_GEN_ENABLE_MEM_HELPER, @@ -90,7 +91,10 @@ enum plugin_gen_cb { * These helpers are stubs that get dynamically switched out for calls * direct to the plugin if they are subscribed to. */ -void HELPER(plugin_vcpu_udata_cb)(uint32_t cpu_index, void *udata) +void HELPER(plugin_vcpu_udata_cb_no_wg)(uint32_t cpu_index, void *udata) +{ } + +void HELPER(plugin_vcpu_udata_cb_no_rwg)(uint32_t cpu_index, void *udata) { } void HELPER(plugin_vcpu_mem_cb)(unsigned int vcpu_index, @@ -98,7 +102,7 @@ void HELPER(plugin_vcpu_mem_cb)(unsigned int vcpu_index, void *userdata) { } -static void gen_empty_udata_cb(void) +static void gen_empty_udata_cb(void (*gen_helper)(TCGv_i32, TCGv_ptr)) { TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); TCGv_ptr udata = tcg_temp_ebb_new_ptr(); @@ -106,12 +110,22 @@ static void gen_empty_udata_cb(void) tcg_gen_movi_ptr(udata, 0); tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); - gen_helper_plugin_vcpu_udata_cb(cpu_index, udata); + gen_helper(cpu_index, udata); tcg_temp_free_ptr(udata); tcg_temp_free_i32(cpu_index); } +static void gen_empty_udata_cb_no_wg(void) +{ + gen_empty_udata_cb(gen_helper_plugin_vcpu_udata_cb_no_wg); +} + +static void gen_empty_udata_cb_no_rwg(void) +{ + gen_empty_udata_cb(gen_helper_plugin_vcpu_udata_cb_no_rwg); +} + /* * For now we only support addi_i64. * When we support more ops, we can generate one empty inline cb for each. @@ -192,7 +206,8 @@ static void plugin_gen_empty_callback(enum plugin_gen_from from) gen_empty_mem_helper); /* fall through */ case PLUGIN_GEN_FROM_TB: - gen_wrapped(from, PLUGIN_GEN_CB_UDATA, gen_empty_udata_cb); + gen_wrapped(from, PLUGIN_GEN_CB_UDATA, gen_empty_udata_cb_no_rwg); + gen_wrapped(from, PLUGIN_GEN_CB_UDATA_R, gen_empty_udata_cb_no_wg); gen_wrapped(from, PLUGIN_GEN_CB_INLINE, gen_empty_inline_cb); break; default: @@ -588,6 +603,12 @@ static void plugin_gen_tb_udata(const struct qemu_plugin_tb *ptb, inject_udata_cb(ptb->cbs[PLUGIN_CB_REGULAR], begin_op); } +static void plugin_gen_tb_udata_r(const struct qemu_plugin_tb *ptb, + TCGOp *begin_op) +{ + inject_udata_cb(ptb->cbs[PLUGIN_CB_REGULAR_R], begin_op); +} + static void plugin_gen_tb_inline(const struct qemu_plugin_tb *ptb, TCGOp *begin_op) { @@ -602,6 +623,14 @@ static void plugin_gen_insn_udata(const struct qemu_plugin_tb *ptb, inject_udata_cb(insn->cbs[PLUGIN_CB_INSN][PLUGIN_CB_REGULAR], begin_op); } +static void plugin_gen_insn_udata_r(const struct qemu_plugin_tb *ptb, + TCGOp *begin_op, int insn_idx) +{ + struct qemu_plugin_insn *insn = g_ptr_array_index(ptb->insns, insn_idx); + + inject_udata_cb(insn->cbs[PLUGIN_CB_INSN][PLUGIN_CB_REGULAR_R], begin_op); +} + static void plugin_gen_insn_inline(const struct qemu_plugin_tb *ptb, TCGOp *begin_op, int insn_idx) { @@ -721,6 +750,9 @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb) case PLUGIN_GEN_CB_UDATA: plugin_gen_tb_udata(plugin_tb, op); break; + case PLUGIN_GEN_CB_UDATA_R: + plugin_gen_tb_udata_r(plugin_tb, op); + break; case PLUGIN_GEN_CB_INLINE: plugin_gen_tb_inline(plugin_tb, op); break; @@ -737,6 +769,9 @@ static void plugin_gen_inject(struct qemu_plugin_tb *plugin_tb) case PLUGIN_GEN_CB_UDATA: plugin_gen_insn_udata(plugin_tb, op, insn_idx); break; + case PLUGIN_GEN_CB_UDATA_R: + plugin_gen_insn_udata_r(plugin_tb, op, insn_idx); + break; case PLUGIN_GEN_CB_INLINE: plugin_gen_insn_inline(plugin_tb, op, insn_idx); break; diff --git a/plugins/api.c b/plugins/api.c index 116b8bd603c..54df72c1c00 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -89,7 +89,11 @@ void qemu_plugin_register_vcpu_tb_exec_cb(struct qemu_plugin_tb *tb, void *udata) { if (!tb->mem_only) { - plugin_register_dyn_cb__udata(&tb->cbs[PLUGIN_CB_REGULAR], + int index = flags == QEMU_PLUGIN_CB_R_REGS || + flags == QEMU_PLUGIN_CB_RW_REGS ? + PLUGIN_CB_REGULAR_R : PLUGIN_CB_REGULAR; + + plugin_register_dyn_cb__udata(&tb->cbs[index], cb, flags, udata); } } @@ -109,7 +113,11 @@ void qemu_plugin_register_vcpu_insn_exec_cb(struct qemu_plugin_insn *insn, void *udata) { if (!insn->mem_only) { - plugin_register_dyn_cb__udata(&insn->cbs[PLUGIN_CB_INSN][PLUGIN_CB_REGULAR], + int index = flags == QEMU_PLUGIN_CB_R_REGS || + flags == QEMU_PLUGIN_CB_RW_REGS ? + PLUGIN_CB_REGULAR_R : PLUGIN_CB_REGULAR; + + plugin_register_dyn_cb__udata(&insn->cbs[PLUGIN_CB_INSN][index], cb, flags, udata); } } From patchwork Tue Feb 27 14:43:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905176 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=zIsBjcq9; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgTm3gCVz1yX4 for ; Wed, 28 Feb 2024 01:53:32 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reypM-00037E-9U; Tue, 27 Feb 2024 09:53:05 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reypJ-0002vv-ET for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:02 -0500 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reypD-0004n6-1P for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:01 -0500 Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-3392b12dd21so3584617f8f.0 for ; Tue, 27 Feb 2024 06:52:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045571; x=1709650371; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pTAh5Ga1/WCguB9K86wBQIKOB8LucCe9FRfIk+dLcDE=; b=zIsBjcq9vnVnKsNxKsiuD9FhteNY6DxBh+dW4K8tlyw/tynn/nypks6Ljg5WguuJ6B Sn5jxQbqweffUU/MyajuTRVRGyaEYFv/uBQHa0Tp8XKAKffvVvtbtUptDWeKgcHZ59eH OBi8XBnutIXLy7IC2zw3wPCaCx1el1ga1DsBg887s/Tnn8y0hVl2XYtwFBmk/9iv7GxI BfkXj4/c0E+LPBRRYSl9YXSNFvgAlFO3yFXwJiEhUf8NCjmX9Gjxn4usES4DhV5NA08n d4gfuQF/8CMGMYn7thOtci6lIDEOJyd8+S8F1+rbyE8s/vydF2TImGTOXDHbKWrfeU2g mYew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045571; x=1709650371; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pTAh5Ga1/WCguB9K86wBQIKOB8LucCe9FRfIk+dLcDE=; b=RyCaEOC6VLgk201kWGSXBepJg5FXo98AFcU4FrecFtSbQ4oePFA6YmoFr01qIURiW2 ML8BnChI2UCUzTpzgAcI41QDxs3Y8QPy4W0hccpGbXAdT8V04lmiTkdrnX2IawI4wl0k 1JWyA23dqU8P4UN0TN7V5UVmIJCRAtLFXJSrb1x2eWy1NWLpq74WPo+Fh8aF01LHK+Cj UoBjJsl1u9XtfsPpunT7oO+U/dRYQxj0lq4iXPLHSnwc9RdQuzoStFGdpopI2cwcvoFZ 0Gvu4CEq9A5PRslo4HisApUpsRsa/t5yHsCfgtWYk+5jM2G1vU45lWSBapX5dcLEIHo/ AMww== X-Gm-Message-State: AOJu0YxXmuEBg5I+JMszaGWZzahrwZ3p+d6jokhEMcbIAf6RZpf+h7ei fJeQkS2gvJUiVBoDPzciH3bQOpyyR4Uj9pI93nP4R+4L5O+zU+QxjeOYoIUkMeQ= X-Google-Smtp-Source: AGHT+IERZH5i1WSVMbZvK1sNeT+Qa+4w7qWKgMyq7CYHA8vHlimdj3mXs33Ewhkz0UWLToULR1DAxg== X-Received: by 2002:adf:f447:0:b0:33d:9d4d:d40b with SMTP id f7-20020adff447000000b0033d9d4dd40bmr7665926wrp.34.1709045571398; Tue, 27 Feb 2024 06:52:51 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id ch12-20020a5d5d0c000000b0033d6bd4eab9sm12202887wrb.1.2024.02.27.06.52.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:52:51 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 884415F928; Tue, 27 Feb 2024 14:43:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour , Akihiko Odaki Subject: [PATCH v4 21/29] gdbstub: expose api to find registers Date: Tue, 27 Feb 2024 14:43:27 +0000 Message-Id: <20240227144335.1196131-22-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Expose an internal API to QEMU to return all the registers for a vCPU. The list containing the details required to called gdb_read_register(). Based-on: <20231025093128.33116-15-akihiko.odaki@daynix.com> Cc: Akihiko Odaki Message-Id: <20240103173349.398526-38-alex.bennee@linaro.org> Signed-off-by: Alex Bennée Reviewed-by: Akihiko Odaki --- v3 - rm unused api functions left over --- include/exec/gdbstub.h | 28 ++++++++++++++++++++++++++++ gdbstub/gdbstub.c | 27 ++++++++++++++++++++++++++- 2 files changed, 54 insertions(+), 1 deletion(-) diff --git a/include/exec/gdbstub.h b/include/exec/gdbstub.h index da9ddfe54c5..eb14b91139b 100644 --- a/include/exec/gdbstub.h +++ b/include/exec/gdbstub.h @@ -111,6 +111,34 @@ void gdb_feature_builder_end(const GDBFeatureBuilder *builder); */ const GDBFeature *gdb_find_static_feature(const char *xmlname); +/** + * gdb_read_register() - Read a register associated with a CPU. + * @cpu: The CPU associated with the register. + * @buf: The buffer that the read register will be appended to. + * @reg: The register's number returned by gdb_find_feature_register(). + * + * Return: The number of read bytes. + */ +int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); + +/** + * typedef GDBRegDesc - a register description from gdbstub + */ +typedef struct { + int gdb_reg; + const char *name; + const char *feature_name; +} GDBRegDesc; + +/** + * gdb_get_register_list() - Return list of all registers for CPU + * @cpu: The CPU being searched + * + * Returns a GArray of GDBRegDesc, caller frees array but not the + * const strings. + */ +GArray *gdb_get_register_list(CPUState *cpu); + void gdb_set_stop_cpu(CPUState *cpu); /* in gdbstub-xml.c, generated by scripts/feature_to_c.py */ diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c index a55b5e6581a..2909bc8c69f 100644 --- a/gdbstub/gdbstub.c +++ b/gdbstub/gdbstub.c @@ -490,7 +490,32 @@ const GDBFeature *gdb_find_static_feature(const char *xmlname) g_assert_not_reached(); } -static int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) +GArray *gdb_get_register_list(CPUState *cpu) +{ + GArray *results = g_array_new(true, true, sizeof(GDBRegDesc)); + + /* registers are only available once the CPU is initialised */ + if (!cpu->gdb_regs) { + return results; + } + + for (int f = 0; f < cpu->gdb_regs->len; f++) { + GDBRegisterState *r = &g_array_index(cpu->gdb_regs, GDBRegisterState, f); + for (int i = 0; i < r->feature->num_regs; i++) { + const char *name = r->feature->regs[i]; + GDBRegDesc desc = { + r->base_reg + i, + name, + r->feature->name + }; + g_array_append_val(results, desc); + } + } + + return results; +} + +int gdb_read_register(CPUState *cpu, GByteArray *buf, int reg) { CPUClass *cc = CPU_GET_CLASS(cpu); GDBRegisterState *r; From patchwork Tue Feb 27 14:43:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905199 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=srsdVjCL; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgYS4X7kz23qP for ; Wed, 28 Feb 2024 01:56:44 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reypk-0005AP-5V; Tue, 27 Feb 2024 09:53:28 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reypd-0004U0-8Y for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:21 -0500 Received: from mail-lj1-x22c.google.com ([2a00:1450:4864:20::22c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reypI-0004r7-Fx for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:20 -0500 Received: by mail-lj1-x22c.google.com with SMTP id 38308e7fff4ca-2d2305589a2so63004571fa.1 for ; Tue, 27 Feb 2024 06:52:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045578; x=1709650378; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=g/cqNYFg8Kx7eF1FlHZszwMWEl9h8rj4NfbMGhVND2w=; b=srsdVjCL+094a6Nj/QXFDHTi74qWcDhe16Dr7HOoj2kezTpU9gGUsO6ZDRPCUIYsX9 zMfMJHhI/wUS2CcGyRTRkWnfffJAxzCdOTIPrYf3bXjORv09BBekUwXYVO0iLhgrIN4z UPXa1t1oKdp4kzeP4CHCkCyIOns2FvTm2WpXGDcXc6ndw7GOdI125B/HPEsD4hwLul2W zg32WXiG72ZmdvfHJRZltkyqHdMvQjZaG1eNk/feEOqUggMs0OTGnneEBFn5Diz7hHXU jgEVnPgCcx6Ie2VV7nR1KLfqx1MALmCTFFT+R23UehuE4Upi0czNOplg+FfYBXeYQ1di 8AmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045578; x=1709650378; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=g/cqNYFg8Kx7eF1FlHZszwMWEl9h8rj4NfbMGhVND2w=; b=VYUPw4E4fKqPXcoJK3EsV9wO6ziohjPzZFATr5rKKO/n8/iq3utz0V6Pr41hQI0JUf yUbas5mwdeESb3S3obCyQmqi9lswbDwWtP4PVOOyerlDIQHdkkj5pcZSKkKSe9PJoBgX 80Z/uP+wCYOiYL1us/idFAr0xIglib5QTepiH3Y6uGiB2bczWO/53B3lx19/68AHCp4c kj8Uv7THiR5LPUlHdRNd8kysC/Ufp097R2mzFBFq303ggQUnoYU4sFvD5sC6DhLZvRod Q/2jjaRFcJV0QNTa8QARrnudqLO+wLM2xakN4Oq4/Ozy37PFCQZZXHJpUBcvmWRiKagP 2aZw== X-Gm-Message-State: AOJu0YzRXhycgUd+ol/8QqHM+0HSu9WyPwjT5Zm25RhcM68lg3BemtXq OyhJln+Sgiz5Hc/WeLYYZZBUrd3Ls7ay2URdj5ZA2ORjeW1sI73qedZLUFqWbbs= X-Google-Smtp-Source: AGHT+IH2RfrK18UbAITmVCEFQzCtbOMa5SDG4DJfw7Qp/dj1OAl+gF3VzC7p5dlj8YttJjU8XCf1DQ== X-Received: by 2002:a2e:be8e:0:b0:2d2:899d:babd with SMTP id a14-20020a2ebe8e000000b002d2899dbabdmr4967222ljr.26.1709045578508; Tue, 27 Feb 2024 06:52:58 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id u16-20020a05600c211000b004126732390asm15228539wml.37.2024.02.27.06.52.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:52:53 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id A208D5F929; Tue, 27 Feb 2024 14:43:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 22/29] plugins: create CPUPluginState and migrate plugin_mask Date: Tue, 27 Feb 2024 14:43:28 +0000 Message-Id: <20240227144335.1196131-23-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22c; envelope-from=alex.bennee@linaro.org; helo=mail-lj1-x22c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01, T_SPF_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org As we expand the per-vCPU data for plugins we don't want to pollute CPUState. For now this just moves the plugin_mask (renamed to event_mask) as the memory callbacks are accessed directly by TCG generated code. Message-Id: <20240223162202.1936541-21-alex.bennee@linaro.org> Reviewed-by: Pierrick Bouvier Signed-off-by: Alex Bennée --- v2 - checkpatch cleanups --- include/hw/core/cpu.h | 11 +++++++---- include/qemu/plugin.h | 13 +++++++++++++ include/qemu/typedefs.h | 1 + accel/tcg/plugin-gen.c | 3 ++- hw/core/cpu-common.c | 5 +++++ plugins/core.c | 13 ++++++++++--- 6 files changed, 38 insertions(+), 8 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 4b659799b00..af1a29526d4 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -31,7 +31,6 @@ #include "qemu/rcu_queue.h" #include "qemu/queue.h" #include "qemu/thread.h" -#include "qemu/plugin-event.h" #include "qom/object.h" typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size, @@ -434,7 +433,8 @@ struct qemu_work_item; * @kvm_fd: vCPU file descriptor for KVM. * @work_mutex: Lock to prevent multiple access to @work_list. * @work_list: List of pending asynchronous work. - * @plugin_mask: Plugin event bitmap. Modified only via async work. + * @plugin_mem_cbs: active plugin memory callbacks + * @plugin_state: per-CPU plugin state * @ignore_memory_transaction_failures: Cached copy of the MachineState * flag of the same name: allows the board to suppress calling of the * CPU do_transaction_failed hook function. @@ -526,10 +526,13 @@ struct CPUState { /* Use by accel-block: CPU is executing an ioctl() */ QemuLockCnt in_ioctl_lock; - DECLARE_BITMAP(plugin_mask, QEMU_PLUGIN_EV_MAX); - #ifdef CONFIG_PLUGIN + /* + * The callback pointer stays in the main CPUState as it is + * accessed via TCG (see gen_empty_mem_helper). + */ GArray *plugin_mem_cbs; + CPUPluginState *plugin_state; #endif /* TODO Move common fields from CPUArchState here. */ diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index b0c5ac68293..b3c94a34aa4 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -186,6 +186,19 @@ struct qemu_plugin_insn *qemu_plugin_tb_insn_get(struct qemu_plugin_tb *tb, return insn; } +/** + * struct CPUPluginState - per-CPU state for plugins + * @event_mask: plugin event bitmap. Modified only via async work. + */ +struct CPUPluginState { + DECLARE_BITMAP(event_mask, QEMU_PLUGIN_EV_MAX); +}; + +/** + * qemu_plugin_create_vcpu_state: allocate plugin state + */ +CPUPluginState *qemu_plugin_create_vcpu_state(void); + void qemu_plugin_vcpu_init_hook(CPUState *cpu); void qemu_plugin_vcpu_exit_hook(CPUState *cpu); void qemu_plugin_tb_trans_cb(CPUState *cpu, struct qemu_plugin_tb *tb); diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h index d7c703b4ae9..a028dba4d0b 100644 --- a/include/qemu/typedefs.h +++ b/include/qemu/typedefs.h @@ -42,6 +42,7 @@ typedef struct CompatProperty CompatProperty; typedef struct ConfidentialGuestSupport ConfidentialGuestSupport; typedef struct CPUAddressSpace CPUAddressSpace; typedef struct CPUArchState CPUArchState; +typedef struct CPUPluginState CPUPluginState; typedef struct CpuInfoFast CpuInfoFast; typedef struct CPUJumpCache CPUJumpCache; typedef struct CPUState CPUState; diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index b37ce7683e6..ac6b52b9ec9 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -43,6 +43,7 @@ * CPU's index into a TCG temp, since the first callback did it already. */ #include "qemu/osdep.h" +#include "qemu/plugin.h" #include "cpu.h" #include "tcg/tcg.h" #include "tcg/tcg-temp-internal.h" @@ -831,7 +832,7 @@ bool plugin_gen_tb_start(CPUState *cpu, const DisasContextBase *db, { bool ret = false; - if (test_bit(QEMU_PLUGIN_EV_VCPU_TB_TRANS, cpu->plugin_mask)) { + if (test_bit(QEMU_PLUGIN_EV_VCPU_TB_TRANS, cpu->plugin_state->event_mask)) { struct qemu_plugin_tb *ptb = tcg_ctx->plugin_tb; int i; diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 68786360ea5..0108fb11dbc 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -194,10 +194,12 @@ static void cpu_common_parse_features(const char *typename, char *features, } } +#ifdef CONFIG_PLUGIN static void qemu_plugin_vcpu_init__async(CPUState *cpu, run_on_cpu_data unused) { qemu_plugin_vcpu_init_hook(cpu); } +#endif static void cpu_common_realizefn(DeviceState *dev, Error **errp) { @@ -223,9 +225,12 @@ static void cpu_common_realizefn(DeviceState *dev, Error **errp) } /* Plugin initialization must wait until the cpu start executing code */ +#ifdef CONFIG_PLUGIN if (tcg_enabled()) { + cpu->plugin_state = qemu_plugin_create_vcpu_state(); async_run_on_cpu(cpu, qemu_plugin_vcpu_init__async, RUN_ON_CPU_NULL); } +#endif /* NOTE: latest generic point where the cpu is fully realized */ } diff --git a/plugins/core.c b/plugins/core.c index 2392bbb8889..2db4d31354b 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -17,6 +17,7 @@ #include "qapi/error.h" #include "qemu/lockable.h" #include "qemu/option.h" +#include "qemu/plugin.h" #include "qemu/rcu_queue.h" #include "qemu/xxhash.h" #include "qemu/rcu.h" @@ -53,7 +54,8 @@ struct qemu_plugin_ctx *plugin_id_to_ctx_locked(qemu_plugin_id_t id) static void plugin_cpu_update__async(CPUState *cpu, run_on_cpu_data data) { - bitmap_copy(cpu->plugin_mask, &data.host_ulong, QEMU_PLUGIN_EV_MAX); + bitmap_copy(cpu->plugin_state->event_mask, + &data.host_ulong, QEMU_PLUGIN_EV_MAX); tcg_flush_jmp_cache(cpu); } @@ -208,6 +210,11 @@ plugin_register_cb_udata(qemu_plugin_id_t id, enum qemu_plugin_event ev, do_plugin_register_cb(id, ev, func, udata); } +CPUPluginState *qemu_plugin_create_vcpu_state(void) +{ + return g_new0(CPUPluginState, 1); +} + void qemu_plugin_vcpu_init_hook(CPUState *cpu) { bool success; @@ -356,7 +363,7 @@ qemu_plugin_vcpu_syscall(CPUState *cpu, int64_t num, uint64_t a1, uint64_t a2, struct qemu_plugin_cb *cb, *next; enum qemu_plugin_event ev = QEMU_PLUGIN_EV_VCPU_SYSCALL; - if (!test_bit(ev, cpu->plugin_mask)) { + if (!test_bit(ev, cpu->plugin_state->event_mask)) { return; } @@ -378,7 +385,7 @@ void qemu_plugin_vcpu_syscall_ret(CPUState *cpu, int64_t num, int64_t ret) struct qemu_plugin_cb *cb, *next; enum qemu_plugin_event ev = QEMU_PLUGIN_EV_VCPU_SYSCALL_RET; - if (!test_bit(ev, cpu->plugin_mask)) { + if (!test_bit(ev, cpu->plugin_state->event_mask)) { return; } From patchwork Tue Feb 27 14:43:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905190 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=XkumBFG5; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgY16kbYz23qP for ; Wed, 28 Feb 2024 01:56:21 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reypZ-0004B3-1O; Tue, 27 Feb 2024 09:53:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reypT-0003nI-Ei for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:11 -0500 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reypG-0004qJ-6B for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:11 -0500 Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-412ae087378so4943135e9.3 for ; Tue, 27 Feb 2024 06:52:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045576; x=1709650376; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6xVYGm4nT6cWz4fyXZiPrJOLZa5oX8gcy9xaV5++0Mc=; b=XkumBFG5I2J2Ze+Q0QY6eipjunYjpFciZLmkdaKBDPCKTBZ+EM4KPBhWkSe03xaOuk +YwmPtD0l2CJDipGSpXjPGTGdLuv1n/uOIMKYKu73a8I7C3bNoDTZubyf7mu89gkf1WH XiJW4aXwzTlN1DU6x0iX5dTVukK7T4lpBbcyZKwOT/EU1kjw/+rgXCUehdnHRiE4vLQu 3G0NVkvPWRFOoXr92MSJtBH+nRdgevbKwIH5rHAPe8iDlXV+LU9O73JAnWKP6XvmZsov PXDhhNfV5aOGyOFGE26+7eKewBOCH01E1Be0gLT9mmKRJJOZv3/Ic56aFw7Cdt3HcpUg bN4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045577; x=1709650377; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6xVYGm4nT6cWz4fyXZiPrJOLZa5oX8gcy9xaV5++0Mc=; b=olZfh7oFU43Pbb48bYEIvXEBof6nz1t7ZP46aF66ZeV/h/b9V2yZfLm9Z/nHN3Ij6e w/F6tZtpglVdmlAgh6kUl+oHwWFStqUH84ovoEvKXhRdiHVeVhGO2gX9e6N6Vr0Odeyj 0yARidlzeN5ciJVfDPRB6gE8LB/z8cA6YGKtGhQAHqWVIYj5WqE727o25bERuq5/CPvi hDQaNIe/2BJcPrcJnKoS945EN3fBaYmaDNoBdpWv7TSjDK8zp75ZkQB5i3McyTYqeOFu DqeFEz8qS7AJllH9SAdRALGn0mmY+Qbt5DSxEt+ecC5UnaWVg13VkbUtl6D1WWbEXn6w dHeg== X-Gm-Message-State: AOJu0YxoMhKVKweX2+uxSmwO3e0ak/cwpI94dQ2/KVSfuJlu9vyMHNSt w6VDZrruPmSL3Ww++lpLkfbgi0dRDERsLznTtGorgf7FludMAOUTV65m1eYX6k0= X-Google-Smtp-Source: AGHT+IGv80MeFk2pOGX8cSxaEvcszb9R/23Zf7HcgqmmCB+KtvF/JnjdT7TTeWmEUUgDzy4DgVZ4Iw== X-Received: by 2002:a5d:48cb:0:b0:33d:9d46:c16c with SMTP id p11-20020a5d48cb000000b0033d9d46c16cmr6488374wrs.44.1709045576693; Tue, 27 Feb 2024 06:52:56 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id o9-20020a5d4a89000000b0033df1dc39f0sm1852940wrq.4.2024.02.27.06.52.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:52:53 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id B7C455F92A; Tue, 27 Feb 2024 14:43:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour , Akihiko Odaki Subject: [PATCH v4 23/29] plugins: add an API to read registers Date: Tue, 27 Feb 2024 14:43:29 +0000 Message-Id: <20240227144335.1196131-24-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org We can only request a list of registers once the vCPU has been initialised so the user needs to use either call the get function on vCPU initialisation or during the translation phase. We don't expose the reg number to the plugin instead hiding it behind an opaque handle. For now this is just the gdb_regnum encapsulated in an anonymous GPOINTER but in future as we add more state for plugins to track we can expand it. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1706 Cc: Akihiko Odaki Message-Id: <20240103173349.398526-39-alex.bennee@linaro.org> Based-on: <20231025093128.33116-18-akihiko.odaki@daynix.com> Signed-off-by: Alex Bennée Reviewed-by: Pierrick Bouvier Reviewed-by: Akihiko Odaki --- v4 - the get/read_registers functions are now implicitly for current vCPU only to accidental cpu != current_cpu uses. v5 - make reg_handles as per-CPUPluginState variable. v6 - for now just wrap gdb_regnum v7 - minor style fixes --- include/qemu/qemu-plugin.h | 48 +++++++++++++++++++++++++++++-- plugins/api.c | 55 ++++++++++++++++++++++++++++++++++++ plugins/qemu-plugins.symbols | 2 ++ 3 files changed, 103 insertions(+), 2 deletions(-) diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h index 93981f8f89f..6c5580f4428 100644 --- a/include/qemu/qemu-plugin.h +++ b/include/qemu/qemu-plugin.h @@ -11,6 +11,7 @@ #ifndef QEMU_QEMU_PLUGIN_H #define QEMU_QEMU_PLUGIN_H +#include #include #include #include @@ -229,8 +230,8 @@ struct qemu_plugin_insn; * @QEMU_PLUGIN_CB_R_REGS: callback reads the CPU's regs * @QEMU_PLUGIN_CB_RW_REGS: callback reads and writes the CPU's regs * - * Note: currently unused, plugins cannot read or change system - * register state. + * Note: currently QEMU_PLUGIN_CB_RW_REGS is unused, plugins cannot change + * system register state. */ enum qemu_plugin_cb_flags { QEMU_PLUGIN_CB_NO_REGS, @@ -707,4 +708,47 @@ uint64_t qemu_plugin_end_code(void); QEMU_PLUGIN_API uint64_t qemu_plugin_entry_code(void); +/** struct qemu_plugin_register - Opaque handle for register access */ +struct qemu_plugin_register; + +/** + * typedef qemu_plugin_reg_descriptor - register descriptions + * + * @handle: opaque handle for retrieving value with qemu_plugin_read_register + * @name: register name + * @feature: optional feature descriptor, can be NULL + */ +typedef struct { + struct qemu_plugin_register *handle; + const char *name; + const char *feature; +} qemu_plugin_reg_descriptor; + +/** + * qemu_plugin_get_registers() - return register list for current vCPU + * + * Returns a potentially empty GArray of qemu_plugin_reg_descriptor. + * Caller frees the array (but not the const strings). + * + * Should be used from a qemu_plugin_register_vcpu_init_cb() callback + * after the vCPU is initialised, i.e. in the vCPU context. + */ +GArray *qemu_plugin_get_registers(void); + +/** + * qemu_plugin_read_register() - read register for current vCPU + * + * @handle: a @qemu_plugin_reg_handle handle + * @buf: A GByteArray for the data owned by the plugin + * + * This function is only available in a context that register read access is + * explicitly requested via the QEMU_PLUGIN_CB_R_REGS flag. + * + * Returns the size of the read register. The content of @buf is in target byte + * order. On failure returns -1 + */ +int qemu_plugin_read_register(struct qemu_plugin_register *handle, + GByteArray *buf); + + #endif /* QEMU_QEMU_PLUGIN_H */ diff --git a/plugins/api.c b/plugins/api.c index 54df72c1c00..908fe7e6fa3 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -8,6 +8,7 @@ * * qemu_plugin_tb * qemu_plugin_insn + * qemu_plugin_register * * Which can then be passed back into the API to do additional things. * As such all the public functions in here are exported in @@ -35,10 +36,12 @@ */ #include "qemu/osdep.h" +#include "qemu/main-loop.h" #include "qemu/plugin.h" #include "qemu/log.h" #include "tcg/tcg.h" #include "exec/exec-all.h" +#include "exec/gdbstub.h" #include "exec/ram_addr.h" #include "disas/disas.h" #include "plugin.h" @@ -410,3 +413,55 @@ uint64_t qemu_plugin_entry_code(void) #endif return entry; } + +/* + * Create register handles. + * + * We need to create a handle for each register so the plugin + * infrastructure can call gdbstub to read a register. They are + * currently just a pointer encapsulation of the gdb_regnum but in + * future may hold internal plugin state so its important plugin + * authors are not tempted to treat them as numbers. + * + * We also construct a result array with those handles and some + * ancillary data the plugin might find useful. + */ + +static GArray *create_register_handles(GArray *gdbstub_regs) +{ + GArray *find_data = g_array_new(true, true, + sizeof(qemu_plugin_reg_descriptor)); + + for (int i = 0; i < gdbstub_regs->len; i++) { + GDBRegDesc *grd = &g_array_index(gdbstub_regs, GDBRegDesc, i); + qemu_plugin_reg_descriptor desc; + + /* skip "un-named" regs */ + if (!grd->name) { + continue; + } + + /* Create a record for the plugin */ + desc.handle = GINT_TO_POINTER(grd->gdb_reg); + desc.name = g_intern_string(grd->name); + desc.feature = g_intern_string(grd->feature_name); + g_array_append_val(find_data, desc); + } + + return find_data; +} + +GArray *qemu_plugin_get_registers(void) +{ + g_assert(current_cpu); + + g_autoptr(GArray) regs = gdb_get_register_list(current_cpu); + return create_register_handles(regs); +} + +int qemu_plugin_read_register(struct qemu_plugin_register *reg, GByteArray *buf) +{ + g_assert(current_cpu); + + return gdb_read_register(current_cpu, buf, GPOINTER_TO_INT(reg)); +} diff --git a/plugins/qemu-plugins.symbols b/plugins/qemu-plugins.symbols index adb67608598..27fe97239be 100644 --- a/plugins/qemu-plugins.symbols +++ b/plugins/qemu-plugins.symbols @@ -3,6 +3,7 @@ qemu_plugin_end_code; qemu_plugin_entry_code; qemu_plugin_get_hwaddr; + qemu_plugin_get_registers; qemu_plugin_hwaddr_device_name; qemu_plugin_hwaddr_is_io; qemu_plugin_hwaddr_phys_addr; @@ -19,6 +20,7 @@ qemu_plugin_num_vcpus; qemu_plugin_outs; qemu_plugin_path_to_binary; + qemu_plugin_read_register; qemu_plugin_register_atexit_cb; qemu_plugin_register_flush_cb; qemu_plugin_register_vcpu_exit_cb; From patchwork Tue Feb 27 14:43:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905183 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=n67yYNZg; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgWY1jzbz1yX0 for ; Wed, 28 Feb 2024 01:55:05 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reypd-0004V8-C4; Tue, 27 Feb 2024 09:53:21 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reypW-00042l-Um for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:15 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reypH-0004qp-K6 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:14 -0500 Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-412a80d7f42so12426375e9.0 for ; Tue, 27 Feb 2024 06:52:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045578; x=1709650378; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=v93sjlrKGHF/8PcF+jkx1JshiyYwDWnn08uJwR8C/sE=; b=n67yYNZgRu7SyBFr96vQwfAKOmTJnWpfSginPOSNtGfyVbdo2DlKkUbU1wlDSxy0UD get9yHYDfUGcSi1q1B8gsES1eWaXDrpPsoEZb0JAwGJ3nV0u3m3GkQUL+G1+7iSJpwHS Vl1SYi64rcLrPecZWY69Ea59a2bOySIEDV+HvWPq+CorPDd+thB5AQcE9g4FSpOpwh9D 9J8R5hP9OqNWNFkGPnukkia7K4DCJVJAc7FMyFiyhnwmKf0d4FN7jvWZdW4grqF7cDOG oXttc6XGlVl/oaAcLD2x6dOVCqBl+w3Kqc82yk2spdOvUhrBUyYcsuKRrQQ5O7zUbmOP eGQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045578; x=1709650378; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=v93sjlrKGHF/8PcF+jkx1JshiyYwDWnn08uJwR8C/sE=; b=ww3zdWS8k3dKgrhcrFPfgHOJG5BVegZIkKLil9SiHXngbBYPtTs/TnTj1uyuVbNh+r U0TheARrF5wWVFYLB0fqXfNXgq+ea5QxyeQRTvGOKnFhF2Blwl7YadqxVSOEnO3Zblvx tbP5bpich0qe546UMBSviZbSff3You6ieMsRevX0MvK8V5JuI2IXDWc+RdxYwNgK5SWz SgEXKZuHVBZd8VIIKVlQknJNDpBwKay3hbm08mej6B/pQYtMuKf35Xv22ZsacyL8qSrh O+mZ19k96s8aoKbYBOyzJE6GpBtyixv7EG2o6LrVBZtnJfrC6xuS9g7wxDyKKOwDs5h/ fd0g== X-Gm-Message-State: AOJu0YxJnT3ta8o92a/EsdlIlwfhV2qYXBIETYS+6Y5H4ZdrrrZsguan BOjeLJ2I5X7bmvB2M2ac0DHEb6JXsku230TYeJtOG/AJ1xcfvyw6e7G61tNtRbg= X-Google-Smtp-Source: AGHT+IH020MKj8UmggWp8hYqds1m+lcpudmih5CLvijKgTE+IPybjsbU9+azdI/oD3UgPB86vaZqRQ== X-Received: by 2002:a05:600c:4453:b0:412:9450:fe19 with SMTP id v19-20020a05600c445300b004129450fe19mr6959954wmn.39.1709045578218; Tue, 27 Feb 2024 06:52:58 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id m24-20020a7bca58000000b0041298c75ae8sm449380wml.1.2024.02.27.06.52.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:52:53 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id CA7B25F92B; Tue, 27 Feb 2024 14:43:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 24/29] tests/tcg: expand insn test case to exercise register API Date: Tue, 27 Feb 2024 14:43:30 +0000 Message-Id: <20240227144335.1196131-25-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org This ensure we at least read every register the plugin API reports at least once during the check-tcg checks. Signed-off-by: Alex Bennée --- tests/plugin/insn.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/tests/plugin/insn.c b/tests/plugin/insn.c index 5fd3017c2b3..54da06fcf26 100644 --- a/tests/plugin/insn.c +++ b/tests/plugin/insn.c @@ -46,6 +46,25 @@ typedef struct { char *disas; } Instruction; +/* + * Initialise a new vcpu with reading the register list + */ +static void vcpu_init(qemu_plugin_id_t id, unsigned int vcpu_index) +{ + g_autoptr(GArray) reg_list = qemu_plugin_get_registers(); + g_autoptr(GByteArray) reg_value = g_byte_array_new(); + + if (reg_list) { + for (int i = 0; i < reg_list->len; i++) { + qemu_plugin_reg_descriptor *rd = &g_array_index( + reg_list, qemu_plugin_reg_descriptor, i); + int count = qemu_plugin_read_register(rd->handle, reg_value); + g_assert(count > 0); + } + } +} + + static void vcpu_insn_exec_before(unsigned int cpu_index, void *udata) { unsigned int i = cpu_index % MAX_CPUS; @@ -212,6 +231,8 @@ QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin_id_t id, sizes = g_array_new(true, true, sizeof(unsigned long)); } + /* Register init, translation block and exit callbacks */ + qemu_plugin_register_vcpu_init_cb(id, vcpu_init); qemu_plugin_register_vcpu_tb_trans_cb(id, vcpu_tb_trans); qemu_plugin_register_atexit_cb(id, plugin_exit, NULL); return 0; From patchwork Tue Feb 27 14:43:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905141 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=moX9ko5j; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgMj5j4cz1yX0 for ; Wed, 28 Feb 2024 01:48:17 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reyhe-0007Qk-M1; Tue, 27 Feb 2024 09:45:06 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reyhK-0006Zo-86 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:49 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygU-00027l-30 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:45 -0500 Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-412ad927275so4733175e9.3 for ; Tue, 27 Feb 2024 06:43:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045032; x=1709649832; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eZ1nEd8NJNCNQAO45v/M0dXLXOT0Wd7jVxF+jov+Saw=; b=moX9ko5jz78GmLtVK5GwTfNhzqgruARbryvL624+RbpY6Oe0JzgEK7MKNeOdq2+SjN 7oQcy8l9iW+lLSoXZiW512GWhlrbkFQyllDFsJCpaaf8qge7LV6V+mzYhp883Z5TtqS2 +VkIH7lMmFlnYX/pzjg8zazGjplsX49ph58xFAxQsOAvBWfn5ofX8NC9Ryl/jmKbB2vF 84hxbff9VcnmysrnJ9G8Xa9lXTFZEeS/ZYwj7revyguWZGiaYClGVAvppdbEGHhW891j wvQfI5k02fEHFyVOlZWNIIVF87b84ntetrgjXFOkVlaY1hcq/KoS5y18sBKQc65qIO1E qhrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045032; x=1709649832; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eZ1nEd8NJNCNQAO45v/M0dXLXOT0Wd7jVxF+jov+Saw=; b=tZz6p+ctnquiTjwMNu0hg8K3jXZeNdxLuiwNNe+P5KUcFZh+gIkrDIpfzF9yZzxTdX rB2MCYfhTC/ZR2v476kPKHtVEG/9XmDKLBnKQeBZYuID8Bq9SY1nNNB1E3JpHVaALpEv /KTHd2dzLzIHmAmlyCCR3aeWadcZ0XaRvG9iBaizSN4mmrksgPJEpdKBRQ1WnWE5rQ9x fvHkSgw9ORJ53MSKWjB50APSR56pcZkcs36gz9TeoB6gEHEno1+D1B0UxvBUDO4k6FVN XcIUaZbjtCEzMkSBnJ5hmoHggMcqCb0u/0K0hpWBSzCf2Awfmx43jFNOQVjeOwVxk0Ib +kGQ== X-Gm-Message-State: AOJu0Yw1gTBMJhnYM4SEVqGwQCWo6BKy0dA7wDwsnznXJLV2MtkM9E0o J4+A4kwOqbMsMwlusy2hGFYnioCgVicRg+c/1MRgyaVHzzgsCJ5Y/iPTJ2IJOcM= X-Google-Smtp-Source: AGHT+IGz44XdYBYFBIZ3a+ovorB9gaLTI4VHaTdRMlNQO1YUc5hQ77oi3syl9h6WC9lGy9kzmXm31w== X-Received: by 2002:adf:f882:0:b0:33d:e3d8:ee47 with SMTP id u2-20020adff882000000b0033de3d8ee47mr2745402wrp.27.1709045031881; Tue, 27 Feb 2024 06:43:51 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id n17-20020a5d4211000000b0033d97bd5ddasm11556120wrq.85.2024.02.27.06.43.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:48 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id DE1375F92C; Tue, 27 Feb 2024 14:43:37 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 25/29] contrib/plugins: fix imatch Date: Tue, 27 Feb 2024 14:43:31 +0000 Message-Id: <20240227144335.1196131-26-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org We can't directly save the ephemeral imatch from argv as that memory will get recycled. Message-Id: <20240103173349.398526-40-alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé --- contrib/plugins/execlog.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/contrib/plugins/execlog.c b/contrib/plugins/execlog.c index 82dc2f584e2..f262e5555eb 100644 --- a/contrib/plugins/execlog.c +++ b/contrib/plugins/execlog.c @@ -199,7 +199,7 @@ static void parse_insn_match(char *match) if (!imatches) { imatches = g_ptr_array_new(); } - g_ptr_array_add(imatches, match); + g_ptr_array_add(imatches, g_strdup(match)); } static void parse_vaddr_match(char *match) From patchwork Tue Feb 27 14:43:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905188 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=cYIouQgC; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgXz6r1sz23qP for ; Wed, 28 Feb 2024 01:56:19 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reype-0004ZP-9J; Tue, 27 Feb 2024 09:53:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reypV-0003xb-Hi for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:13 -0500 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reypG-0004o8-4y for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:13 -0500 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-33d26da3e15so2487819f8f.1 for ; Tue, 27 Feb 2024 06:52:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045574; x=1709650374; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AXDxBEkC2CFS7m0UvHeEw8KC6OyK5f7eV2u61Rlbk5g=; b=cYIouQgCxk1hjqSOcsaWqHULu/c9y8H+xZjPbx+a6cxFdtbaVSiS1rJc4g2uvVpqGI BKlpd4SAI0BtWmhAMkb2kVMGVH5zs03KogU/uDyuKRVVAqNF6DrNvhg7g1Dx0G0rQ1Mx fxq3lctQv/4CE3oa2tzFLiakVbqLeX8i+284RjdkhfRsRTB52ePBk3Pcq2gk0dZL+rIc n7SjdSLQOd9kBET0oRTDUPwXXsMFlha05XRKT7H16yMvuXsk3ZLt73vl/hyk73mvg/vb sgUoNw3CeNyzIaAWDFJ7RBFV2ZXuG4ITAgpIJfacr2gSFfE09DJd2NiuIbMlu4BfNshY xPbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045574; x=1709650374; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AXDxBEkC2CFS7m0UvHeEw8KC6OyK5f7eV2u61Rlbk5g=; b=P09Zj7wH6ebOUlNGMV/8cjNBogyeF5ADHdYNC7KU7itZLENdO6qC0OsLaE35sdO9V1 WVPZrEFHJTT2dSWrQVLYFln4hNywUmjTm/8W6Mwtgo1jL1S8vdBMsvNy54Vejc0osqxq OAOHm7mtK39W+IXikpLmehWEHDLKr/xLmps3FT4igMIIhWulZd/iYERUq5uGXyz7puE4 aRNE/NpnQecqxCInh6icT0LS1XGf4OIo8HVo/YghGcpwFdzF8i62Qmicg0oTZPOh5hhc SRASRq8A/EMOB3txkCtrd6JjBkkjOroJsUmgxdcE5wwQ54jLU7tXvzZDDWp+mLe22m/u NlcQ== X-Gm-Message-State: AOJu0YyOEKCmZ8q3lXDpYPL4g+07zBaya2PdlAz99u/e8aRXdugP2BXr y2c0cg5QSnsgfCV8wtmMXuRAnSBT/ftygHYgA9QDjnXMZTGWpkjPuaNIGsmFdus= X-Google-Smtp-Source: AGHT+IEcFMsC2JJwKC0bBneainqEcvPcDmG2A+BFpPsnm18l2mIDy/CHEn9AzQ2NlkvPeq7z9bbO+A== X-Received: by 2002:adf:f303:0:b0:33d:c0c3:fe0a with SMTP id i3-20020adff303000000b0033dc0c3fe0amr8838773wro.0.1709045573764; Tue, 27 Feb 2024 06:52:53 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id by15-20020a056000098f00b0033da933b250sm11807543wrb.5.2024.02.27.06.52.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:52:51 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 005245F92D; Tue, 27 Feb 2024 14:43:38 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour , Akihiko Odaki Subject: [PATCH v4 26/29] contrib/plugins: extend execlog to track register changes Date: Tue, 27 Feb 2024 14:43:32 +0000 Message-Id: <20240227144335.1196131-27-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org With the new plugin register API we can now track changes to register values. Currently the implementation is fairly dumb which will slow down if a large number of register values are being tracked. This could be improved by only instrumenting instructions which mention registers we are interested in tracking. Example usage: ./qemu-aarch64 -D plugin.log -d plugin \ -cpu max,sve256=on \ -plugin contrib/plugins/libexeclog.so,reg=sp,reg=z\* \ ./tests/tcg/aarch64-linux-user/sha512-sve will display in the execlog any changes to the stack pointer (sp) and the SVE Z registers. As testing registers every instruction will be quite a heavy operation there is an additional flag which attempts to optimise the register tracking by only instrumenting instructions which are likely to change its value. This relies on the QEMU disassembler showing up the register names in disassembly so is an explicit opt-in. Reviewed-by: Pierrick Bouvier Message-Id: <20240223162202.1936541-25-alex.bennee@linaro.org> Signed-off-by: Alex Bennée Cc: Akihiko Odaki Based-On: <20231025093128.33116-19-akihiko.odaki@daynix.com> --- v3 - just use a GArray for the CPU array - drop duplicate of cpu_index v4 - rebase and api fixups - I accidentally squashed the optimisation last round so update commit message with the details. v5 - qemu_plugin_get_registers always returns an array --- docs/devel/tcg-plugins.rst | 17 +- contrib/plugins/execlog.c | 316 +++++++++++++++++++++++++++++++------ 2 files changed, 281 insertions(+), 52 deletions(-) diff --git a/docs/devel/tcg-plugins.rst b/docs/devel/tcg-plugins.rst index 81dcd43a612..fa7421279f5 100644 --- a/docs/devel/tcg-plugins.rst +++ b/docs/devel/tcg-plugins.rst @@ -497,6 +497,22 @@ arguments if required:: $ qemu-system-arm $(QEMU_ARGS) \ -plugin ./contrib/plugins/libexeclog.so,ifilter=st1w,afilter=0x40001808 -d plugin +This plugin can also dump registers when they change value. Specify the name of the +registers with multiple ``reg`` options. You can also use glob style matching if you wish:: + + $ qemu-system-arm $(QEMU_ARGS) \ + -plugin ./contrib/plugins/libexeclog.so,reg=\*_el2,reg=sp -d plugin + +Be aware that each additional register to check will slow down +execution quite considerably. You can optimise the number of register +checks done by using the rdisas option. This will only instrument +instructions that mention the registers in question in disassembly. +This is not foolproof as some instructions implicitly change +instructions. You can use the ifilter to catch these cases: + + $ qemu-system-arm $(QEMU_ARGS) \ + -plugin ./contrib/plugins/libexeclog.so,ifilter=msr,ifilter=blr,reg=x30,reg=\*_el1,rdisas=on + - contrib/plugins/cache.c Cache modelling plugin that measures the performance of a given L1 cache @@ -583,4 +599,3 @@ The following API is generated from the inline documentation in include the full kernel-doc annotations. .. kernel-doc:: include/qemu/qemu-plugin.h - diff --git a/contrib/plugins/execlog.c b/contrib/plugins/execlog.c index f262e5555eb..a1dfd59ab71 100644 --- a/contrib/plugins/execlog.c +++ b/contrib/plugins/execlog.c @@ -1,7 +1,7 @@ /* * Copyright (C) 2021, Alexandre Iooss * - * Log instruction execution with memory access. + * Log instruction execution with memory access and register changes * * License: GNU GPL, version 2 or later. * See the COPYING file in the top-level directory. @@ -15,29 +15,40 @@ #include +typedef struct { + struct qemu_plugin_register *handle; + GByteArray *last; + GByteArray *new; + const char *name; +} Register; + +typedef struct CPU { + /* Store last executed instruction on each vCPU as a GString */ + GString *last_exec; + /* Ptr array of Register */ + GPtrArray *registers; +} CPU; + QEMU_PLUGIN_EXPORT int qemu_plugin_version = QEMU_PLUGIN_VERSION; -/* Store last executed instruction on each vCPU as a GString */ -static GPtrArray *last_exec; +static GArray *cpus; static GRWLock expand_array_lock; static GPtrArray *imatches; static GArray *amatches; +static GPtrArray *rmatches; +static bool disas_assist; +static GMutex add_reg_name_lock; +static GPtrArray *all_reg_names; -/* - * Expand last_exec array. - * - * As we could have multiple threads trying to do this we need to - * serialise the expansion under a lock. - */ -static void expand_last_exec(int cpu_index) +static CPU *get_cpu(int vcpu_index) { - g_rw_lock_writer_lock(&expand_array_lock); - while (cpu_index >= last_exec->len) { - GString *s = g_string_new(NULL); - g_ptr_array_add(last_exec, s); - } - g_rw_lock_writer_unlock(&expand_array_lock); + CPU *c; + g_rw_lock_reader_lock(&expand_array_lock); + c = &g_array_index(cpus, CPU, vcpu_index); + g_rw_lock_reader_unlock(&expand_array_lock); + + return c; } /** @@ -46,13 +57,10 @@ static void expand_last_exec(int cpu_index) static void vcpu_mem(unsigned int cpu_index, qemu_plugin_meminfo_t info, uint64_t vaddr, void *udata) { - GString *s; + CPU *c = get_cpu(cpu_index); + GString *s = c->last_exec; /* Find vCPU in array */ - g_rw_lock_reader_lock(&expand_array_lock); - g_assert(cpu_index < last_exec->len); - s = g_ptr_array_index(last_exec, cpu_index); - g_rw_lock_reader_unlock(&expand_array_lock); /* Indicate type of memory access */ if (qemu_plugin_mem_is_store(info)) { @@ -73,32 +81,91 @@ static void vcpu_mem(unsigned int cpu_index, qemu_plugin_meminfo_t info, } /** - * Log instruction execution + * Log instruction execution, outputting the last one. + * + * vcpu_insn_exec() is a copy and paste of vcpu_insn_exec_with_regs() + * without the checking of register values when we've attempted to + * optimise with disas_assist. */ -static void vcpu_insn_exec(unsigned int cpu_index, void *udata) +static void insn_check_regs(CPU *cpu) { - GString *s; + for (int n = 0; n < cpu->registers->len; n++) { + Register *reg = cpu->registers->pdata[n]; + int sz; - /* Find or create vCPU in array */ - g_rw_lock_reader_lock(&expand_array_lock); - if (cpu_index >= last_exec->len) { - g_rw_lock_reader_unlock(&expand_array_lock); - expand_last_exec(cpu_index); - g_rw_lock_reader_lock(&expand_array_lock); + g_byte_array_set_size(reg->new, 0); + sz = qemu_plugin_read_register(reg->handle, reg->new); + g_assert(sz == reg->last->len); + + if (memcmp(reg->last->data, reg->new->data, sz)) { + GByteArray *temp = reg->last; + g_string_append_printf(cpu->last_exec, ", %s -> 0x", reg->name); + /* TODO: handle BE properly */ + for (int i = sz; i >= 0; i--) { + g_string_append_printf(cpu->last_exec, "%02x", + reg->new->data[i]); + } + reg->last = reg->new; + reg->new = temp; + } + } +} + +/* Log last instruction while checking registers */ +static void vcpu_insn_exec_with_regs(unsigned int cpu_index, void *udata) +{ + CPU *cpu = get_cpu(cpu_index); + + /* Print previous instruction in cache */ + if (cpu->last_exec->len) { + if (cpu->registers) { + insn_check_regs(cpu); + } + + qemu_plugin_outs(cpu->last_exec->str); + qemu_plugin_outs("\n"); + } + + /* Store new instruction in cache */ + /* vcpu_mem will add memory access information to last_exec */ + g_string_printf(cpu->last_exec, "%u, ", cpu_index); + g_string_append(cpu->last_exec, (char *)udata); +} + +/* Log last instruction while checking registers, ignore next */ +static void vcpu_insn_exec_only_regs(unsigned int cpu_index, void *udata) +{ + CPU *cpu = get_cpu(cpu_index); + + /* Print previous instruction in cache */ + if (cpu->last_exec->len) { + if (cpu->registers) { + insn_check_regs(cpu); + } + + qemu_plugin_outs(cpu->last_exec->str); + qemu_plugin_outs("\n"); } - s = g_ptr_array_index(last_exec, cpu_index); - g_rw_lock_reader_unlock(&expand_array_lock); + + /* reset */ + cpu->last_exec->len = 0; +} + +/* Log last instruction without checking regs, setup next */ +static void vcpu_insn_exec(unsigned int cpu_index, void *udata) +{ + CPU *cpu = get_cpu(cpu_index); /* Print previous instruction in cache */ - if (s->len) { - qemu_plugin_outs(s->str); + if (cpu->last_exec->len) { + qemu_plugin_outs(cpu->last_exec->str); qemu_plugin_outs("\n"); } /* Store new instruction in cache */ /* vcpu_mem will add memory access information to last_exec */ - g_string_printf(s, "%u, ", cpu_index); - g_string_append(s, (char *)udata); + g_string_printf(cpu->last_exec, "%u, ", cpu_index); + g_string_append(cpu->last_exec, (char *)udata); } /** @@ -111,6 +178,8 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) { struct qemu_plugin_insn *insn; bool skip = (imatches || amatches); + bool check_regs_this = rmatches; + bool check_regs_next = false; size_t n = qemu_plugin_tb_n_insns(tb); for (size_t i = 0; i < n; i++) { @@ -131,7 +200,8 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) /* * If we are filtering we better check out if we have any * hits. The skip "latches" so we can track memory accesses - * after the instruction we care about. + * after the instruction we care about. Also enable register + * checking on the next instruction. */ if (skip && imatches) { int j; @@ -139,6 +209,7 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) char *m = g_ptr_array_index(imatches, j); if (g_str_has_prefix(insn_disas, m)) { skip = false; + check_regs_next = rmatches; } } } @@ -153,8 +224,39 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) } } + /* + * Check the disassembly to see if a register we care about + * will be affected by this instruction. This relies on the + * dissembler doing something sensible for the registers we + * care about. + */ + if (disas_assist && rmatches) { + check_regs_next = false; + gchar *args = g_strstr_len(insn_disas, -1, " "); + for (int n = 0; n < all_reg_names->len; n++) { + gchar *reg = g_ptr_array_index(all_reg_names, n); + if (g_strrstr(args, reg)) { + check_regs_next = true; + skip = false; + } + } + } + + /* + * We now have 3 choices: + * + * - Log insn + * - Log insn while checking registers + * - Don't log this insn but check if last insn changed registers + */ + if (skip) { - g_free(insn_disas); + if (check_regs_this) { + qemu_plugin_register_vcpu_insn_exec_cb(insn, + vcpu_insn_exec_only_regs, + QEMU_PLUGIN_CB_R_REGS, + NULL); + } } else { uint32_t insn_opcode; insn_opcode = *((uint32_t *)qemu_plugin_insn_data(insn)); @@ -167,30 +269,124 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) QEMU_PLUGIN_MEM_RW, NULL); /* Register callback on instruction */ - qemu_plugin_register_vcpu_insn_exec_cb(insn, vcpu_insn_exec, - QEMU_PLUGIN_CB_NO_REGS, output); + if (check_regs_this) { + qemu_plugin_register_vcpu_insn_exec_cb( + insn, vcpu_insn_exec_with_regs, + QEMU_PLUGIN_CB_R_REGS, + output); + } else { + qemu_plugin_register_vcpu_insn_exec_cb( + insn, vcpu_insn_exec, + QEMU_PLUGIN_CB_NO_REGS, + output); + } /* reset skip */ skip = (imatches || amatches); } + /* set regs for next */ + if (disas_assist && rmatches) { + check_regs_this = check_regs_next; + } + + g_free(insn_disas); } } +static Register *init_vcpu_register(qemu_plugin_reg_descriptor *desc) +{ + Register *reg = g_new0(Register, 1); + g_autofree gchar *lower = g_utf8_strdown(desc->name, -1); + int r; + + reg->handle = desc->handle; + reg->name = g_intern_string(lower); + reg->last = g_byte_array_new(); + reg->new = g_byte_array_new(); + + /* read the initial value */ + r = qemu_plugin_read_register(reg->handle, reg->last); + g_assert(r > 0); + return reg; +} + +static GPtrArray *registers_init(int vcpu_index) +{ + g_autoptr(GPtrArray) registers = g_ptr_array_new(); + g_autoptr(GArray) reg_list = qemu_plugin_get_registers(); + + if (rmatches && reg_list->len) { + /* + * Go through each register in the complete list and + * see if we want to track it. + */ + for (int r = 0; r < reg_list->len; r++) { + qemu_plugin_reg_descriptor *rd = &g_array_index( + reg_list, qemu_plugin_reg_descriptor, r); + for (int p = 0; p < rmatches->len; p++) { + g_autoptr(GPatternSpec) pat = g_pattern_spec_new(rmatches->pdata[p]); + g_autofree gchar *rd_lower = g_utf8_strdown(rd->name, -1); + if (g_pattern_match_string(pat, rd->name) || + g_pattern_match_string(pat, rd_lower)) { + Register *reg = init_vcpu_register(rd); + g_ptr_array_add(registers, reg); + + /* we need a list of regnames at TB translation time */ + if (disas_assist) { + g_mutex_lock(&add_reg_name_lock); + if (!g_ptr_array_find(all_reg_names, reg->name, NULL)) { + g_ptr_array_add(all_reg_names, reg->name); + } + g_mutex_unlock(&add_reg_name_lock); + } + } + } + } + } + + return registers->len ? g_steal_pointer(®isters) : NULL; +} + +/* + * Initialise a new vcpu/thread with: + * - last_exec tracking data + * - list of tracked registers + * - initial value of registers + * + * As we could have multiple threads trying to do this we need to + * serialise the expansion under a lock. + */ +static void vcpu_init(qemu_plugin_id_t id, unsigned int vcpu_index) +{ + CPU *c; + + g_rw_lock_writer_lock(&expand_array_lock); + if (vcpu_index >= cpus->len) { + g_array_set_size(cpus, vcpu_index + 1); + } + g_rw_lock_writer_unlock(&expand_array_lock); + + c = get_cpu(vcpu_index); + c->last_exec = g_string_new(NULL); + c->registers = registers_init(vcpu_index); +} + /** * On plugin exit, print last instruction in cache */ static void plugin_exit(qemu_plugin_id_t id, void *p) { guint i; - GString *s; - for (i = 0; i < last_exec->len; i++) { - s = g_ptr_array_index(last_exec, i); - if (s->str) { - qemu_plugin_outs(s->str); + g_rw_lock_reader_lock(&expand_array_lock); + for (i = 0; i < cpus->len; i++) { + CPU *c = get_cpu(i); + if (c->last_exec && c->last_exec->str) { + qemu_plugin_outs(c->last_exec->str); qemu_plugin_outs("\n"); } } + g_rw_lock_reader_unlock(&expand_array_lock); } /* Add a match to the array of matches */ @@ -212,6 +408,18 @@ static void parse_vaddr_match(char *match) g_array_append_val(amatches, v); } +/* + * We have to wait until vCPUs are started before we can check the + * patterns find anything. + */ +static void add_regpat(char *regpat) +{ + if (!rmatches) { + rmatches = g_ptr_array_new(); + } + g_ptr_array_add(rmatches, g_strdup(regpat)); +} + /** * Install the plugin */ @@ -223,11 +431,8 @@ QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin_id_t id, * Initialize dynamic array to cache vCPU instruction. In user mode * we don't know the size before emulation. */ - if (info->system_emulation) { - last_exec = g_ptr_array_sized_new(info->system.max_vcpus); - } else { - last_exec = g_ptr_array_new(); - } + cpus = g_array_sized_new(true, true, sizeof(CPU), + info->system_emulation ? info->system.max_vcpus : 1); for (int i = 0; i < argc; i++) { char *opt = argv[i]; @@ -236,13 +441,22 @@ QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin_id_t id, parse_insn_match(tokens[1]); } else if (g_strcmp0(tokens[0], "afilter") == 0) { parse_vaddr_match(tokens[1]); + } else if (g_strcmp0(tokens[0], "reg") == 0) { + add_regpat(tokens[1]); + } else if (g_strcmp0(tokens[0], "rdisas") == 0) { + if (!qemu_plugin_bool_parse(tokens[0], tokens[1], &disas_assist)) { + fprintf(stderr, "boolean argument parsing failed: %s\n", opt); + return -1; + } + all_reg_names = g_ptr_array_new(); } else { fprintf(stderr, "option parsing failed: %s\n", opt); return -1; } } - /* Register translation block and exit callbacks */ + /* Register init, translation block and exit callbacks */ + qemu_plugin_register_vcpu_init_cb(id, vcpu_init); qemu_plugin_register_vcpu_tb_trans_cb(id, vcpu_tb_trans); qemu_plugin_register_atexit_cb(id, plugin_exit, NULL); From patchwork Tue Feb 27 14:43:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905179 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=kekDdyQJ; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgVw0tqSz1yX4 for ; Wed, 28 Feb 2024 01:54:32 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reypR-0003aD-7O; Tue, 27 Feb 2024 09:53:09 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reypM-00037D-B0 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:04 -0500 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reypE-0004nq-5o for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:04 -0500 Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-412a9e9c776so7273945e9.0 for ; Tue, 27 Feb 2024 06:52:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045573; x=1709650373; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=t+Lu1aUTzILJv+8PeOqcfRU9ypZOJg6L0bg1/V/uBfw=; b=kekDdyQJViVGT60DTUr/E5cnT3ZjN3UAmwMuAd84hClAyg1wLUu9spvHV1ompmRwsC oDHXMS7juodoZE2FYB2E67ptvqv+loGZyG+1otO4AC5qSFCK7itXSzasMIdxYDZA9Ind Y3FqBOD+tCt6masdAF63sJ1reMluUrkBT80Alt6EkMF51nNParKxqHdjIvJOhctEVDRn ZBLAJ0Cp8NsB8e08ILhWnGLfVJd36XF8C1Mzzi5QM74LMXO8dnL32mJKR+AaIlMfE8Go pW4fss3pwOxwlaTOUETBoBOF8YWlBccjNgd/rekC06FW+KeniPtIn0JDGri0sq4w50Gx yUNQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045573; x=1709650373; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=t+Lu1aUTzILJv+8PeOqcfRU9ypZOJg6L0bg1/V/uBfw=; b=hIpPRFMAqQQq2JU7v8jCNjLwkkresef+PPXQ5CtvWSV2QRbvDBqiArOM/b8+N02nzK TYQKMOpRY8wnhDVDSG3iIJV4OsPhMgBRCizsI29SU+dCadqH6HMu0IQ+uwcuRajmVlwp 03XOzVA6wNvIwb7xn1w7gE7Dbtz8AClDuOQ9iOtwnZLC5Wzp+TtIhIM1+I2BgRgD8o7e qXvlHTU18F28ntICYVmPG31WhndZ9P+weIsVOiWxIsFFn+j1i8mg5uU2zlOXDb5n33wa VUVTCvNGV9SC51YvyQB1u1ZPvqD6HoODB7rKrCsNFFoJfAWKAD+xFZ1IyxnfD73dggTa raCA== X-Gm-Message-State: AOJu0Yyof7qvw4RKwZUCP48d8ZaPFpGgaqwmSrZ6GzJ474U1rB6bH3yU UxhsuI7OlDpfS/ulMYBCCzOdNx1AMPpl+3E0WQfWvPbopshQ96GGIWI+ncz71gw= X-Google-Smtp-Source: AGHT+IEMrcrsgzx9LyhtNiRdk9m57oKDvZT3irFofG/fsSiWwA23AS/x3JXsWUqiaHcu52nQ7xf35A== X-Received: by 2002:adf:ead2:0:b0:33d:1ece:d618 with SMTP id o18-20020adfead2000000b0033d1eced618mr9437170wrn.8.1709045573434; Tue, 27 Feb 2024 06:52:53 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id bt21-20020a056000081500b0033b48190e5esm11960506wrb.67.2024.02.27.06.52.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:52:51 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 14A105F92E; Tue, 27 Feb 2024 14:43:38 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 27/29] docs/devel: lift example and plugin API sections up Date: Tue, 27 Feb 2024 14:43:33 +0000 Message-Id: <20240227144335.1196131-28-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org This makes them a bit more visible in the TCG emulation menu rather than hiding them away bellow the ToC limit. Message-Id: <20240103173349.398526-43-alex.bennee@linaro.org> Reviewed-by: Pierrick Bouvier Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé --- docs/devel/tcg-plugins.rst | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/docs/devel/tcg-plugins.rst b/docs/devel/tcg-plugins.rst index fa7421279f5..535a74684c5 100644 --- a/docs/devel/tcg-plugins.rst +++ b/docs/devel/tcg-plugins.rst @@ -143,7 +143,7 @@ requested. The plugin isn't completely uninstalled until the safe work has executed while all vCPUs are quiescent. Example Plugins ---------------- +=============== There are a number of plugins included with QEMU and you are encouraged to contribute your own plugins plugins upstream. There is a @@ -591,8 +591,8 @@ The plugin has a number of arguments, all of them are optional: configuration arguments implies ``l2=on``. (default: N = 2097152 (2MB), B = 64, A = 16) -API ---- +Plugin API +========== The following API is generated from the inline documentation in ``include/qemu/qemu-plugin.h``. Please ensure any updates to the API From patchwork Tue Feb 27 14:43:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905198 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=xqkX1NvW; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgYM04G0z23qQ for ; Wed, 28 Feb 2024 01:56:39 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reypL-00033R-FU; Tue, 27 Feb 2024 09:53:03 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reypJ-0002vy-LF for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:02 -0500 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reypD-0004mn-4O for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:53:01 -0500 Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-412ae376419so4712055e9.3 for ; Tue, 27 Feb 2024 06:52:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045571; x=1709650371; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zMZ+pFdg1P4n/cHnfp4DZXoxUsYEnk+lXnRUtGdShK8=; b=xqkX1NvW/laAo0Kate1dR9vbLT6ho6Ye/MgFXKN5LXL1PRw2ndhPtG9r7T5dzJ6xbS 2FgurRRiTttgJTNsuinc0jDHYLG0zoux+A+usQPZQhii7IeTnkDdERXWLiUS7cM7QwLO 6e8B1ARbZBMNtCS4D/uNt3UUfCgnt5AYhBspraAlhWUX/+GQz6nrEfW8hC9ypJ4v95rj SJwKlvQcoodl7Cd06hnCnlVtUT+TE4UnMFlB86VRBYMZ5enTbHR2+m6B2u1r9teCF5Nm DKm0dTEtjE4UwkbIrtXzGG8+o+ZApgffYbgN17zC8hXlffQgQphQEIFLsOwe9hR4IG40 30sg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045571; x=1709650371; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zMZ+pFdg1P4n/cHnfp4DZXoxUsYEnk+lXnRUtGdShK8=; b=JopZpaCEv1kJQiXB3sWCQs7V9CL4w+WUQ+NEUpI7nolGrH2+jiOK99iWB9j9BP+vGH 4ZfXkLsqk/kRVOfqC9DTXepXx/7bncjdUS0lpZyfZ77aVcJzfDZ8lPQY9/AlF3c6CwzK MWz0bvYhJtk17A1N79fk2oRxWx42GIUpDKvnyk+uebQs77MBz/wAp4qNDCOix9WB4sZ9 HiHKQPm4rIYXRXPW6ul5agmMPhqxHuXUJdTbBozhHjq6Byxwisr33Q24OqKt9MTXDyvn eQwrwCyWoi44GlEDYQUgXUsmeYTz0jM3WQIrqEp5uY11AdiOn79gN6k6W9nt4Ekgukit bWfA== X-Gm-Message-State: AOJu0YwV/d/6vjhX8NIvEH9B9ArSwPEQX4C8fvTtgX9wP2Lb7Om8WOES 73ixXluXWRK4wXdLLOSc230nnyngcAv89QDgDw7ExnLiP3N3SQzkCPHxhJJ8d58= X-Google-Smtp-Source: AGHT+IETg4WzZNvk2wvxIlG8WU4ie4CylKMnEVrxvPc9V0SjG/5PGdsV3osnYR8Nnzi3wt6/wFwmLQ== X-Received: by 2002:a5d:400c:0:b0:33b:26de:ea with SMTP id n12-20020a5d400c000000b0033b26de00eamr7173413wrp.37.1709045570784; Tue, 27 Feb 2024 06:52:50 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id a10-20020a5d4d4a000000b0033d13530134sm11454355wru.106.2024.02.27.06.52.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:52:50 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 280B55F92F; Tue, 27 Feb 2024 14:43:38 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 28/29] docs/devel: document some plugin assumptions Date: Tue, 27 Feb 2024 14:43:34 +0000 Message-Id: <20240227144335.1196131-29-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org While we attempt to hide implementation details from the plugin we shouldn't be totally obtuse. Let the user know what they can and can't expect with the various instrumentation options. Message-Id: <20240103173349.398526-44-alex.bennee@linaro.org> Reviewed-by: Pierrick Bouvier Signed-off-by: Alex Bennée --- docs/devel/tcg-plugins.rst | 49 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/docs/devel/tcg-plugins.rst b/docs/devel/tcg-plugins.rst index 535a74684c5..9cc09d8c3da 100644 --- a/docs/devel/tcg-plugins.rst +++ b/docs/devel/tcg-plugins.rst @@ -112,6 +112,55 @@ details are opaque to plugins. The plugin is able to query select details of instructions and system configuration only through the exported *qemu_plugin* functions. +However the following assumptions can be made: + +Translation Blocks +++++++++++++++++++ + +All code will go through a translation phase although not all +translations will be necessarily be executed. You need to instrument +actual executions to track what is happening. + +It is quite normal to see the same address translated multiple times. +If you want to track the code in system emulation you should examine +the underlying physical address (``qemu_plugin_insn_haddr``) to take +into account the effects of virtual memory although if the system does +paging this will change too. + +Not all instructions in a block will always execute so if its +important to track individual instruction execution you need to +instrument them directly. However asynchronous interrupts will not +change control flow mid-block. + +Instructions +++++++++++++ + +Instruction instrumentation runs before the instruction executes. You +can be can be sure the instruction will be dispatched, but you can't +be sure it will complete. Generally this will be because of a +synchronous exception (e.g. SIGILL) triggered by the instruction +attempting to execute. If you want to be sure you will need to +instrument the next instruction as well. See the ``execlog.c`` plugin +for examples of how to track this and finalise details after execution. + +Memory Accesses ++++++++++++++++ + +Memory callbacks are called after a successful load or store. +Unsuccessful operations (i.e. faults) will not be visible to memory +instrumentation although the execution side effects can be observed +(e.g. entering a exception handler). + +System Idle and Resume States ++++++++++++++++++++++++++++++ + +The ``qemu_plugin_register_vcpu_idle_cb`` and +``qemu_plugin_register_vcpu_resume_cb`` functions can be used to track +when CPUs go into and return from sleep states when waiting for +external I/O. Be aware though that these may occur less frequently +than in real HW due to the inefficiencies of emulation giving less +chance for the CPU to idle. + Internals --------- From patchwork Tue Feb 27 14:43:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 1905142 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=gux/cNeg; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=patchwork.ozlabs.org) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TkgN06RP0z1yX0 for ; Wed, 28 Feb 2024 01:48:32 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1reyjR-0001fg-W8; Tue, 27 Feb 2024 09:46:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1reyhO-0006gc-28 for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:51 -0500 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1reygU-00028z-JR for qemu-ppc@nongnu.org; Tue, 27 Feb 2024 09:44:48 -0500 Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-41298159608so22069885e9.0 for ; Tue, 27 Feb 2024 06:43:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1709045033; x=1709649833; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=c62pHsDpP+3tvJg69QO5ZTVqtvkEN32UvVvL0uQMeec=; b=gux/cNeg+v7mVG2tl8fdvCfEUd+40DjhSjPe55bcJZR1PmnnNBkXG8m86VIEaHlA99 8LHz93oMUPlUXeGH0fZUroex7HZQLG9Wci0Wqu1o2fAgnaCbtCcGwR0frNCfJTwvFrBr SCNTlQnaqKLm5FpqQ83LZoW8qrz9taomLAFTazKs9gsXiPyd/RNiOZgmh7uthdhnyPQZ 8arceJrYNjccNMeqcZSiAPHk96ulz6GpJNCAxhnWhaEMp6HQjXk45I7wuAATuPqeXkuu 0Rph/kuBHJi9ilAjzKVw5WrHBH7nkLmT1Dej5qN18NwxV3qBe2xvq4jX4V7zY8iVu1at 8gjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1709045033; x=1709649833; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=c62pHsDpP+3tvJg69QO5ZTVqtvkEN32UvVvL0uQMeec=; b=pXYwUWMFWUgkHaWJFGoLrIq9+q1c7eei9UPsZzASHKER5GIALCE/UZCVO5c1Ngsxtq NpAJMWqjMTPx9y1c/oWb6ETsiW/QlJl2IvB+YDpPCdUkc0vdAhg/8Kt2p3vnQkysxR/U zxcQlMek8kvTVyvgvYB7vqEfE7LCKBA78H/taBemBFTh2nTLB3P5ykbnfCPXhB8IG1AY wjfyXP4qM30QUPlJGRODaWJZZgd03uitI1XNl0avfL20lL9j7jif84nncMlyyq5l480f v5dIJmJKYm2nN/vQIc+08eHYZxXXeXCK42X/ZWBnyo/aVKnIx5O+8QI9OO6y3MrsoOlQ QHrQ== X-Gm-Message-State: AOJu0YxPhKUuu9qZUJufNGhOOumY+N7oLFfbuBu3iouXGS1Tqku9rFyc BcL1jRGY3MB5MLx0Sk+Mx+6gqNF6F5hPHMIprdkbk6jyVyUuCSy+4Fc3Iml81RA= X-Google-Smtp-Source: AGHT+IHhQzcJcS6r5wz7jaaCY5J2GMmsAy5/oYXqiRSw/8YTNKf+gmGm1vmh654hwDpiAMXWd3BOow== X-Received: by 2002:a05:600c:4f01:b0:412:afed:5cdd with SMTP id l1-20020a05600c4f0100b00412afed5cddmr1067554wmq.11.1709045033287; Tue, 27 Feb 2024 06:43:53 -0800 (PST) Received: from draig.lan ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id w10-20020adff9ca000000b0033d1b760125sm11684409wrr.92.2024.02.27.06.43.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Feb 2024 06:43:49 -0800 (PST) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 3B4925F930; Tue, 27 Feb 2024 14:43:38 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Yoshinori Sato , qemu-arm@nongnu.org, Liu Zhiwei , Michael Rolnik , Yanan Wang , Eduardo Habkost , Wainer dos Santos Moschetta , Beraldo Leal , Cleber Rosa , David Hildenbrand , Paolo Bonzini , Peter Maydell , Song Gao , Daniel Henrique Barboza , Laurent Vivier , Warner Losh , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Ilya Leoshkevich , =?utf-8?q?C=C3=A9dric_Le_Goater?= , qemu-s390x@nongnu.org, Kyle Evans , Brad Smith , Nicholas Piggin , "Edgar E. Iglesias" , Pierrick Bouvier , John Snow , Alistair Francis , Richard Henderson , Brian Cain , Thomas Huth , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= , qemu-riscv@nongnu.org, Bin Meng , Daniel Henrique Barboza , Weiwei Li , Marcel Apfelbaum , Palmer Dabbelt , Mahmoud Mandour Subject: [PATCH v4 29/29] docs/devel: plugins can trigger a tb flush Date: Tue, 27 Feb 2024 14:43:35 +0000 Message-Id: <20240227144335.1196131-30-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240227144335.1196131-1-alex.bennee@linaro.org> References: <20240227144335.1196131-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-ppc@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Pierrick Bouvier When scoreboards need to be reallocated. Signed-off-by: Pierrick Bouvier Reviewed-by: Richard Henderson Message-Id: <20240213094009.150349-8-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée --- docs/devel/multi-thread-tcg.rst | 1 + 1 file changed, 1 insertion(+) diff --git a/docs/devel/multi-thread-tcg.rst b/docs/devel/multi-thread-tcg.rst index 7302c3bf534..1420789fff3 100644 --- a/docs/devel/multi-thread-tcg.rst +++ b/docs/devel/multi-thread-tcg.rst @@ -109,6 +109,7 @@ including: - debugging operations (breakpoint insertion/removal) - some CPU helper functions - linux-user spawning its first thread + - operations related to TCG Plugins This is done with the async_safe_run_on_cpu() mechanism to ensure all vCPUs are quiescent when changes are being made to shared global