From patchwork Wed Feb 21 03:10:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lulu Cheng X-Patchwork-Id: 1901812 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TfhCG6bQ0z20Qg for ; Wed, 21 Feb 2024 14:12:10 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E7BEC385842F for ; Wed, 21 Feb 2024 03:12:07 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id 3DD3A3858C2F for ; Wed, 21 Feb 2024 03:11:39 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 3DD3A3858C2F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 3DD3A3858C2F Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1708485101; cv=none; b=fP2E8tcDARhKeV+DkzuqGq21pyazj3T35bpp7C4lZ6jRRl3AiLZEgkytHSGTMndEseXgmHaVRWyML22X1KykyjCNaQFTrlKmz+s36glyvHULigi5DiGnxR5KQbD/6SFs7uv18xrW36Q2p6sFfAKlHAfxYFrfyMCGcXjC7f2HMPc= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1708485101; c=relaxed/simple; bh=ULHhaJIZuC3v2o+Iu9I7rqU3lW2Csj3OJOjCqFiFwcA=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=bvlskIWZSNjp+AwAj+y4+YSqprT9d+DdDUd8WfoBQy9XJUTjrD0yLILRtTJRWP/ZgdheZqvtaT9oMjVHOI/uUrdDjvtKc+B5LJQAYS3DiM4m+zlerca3jp8twSbq0WW1QmWv1dkoiwb4O07jLfFLP9CB8FJrrLhtmy7hNAy4gSE= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.20.4.107]) by gateway (Coremail) with SMTP id _____8AxOOjpadVl96cPAA--.21065S3; Wed, 21 Feb 2024 11:11:37 +0800 (CST) Received: from loongson-pc.loongson.cn (unknown [10.20.4.107]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cxbs3LadVlN209AA--.25488S3; Wed, 21 Feb 2024 11:11:37 +0800 (CST) From: Lulu Cheng To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn, chenglulu@loongson.cn Subject: [PATCH v1 1/4] LoongArch: Delete macro definition ASM_OUTPUT_ALIGN_WITH_NOP. Date: Wed, 21 Feb 2024 11:10:47 +0800 Message-Id: <20240221031050.24343-2-chenglulu@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20240221031050.24343-1-chenglulu@loongson.cn> References: <20240221031050.24343-1-chenglulu@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cxbs3LadVlN209AA--.25488S3 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj93XoW7ury3Jr45JFyUCFyDJFWxXwc_yoW8Ar43p3 9xAwnrJFW8Jr1xGwnFq39Ygws0q3srKr12qF1agr48Ca15Jr1j9Fs3trWkXFy0gws5ZF1a qr18Kr43XF90yagCm3ZEXasCq-sJn29KB7ZKAUJUUUUP529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUB2b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r106r15M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVWxJVW8Jr1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6r4UJVWxJr1ln4kS14v26r1q6r43M2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12 xvs2x26I8E6xACxx1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26rWY 6Fy7McIj6I8E87Iv67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64 vIr41lc7CjxVAaw2AFwI0_Jw0_GFyl42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_ Jr0_Gr1l4IxYO2xFxVAFwI0_Jw0_GFylx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8Gjc xK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0xvE2Ix0 cI8IcVAFwI0_Xr0_Ar1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK8V AvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I0E 14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxU-LZ2DUUUU X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org There are two reasons for removing this macro definition: 1. The default in the assembler is to use the nop instruction for filling. 2. For assembly directives: .align [abs-expr[, abs-expr[, abs-expr]]] The third expression it is the maximum number of bytes that should be skipped by this alignment directive. Therefore, it will affect the display of the specified alignment rules and affect the operating efficiency. This modification relies on binutils commit 1fb3cdd87ec61715a5684925fb6d6a6cf53bb97c. (Since the assembler will add nop based on the .align information when doing relax, it will cause the conditional branch to go out of bounds during the assembly process. This submission of binutils solves this problem.) gcc/ChangeLog: * config/loongarch/loongarch.h (ASM_OUTPUT_ALIGN_WITH_NOP): Delete. Co-authored-by: Chenghua Xu (cherry picked from commit b20c7ee066cb7d952fa193972e8bc6362c6e4063) --- gcc/config/loongarch/loongarch.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h index f34a7a604cc..8d08b84c8eb 100644 --- a/gcc/config/loongarch/loongarch.h +++ b/gcc/config/loongarch/loongarch.h @@ -978,11 +978,6 @@ typedef struct { #define ASM_OUTPUT_ALIGN(STREAM, LOG) fprintf (STREAM, "\t.align\t%d\n", (LOG)) -/* "nop" instruction 54525952 (andi $r0,$r0,0) is - used for padding. */ -#define ASM_OUTPUT_ALIGN_WITH_NOP(STREAM, LOG) \ - fprintf (STREAM, "\t.align\t%d,54525952,4\n", (LOG)) - /* This is how to output an assembler line to advance the location counter by SIZE bytes. */ From patchwork Wed Feb 21 03:10:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lulu Cheng X-Patchwork-Id: 1901813 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TfhCH1lv9z23d4 for ; Wed, 21 Feb 2024 14:12:11 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1734A385842D for ; Wed, 21 Feb 2024 03:12:09 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id EC23F3858C66 for ; Wed, 21 Feb 2024 03:11:40 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org EC23F3858C66 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn ARC-Filter: OpenARC Filter v1.0.0 sourceware.org EC23F3858C66 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=114.242.206.163 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1708485104; cv=none; b=KsqyHQgM0ODNrd8OKLBlTXn4nlK1ZoeSCloIlujPHACgX4eycR9hSVeBo2xql9twVx45Dp2oIJqK2COMWtxmskCTsWA7/KVoxhatpi9dqtY+Mvjvyjl0IrmhtjU9QlTVo+/o67rxWZBZCNN9O9dDUVYeMDcWIYbC4SilUSofSDk= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1708485104; c=relaxed/simple; bh=r6kIL6i8tu/eznPHtijIZn2iCjRGV+OBy/ImDoHg0VU=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=PK5DbXSIuqvm5gnxW/k6L1wnNoyMj/PBe8ArVnfsfAatWXIFdSiXPXr8XK1YezvNGqw3mNLwwWf9hM1z3nW0Y8vQ+xIU2ZjyjzW1yz9erWVxYyWjOlPXZ0ruSnH62Lhz7mHD677RO89e+2wZn9qwOKJuKXPSCD6uiXys31V1TXk= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from loongson.cn (unknown [10.20.4.107]) by gateway (Coremail) with SMTP id _____8CxF+jqadVl+acPAA--.20858S3; Wed, 21 Feb 2024 11:11:38 +0800 (CST) Received: from loongson-pc.loongson.cn (unknown [10.20.4.107]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cxbs3LadVlN209AA--.25488S4; Wed, 21 Feb 2024 11:11:37 +0800 (CST) From: Lulu Cheng To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn, chenglulu@loongson.cn Subject: [PATCH v1 2/4] LoongArch: Check whether binutils supports the relax function. If supported, explicit relocs are turned off by default. Date: Wed, 21 Feb 2024 11:10:48 +0800 Message-Id: <20240221031050.24343-3-chenglulu@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20240221031050.24343-1-chenglulu@loongson.cn> References: <20240221031050.24343-1-chenglulu@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cxbs3LadVlN209AA--.25488S4 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj93XoW3Gr48uFWrtr1kCF1Utr4rtFc_yoWxWFyDpr 9rZw1ayF48Grs3Gr4Dta4fWwn3Jr97Wr12va13Xr18Ca15Xr10vF40yrnrXFy7Xw4rWry2 vr1rKa129a1kAwbCm3ZEXasCq-sJn29KB7ZKAUJUUUUx529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUB2b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVWxJVW8Jr1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6r4UJVWxJr1ln4kS14v26r126r1DM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12 xvs2x26I8E6xACxx1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26rWY 6Fy7McIj6I8E87Iv67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64 vIr41lc7CjxVAaw2AFwI0_JF0_Jw1l42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_ Jr0_Gr1l4IxYO2xFxVAFwI0_Jw0_GFylx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8Gjc xK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0xvE2Ix0 cI8IcVAFwI0_Xr0_Ar1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK8V AvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I0E 14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxUVWrXDUUUU X-Spam-Status: No, score=-12.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org gcc/ChangeLog: * config.in: Regenerate. * config/loongarch/genopts/loongarch.opt.in: Add compilation option mrelax. And set the initial value of explicit-relocs according to the detection status. * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the --no-relax option to the linker. * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with -mno-relax, pass the -mno-relax option to the assembler. * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro. * config/loongarch/loongarch.opt: Regenerate. * configure: Regenerate. * configure.ac: Add detection of support for binutils relax function. (cherry picked from commint 9bab65a77049edcc7afc59532173206ee816e726) --- gcc/config.in | 12 +++++++ gcc/config/loongarch/genopts/loongarch.opt.in | 5 +++ gcc/config/loongarch/gnu-user.h | 4 +-- gcc/config/loongarch/loongarch-opts.h | 4 +++ gcc/config/loongarch/loongarch.opt | 5 +++ gcc/configure | 31 +++++++++++++++++++ gcc/configure.ac | 4 +++ 7 files changed, 63 insertions(+), 2 deletions(-) diff --git a/gcc/config.in b/gcc/config.in index cc638759a40..f5b6287a96a 100644 --- a/gcc/config.in +++ b/gcc/config.in @@ -630,6 +630,12 @@ #endif +/* Define if your assembler supports -mrelax option. */ +#ifndef USED_FOR_TARGET +#undef HAVE_AS_MRELAX_OPTION +#endif + + /* Define if your assembler supports .mspabi_attribute. */ #ifndef USED_FOR_TARGET #undef HAVE_AS_MSPABI_ATTRIBUTE @@ -2214,6 +2220,12 @@ #endif +/* Define which stat syscall is able to handle 64bit indodes. */ +#ifndef USED_FOR_TARGET +#undef HOST_STAT_FOR_64BIT_INODES +#endif + + /* Define as const if the declaration of iconv() needs const. */ #ifndef USED_FOR_TARGET #undef ICONV_CONST diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in b/gcc/config/loongarch/genopts/loongarch.opt.in index 61e7d72a0a1..edc2ed045d7 100644 --- a/gcc/config/loongarch/genopts/loongarch.opt.in +++ b/gcc/config/loongarch/genopts/loongarch.opt.in @@ -177,3 +177,8 @@ Enum(cmodel) String(@@STR_CMODEL_EXTREME@@) Value(CMODEL_EXTREME) mcmodel= Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Specify the code model. + +mrelax +Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION) +Take advantage of linker relaxations to reduce the number of instructions +required to materialize symbol addresses. diff --git a/gcc/config/loongarch/gnu-user.h b/gcc/config/loongarch/gnu-user.h index f050078da52..28ac8b0e1f6 100644 --- a/gcc/config/loongarch/gnu-user.h +++ b/gcc/config/loongarch/gnu-user.h @@ -46,8 +46,8 @@ along with GCC; see the file COPYING3. If not see #define GNU_USER_TARGET_LINK_SPEC \ "%{G*} %{shared} -m " GNU_USER_LINK_EMULATION \ "%{!shared: %{static} %{!static: %{rdynamic:-export-dynamic} " \ - "-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" - + "-dynamic-linker " GNU_USER_DYNAMIC_LINKER "}}" \ + "%{mno-relax: --no-relax}" /* Similar to standard Linux, but adding -ffast-math support. */ #undef GNU_USER_TARGET_MATHFILE_SPEC diff --git a/gcc/config/loongarch/loongarch-opts.h b/gcc/config/loongarch/loongarch-opts.h index eaa6fc07448..60e682f57a0 100644 --- a/gcc/config/loongarch/loongarch-opts.h +++ b/gcc/config/loongarch/loongarch-opts.h @@ -87,4 +87,8 @@ loongarch_config_target (struct loongarch_target *target, while -m[no]-memcpy imposes a global constraint. */ #define TARGET_DO_OPTIMIZE_BLOCK_MOVE_P loongarch_do_optimize_block_move_p() +#ifndef HAVE_AS_MRELAX_OPTION +#define HAVE_AS_MRELAX_OPTION 0 +#endif + #endif /* LOONGARCH_OPTS_H */ diff --git a/gcc/config/loongarch/loongarch.opt b/gcc/config/loongarch/loongarch.opt index 3ff0d860413..78b5e0cc452 100644 --- a/gcc/config/loongarch/loongarch.opt +++ b/gcc/config/loongarch/loongarch.opt @@ -184,3 +184,8 @@ Enum(cmodel) String(extreme) Value(CMODEL_EXTREME) mcmodel= Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Specify the code model. + +mrelax +Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION) +Take advantage of linker relaxations to reduce the number of instructions +required to materialize symbol addresses. diff --git a/gcc/configure b/gcc/configure index b4907d258be..67cdd92a4f3 100755 --- a/gcc/configure +++ b/gcc/configure @@ -28871,6 +28871,37 @@ if test $gcc_cv_as_loongarch_dtprelword != yes; then $as_echo "#define HAVE_AS_DTPRELWORD 1" >>confdefs.h fi + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for -mrelax option" >&5 +$as_echo_n "checking assembler for -mrelax option... " >&6; } +if ${gcc_cv_as_loongarch_relax+:} false; then : + $as_echo_n "(cached) " >&6 +else + gcc_cv_as_loongarch_relax=no + if test x$gcc_cv_as != x; then + $as_echo '.text' > conftest.s + if { ac_try='$gcc_cv_as $gcc_cv_as_flags -mrelax -o conftest.o conftest.s >&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; } + then + gcc_cv_as_loongarch_relax=yes + else + echo "configure: failed program was" >&5 + cat conftest.s >&5 + fi + rm -f conftest.o conftest.s + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_loongarch_relax" >&5 +$as_echo "$gcc_cv_as_loongarch_relax" >&6; } +if test $gcc_cv_as_loongarch_relax = yes; then + +$as_echo "#define HAVE_AS_MRELAX_OPTION 1" >>confdefs.h + +fi + ;; s390*-*-*) { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for .gnu_attribute support" >&5 diff --git a/gcc/configure.ac b/gcc/configure.ac index d369c4717b2..e08ac5f4b49 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -5336,6 +5336,10 @@ x: .dtprelword x+0x8000],, [AC_DEFINE(HAVE_AS_DTPRELWORD, 1, [Define if your assembler supports .dtprelword.])]) + gcc_GAS_CHECK_FEATURE([-mrelax option], gcc_cv_as_loongarch_relax, + [-mrelax], [.text],, + [AC_DEFINE(HAVE_AS_MRELAX_OPTION, 1, + [Define if your assembler supports -mrelax option.])]) ;; s390*-*-*) gcc_GAS_CHECK_FEATURE([.gnu_attribute support], From patchwork Wed Feb 21 03:10:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lulu Cheng X-Patchwork-Id: 1901814 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TfhCL5DJCz20Qg for ; Wed, 21 Feb 2024 14:12:14 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 7375D3858410 for ; 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c=relaxed/simple; bh=HnqPv7SDvjx9MTTdAypZryGQFa18Aw3L2T2YZzta04Q=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=n65HJ4IXy328FfAGIf7Azz1OMylKuJFkz5aZfoaZhlyJaD4DWh2mMkWjoRsiMEFiYGVleVzXwtveqHI8eOZjOCagKOSSZ+yeXTSr3t1OJdhy3q6/tyRJeVTOTBwi6fqwDjcO8cnvngbKedAVr9AJX9pl8X3WyiGoWi9/jAaGNP8= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rcd1M-0000vM-4W for gcc-patches@gcc.gnu.org; Tue, 20 Feb 2024 22:11:46 -0500 Received: from loongson.cn (unknown [10.20.4.107]) by gateway (Coremail) with SMTP id _____8BxSOjsadVl_KcPAA--.21396S3; Wed, 21 Feb 2024 11:11:40 +0800 (CST) Received: from loongson-pc.loongson.cn (unknown [10.20.4.107]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cxbs3LadVlN209AA--.25488S5; Wed, 21 Feb 2024 11:11:38 +0800 (CST) From: Lulu Cheng To: gcc-patches@gcc.gnu.org Cc: xry111@xry111.site, i@xen0n.name, xuchenghua@loongson.cn, chenglulu@loongson.cn Subject: [PATCH v1 3/4] LoongArch: Disable relaxation if the assembler don't support conditional branch relaxation [PR112330] Date: Wed, 21 Feb 2024 11:10:49 +0800 Message-Id: <20240221031050.24343-4-chenglulu@loongson.cn> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20240221031050.24343-1-chenglulu@loongson.cn> References: <20240221031050.24343-1-chenglulu@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cxbs3LadVlN209AA--.25488S5 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj93XoW3ury5ZFykKw13Gw4kWryxXrc_yoWDtw1Dpa 47urnxtF48Grn3Gw1Dt34fWwnxA3Z2gr12va1aqr18Ca15Xr10vF40yFnxXFn7Ww4rWry2 qrnYka17uF1DA3XCm3ZEXasCq-sJn29KB7ZKAUJUUUU3529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUB2b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVWxJVW8Jr1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6r4UJVWxJr1ln4kS14v26r126r1DM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12 xvs2x26I8E6xACxx1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26rWY 6Fy7McIj6I8E87Iv67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64 vIr41lc7CjxVAaw2AFwI0_JF0_Jw1l42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_ Jr0_Gr1l4IxYO2xFxVAFwI0_Jw0_GFylx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8Gjc xK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0xvE2Ix0 cI8IcVAFwI0_Xr0_Ar1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK8V AvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I0E 14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxUsoUDDUUUU Received-SPF: pass client-ip=114.242.206.163; envelope-from=chenglulu@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_FAIL, SPF_HELO_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org From: Xi Ruoyao As the commit message of r14-4674 has indicated, if the assembler does not support conditional branch relaxation, a relocation overflow may happen on conditional branches when relaxation is enabled because the number of NOP instructions inserted by the assembler will be more than the number estimated by GCC. To work around this issue, disable relaxation by default if the assembler is detected incapable to perform conditional branch relaxation at GCC build time. We also need to pass -mno-relax to the assembler to really disable relaxation. But, if the assembler does not support -mrelax option at all, we should not pass -mno-relax to the assembler or it will immediately error out. Also handle this with the build time assembler capability probing, and add a pair of options -m[no-]pass-mrelax-to-as to allow using a different assembler from the build-time one. With this change, if GCC is built with GAS 2.41, relaxation will be disabled by default. So the default value of -mexplicit-relocs= is also changed to 'always' if -mno-relax is specified or implied by the build-time default, because using assembler macros for symbol addresses produces no benefit when relaxation is disabled. gcc/ChangeLog: PR target/112330 * config/loongarch/genopts/loongarch.opt.in: Add -m[no]-pass-relax-to-as. Change the default of -m[no]-relax to account conditional branch relaxation support status. * config/loongarch/loongarch.opt: Regenerate. * configure.ac (gcc_cv_as_loongarch_cond_branch_relax): Check if the assembler supports conditional branch relaxation. * configure: Regenerate. * config.in: Regenerate. Note that there are some unrelated changes introduced by r14-5424 (which does not contain a config.in regeneration). * config/loongarch/loongarch-opts.h (HAVE_AS_COND_BRANCH_RELAXATION): Define to 0 if not defined. * config/loongarch/loongarch-driver.h (ASM_MRELAX_DEFAULT): Define. (ASM_MRELAX_SPEC): Define. (ASM_SPEC): Use ASM_MRELAX_SPEC instead of "%{mno-relax}". * config/loongarch/loongarch.cc: Take the setting of -m[no-]relax into account when determining the default of -mexplicit-relocs=. * doc/invoke.texi: Document -m[no-]relax and -m[no-]pass-mrelax-to-as for LoongArch. Update the default value of -mexplicit-relocs=. (cherry picked from commit fe23a2ff1f5072559552be0e41ab55bf72f5c79f) --- gcc/config.in | 6 ++++ gcc/config/loongarch/genopts/loongarch.opt.in | 6 +++- gcc/config/loongarch/loongarch-opts.h | 4 +++ gcc/config/loongarch/loongarch.h | 17 ++++++++- gcc/config/loongarch/loongarch.opt | 6 +++- gcc/configure | 35 +++++++++++++++++++ gcc/configure.ac | 10 ++++++ gcc/doc/invoke.texi | 24 ++++++++++++- 8 files changed, 104 insertions(+), 4 deletions(-) diff --git a/gcc/config.in b/gcc/config.in index f5b6287a96a..f3bdcb4cdda 100644 --- a/gcc/config.in +++ b/gcc/config.in @@ -367,6 +367,12 @@ #endif +/* Define if your assembler supports conditional branch relaxation. */ +#ifndef USED_FOR_TARGET +#undef HAVE_AS_COND_BRANCH_RELAXATION +#endif + + /* Define if your assembler supports the --debug-prefix-map option. */ #ifndef USED_FOR_TARGET #undef HAVE_AS_DEBUG_PREFIX_MAP diff --git a/gcc/config/loongarch/genopts/loongarch.opt.in b/gcc/config/loongarch/genopts/loongarch.opt.in index edc2ed045d7..420a3941b3b 100644 --- a/gcc/config/loongarch/genopts/loongarch.opt.in +++ b/gcc/config/loongarch/genopts/loongarch.opt.in @@ -179,6 +179,10 @@ Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Specify the code model. mrelax -Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION) +Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION) Take advantage of linker relaxations to reduce the number of instructions required to materialize symbol addresses. + +mpass-mrelax-to-as +Target Var(loongarch_pass_mrelax_to_as) Init(HAVE_AS_MRELAX_OPTION) +Pass -mrelax or -mno-relax option to the assembler. diff --git a/gcc/config/loongarch/loongarch-opts.h b/gcc/config/loongarch/loongarch-opts.h index 60e682f57a0..bdf79ecc193 100644 --- a/gcc/config/loongarch/loongarch-opts.h +++ b/gcc/config/loongarch/loongarch-opts.h @@ -91,4 +91,8 @@ loongarch_config_target (struct loongarch_target *target, #define HAVE_AS_MRELAX_OPTION 0 #endif +#ifndef HAVE_AS_COND_BRANCH_RELAXATION +#define HAVE_AS_COND_BRANCH_RELAXATION 0 +#endif + #endif /* LOONGARCH_OPTS_H */ diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h index 8d08b84c8eb..28ab87eb660 100644 --- a/gcc/config/loongarch/loongarch.h +++ b/gcc/config/loongarch/loongarch.h @@ -69,8 +69,23 @@ along with GCC; see the file COPYING3. If not see #define SUBTARGET_ASM_SPEC "" #endif +#if HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION +#define ASM_MRELAX_DEFAULT "%{!mrelax:%{!mno-relax:-mrelax}}" +#else +#define ASM_MRELAX_DEFAULT "%{!mrelax:%{!mno-relax:-mno-relax}}" +#endif + +#if HAVE_AS_MRELAX_OPTION +#define ASM_MRELAX_SPEC \ + "%{!mno-pass-mrelax-to-as:%{mrelax} %{mno-relax} " ASM_MRELAX_DEFAULT "}" +#else +#define ASM_MRELAX_SPEC \ + "%{mpass-mrelax-to-as:%{mrelax} %{mno-relax} " ASM_MRELAX_DEFAULT "}" +#endif + #undef ASM_SPEC -#define ASM_SPEC "%{mabi=*} %{subtarget_asm_spec}" +#define ASM_SPEC \ + "%{mabi=*} " ASM_MRELAX_SPEC " %(subtarget_asm_spec)" /* Extra switches sometimes passed to the linker. */ diff --git a/gcc/config/loongarch/loongarch.opt b/gcc/config/loongarch/loongarch.opt index 78b5e0cc452..3a39dcbd92e 100644 --- a/gcc/config/loongarch/loongarch.opt +++ b/gcc/config/loongarch/loongarch.opt @@ -186,6 +186,10 @@ Target RejectNegative Joined Enum(cmodel) Var(la_opt_cmodel) Init(CMODEL_NORMAL) Specify the code model. mrelax -Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION) +Target Var(loongarch_mrelax) Init(HAVE_AS_MRELAX_OPTION && HAVE_AS_COND_BRANCH_RELAXATION) Take advantage of linker relaxations to reduce the number of instructions required to materialize symbol addresses. + +mpass-mrelax-to-as +Target Var(loongarch_pass_mrelax_to_as) Init(HAVE_AS_MRELAX_OPTION) +Pass -mrelax or -mno-relax option to the assembler. diff --git a/gcc/configure b/gcc/configure index 67cdd92a4f3..ac904c88f9f 100755 --- a/gcc/configure +++ b/gcc/configure @@ -28900,6 +28900,41 @@ if test $gcc_cv_as_loongarch_relax = yes; then $as_echo "#define HAVE_AS_MRELAX_OPTION 1" >>confdefs.h +fi + + { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for conditional branch relaxation support" >&5 +$as_echo_n "checking assembler for conditional branch relaxation support... " >&6; } +if ${gcc_cv_as_loongarch_cond_branch_relax+:} false; then : + $as_echo_n "(cached) " >&6 +else + gcc_cv_as_loongarch_cond_branch_relax=no + if test x$gcc_cv_as != x; then + $as_echo 'a: + .rept 32769 + nop + .endr + beq $a0,$a1,a' > conftest.s + if { ac_try='$gcc_cv_as $gcc_cv_as_flags --fatal-warnings -o conftest.o conftest.s >&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 + ac_status=$? + $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 + test $ac_status = 0; }; } + then + gcc_cv_as_loongarch_cond_branch_relax=yes + else + echo "configure: failed program was" >&5 + cat conftest.s >&5 + fi + rm -f conftest.o conftest.s + fi +fi +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_loongarch_cond_branch_relax" >&5 +$as_echo "$gcc_cv_as_loongarch_cond_branch_relax" >&6; } +if test $gcc_cv_as_loongarch_cond_branch_relax = yes; then + +$as_echo "#define HAVE_AS_COND_BRANCH_RELAXATION 1" >>confdefs.h + fi ;; diff --git a/gcc/configure.ac b/gcc/configure.ac index e08ac5f4b49..87ae2d88e79 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -5340,6 +5340,16 @@ x: [-mrelax], [.text],, [AC_DEFINE(HAVE_AS_MRELAX_OPTION, 1, [Define if your assembler supports -mrelax option.])]) + gcc_GAS_CHECK_FEATURE([conditional branch relaxation support], + gcc_cv_as_loongarch_cond_branch_relax, + [--fatal-warnings], + [a: + .rept 32769 + nop + .endr + beq $a0,$a1,a],, + [AC_DEFINE(HAVE_AS_COND_BRANCH_RELAXATION, 1, + [Define if your assembler supports conditional branch relaxation.])]) ;; s390*-*-*) gcc_GAS_CHECK_FEATURE([.gnu_attribute support], diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index f4fdd8e6509..8f5c7abea64 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1004,7 +1004,7 @@ Objective-C and Objective-C++ Dialects}. -mcond-move-float -mno-cond-move-float @gol -memcpy -mno-memcpy -mstrict-align -mno-strict-align @gol -mmax-inline-memcpy-size=@var{n} @gol --mcmodel=@var{code-model}} +-mcmodel=@var{code-model} -mrelax -mpass-mrelax-to-as} @emph{M32R/D Options} @gccoptlist{-m32r2 -m32rx -m32r @gol @@ -24626,6 +24626,28 @@ global symbol: The data got table must be within +/-8EiB addressing space. @end itemize @end table The default code model is @code{normal}. + +@item -mrelax +@itemx -mno-relax +Take (do not take) advantage of linker relaxations. If +@option{-mpass-mrelax-to-as} is enabled, this option is also passed to +the assembler. The default is determined during GCC build-time by +detecting corresponding assembler support: +@option{-mrelax} if the assembler supports both the @option{-mrelax} +option and the conditional branch relaxation (it's required or the +@code{.align} directives and conditional branch instructions in the +assembly code outputted by GCC may be rejected by the assembler because +of a relocation overflow), @option{-mno-relax} otherwise. + +@item -mpass-mrelax-to-as +@itemx -mno-pass-mrelax-to-as +Pass (do not pass) the @option{-mrelax} or @option{-mno-relax} option +to the assembler. The default is determined during GCC build-time by +detecting corresponding assembler support: +@option{-mpass-mrelax-to-as} if the assembler supports the +@option{-mrelax} option, @option{-mno-pass-mrelax-to-as} otherwise. +This option is mostly useful for debugging, or interoperation with +assemblers different from the build-time one. @end table @node M32C Options From patchwork Wed Feb 21 03:10:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lulu Cheng X-Patchwork-Id: 1901815 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TfhDd0bg6z20Qg for ; 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envelope-from=chenglulu@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_FAIL, SPF_HELO_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org From: Xi Ruoyao Now loongarch.md uses HAVE_AS_TLS, we need this to fix the failure building a cross compiler if the cross assembler is not installed yet. gcc/ChangeLog: PR target/112299 * config/loongarch/loongarch-opts.h (HAVE_AS_TLS): Define to 0 if not defined yet. (cherry picked from commit 6bf2cebe2bf49919c78814cb447d3aa6e3550d89) --- gcc/config/loongarch/loongarch-opts.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/gcc/config/loongarch/loongarch-opts.h b/gcc/config/loongarch/loongarch-opts.h index bdf79ecc193..b4115dd7f85 100644 --- a/gcc/config/loongarch/loongarch-opts.h +++ b/gcc/config/loongarch/loongarch-opts.h @@ -95,4 +95,8 @@ loongarch_config_target (struct loongarch_target *target, #define HAVE_AS_COND_BRANCH_RELAXATION 0 #endif +#ifndef HAVE_AS_TLS +#define HAVE_AS_TLS 0 +#endif + #endif /* LOONGARCH_OPTS_H */