From patchwork Tue Feb 20 03:08:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Wang X-Patchwork-Id: 1901180 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=mkJEJe9f; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:45d1:ec00::1; helo=ny.mirrors.kernel.org; envelope-from=devicetree+bounces-43659-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org [IPv6:2604:1380:45d1:ec00::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Tf4B06xq4z23cb for ; Tue, 20 Feb 2024 14:08:56 +1100 (AEDT) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 96AB91C210E2 for ; Tue, 20 Feb 2024 03:08:54 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DFD5242A8C; Tue, 20 Feb 2024 03:08:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="mkJEJe9f" X-Original-To: devicetree@vger.kernel.org Received: from mail-ot1-f44.google.com (mail-ot1-f44.google.com [209.85.210.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D43623D7; Tue, 20 Feb 2024 03:08:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708398529; cv=none; b=EPP8o2ShTU31GeY3L9WEvmGJ/PzcP1F7CYrV8i01w2wsNdk4qv2jn8r/Go8uS4ywOaM49ffHmWkmd1Emdcv4O936KOiKKFuLJAxz0QefgMhmPfYdJdeyJTrA+SndVNQuz+o4P0K1R/DJVIL2T0fTCNKQ2fqhrLmDaym2C1bI7kk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708398529; c=relaxed/simple; bh=1z2DjnnEUQ8VRVOOj7bX9GFcbA+wqEyxADFf3p99mzE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=alOyfEjU++D1C0KCHgOLHCIuAzFpx4tiNad2L+YXxDteuCW3vrY05kJBYtzPdTzRnX4o5zwICXBiN5Ww9d8ngYZ6RCgrBMW5LwQqrry64ddPUwSRhR3jTOVbJZiJ9Bvt5xTwoNm4vjZ2QlA5tlCQPTVzyrdyFtICadSteQvJcUc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=mkJEJe9f; arc=none smtp.client-ip=209.85.210.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-ot1-f44.google.com with SMTP id 46e09a7af769-6e45ef83c54so114147a34.2; Mon, 19 Feb 2024 19:08:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1708398526; x=1709003326; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FvyDKytI3LByIiwfwmYUFkoNWJX9ByqcE9gyEaLOuuM=; b=mkJEJe9fL5O/Yc3zMUSP4IINK3hASRqhutLWANw887Zpzs9+gVXCAxil/pLk+ShbGY mLfviV6/wvnDr5LkD0qJGEIuwD3GK+DGh5Kok01EsNnX8hdLP8CKxdUu2e2YK0tr2rfL Y87/9QQLIDjONMD+/Lx7VfC11H1LinAlYfryOOnYdqroqQVKtJJrp9jZLCrEYxKRlcSD iqOXvGZ3GU7MKEs8rIZDAHe94r0Uh80A6jPPj/2pvrt7q/VPx9if3xlWwwXcyXpWhvSa VtP2GbcRSonw3o+Iu2sIO80df5T4VKdYdeNwJPjv0yViNDvv8WCgAP5+jL8LJVey3cRp qiOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708398526; x=1709003326; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FvyDKytI3LByIiwfwmYUFkoNWJX9ByqcE9gyEaLOuuM=; b=Pg9HUcBZm48svtfUksE1k6ewWZluScVlfcD71ph2TMa9Lv137QUYt2mqv6u8gQ2k/v iZaoJcIwS705l5IP9U6XPZTmVtzaOrHUBYvztPKDVImW6eVE4jd/5qvS+qdYA92d6lFl wffWzZbnkSrng4FCaM75oBbKxXhSD2Dk1n9OvKoZDYwKuZ5QvUBwx0DZaOgtcto6zxyp OHUFjU7udkUUYznQJGrNucwioYaT/ANOT/c4WmELqy0RDOdOy8w5KHI3pEzT08vKzAki t7Y5KYflYcMhyPukPG1TU5qujGVnpaWXj+a5F7mlliplQudg2p7yIqN2w3+VkPZgeGw4 ogrg== X-Forwarded-Encrypted: i=1; AJvYcCWyA7EPJUB4Oiv+Q+KufE6bo9GF/q52gwj8qwNPwlSXKZrVljn+9OPnL3ntungpqK6To2kLpcCOFFevHUpSzGP+OO80UPnQr4g9i8bDW8lBOKC4voV7FYDUR735ELPDl8aNx7etMjqwBJ+RTBJyy/cYUEogzGO6XsD+kcM0r64+E9g78Q== X-Gm-Message-State: AOJu0Yz8toPWtiZ5ECB4supVCmQ1JU1XKDVjJwH03HhF+OfnkSS6UroD VMZIAITq9O7bkez3NhPKC+rr6sk9pciTUzamV1KFLR3I4n1kG60OZuS4x2E2hRU= X-Google-Smtp-Source: AGHT+IHZPHDxduRznjnFT9HJ9VF/En0gTBhG8lGkybmmExK+w12IUjEuvgusnbsbKQfOQT1nK12MVQ== X-Received: by 2002:a9d:66c9:0:b0:6e2:f24d:697c with SMTP id t9-20020a9d66c9000000b006e2f24d697cmr16288749otm.11.1708398526492; Mon, 19 Feb 2024 19:08:46 -0800 (PST) Received: from localhost.localdomain ([122.8.183.87]) by smtp.gmail.com with ESMTPSA id dq20-20020a0568300ed400b006e2e8cb4da6sm1160483otb.16.2024.02.19.19.08.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Feb 2024 19:08:46 -0800 (PST) From: Chen Wang To: aou@eecs.berkeley.edu, chao.wei@sophgo.com, conor@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, palmer@dabbelt.com, paul.walmsley@sifive.com, richardcochran@gmail.com, robh+dt@kernel.org, sboyd@kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, haijiao.liu@sophgo.com, xiaoguang.xing@sophgo.com, guoren@kernel.org, jszhang@kernel.org, inochiama@outlook.com, samuel.holland@sifive.com Cc: Chen Wang , Rob Herring Subject: [PATCH v11 1/5] dt-bindings: clock: sophgo: add pll clocks for SG2042 Date: Tue, 20 Feb 2024 11:08:39 +0800 Message-Id: <92448a1ca9ad8f713dbdbf3453f1a5db0ca47d9b.1708397315.git.unicorn_wang@outlook.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Chen Wang Add bindings for the pll clocks for Sophgo SG2042. Signed-off-by: Chen Wang Reviewed-by: Rob Herring Reviewed-by: Guo Ren --- .../bindings/clock/sophgo,sg2042-pll.yaml | 45 +++++++++++++++++++ include/dt-bindings/clock/sophgo,sg2042-pll.h | 14 ++++++ 2 files changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/sophgo,sg2042-pll.yaml create mode 100644 include/dt-bindings/clock/sophgo,sg2042-pll.h diff --git a/Documentation/devicetree/bindings/clock/sophgo,sg2042-pll.yaml b/Documentation/devicetree/bindings/clock/sophgo,sg2042-pll.yaml new file mode 100644 index 000000000000..b9af733e8a73 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/sophgo,sg2042-pll.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/sophgo,sg2042-pll.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SG2042 PLL Clock Generator + +maintainers: + - Chen Wang + +properties: + compatible: + const: sophgo,sg2042-pll + + reg: + maxItems: 1 + + clocks: + items: + - description: Oscillator(Clock Generation IC) for Main/Fixed PLL (25 MHz) + - description: Oscillator(Clock Generation IC) for DDR PLL 0 (25 MHz) + - description: Oscillator(Clock Generation IC) for DDR PLL 1 (25 MHz) + + '#clock-cells': + const: 1 + description: + See for valid indices. + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + - | + clock-controller@10000000 { + compatible = "sophgo,sg2042-pll"; + reg = <0x10000000 0x10000>; + clocks = <&cgi_main>, <&cgi_dpll0>, <&cgi_dpll1>; + #clock-cells = <1>; + }; diff --git a/include/dt-bindings/clock/sophgo,sg2042-pll.h b/include/dt-bindings/clock/sophgo,sg2042-pll.h new file mode 100644 index 000000000000..2d519b3bf51c --- /dev/null +++ b/include/dt-bindings/clock/sophgo,sg2042-pll.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ +/* + * Copyright (C) 2023 Sophgo Technology Inc. All rights reserved. + */ + +#ifndef __DT_BINDINGS_SOPHGO_SG2042_PLL_H__ +#define __DT_BINDINGS_SOPHGO_SG2042_PLL_H__ + +#define MPLL_CLK 0 +#define FPLL_CLK 1 +#define DPLL0_CLK 2 +#define DPLL1_CLK 3 + +#endif /* __DT_BINDINGS_SOPHGO_SG2042_PLL_H__ */ From patchwork Tue Feb 20 03:08:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Wang X-Patchwork-Id: 1901181 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=edAMSc4Y; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:4601:e00::3; helo=am.mirrors.kernel.org; envelope-from=devicetree+bounces-43660-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from am.mirrors.kernel.org (am.mirrors.kernel.org [IPv6:2604:1380:4601:e00::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Tf4BQ06Zzz23cb for ; Tue, 20 Feb 2024 14:09:18 +1100 (AEDT) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id C11B01F245F3 for ; Tue, 20 Feb 2024 03:09:15 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 16ABF41C66; Tue, 20 Feb 2024 03:09:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="edAMSc4Y" X-Original-To: devicetree@vger.kernel.org Received: from mail-oa1-f47.google.com (mail-oa1-f47.google.com [209.85.160.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3A94B3EA64; Tue, 20 Feb 2024 03:09:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.160.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708398549; cv=none; b=O3WgTdc5czApTsGryWhO9YJfzMd+kw43pTVUPt0yTkgrN341HpkIp1GSPH7k//bmOpevsL1BBAj4g8OjLipyo58I6jEBBNqSB/J/VPhhFuoT5hQiQ/hqgryvfA9QoYIshZCBkiHXXjNQxs3DSdbtPhxos2vSkmmbIJJq+yia5kI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708398549; c=relaxed/simple; bh=jF9yyA2sxGXqIZo+yklQ1iTLf7X16ewH9pEH6J9E1xk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Kg53pgwGMS+1bXcPvPrLv170ZSCqZYNC9xYcZKrYMernch4ZF61del7COq0UjUHvJT7bjoyabT5lP9peDqjbZyZwF+vuxANu+RAVQucgmN9n4rrb+k0p5aSlHDWeqOVXYEGk+2I+uz353H8jthpJWPM+EqB+3hP6VrMcKakLX4w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=edAMSc4Y; arc=none smtp.client-ip=209.85.160.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-oa1-f47.google.com with SMTP id 586e51a60fabf-21e9589d4ffso1042837fac.1; Mon, 19 Feb 2024 19:09:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1708398547; x=1709003347; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RkgZ0brSHMcJ6vLWoNuANGTzYAm5g8JP8scMBBfVgfg=; b=edAMSc4YP7DfkMSd3Edevtm8s10nBlfRQn/o+A/qHdUDtR7IzUi9tnSzLrpo7/2cnp ZX+R7LAfOQQ8p6apqgeftDc9Aq5rPBVgehsCBMOl61tdWFuwDGSUAO1XFvEVAWK6gUcR hofq3iXtRP9y7EUapPIdO9gnmFGqGdRwLEnizvWC4g8syhWtJSZFJ8WBgXsB8IRQ+YBu sf0oxY4DEW3Du4udghhCURUWgT2Xdm2yccxKnw6TzRxuAc6fjyecVu6lKyfBNzXeOB6t z/f8nEpJ0PKMwD/AfQmUcNAph+JBItheCgK19MoET2Xa81nT3BokPUxKdx3CcYZBN2F+ bLWw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708398547; x=1709003347; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RkgZ0brSHMcJ6vLWoNuANGTzYAm5g8JP8scMBBfVgfg=; b=D+iyoHIMigtsuR6DJ4uimSKp3O6zVtAriFR/MhvrLZ3HpGspIzexLc/QJS9Pj8OlgJ gBgJJpb6vft7/7y8G5xb0j8P4cxj2HAO9SUiBzFH+ip75Pf8RbNWGQlsXVhKLgPoUPol h1Fy2fs0h846HidX0ax0TLAkyk1PbLnZ6q4bmHzJOkocXiINsDg82BGDb8WKympxiu8+ UXvQrOhYu0RyEudCK5CzO+uy3lQ3/TxN/LpAXfiHJeesy2PiGUi8QfZtTxNE7oMJUwET H2TfwQkko00+SqOvWillCCvCtDF7iXWsIXD7ndbfYZUx063FVacsn1YH33DYEdYmeNQG eg8w== X-Forwarded-Encrypted: i=1; AJvYcCXgE2ID/efujdYehl89Yvpj4tCYskqtnu+JEEpP3b6e+zRIuxljVOdqQV8e52nKx8GQ+bFyMGLHAEnTSwGOIbDOxa05lwHrKy09hRNAgzqwtUA+nT9v+TL1E8H+lhY8mcIzHMgY+p6ulWPEURyxFoo8/bwJNxlh1eFa2lwyomADjNG1Dg== X-Gm-Message-State: AOJu0YysTCqI20GlRYJGvssrTbftTHVfapNM710miytyPYUXJGHa57Vw O3iKHDkfgyY5O0UP1hjYLBHuOpFCUUK72IVZw4nlSyoChOcCAldi X-Google-Smtp-Source: AGHT+IF/5/Qao1ubBVUJqn7zPUt32ZBx86tloI6CxK0c4cOMuM6NlgnTRnOp4KPXJ4JSjWe/pvWQOA== X-Received: by 2002:a05:6870:1656:b0:21e:5fe2:2143 with SMTP id c22-20020a056870165600b0021e5fe22143mr9914011oae.58.1708398547247; Mon, 19 Feb 2024 19:09:07 -0800 (PST) Received: from localhost.localdomain ([122.8.183.87]) by smtp.gmail.com with ESMTPSA id pf7-20020a0568717b0700b0021eb31be7b6sm1149713oac.14.2024.02.19.19.09.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Feb 2024 19:09:07 -0800 (PST) From: Chen Wang To: aou@eecs.berkeley.edu, chao.wei@sophgo.com, conor@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, palmer@dabbelt.com, paul.walmsley@sifive.com, richardcochran@gmail.com, robh+dt@kernel.org, sboyd@kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, haijiao.liu@sophgo.com, xiaoguang.xing@sophgo.com, guoren@kernel.org, jszhang@kernel.org, inochiama@outlook.com, samuel.holland@sifive.com Cc: Chen Wang Subject: [PATCH v11 2/5] dt-bindings: clock: sophgo: add RP gate clocks for SG2042 Date: Tue, 20 Feb 2024 11:08:59 +0800 Message-Id: <49faf8ff209673e27338d4b83948ade86b3c66e4.1708397315.git.unicorn_wang@outlook.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Chen Wang Add bindings for the gate clocks of RP subsystem for Sophgo SG2042. Signed-off-by: Chen Wang Reviewed-by: Rob Herring --- .../bindings/clock/sophgo,sg2042-rpgate.yaml | 43 ++++++++++++++ .../dt-bindings/clock/sophgo,sg2042-rpgate.h | 58 +++++++++++++++++++ 2 files changed, 101 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/sophgo,sg2042-rpgate.yaml create mode 100644 include/dt-bindings/clock/sophgo,sg2042-rpgate.h diff --git a/Documentation/devicetree/bindings/clock/sophgo,sg2042-rpgate.yaml b/Documentation/devicetree/bindings/clock/sophgo,sg2042-rpgate.yaml new file mode 100644 index 000000000000..9d4b55e2b12f --- /dev/null +++ b/Documentation/devicetree/bindings/clock/sophgo,sg2042-rpgate.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/sophgo,sg2042-rpgate.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SG2042 Gate Clock Generator for RP(riscv processors) subsystem + +maintainers: + - Chen Wang + +properties: + compatible: + const: sophgo,sg2042-rpgate + + reg: + maxItems: 1 + + clocks: + items: + - description: Gate clock for RP subsystem + + '#clock-cells': + const: 1 + description: + See for valid indices. + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + - | + clock-controller@10000000 { + compatible = "sophgo,sg2042-rpgate"; + reg = <0x10000000 0x10000>; + clocks = <&clkgen 85>; + #clock-cells = <1>; + }; diff --git a/include/dt-bindings/clock/sophgo,sg2042-rpgate.h b/include/dt-bindings/clock/sophgo,sg2042-rpgate.h new file mode 100644 index 000000000000..8b4522d5f559 --- /dev/null +++ b/include/dt-bindings/clock/sophgo,sg2042-rpgate.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ +/* + * Copyright (C) 2023 Sophgo Technology Inc. All rights reserved. + */ + +#ifndef __DT_BINDINGS_SOPHGO_SG2042_RPGATE_H__ +#define __DT_BINDINGS_SOPHGO_SG2042_RPGATE_H__ + +#define GATE_CLK_RXU0 0 +#define GATE_CLK_RXU1 1 +#define GATE_CLK_RXU2 2 +#define GATE_CLK_RXU3 3 +#define GATE_CLK_RXU4 4 +#define GATE_CLK_RXU5 5 +#define GATE_CLK_RXU6 6 +#define GATE_CLK_RXU7 7 +#define GATE_CLK_RXU8 8 +#define GATE_CLK_RXU9 9 +#define GATE_CLK_RXU10 10 +#define GATE_CLK_RXU11 11 +#define GATE_CLK_RXU12 12 +#define GATE_CLK_RXU13 13 +#define GATE_CLK_RXU14 14 +#define GATE_CLK_RXU15 15 +#define GATE_CLK_RXU16 16 +#define GATE_CLK_RXU17 17 +#define GATE_CLK_RXU18 18 +#define GATE_CLK_RXU19 19 +#define GATE_CLK_RXU20 20 +#define GATE_CLK_RXU21 21 +#define GATE_CLK_RXU22 22 +#define GATE_CLK_RXU23 23 +#define GATE_CLK_RXU24 24 +#define GATE_CLK_RXU25 25 +#define GATE_CLK_RXU26 26 +#define GATE_CLK_RXU27 27 +#define GATE_CLK_RXU28 28 +#define GATE_CLK_RXU29 29 +#define GATE_CLK_RXU30 30 +#define GATE_CLK_RXU31 31 +#define GATE_CLK_MP0 32 +#define GATE_CLK_MP1 33 +#define GATE_CLK_MP2 34 +#define GATE_CLK_MP3 35 +#define GATE_CLK_MP4 36 +#define GATE_CLK_MP5 37 +#define GATE_CLK_MP6 38 +#define GATE_CLK_MP7 39 +#define GATE_CLK_MP8 40 +#define GATE_CLK_MP9 41 +#define GATE_CLK_MP10 42 +#define GATE_CLK_MP11 43 +#define GATE_CLK_MP12 44 +#define GATE_CLK_MP13 45 +#define GATE_CLK_MP14 46 +#define GATE_CLK_MP15 47 + +#endif /* __DT_BINDINGS_SOPHGO_SG2042_RPGATE_H__ */ From patchwork Tue Feb 20 03:09:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Wang X-Patchwork-Id: 1901182 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=R1+JtcFv; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2604:1380:45d1:ec00::1; helo=ny.mirrors.kernel.org; envelope-from=devicetree+bounces-43661-incoming-dt=patchwork.ozlabs.org@vger.kernel.org; receiver=patchwork.ozlabs.org) Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org [IPv6:2604:1380:45d1:ec00::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Tf4Bx51vBz23cb for ; Tue, 20 Feb 2024 14:09:45 +1100 (AEDT) Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 5F2791C21F32 for ; Tue, 20 Feb 2024 03:09:43 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 39D4B482FC; Tue, 20 Feb 2024 03:09:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="R1+JtcFv" X-Original-To: devicetree@vger.kernel.org Received: from mail-oa1-f41.google.com (mail-oa1-f41.google.com [209.85.160.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F1EB53368; Tue, 20 Feb 2024 03:09:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.160.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708398567; cv=none; b=rdYQUEfDcXoKuHdAfAh/R7Rke1xFiugq9zzR6r09Iwo9THhiAltg/wGHhk2zJxF2kgfiMXVGjcH6xLqfClarQ8ApskpV7hgvDwZtg6TMFGQ3ugl+eklv1qQoFDO4kCil133NrLTz46Zwnw8Ik8F2ma6cu1zukiN3dlAOHN4CEZ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708398567; c=relaxed/simple; bh=PBw2itTAtKyfRh4CMnHbW9CagQfymiDEoWMz3owEgO0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=AMBipyEYT2w6MwBHMm5mQpasMrj2Qjc7Y7e5zp72G1tEpULlWMlz6ZXH0Ba8z8HdUf4hkpfc045AeNsagcdi1hewrSTV/29u+3ACJjMV9XscfZudIve4cbT1fZ+7MSvWr9GZudvKfuXebOw9yaH97ecD7xCPXTylG+6IykBBtKw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=R1+JtcFv; arc=none smtp.client-ip=209.85.160.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-oa1-f41.google.com with SMTP id 586e51a60fabf-20503dc09adso3237523fac.2; Mon, 19 Feb 2024 19:09:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1708398565; x=1709003365; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CbbStuGHEQUQVFTlFPjjJtb3aZpnoFzyfr/hxOay39o=; b=R1+JtcFvSeWufXTKL3MaJvRFzzXxrH2XwVBM5vvixQFGbMVZe0EHOYmLQKFm+lu42a v6Et8n6ls8sVpJkWEBKNGb7mQDeaBitJEEuIXpQxwtpZp+rV8z7XvB9QUMOYrqXqEZND eSZRyqtvna/78HxOZ7RMxJXaXvUDbLlUcmb00X9MX/yFDGSnDRxY4X2Za+rxJlAPmsG2 2L7zfq1yxK6VsnMo6N5pvc+RE2wsn0BsBopkhCVDfZyCmNyooFLv28XGEROXeqrfaA/N t7Wkh5fYI+T/EDuwfCSka3nydPHVrB1Dw9UZZqgLT7L9uoDpP9CrISesgU5Thjo1qRJP +YIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1708398565; x=1709003365; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CbbStuGHEQUQVFTlFPjjJtb3aZpnoFzyfr/hxOay39o=; b=tGdDU0Ke63dtkIV7L3qq5F4OzEsA3bd6BVcdEt+AU7gTGsT1LhZkfFiNZuJN5uMMRH EAtKAWnBhmitcYqxmh9X6uzVsEknUC9QgO+urT4CTvagI2jsiAU6v4HLuDZJS3EZu58s /ZKKA3D/02Qp/kyJGbLHglw1s9dg9nlrJvt+/Sa2ob9kr0WAx3MZGez469RqiPJFatGM wg5uxjGqN8e1SyYODgO9Ro7agsVsf35YMJsrXoWrFx5X+d2IFpCeNiOFd2wMJGkc9/WW F50zJtMtO9tEi+3sHjABtDWQgGkDlS+0szxFTfDQX/2E+2r873UeN83WhJv7ELAs+Dxk j3Eg== X-Forwarded-Encrypted: i=1; AJvYcCU3shjKgvVB2IIoVdUaGZXjUTQi7NRxtEHqh7q4udVusx7B6vxF08X7GA7/vjDwH/9Qsi1h8AdX1BrknXZJaKuSgmC0ddp3sWMdfeHi30hEfHxc6u/j2cANRPG9uiLI9UGIGNBisF2I+M1CH+ysFsnxJcP78nNB+bybZtxLtkAoanf7MQ== X-Gm-Message-State: AOJu0YxriBrEYwUY6GX/qYwn9NUuzffCibZOcvimorA1sDcxVPslAaAi aPeWKK1AL4gia3o2P/PP0wjVxWN3CzomMb3uCo3S1CJ5zX1pkTGO X-Google-Smtp-Source: AGHT+IHyst5SY8GMfSqnwAm0HK3m2/ezDXV/jUuFrzNbN/6M0ssU9UphcQkhEX5j/6J87oIIXRFFog== X-Received: by 2002:a05:6870:a181:b0:21e:df8b:5280 with SMTP id a1-20020a056870a18100b0021edf8b5280mr4539022oaf.27.1708398565318; Mon, 19 Feb 2024 19:09:25 -0800 (PST) Received: from localhost.localdomain ([122.8.183.87]) by smtp.gmail.com with ESMTPSA id a22-20020a056808129600b003c15d47fbe6sm426961oiw.46.2024.02.19.19.09.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Feb 2024 19:09:25 -0800 (PST) From: Chen Wang To: aou@eecs.berkeley.edu, chao.wei@sophgo.com, conor@kernel.org, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, palmer@dabbelt.com, paul.walmsley@sifive.com, richardcochran@gmail.com, robh+dt@kernel.org, sboyd@kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, haijiao.liu@sophgo.com, xiaoguang.xing@sophgo.com, guoren@kernel.org, jszhang@kernel.org, inochiama@outlook.com, samuel.holland@sifive.com Cc: Chen Wang Subject: [PATCH v11 3/5] dt-bindings: clock: sophgo: add clkgen for SG2042 Date: Tue, 20 Feb 2024 11:09:18 +0800 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Chen Wang Add bindings for the clock generator of divider/mux and gates working for other subsystem than RP subsystem for Sophgo SG2042. Signed-off-by: Chen Wang Reviewed-by: Rob Herring --- .../bindings/clock/sophgo,sg2042-clkgen.yaml | 49 ++++++++ .../dt-bindings/clock/sophgo,sg2042-clkgen.h | 111 ++++++++++++++++++ 2 files changed, 160 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/sophgo,sg2042-clkgen.yaml create mode 100644 include/dt-bindings/clock/sophgo,sg2042-clkgen.h diff --git a/Documentation/devicetree/bindings/clock/sophgo,sg2042-clkgen.yaml b/Documentation/devicetree/bindings/clock/sophgo,sg2042-clkgen.yaml new file mode 100644 index 000000000000..e31dece67215 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/sophgo,sg2042-clkgen.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/sophgo,sg2042-clkgen.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SG2042 Clock Generator for divider/mux/gate + +maintainers: + - Chen Wang + +properties: + compatible: + const: sophgo,sg2042-clkgen + + reg: + maxItems: 1 + + clocks: + items: + - description: Main PLL + - description: Fixed PLL + - description: DDR PLL 0 + - description: DDR PLL 1 + + '#clock-cells': + const: 1 + description: + See for valid indices. + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + - | + clock-controller@30012000 { + compatible = "sophgo,sg2042-clkgen"; + reg = <0x30012000 0x1000>; + clocks = <&pllclk 0>, + <&pllclk 1>, + <&pllclk 2>, + <&pllclk 3>; + #clock-cells = <1>; + }; diff --git a/include/dt-bindings/clock/sophgo,sg2042-clkgen.h b/include/dt-bindings/clock/sophgo,sg2042-clkgen.h new file mode 100644 index 000000000000..84f7857317a2 --- /dev/null +++ b/include/dt-bindings/clock/sophgo,sg2042-clkgen.h @@ -0,0 +1,111 @@ +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ +/* + * Copyright (C) 2023 Sophgo Technology Inc. All rights reserved. + */ + +#ifndef __DT_BINDINGS_SOPHGO_SG2042_CLKGEN_H__ +#define __DT_BINDINGS_SOPHGO_SG2042_CLKGEN_H__ + +#define DIV_CLK_MPLL_RP_CPU_NORMAL_0 0 +#define DIV_CLK_MPLL_AXI_DDR_0 1 +#define DIV_CLK_FPLL_DDR01_1 2 +#define DIV_CLK_FPLL_DDR23_1 3 +#define DIV_CLK_FPLL_RP_CPU_NORMAL_1 4 +#define DIV_CLK_FPLL_50M_A53 5 +#define DIV_CLK_FPLL_TOP_RP_CMN_DIV2 6 +#define DIV_CLK_FPLL_UART_500M 7 +#define DIV_CLK_FPLL_AHB_LPC 8 +#define DIV_CLK_FPLL_EFUSE 9 +#define DIV_CLK_FPLL_TX_ETH0 10 +#define DIV_CLK_FPLL_PTP_REF_I_ETH0 11 +#define DIV_CLK_FPLL_REF_ETH0 12 +#define DIV_CLK_FPLL_EMMC 13 +#define DIV_CLK_FPLL_SD 14 +#define DIV_CLK_FPLL_TOP_AXI0 15 +#define DIV_CLK_FPLL_TOP_AXI_HSPERI 16 +#define DIV_CLK_FPLL_AXI_DDR_1 17 +#define DIV_CLK_FPLL_DIV_TIMER1 18 +#define DIV_CLK_FPLL_DIV_TIMER2 19 +#define DIV_CLK_FPLL_DIV_TIMER3 20 +#define DIV_CLK_FPLL_DIV_TIMER4 21 +#define DIV_CLK_FPLL_DIV_TIMER5 22 +#define DIV_CLK_FPLL_DIV_TIMER6 23 +#define DIV_CLK_FPLL_DIV_TIMER7 24 +#define DIV_CLK_FPLL_DIV_TIMER8 25 +#define DIV_CLK_FPLL_100K_EMMC 26 +#define DIV_CLK_FPLL_100K_SD 27 +#define DIV_CLK_FPLL_GPIO_DB 28 +#define DIV_CLK_DPLL0_DDR01_0 29 +#define DIV_CLK_DPLL1_DDR23_0 30 + +#define GATE_CLK_RP_CPU_NORMAL_DIV0 31 +#define GATE_CLK_AXI_DDR_DIV0 32 + +#define GATE_CLK_RP_CPU_NORMAL_DIV1 33 +#define GATE_CLK_A53_50M 34 +#define GATE_CLK_TOP_RP_CMN_DIV2 35 +#define GATE_CLK_HSDMA 36 +#define GATE_CLK_EMMC_100M 37 +#define GATE_CLK_SD_100M 38 +#define GATE_CLK_TX_ETH0 39 +#define GATE_CLK_PTP_REF_I_ETH0 40 +#define GATE_CLK_REF_ETH0 41 +#define GATE_CLK_UART_500M 42 +#define GATE_CLK_EFUSE 43 + +#define GATE_CLK_AHB_LPC 44 +#define GATE_CLK_AHB_ROM 45 +#define GATE_CLK_AHB_SF 46 + +#define GATE_CLK_APB_UART 47 +#define GATE_CLK_APB_TIMER 48 +#define GATE_CLK_APB_EFUSE 49 +#define GATE_CLK_APB_GPIO 50 +#define GATE_CLK_APB_GPIO_INTR 51 +#define GATE_CLK_APB_SPI 52 +#define GATE_CLK_APB_I2C 53 +#define GATE_CLK_APB_WDT 54 +#define GATE_CLK_APB_PWM 55 +#define GATE_CLK_APB_RTC 56 + +#define GATE_CLK_AXI_PCIE0 57 +#define GATE_CLK_AXI_PCIE1 58 +#define GATE_CLK_SYSDMA_AXI 59 +#define GATE_CLK_AXI_DBG_I2C 60 +#define GATE_CLK_AXI_SRAM 61 +#define GATE_CLK_AXI_ETH0 62 +#define GATE_CLK_AXI_EMMC 63 +#define GATE_CLK_AXI_SD 64 +#define GATE_CLK_TOP_AXI0 65 +#define GATE_CLK_TOP_AXI_HSPERI 66 + +#define GATE_CLK_TIMER1 67 +#define GATE_CLK_TIMER2 68 +#define GATE_CLK_TIMER3 69 +#define GATE_CLK_TIMER4 70 +#define GATE_CLK_TIMER5 71 +#define GATE_CLK_TIMER6 72 +#define GATE_CLK_TIMER7 73 +#define GATE_CLK_TIMER8 74 +#define GATE_CLK_100K_EMMC 75 +#define GATE_CLK_100K_SD 76 +#define GATE_CLK_GPIO_DB 77 + +#define GATE_CLK_AXI_DDR_DIV1 78 +#define GATE_CLK_DDR01_DIV1 79 +#define GATE_CLK_DDR23_DIV1 80 + +#define GATE_CLK_DDR01_DIV0 81 +#define GATE_CLK_DDR23_DIV0 82 + +#define GATE_CLK_DDR01 83 +#define GATE_CLK_DDR23 84 +#define GATE_CLK_RP_CPU_NORMAL 85 +#define GATE_CLK_AXI_DDR 86 + +#define MUX_CLK_DDR01 87 +#define MUX_CLK_DDR23 88 +#define MUX_CLK_RP_CPU_NORMAL 89 +#define MUX_CLK_AXI_DDR 90 + +#endif /* __DT_BINDINGS_SOPHGO_SG2042_CLKGEN_H__ */