From patchwork Mon Jan 15 14:05:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1886687 X-Patchwork-Delegate: patrice.chotard@st.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=foss.st.com header.i=@foss.st.com header.a=rsa-sha256 header.s=selector1 header.b=8HffdZSF; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TDDT20Lhwz1yPJ for ; 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Mon, 15 Jan 2024 15:06:05 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 573B1100057; Mon, 15 Jan 2024 15:06:05 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 5064529865C; Mon, 15 Jan 2024 15:06:05 +0100 (CET) Received: from localhost (10.201.22.165) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Jan 2024 15:06:05 +0100 From: Patrick Delaunay To: CC: Patrick Delaunay , Patrice Chotard , Alexandre Torgue , Simon Glass , Subject: [PATCH v2 01/14] arm64: dts: st: add bsec support to stm32mp25 Date: Mon, 15 Jan 2024 15:05:44 +0100 Message-ID: <20240115150451.v2.1.Iefa175618c8da1cb27702d86b19bdada62a0f01d@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240115140557.57448-1-patrick.delaunay@foss.st.com> References: <20240115140557.57448-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.22.165] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-05_08,2024-01-05_01,2023-05-22_02 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add BSEC support to STM32MP25 SoC family with SoC information: - RPN = Device part number (BSEC_OTP_DATA9) - PKG = package data register (Bits 2:0 of BSEC_OTP_DATA122) Reviewed-by: Patrice Chotard Signed-off-by: Patrick Delaunay Signed-off-by: Alexandre Torgue --- (no changes since v1) arch/arm/dts/stm32mp25-u-boot.dtsi | 4 ++++ arch/arm/dts/stm32mp251.dtsi | 16 ++++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm/dts/stm32mp25-u-boot.dtsi b/arch/arm/dts/stm32mp25-u-boot.dtsi index f4f26add2a41..0c8e95b34163 100644 --- a/arch/arm/dts/stm32mp25-u-boot.dtsi +++ b/arch/arm/dts/stm32mp25-u-boot.dtsi @@ -37,6 +37,10 @@ }; }; +&bsec { + bootph-all; +}; + &gpioa { bootph-all; }; diff --git a/arch/arm/dts/stm32mp251.dtsi b/arch/arm/dts/stm32mp251.dtsi index cf2f28dc1582..44eb664fb510 100644 --- a/arch/arm/dts/stm32mp251.dtsi +++ b/arch/arm/dts/stm32mp251.dtsi @@ -127,6 +127,22 @@ }; }; + bsec: efuse@44000000 { + compatible = "st,stm32mp25-bsec"; + reg = <0x44000000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + part_number_otp@24 { + reg = <0x24 0x4>; + }; + + package_otp@1e8 { + reg = <0x1e8 0x1>; + bits = <0 3>; + }; + }; + syscfg: syscon@44230000 { compatible = "st,stm32mp25-syscfg", "syscon"; reg = <0x44230000 0x10000>; From patchwork Mon Jan 15 14:05:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1886688 X-Patchwork-Delegate: patrice.chotard@st.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Mon, 15 Jan 2024 15:06:07 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 3F0C0100057; Mon, 15 Jan 2024 15:06:06 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 37D4029865B; Mon, 15 Jan 2024 15:06:06 +0100 (CET) Received: from localhost (10.201.22.165) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Jan 2024 15:06:05 +0100 From: Patrick Delaunay To: CC: Yann Gautier , Patrice Chotard , Patrick Delaunay , Tom Rini , U-Boot STM32 Subject: [PATCH v2 02/14] arm: stm32mp: add Rev.B support for STM32MP25 Date: Mon, 15 Jan 2024 15:05:45 +0100 Message-ID: <20240115150451.v2.2.I98f906c5860d42cc6f0c38219ff8391e7f537efb@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240115140557.57448-1-patrick.delaunay@foss.st.com> References: <20240115140557.57448-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.22.165] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-05_08,2024-01-05_01,2023-05-22_02 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Yann Gautier Add chip revision B support for STM32MP25, for displaying it in trace. Reviewed-by: Patrice Chotard Signed-off-by: Yann Gautier Signed-off-by: Patrick Delaunay --- (no changes since v1) arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c b/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c index 4b2f70af9cc6..7f896a0d65d2 100644 --- a/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c +++ b/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c @@ -167,6 +167,9 @@ void get_soc_name(char name[SOC_NAME_SIZE]) case CPU_REV1: cpu_r = "A"; break; + case CPU_REV2: + cpu_r = "B"; + break; default: break; } From patchwork Mon Jan 15 14:05:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1886689 X-Patchwork-Delegate: patrice.chotard@st.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; 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Mon, 15 Jan 2024 15:06:07 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 31AAE29865B; Mon, 15 Jan 2024 15:06:07 +0100 (CET) Received: from localhost (10.201.22.165) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Jan 2024 15:06:06 +0100 From: Patrick Delaunay To: CC: Patrick Delaunay , Patrice Chotard , Simon Glass , U-Boot STM32 Subject: [PATCH v2 03/14] stm32mp: bsec: add driver data Date: Mon, 15 Jan 2024 15:05:46 +0100 Message-ID: <20240115150451.v2.3.I65ac10c33e81b2ade646f185883504c9ab106397@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240115140557.57448-1-patrick.delaunay@foss.st.com> References: <20240115140557.57448-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.22.165] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-05_08,2024-01-05_01,2023-05-22_02 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add driver data in BSEC driver to test presence of OP-TEE TA, mandatory for STM32MP13 family and prepare the support of new device with more OTP than 95. Reviewed-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- (no changes since v1) arch/arm/mach-stm32mp/bsec.c | 38 ++++++++++++++++++++++++++++-------- 1 file changed, 30 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index 28a8280b2804..705c994d9307 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -20,7 +20,6 @@ #include #include -#define BSEC_OTP_MAX_VALUE 95 #define BSEC_OTP_UPPER_START 32 #define BSEC_TIMEOUT_US 10000 @@ -400,6 +399,11 @@ struct stm32mp_bsec_priv { struct udevice *tee; }; +struct stm32mp_bsec_drvdata { + int size; + bool ta; +}; + static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp) { struct stm32mp_bsec_plat *plat; @@ -609,6 +613,7 @@ static int stm32mp_bsec_read(struct udevice *dev, int offset, void *buf, int size) { struct stm32mp_bsec_priv *priv = dev_get_priv(dev); + struct stm32mp_bsec_drvdata *data = (struct stm32mp_bsec_drvdata *)dev_get_driver_data(dev); int ret; int i; bool shadow = true, lock = false; @@ -642,7 +647,7 @@ static int stm32mp_bsec_read(struct udevice *dev, int offset, otp = offs / sizeof(u32); - for (i = otp; i < (otp + nb_otp) && i <= BSEC_OTP_MAX_VALUE; i++) { + for (i = otp; i < (otp + nb_otp) && i < data->size; i++) { u32 *addr = &((u32 *)buf)[i - otp]; if (lock) @@ -665,6 +670,7 @@ static int stm32mp_bsec_write(struct udevice *dev, int offset, const void *buf, int size) { struct stm32mp_bsec_priv *priv = dev_get_priv(dev); + struct stm32mp_bsec_drvdata *data = (struct stm32mp_bsec_drvdata *)dev_get_driver_data(dev); int ret = 0; int i; bool shadow = true, lock = false; @@ -698,7 +704,7 @@ static int stm32mp_bsec_write(struct udevice *dev, int offset, otp = offs / sizeof(u32); - for (i = otp; i < otp + nb_otp && i <= BSEC_OTP_MAX_VALUE; i++) { + for (i = otp; i < otp + nb_otp && i < data->size; i++) { u32 *val = &((u32 *)buf)[i - otp]; if (lock) @@ -732,6 +738,7 @@ static int stm32mp_bsec_of_to_plat(struct udevice *dev) static int stm32mp_bsec_probe(struct udevice *dev) { + struct stm32mp_bsec_drvdata *data = (struct stm32mp_bsec_drvdata *)dev_get_driver_data(dev); int otp; struct stm32mp_bsec_plat *plat; struct clk_bulk clk_bulk; @@ -745,16 +752,22 @@ static int stm32mp_bsec_probe(struct udevice *dev) } if (IS_ENABLED(CONFIG_OPTEE)) - bsec_optee_open(dev); + ret = bsec_optee_open(dev); + else + ret = -ENOTSUPP; + /* failed if OP-TEE TA is required */ + if (data->ta && !ret) + return ret; /* * update unlocked shadow for OTP cleared by the rom code * only executed in SPL, it is done in TF-A for TFABOOT */ - if (IS_ENABLED(CONFIG_SPL_BUILD)) { + if (IS_ENABLED(CONFIG_SPL_BUILD) && !data->ta) { plat = dev_get_plat(dev); - for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++) + /* here 57 is the value for STM32MP15x ROM code, only MPU with SPL support*/ + for (otp = 57; otp < data->size; otp++) if (!bsec_read_SR_lock(plat->base, otp)) bsec_shadow_register(dev, plat->base, otp); } @@ -762,9 +775,18 @@ static int stm32mp_bsec_probe(struct udevice *dev) return 0; } +static const struct stm32mp_bsec_drvdata stm32mp13_data = { + .size = 96, + .ta = true, +}; + +static const struct stm32mp_bsec_drvdata stm32mp15_data = { + .size = 96, + .ta = false, +}; static const struct udevice_id stm32mp_bsec_ids[] = { - { .compatible = "st,stm32mp13-bsec" }, - { .compatible = "st,stm32mp15-bsec" }, + { .compatible = "st,stm32mp13-bsec", .data = (ulong)&stm32mp13_data}, + { .compatible = "st,stm32mp15-bsec", .data = (ulong)&stm32mp15_data}, {} }; From patchwork Mon Jan 15 14:05:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1886690 X-Patchwork-Delegate: patrice.chotard@st.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=foss.st.com header.i=@foss.st.com header.a=rsa-sha256 header.s=selector1 header.b=fUTcwmyR; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; 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Mon, 15 Jan 2024 15:06:08 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 292BD100057; Mon, 15 Jan 2024 15:06:08 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 2222629865B; Mon, 15 Jan 2024 15:06:08 +0100 (CET) Received: from localhost (10.201.22.165) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Jan 2024 15:06:07 +0100 From: Patrick Delaunay To: CC: Patrick Delaunay , Patrice Chotard , Igor Opaniuk , Marek Vasut , Oleksandr Suvorov , Simon Glass , U-Boot STM32 Subject: [PATCH v2 04/14] stm32mp: bsec: add support of stm32mp25 Date: Mon, 15 Jan 2024 15:05:47 +0100 Message-ID: <20240115150451.v2.4.I81fedd3d2ff9635b3738dd1ef349c936bc9b433d@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240115140557.57448-1-patrick.delaunay@foss.st.com> References: <20240115140557.57448-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.22.165] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-05_08,2024-01-05_01,2023-05-22_02 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add support of BSEC for STM32MP25x family to access OTP. Reviewed-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- (no changes since v1) arch/arm/mach-stm32mp/bsec.c | 7 +++++++ arch/arm/mach-stm32mp/include/mach/stm32.h | 3 ++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index 705c994d9307..5b869017ec1a 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -784,9 +784,16 @@ static const struct stm32mp_bsec_drvdata stm32mp15_data = { .size = 96, .ta = false, }; + +static const struct stm32mp_bsec_drvdata stm32mp25_data = { + .size = 368, /* 384 but no access to HWKEY and STM32PRVKEY */ + .ta = true, +}; + static const struct udevice_id stm32mp_bsec_ids[] = { { .compatible = "st,stm32mp13-bsec", .data = (ulong)&stm32mp13_data}, { .compatible = "st,stm32mp15-bsec", .data = (ulong)&stm32mp15_data}, + { .compatible = "st,stm32mp25-bsec", .data = (ulong)&stm32mp25_data}, {} }; diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h index 46d469881b32..45c929aa605d 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h @@ -197,7 +197,8 @@ enum forced_boot_mode { #ifdef CONFIG_STM32MP25X #define BSEC_OTP_SERIAL 5 #define BSEC_OTP_RPN 9 -#define BSEC_OTP_PKG 246 +#define BSEC_OTP_PKG 122 +#define BSEC_OTP_MAC 247 #endif #ifndef __ASSEMBLY__ From patchwork Mon Jan 15 14:05:48 2024 Content-Type: text/plain; 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Mon, 15 Jan 2024 15:07:19 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1612C10002A; Mon, 15 Jan 2024 15:07:19 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 0F75B298667; Mon, 15 Jan 2024 15:07:19 +0100 (CET) Received: from localhost (10.201.22.165) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Jan 2024 15:07:18 +0100 From: Patrick Delaunay To: CC: Patrick Delaunay , Patrice Chotard , Simon Glass , Subject: [PATCH v2 05/14] configs: stm32mp25: add support of fuse command Date: Mon, 15 Jan 2024 15:05:48 +0100 Message-ID: <20240115150451.v2.5.I3c66d36ce7ac148b8d78855c73ea5f75ddde9b4f@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240115140557.57448-1-patrick.delaunay@foss.st.com> References: <20240115140557.57448-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.22.165] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-05_08,2024-01-05_01,2023-05-22_02 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add support of the command fuse with CONFIG_CMD_FUSE to allow access on OTP with command line. Reviewed-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- (no changes since v1) configs/stm32mp25_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/stm32mp25_defconfig b/configs/stm32mp25_defconfig index 75f27c98b441..9fbd7eb15755 100644 --- a/configs/stm32mp25_defconfig +++ b/configs/stm32mp25_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_ADTIMG=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_CLK=y +CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y # CONFIG_CMD_LOADB is not set CONFIG_CMD_CACHE=y From patchwork Mon Jan 15 14:05:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1886693 X-Patchwork-Delegate: patrice.chotard@st.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=foss.st.com header.i=@foss.st.com header.a=rsa-sha256 header.s=selector1 header.b=GlzPWCaT; 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Mon, 15 Jan 2024 15:07:20 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 01D0C298667; Mon, 15 Jan 2024 15:07:20 +0100 (CET) Received: from localhost (10.201.22.165) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Jan 2024 15:07:19 +0100 From: Patrick Delaunay To: CC: Patrick Delaunay , Patrice Chotard , Bhupesh Sharma , Igor Opaniuk , Oleksandr Suvorov , Rasmus Villemoes , Simon Glass , U-Boot STM32 Subject: [PATCH v2 06/14] stm32mp: add soc.c file Date: Mon, 15 Jan 2024 15:05:49 +0100 Message-ID: <20240115150451.v2.6.I175b5b047ccdb4198f1ae11bac19411617623518@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240115140557.57448-1-patrick.delaunay@foss.st.com> References: <20240115140557.57448-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.22.165] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-05_08,2024-01-05_01,2023-05-22_02 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add a new file soc.c for common functions between stm32mp1 and stm32mp2 family and move print_cpuinfo() in this new file. Reviewed-by: Patrice Chotard Signed-off-by: Patrick Delaunay Reviewed-by: Igor Opaniuk --- (no changes since v1) arch/arm/mach-stm32mp/Makefile | 1 + arch/arm/mach-stm32mp/soc.c | 17 +++++++++++++++++ arch/arm/mach-stm32mp/stm32mp1/cpu.c | 11 ----------- arch/arm/mach-stm32mp/stm32mp2/cpu.c | 11 ----------- 4 files changed, 18 insertions(+), 22 deletions(-) create mode 100644 arch/arm/mach-stm32mp/soc.c diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index 00dc25bb275c..fdcbbf91dfd5 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -6,6 +6,7 @@ obj-y += dram_init.o obj-y += syscon.o obj-y += bsec.o +obj-y += soc.o obj-$(CONFIG_STM32MP15x) += stm32mp1/ obj-$(CONFIG_STM32MP13x) += stm32mp1/ diff --git a/arch/arm/mach-stm32mp/soc.c b/arch/arm/mach-stm32mp/soc.c new file mode 100644 index 000000000000..8d5fa474ccaf --- /dev/null +++ b/arch/arm/mach-stm32mp/soc.c @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause +/* + * Copyright (C) 2024, STMicroelectronics - All Rights Reserved + */ + +#include + +/* used when CONFIG_DISPLAY_CPUINFO is activated */ +int print_cpuinfo(void) +{ + char name[SOC_NAME_SIZE]; + + get_soc_name(name); + printf("CPU: %s\n", name); + + return 0; +} diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c index 55574fd4bebf..00fea7929b2f 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c +++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c @@ -158,17 +158,6 @@ void enable_caches(void) dcache_enable(); } -/* used when CONFIG_DISPLAY_CPUINFO is activated */ -int print_cpuinfo(void) -{ - char name[SOC_NAME_SIZE]; - - get_soc_name(name); - printf("CPU: %s\n", name); - - return 0; -} - static void setup_boot_mode(void) { const u32 serial_addr[] = { diff --git a/arch/arm/mach-stm32mp/stm32mp2/cpu.c b/arch/arm/mach-stm32mp/stm32mp2/cpu.c index f43d1aaf72cc..c0f6519e8d7c 100644 --- a/arch/arm/mach-stm32mp/stm32mp2/cpu.c +++ b/arch/arm/mach-stm32mp/stm32mp2/cpu.c @@ -67,17 +67,6 @@ void enable_caches(void) dcache_enable(); } -/* used when CONFIG_DISPLAY_CPUINFO is activated */ -int print_cpuinfo(void) -{ - char name[SOC_NAME_SIZE]; - - get_soc_name(name); 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Mon, 15 Jan 2024 15:07:21 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id EAE02100057; Mon, 15 Jan 2024 15:07:20 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id E2EF1298667; Mon, 15 Jan 2024 15:07:20 +0100 (CET) Received: from localhost (10.201.22.165) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Jan 2024 15:07:20 +0100 From: Patrick Delaunay To: CC: Patrice Chotard , Patrick Delaunay , Bhupesh Sharma , Igor Opaniuk , Oleksandr Suvorov , Rasmus Villemoes , Simon Glass , U-Boot STM32 Subject: [PATCH v2 07/14] stm32mp: add setup_serial_number for stm32mp25 Date: Mon, 15 Jan 2024 15:05:50 +0100 Message-ID: <20240115150451.v2.7.I122ede30eb83184b996b7d3e1c480418b29ffbe1@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240115140557.57448-1-patrick.delaunay@foss.st.com> References: <20240115140557.57448-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.22.165] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-05_08,2024-01-05_01,2023-05-22_02 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Patrice Chotard Add support of serial number for stm32mp25, gets from OTP with BSEC driver. Reviewed-by: Patrice Chotard Signed-off-by: Patrice Chotard Signed-off-by: Patrick Delaunay Reviewed-by: Igor Opaniuk --- (no changes since v1) .../arm/mach-stm32mp/include/mach/sys_proto.h | 1 + arch/arm/mach-stm32mp/soc.c | 31 +++++++++++++++++++ arch/arm/mach-stm32mp/stm32mp1/cpu.c | 27 ---------------- arch/arm/mach-stm32mp/stm32mp2/cpu.c | 2 ++ 4 files changed, 34 insertions(+), 27 deletions(-) diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h index 83388fdb7371..2a65efc0a50a 100644 --- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h +++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h @@ -97,6 +97,7 @@ u32 get_bootauth(void); int get_eth_nb(void); int setup_mac_address(void); +int setup_serial_number(void); /* board power management : configure vddcore according OPP */ void board_vddcore_init(u32 voltage_mv); diff --git a/arch/arm/mach-stm32mp/soc.c b/arch/arm/mach-stm32mp/soc.c index 8d5fa474ccaf..ff70ebe97464 100644 --- a/arch/arm/mach-stm32mp/soc.c +++ b/arch/arm/mach-stm32mp/soc.c @@ -3,7 +3,11 @@ * Copyright (C) 2024, STMicroelectronics - All Rights Reserved */ +#include +#include #include +#include +#include /* used when CONFIG_DISPLAY_CPUINFO is activated */ int print_cpuinfo(void) @@ -15,3 +19,30 @@ int print_cpuinfo(void) return 0; } + +int setup_serial_number(void) +{ + char serial_string[25]; + u32 otp[3] = {0, 0, 0 }; + struct udevice *dev; + int ret; + + if (env_get("serial#")) + return 0; + + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(stm32mp_bsec), + &dev); + if (ret) + return ret; + + ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_SERIAL), + otp, sizeof(otp)); + if (ret < 0) + return ret; + + sprintf(serial_string, "%08X%08X%08X", otp[0], otp[1], otp[2]); + env_set("serial#", serial_string); + + return 0; +} diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c index 00fea7929b2f..f84cb26fa565 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c +++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c @@ -336,33 +336,6 @@ __weak int setup_mac_address(void) return 0; } -static int setup_serial_number(void) -{ - char serial_string[25]; - u32 otp[3] = {0, 0, 0 }; - struct udevice *dev; - int ret; - - if (env_get("serial#")) - return 0; - - ret = uclass_get_device_by_driver(UCLASS_MISC, - DM_DRIVER_GET(stm32mp_bsec), - &dev); - if (ret) - return ret; - - ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_SERIAL), - otp, sizeof(otp)); - if (ret < 0) - return ret; - - sprintf(serial_string, "%08X%08X%08X", otp[0], otp[1], otp[2]); - env_set("serial#", serial_string); - - return 0; -} - __weak void stm32mp_misc_init(void) { } diff --git a/arch/arm/mach-stm32mp/stm32mp2/cpu.c b/arch/arm/mach-stm32mp/stm32mp2/cpu.c index c0f6519e8d7c..301e365cf4f4 100644 --- a/arch/arm/mach-stm32mp/stm32mp2/cpu.c +++ b/arch/arm/mach-stm32mp/stm32mp2/cpu.c @@ -69,6 +69,8 @@ void enable_caches(void) int arch_misc_init(void) { + setup_serial_number(); + return 0; } From patchwork Mon Jan 15 14:05:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1886695 X-Patchwork-Delegate: patrice.chotard@st.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Mon, 15 Jan 2024 15:07:21 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id D5EBF298667; Mon, 15 Jan 2024 15:07:21 +0100 (CET) Received: from localhost (10.201.22.165) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Jan 2024 15:07:21 +0100 From: Patrick Delaunay To: CC: Patrick Delaunay , Patrice Chotard , Bhupesh Sharma , Oleksandr Suvorov , Rasmus Villemoes , Simon Glass , Subject: [PATCH v2 08/14] smt32mp: add setup_mac_address for stm32mp25 Date: Mon, 15 Jan 2024 15:05:51 +0100 Message-ID: <20240115150451.v2.8.Ifc2389c624c7de76bda3fa91484d4be8fc71ba1f@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240115140557.57448-1-patrick.delaunay@foss.st.com> References: <20240115140557.57448-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.22.165] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-05_08,2024-01-05_01,2023-05-22_02 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add a function setup_mac_address() to update the MAC address from the default location in OTP for stm32mp2 platform. The max number of OTP for MAC address is increased to 8 for STM32MP25, defined with get_eth_nb() and checked in setup_mac_address. The MAC address FF:FF:FF:FF:FF:FF, the broadcast ethaddr, is a invalid value used for unused MAC address slot in OTP, for example for board with STM32MP25x part number allows up to 5 ethernet ports but it is not supported by the hardware, without switch; the associated variable "enetaddr%d" is not created. Reviewed-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- (no changes since v1) arch/arm/mach-stm32mp/soc.c | 70 ++++++++++++++++++++++++++++ arch/arm/mach-stm32mp/stm32mp1/cpu.c | 58 +---------------------- arch/arm/mach-stm32mp/stm32mp2/cpu.c | 1 + 3 files changed, 72 insertions(+), 57 deletions(-) diff --git a/arch/arm/mach-stm32mp/soc.c b/arch/arm/mach-stm32mp/soc.c index ff70ebe97464..fa56b0d2e0f1 100644 --- a/arch/arm/mach-stm32mp/soc.c +++ b/arch/arm/mach-stm32mp/soc.c @@ -5,10 +5,14 @@ #include #include +#include #include #include #include +/* max: 8 OTP for 5 mac address on stm32mp2*/ +#define MAX_NB_OTP 8 + /* used when CONFIG_DISPLAY_CPUINFO is activated */ int print_cpuinfo(void) { @@ -46,3 +50,69 @@ int setup_serial_number(void) return 0; } + +/* + * If there is no MAC address in the environment, then it will be initialized + * (silently) from the value in the OTP. + */ +__weak int setup_mac_address(void) +{ + int ret; + int i; + u32 otp[MAX_NB_OTP]; + uchar enetaddr[ARP_HLEN]; + struct udevice *dev; + int nb_eth, nb_otp, index; + + if (!IS_ENABLED(CONFIG_NET)) + return 0; + + nb_eth = get_eth_nb(); + if (!nb_eth) + return 0; + + /* 6 bytes for each MAC addr and 4 bytes for each OTP */ + nb_otp = DIV_ROUND_UP(ARP_HLEN * nb_eth, 4); + if (nb_otp > MAX_NB_OTP) { + log_err("invalid number of OTP = %d, max = %d\n", nb_otp, MAX_NB_OTP); + return -EINVAL; + } + + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(stm32mp_bsec), + &dev); + if (ret) + return ret; + + ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_MAC), otp, 4 * nb_otp); + if (ret < 0) + return ret; + + for (index = 0; index < nb_eth; index++) { + /* MAC already in environment */ + if (eth_env_get_enetaddr_by_index("eth", index, enetaddr)) + continue; + + for (i = 0; i < ARP_HLEN; i++) + enetaddr[i] = ((uint8_t *)&otp)[i + ARP_HLEN * index]; + + /* skip FF:FF:FF:FF:FF:FF */ + if (is_broadcast_ethaddr(enetaddr)) + continue; + + if (!is_valid_ethaddr(enetaddr)) { + log_err("invalid MAC address %d in OTP %pM\n", + index, enetaddr); + return -EINVAL; + } + log_debug("OTP MAC address %d = %pM\n", index, enetaddr); + ret = eth_env_set_enetaddr_by_index("eth", index, enetaddr); + if (ret) { + log_err("Failed to set mac address %pM from OTP: %d\n", + enetaddr, ret); + return ret; + } + } + + return 0; +} diff --git a/arch/arm/mach-stm32mp/stm32mp1/cpu.c b/arch/arm/mach-stm32mp/stm32mp1/cpu.c index f84cb26fa565..524778f00c67 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/cpu.c +++ b/arch/arm/mach-stm32mp/stm32mp1/cpu.c @@ -14,8 +14,8 @@ #include #include #include -#include #include +#include #include #include #include @@ -280,62 +280,6 @@ static void setup_boot_mode(void) clrsetbits_le32(TAMP_BOOT_CONTEXT, TAMP_BOOT_FORCED_MASK, BOOT_NORMAL); } -/* - * If there is no MAC address in the environment, then it will be initialized - * (silently) from the value in the OTP. - */ -__weak int setup_mac_address(void) -{ - int ret; - int i; - u32 otp[3]; - uchar enetaddr[6]; - struct udevice *dev; - int nb_eth, nb_otp, index; - - if (!IS_ENABLED(CONFIG_NET)) - return 0; - - nb_eth = get_eth_nb(); - - /* 6 bytes for each MAC addr and 4 bytes for each OTP */ - nb_otp = DIV_ROUND_UP(6 * nb_eth, 4); - - ret = uclass_get_device_by_driver(UCLASS_MISC, - DM_DRIVER_GET(stm32mp_bsec), - &dev); - if (ret) - return ret; - - ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_MAC), otp, 4 * nb_otp); - if (ret < 0) - return ret; - - for (index = 0; index < nb_eth; index++) { - /* MAC already in environment */ - if (eth_env_get_enetaddr_by_index("eth", index, enetaddr)) - continue; - - for (i = 0; i < 6; i++) - enetaddr[i] = ((uint8_t *)&otp)[i + 6 * index]; - - if (!is_valid_ethaddr(enetaddr)) { - log_err("invalid MAC address %d in OTP %pM\n", - index, enetaddr); - return -EINVAL; - } - log_debug("OTP MAC address %d = %pM\n", index, enetaddr); - ret = eth_env_set_enetaddr_by_index("eth", index, enetaddr); - if (ret) { - log_err("Failed to set mac address %pM from OTP: %d\n", - enetaddr, ret); - return ret; - } - } - - return 0; -} - __weak void stm32mp_misc_init(void) { } diff --git a/arch/arm/mach-stm32mp/stm32mp2/cpu.c b/arch/arm/mach-stm32mp/stm32mp2/cpu.c index 301e365cf4f4..9530aa8534b7 100644 --- a/arch/arm/mach-stm32mp/stm32mp2/cpu.c +++ b/arch/arm/mach-stm32mp/stm32mp2/cpu.c @@ -70,6 +70,7 @@ void enable_caches(void) int arch_misc_init(void) { setup_serial_number(); + setup_mac_address(); return 0; } From patchwork Mon Jan 15 14:05:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1886694 X-Patchwork-Delegate: patrice.chotard@st.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=foss.st.com header.i=@foss.st.com header.a=rsa-sha256 header.s=selector1 header.b=wN2cvTCc; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TDDVn2gq4z1yPJ for ; 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Mon, 15 Jan 2024 15:07:23 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id CA03410002A; Mon, 15 Jan 2024 15:07:22 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id C319A298667; Mon, 15 Jan 2024 15:07:22 +0100 (CET) Received: from localhost (10.201.22.165) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Jan 2024 15:07:22 +0100 From: Patrick Delaunay To: CC: Patrick Delaunay , Patrice Chotard , Simon Glass , U-Boot STM32 Subject: [PATCH v2 09/14] stm32mp: stm32prog: add support of stm32mp25 Date: Mon, 15 Jan 2024 15:05:52 +0100 Message-ID: <20240115150451.v2.9.Iad107c8eaf11680ad8debbedc8d48327f31fd866@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240115140557.57448-1-patrick.delaunay@foss.st.com> References: <20240115140557.57448-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.22.165] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-05_08,2024-01-05_01,2023-05-22_02 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Change OTP number to 364 for STM32MP25 as it is done in bsec driver. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- (no changes since v1) arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h index ae4bd8842f53..eda98eb61d76 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h @@ -28,7 +28,15 @@ #else #define OTP_SIZE_SMC 0 #endif -#define OTP_SIZE_TA 776 +/* size of the OTP struct in NVMEM PTA */ +#define _OTP_SIZE_TA(otp) (((otp) * 2 + 2) * 4) +#if defined(CONFIG_STM32MP13x) || defined(CONFIG_STM32MP15x) +/* STM32MP1 with BSEC2 */ +#define OTP_SIZE_TA _OTP_SIZE_TA(96) +#else +/* STM32MP2 with BSEC3 */ +#define OTP_SIZE_TA _OTP_SIZE_TA(368) +#endif #define PMIC_SIZE 8 enum stm32prog_target { From patchwork Mon Jan 15 14:05:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1886699 X-Patchwork-Delegate: patrice.chotard@st.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Mon, 15 Jan 2024 15:08:33 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id B7DB0298665; Mon, 15 Jan 2024 15:08:33 +0100 (CET) Received: from localhost (10.201.22.165) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Jan 2024 15:08:33 +0100 From: Patrick Delaunay To: CC: Patrick Delaunay , Igor Opaniuk , Marek Vasut , Oleksandr Suvorov , Patrice Chotard , Simon Glass , U-Boot STM32 Subject: [PATCH v2 10/14] stm32mp: activate the command stboard for stm32mp25 boards Date: Mon, 15 Jan 2024 15:05:53 +0100 Message-ID: <20240115150451.v2.10.I7e8d4ae242605f7c9d276a858f336d13681528d9@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240115140557.57448-1-patrick.delaunay@foss.st.com> References: <20240115140557.57448-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.22.165] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-05_08,2024-01-05_01,2023-05-22_02 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Activate the command stboard for stm32mp25 STMicroelectronics boards, add the default used OTP identifier and the associated board identifier: - stm32mp25xx-ev1 = MB1936 - stm32mp25xx-dk = MB1605 Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- Changes in v2: - fix CONFIG name with 'x': TARGET_ST_STM32MP15x TARGET_ST_STM32MP13x arch/arm/mach-stm32mp/include/mach/stm32.h | 1 + board/st/common/Kconfig | 2 +- board/st/common/cmd_stboard.c | 2 ++ 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h index 45c929aa605d..726c390977e3 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h @@ -198,6 +198,7 @@ enum forced_boot_mode { #define BSEC_OTP_SERIAL 5 #define BSEC_OTP_RPN 9 #define BSEC_OTP_PKG 122 +#define BSEC_OTP_BOARD 246 #define BSEC_OTP_MAC 247 #endif diff --git a/board/st/common/Kconfig b/board/st/common/Kconfig index c1c254d07354..f40d1a78ca36 100644 --- a/board/st/common/Kconfig +++ b/board/st/common/Kconfig @@ -1,7 +1,7 @@ config CMD_STBOARD bool "stboard - command for OTP board information" depends on ARCH_STM32MP - default y if TARGET_ST_STM32MP15x || TARGET_ST_STM32MP13x + default y if TARGET_ST_STM32MP25X || TARGET_ST_STM32MP15x || TARGET_ST_STM32MP13x help This compile the stboard command to read and write the board in the OTP. diff --git a/board/st/common/cmd_stboard.c b/board/st/common/cmd_stboard.c index 853ab78bbf16..cb103e69b369 100644 --- a/board/st/common/cmd_stboard.c +++ b/board/st/common/cmd_stboard.c @@ -49,7 +49,9 @@ static bool check_stboard(u16 board) 0x1298, 0x1341, 0x1497, + 0x1605, /* stm32mp25xx-dk */ 0x1635, + 0x1936, /* stm32mp25xx-ev1 */ }; for (i = 0; i < ARRAY_SIZE(st_board_id); i++) From patchwork Mon Jan 15 14:05:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1886698 X-Patchwork-Delegate: patrice.chotard@st.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=foss.st.com header.i=@foss.st.com header.a=rsa-sha256 header.s=selector1 header.b=Ovblmrxg; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TDDWs0cK3z1yPJ for ; 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Mon, 15 Jan 2024 15:08:35 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A6D79100057; Mon, 15 Jan 2024 15:08:34 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 9ECBB298667; Mon, 15 Jan 2024 15:08:34 +0100 (CET) Received: from localhost (10.201.22.165) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Jan 2024 15:08:34 +0100 From: Patrick Delaunay To: CC: Patrick Delaunay , Patrice Chotard , Subject: [PATCH v2 11/14] board: st: stm32mp2: add checkboard Date: Mon, 15 Jan 2024 15:05:54 +0100 Message-ID: <20240115150451.v2.11.I266d8c1df18ce288bebb30c6b14cbdfa9cc6edd1@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240115140557.57448-1-patrick.delaunay@foss.st.com> References: <20240115140557.57448-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.22.165] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-05_08,2024-01-05_01,2023-05-22_02 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Implement the weak function checkboard to identify the used board with compatible in device tree for the support of stm32mp2 STMicroelectronics boards. Reviewed-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- (no changes since v1) board/st/stm32mp2/stm32mp2.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/board/st/stm32mp2/stm32mp2.c b/board/st/stm32mp2/stm32mp2.c index c97a7efff46e..9a881583d904 100644 --- a/board/st/stm32mp2/stm32mp2.c +++ b/board/st/stm32mp2/stm32mp2.c @@ -8,14 +8,28 @@ #include #include #include +#include #include #include +#include /* * Get a global data pointer */ DECLARE_GLOBAL_DATA_PTR; +int checkboard(void) +{ + const char *fdt_compat; + int fdt_compat_len; + + fdt_compat = ofnode_get_property(ofnode_root(), "compatible", &fdt_compat_len); + + log_info("Board: stm32mp2 (%s)\n", fdt_compat && fdt_compat_len ? fdt_compat : ""); + + return 0; +} + /* board dependent setup after realloc */ int board_init(void) { From patchwork Mon Jan 15 14:05:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1886700 X-Patchwork-Delegate: patrice.chotard@st.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Mon, 15 Jan 2024 15:08:35 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 8F963298668; Mon, 15 Jan 2024 15:08:35 +0100 (CET) Received: from localhost (10.201.22.165) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Jan 2024 15:08:35 +0100 From: Patrick Delaunay To: CC: Patrick Delaunay , Patrice Chotard , Subject: [PATCH v2 12/14] board: st: stm32mp2: display the board identification Date: Mon, 15 Jan 2024 15:05:55 +0100 Message-ID: <20240115150451.v2.12.I23dadcfeb0941c41ad9d8dabeb6c70a0bb9a7b56@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240115140557.57448-1-patrick.delaunay@foss.st.com> References: <20240115140557.57448-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.22.165] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-05_08,2024-01-05_01,2023-05-22_02 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add the display of the STMicroelectronics board identification saved in OTP in stm32mp2 checkboard function. Reviewed-by: Patrice Chotard Signed-off-by: Patrick Delaunay --- (no changes since v1) board/st/stm32mp2/stm32mp2.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/board/st/stm32mp2/stm32mp2.c b/board/st/stm32mp2/stm32mp2.c index 9a881583d904..aa7dd31996ea 100644 --- a/board/st/stm32mp2/stm32mp2.c +++ b/board/st/stm32mp2/stm32mp2.c @@ -9,9 +9,12 @@ #include #include #include +#include #include #include +#include #include +#include /* * Get a global data pointer @@ -20,6 +23,9 @@ DECLARE_GLOBAL_DATA_PTR; int checkboard(void) { + int ret; + u32 otp; + struct udevice *dev; const char *fdt_compat; int fdt_compat_len; @@ -27,6 +33,23 @@ int checkboard(void) log_info("Board: stm32mp2 (%s)\n", fdt_compat && fdt_compat_len ? fdt_compat : ""); + /* display the STMicroelectronics board identification */ + if (CONFIG_IS_ENABLED(CMD_STBOARD)) { + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(stm32mp_bsec), + &dev); + if (!ret) + ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD), + &otp, sizeof(otp)); + if (ret > 0 && otp) + log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n", + otp >> 16, + (otp >> 12) & 0xF, + (otp >> 4) & 0xF, + ((otp >> 8) & 0xF) - 1 + 'A', + otp & 0xF); + } + return 0; } From patchwork Mon Jan 15 14:05:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrick DELAUNAY X-Patchwork-Id: 1886701 X-Patchwork-Delegate: patrice.chotard@st.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=foss.st.com header.i=@foss.st.com header.a=rsa-sha256 header.s=selector1 header.b=CBa1YmvA; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4TDDXQ6LzLz1yPJ for ; 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Mon, 15 Jan 2024 15:08:52 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 914B7100058; Mon, 15 Jan 2024 15:08:36 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 86529298668; Mon, 15 Jan 2024 15:08:36 +0100 (CET) Received: from localhost (10.201.22.165) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 15 Jan 2024 15:08:36 +0100 From: Patrick Delaunay To: CC: Patrick Delaunay , Simon Glass , Christian Hewitt , FUKAUMI Naoki , Gatien Chevallier , Hai Pham , Igor Opaniuk , Jonas Karlman , Kever Yang , Lukasz Majewski , Marek Vasut , Michal Simek , Neil Armstrong , Oleksandr Suvorov , Patrice Chotard , Sean Anderson , Svyatoslav Ryhel , Tom Rini , Subject: [PATCH v2 13/14] arm: Rename STM32MP13x Date: Mon, 15 Jan 2024 15:05:56 +0100 Message-ID: <20240115150451.v2.13.I5567541b00df544ba476065a5cbe453a52add94e@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240115140557.57448-1-patrick.delaunay@foss.st.com> References: <20240115140557.57448-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.22.165] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-05_08,2024-01-05_01,2023-05-22_02 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean CONFIG options must not use lower-case letter. Convert this and related ones to upper case. Signed-off-by: Simon Glass Signed-off-by: Patrick Delaunay Reviewed-by: Igor Opaniuk --- See Simon's patch in serie "Clean up of bad Kconfig options" never merged https://patchwork.ozlabs.org/project/uboot/list/?series=339004&state=* https://patchwork.ozlabs.org/project/uboot/patch/20230129005903.74918-68-sjg@chromium.org/ Changes in v2: - add "arm: Rename STM32MP13x" arch/arm/dts/Makefile | 2 +- arch/arm/mach-stm32mp/Kconfig | 4 ++-- arch/arm/mach-stm32mp/Kconfig.13x | 4 ++-- arch/arm/mach-stm32mp/Makefile | 2 +- arch/arm/mach-stm32mp/cmd_stm32key.c | 10 +++++----- arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h | 2 +- arch/arm/mach-stm32mp/include/mach/stm32.h | 8 ++++---- arch/arm/mach-stm32mp/stm32mp1/Makefile | 2 +- arch/arm/mach-stm32mp/stm32mp1/fdt.c | 4 ++-- board/st/common/Kconfig | 2 +- board/st/stm32mp1/Kconfig | 2 +- configs/stm32mp13_defconfig | 4 ++-- drivers/clk/stm32/Kconfig | 2 +- 13 files changed, 24 insertions(+), 24 deletions(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 773c2546131c..8dcf1f5717ce 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1360,7 +1360,7 @@ dtb-$(CONFIG_ASPEED_AST2600) += ast2600-evb.dtb dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb -dtb-$(CONFIG_STM32MP13x) += \ +dtb-$(CONFIG_STM32MP13X) += \ stm32mp135f-dk.dtb dtb-$(CONFIG_STM32MP15x) += \ diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 5fc92d07fe6d..241fcf3e0d22 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -37,7 +37,7 @@ choice prompt "Select STMicroelectronics STM32MPxxx Soc" default STM32MP15x -config STM32MP13x +config STM32MP13X bool "Support STMicroelectronics STM32MP13x Soc" select ARM_SMCCC select CPU_V7A @@ -127,7 +127,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 config STM32_ETZPC bool "STM32 Extended TrustZone Protection" - depends on STM32MP15x || STM32MP13x + depends on STM32MP15x || STM32MP13X default y imply BOOTP_SERVERIP help diff --git a/arch/arm/mach-stm32mp/Kconfig.13x b/arch/arm/mach-stm32mp/Kconfig.13x index acc02a5a1872..4d74b35055b8 100644 --- a/arch/arm/mach-stm32mp/Kconfig.13x +++ b/arch/arm/mach-stm32mp/Kconfig.13x @@ -1,10 +1,10 @@ -if STM32MP13x +if STM32MP13X choice prompt "STM32MP13x board select" optional -config TARGET_ST_STM32MP13x +config TARGET_ST_STM32MP13X bool "STMicroelectronics STM32MP13x boards" imply BOOTSTAGE imply CMD_BOOTSTAGE diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index fdcbbf91dfd5..3d194de0631c 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -9,7 +9,7 @@ obj-y += bsec.o obj-y += soc.o obj-$(CONFIG_STM32MP15x) += stm32mp1/ -obj-$(CONFIG_STM32MP13x) += stm32mp1/ +obj-$(CONFIG_STM32MP13X) += stm32mp1/ obj-$(CONFIG_STM32MP25X) += stm32mp2/ obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c index e16fcf4424dc..dcef6ac4fb82 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32key.c +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c @@ -19,7 +19,7 @@ * STM32MP13x: 0b111111 = 0x3F for OTP_SECURED closed device */ #define STM32_OTP_CLOSE_ID 0 -#define STM32_OTP_STM32MP13x_CLOSE_MASK 0x3F +#define STM32_OTP_STM32MP13X_CLOSE_MASK 0x3F #define STM32_OTP_STM32MP15x_CLOSE_MASK BIT(6) /* PKH is the first element of the key list */ @@ -61,7 +61,7 @@ static u8 stm32key_index; static u8 get_key_nb(void) { - if (IS_ENABLED(CONFIG_STM32MP13x)) + if (IS_ENABLED(CONFIG_STM32MP13X)) return ARRAY_SIZE(stm32mp13_list); if (IS_ENABLED(CONFIG_STM32MP15x)) @@ -70,7 +70,7 @@ static u8 get_key_nb(void) static const struct stm32key *get_key(u8 index) { - if (IS_ENABLED(CONFIG_STM32MP13x)) + if (IS_ENABLED(CONFIG_STM32MP13X)) return &stm32mp13_list[index]; if (IS_ENABLED(CONFIG_STM32MP15x)) @@ -79,8 +79,8 @@ static const struct stm32key *get_key(u8 index) static u32 get_otp_close_mask(void) { - if (IS_ENABLED(CONFIG_STM32MP13x)) - return STM32_OTP_STM32MP13x_CLOSE_MASK; + if (IS_ENABLED(CONFIG_STM32MP13X)) + return STM32_OTP_STM32MP13X_CLOSE_MASK; if (IS_ENABLED(CONFIG_STM32MP15x)) return STM32_OTP_STM32MP15x_CLOSE_MASK; diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h index eda98eb61d76..934ffb1105a0 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h @@ -30,7 +30,7 @@ #endif /* size of the OTP struct in NVMEM PTA */ #define _OTP_SIZE_TA(otp) (((otp) * 2 + 2) * 4) -#if defined(CONFIG_STM32MP13x) || defined(CONFIG_STM32MP15x) +#if defined(CONFIG_STM32MP13X) || defined(CONFIG_STM32MP15x) /* STM32MP1 with BSEC2 */ #define OTP_SIZE_TA _OTP_SIZE_TA(96) #else diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h index 726c390977e3..2d7d973368c1 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h @@ -71,7 +71,7 @@ enum forced_boot_mode { * only address used before device tree parsing */ -#if defined(CONFIG_STM32MP15x) || defined(CONFIG_STM32MP13x) +#if defined(CONFIG_STM32MP15x) || defined(CONFIG_STM32MP13X) #define STM32_RCC_BASE 0x50000000 #define STM32_PWR_BASE 0x50001000 #define STM32_SYSCFG_BASE 0x50020000 @@ -92,7 +92,7 @@ enum forced_boot_mode { #define STM32_USART1_BASE 0x5C000000 #define STM32_USART2_BASE 0x4000E000 #endif -#ifdef CONFIG_STM32MP13x +#ifdef CONFIG_STM32MP13X #define STM32_USART1_BASE 0x4c000000 #define STM32_USART2_BASE 0x4c001000 #endif @@ -149,7 +149,7 @@ enum forced_boot_mode { #define TAMP_COPRO_STATE_CRASH 5 #endif -#ifdef CONFIG_STM32MP13x +#ifdef CONFIG_STM32MP13X #define TAMP_BOOTCOUNT TAMP_BACKUP_REGISTER(31) #define TAMP_BOOT_CONTEXT TAMP_BACKUP_REGISTER(30) #endif @@ -188,7 +188,7 @@ enum forced_boot_mode { #define BSEC_OTP_MAC 57 #define BSEC_OTP_BOARD 59 #endif -#ifdef CONFIG_STM32MP13x +#ifdef CONFIG_STM32MP13X #define BSEC_OTP_RPN 1 #define BSEC_OTP_SERIAL 13 #define BSEC_OTP_MAC 57 diff --git a/arch/arm/mach-stm32mp/stm32mp1/Makefile b/arch/arm/mach-stm32mp/stm32mp1/Makefile index 94c7724127e4..e74342d0c608 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/Makefile +++ b/arch/arm/mach-stm32mp/stm32mp1/Makefile @@ -5,7 +5,7 @@ obj-y += cpu.o -obj-$(CONFIG_STM32MP13x) += stm32mp13x.o +obj-$(CONFIG_STM32MP13X) += stm32mp13x.o obj-$(CONFIG_STM32MP15x) += stm32mp15x.o obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o diff --git a/arch/arm/mach-stm32mp/stm32mp1/fdt.c b/arch/arm/mach-stm32mp/stm32mp1/fdt.c index de5c5a55ea0e..9436b872e31e 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/fdt.c +++ b/arch/arm/mach-stm32mp/stm32mp1/fdt.c @@ -270,7 +270,7 @@ static int stm32_fdt_fixup_etzpc(void *fdt, int soc_node) int offset, shift; u32 addr, status, decprot[ETZPC_DECPROT_NB]; - if (IS_ENABLED(CONFIG_STM32MP13x)) { + if (IS_ENABLED(CONFIG_STM32MP13X)) { array = stm32mp13_ip_addr; array_size = ARRAY_SIZE(stm32mp13_ip_addr); } @@ -491,7 +491,7 @@ int ft_system_setup(void *blob, struct bd_info *bd) cpu = get_cpu_type(); get_soc_name(name); - if (IS_ENABLED(CONFIG_STM32MP13x)) + if (IS_ENABLED(CONFIG_STM32MP13X)) stm32mp13_fdt_fixup(blob, soc, cpu, name); if (IS_ENABLED(CONFIG_STM32MP15x)) { diff --git a/board/st/common/Kconfig b/board/st/common/Kconfig index f40d1a78ca36..6d1b76ba43a8 100644 --- a/board/st/common/Kconfig +++ b/board/st/common/Kconfig @@ -1,7 +1,7 @@ config CMD_STBOARD bool "stboard - command for OTP board information" depends on ARCH_STM32MP - default y if TARGET_ST_STM32MP25X || TARGET_ST_STM32MP15x || TARGET_ST_STM32MP13x + default y if TARGET_ST_STM32MP25X || TARGET_ST_STM32MP15x || TARGET_ST_STM32MP13X help This compile the stboard command to read and write the board in the OTP. diff --git a/board/st/stm32mp1/Kconfig b/board/st/stm32mp1/Kconfig index 6ab8f80fa45b..7d0d41bfea05 100644 --- a/board/st/stm32mp1/Kconfig +++ b/board/st/stm32mp1/Kconfig @@ -12,7 +12,7 @@ config SYS_CONFIG_NAME source "board/st/common/Kconfig" endif -if TARGET_ST_STM32MP13x +if TARGET_ST_STM32MP13X config SYS_BOARD default "stm32mp1" diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig index 2d79bf0eb050..c893e272db9b 100644 --- a/configs/stm32mp13_defconfig +++ b/configs/stm32mp13_defconfig @@ -5,10 +5,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x180000 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0400000 CONFIG_ENV_OFFSET=0x900000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp135f-dk" -CONFIG_STM32MP13x=y +CONFIG_STM32MP13X=y CONFIG_DDR_CACHEABLE_SIZE=0x8000000 CONFIG_CMD_STM32KEY=y -CONFIG_TARGET_ST_STM32MP13x=y +CONFIG_TARGET_ST_STM32MP13X=y CONFIG_ENV_OFFSET_REDUND=0x940000 CONFIG_CMD_STM32PROG=y # CONFIG_ARMV7_NONSEC is not set diff --git a/drivers/clk/stm32/Kconfig b/drivers/clk/stm32/Kconfig index 7a34ea23c381..7dbddd032b89 100644 --- a/drivers/clk/stm32/Kconfig +++ b/drivers/clk/stm32/Kconfig @@ -31,7 +31,7 @@ config CLK_STM32MP1 config CLK_STM32MP13 bool "Enable RCC clock driver for STM32MP13" depends on ARCH_STM32MP && CLK - default y if STM32MP13x + default y if STM32MP13X select CLK_STM32_CORE help Enable the STM32 clock (RCC) driver. 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Convert this and related ones to upper case. Signed-off-by: Simon Glass Reviewed-by: Patrice Chotard --- See Simon's patch in serie "Clean up of bad Kconfig options" never merged https://patchwork.ozlabs.org/project/uboot/list/?series=339004&state=* https://patchwork.ozlabs.org/project/uboot/patch/20230129005903.74918-69-sjg@chromium.org/ Changes in v2: - add "arm: Rename STM32MP15x" arch/arm/dts/Makefile | 2 +- arch/arm/dts/stm32mp15-u-boot.dtsi | 2 +- arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi | 4 ++-- arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 4 ++-- arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi | 4 ++-- arch/arm/mach-stm32mp/Kconfig | 6 +++--- arch/arm/mach-stm32mp/Kconfig.15x | 6 +++--- arch/arm/mach-stm32mp/Makefile | 2 +- arch/arm/mach-stm32mp/cmd_stm32key.c | 10 +++++----- arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h | 4 ++-- arch/arm/mach-stm32mp/include/mach/stm32.h | 12 ++++++------ arch/arm/mach-stm32mp/stm32mp1/Makefile | 2 +- arch/arm/mach-stm32mp/stm32mp1/fdt.c | 6 +++--- board/st/common/Kconfig | 2 +- board/st/stm32mp1/Kconfig | 2 +- board/st/stm32mp1/stm32mp1.c | 6 +++--- configs/stm32mp15_basic_defconfig | 2 +- configs/stm32mp15_defconfig | 2 +- configs/stm32mp15_trusted_defconfig | 4 ++-- drivers/clk/stm32/Kconfig | 2 +- 20 files changed, 42 insertions(+), 42 deletions(-) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 8dcf1f5717ce..02074440b55d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1363,7 +1363,7 @@ dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb dtb-$(CONFIG_STM32MP13X) += \ stm32mp135f-dk.dtb -dtb-$(CONFIG_STM32MP15x) += \ +dtb-$(CONFIG_STM32MP15X) += \ stm32mp157a-dk1.dtb \ stm32mp157a-dk1-scmi.dtb \ stm32mp157a-icore-stm32mp1-ctouch2.dtb \ diff --git a/arch/arm/dts/stm32mp15-u-boot.dtsi b/arch/arm/dts/stm32mp15-u-boot.dtsi index 573dd4d3ed56..fe56f05616a0 100644 --- a/arch/arm/dts/stm32mp15-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15-u-boot.dtsi @@ -206,7 +206,7 @@ resets = <&rcc UART8_R>; }; -#if defined(CONFIG_STM32MP15x_STM32IMAGE) +#if defined(CONFIG_STM32MP15X_STM32IMAGE) &binman { u-boot-stm32 { filename = "u-boot.stm32"; diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi index 2623cebf21a4..a16358266a2d 100644 --- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi @@ -22,13 +22,13 @@ st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; }; -#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL) +#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL) config { u-boot,mmc-env-partition = "ssbl"; }; #endif -#ifdef CONFIG_STM32MP15x_STM32IMAGE +#ifdef CONFIG_STM32MP15X_STM32IMAGE /* only needed for boot with TF-A, witout FIP support */ firmware { optee { diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi index b8288273ddb5..ef91088aa375 100644 --- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi @@ -20,13 +20,13 @@ st,stm32prog-gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; }; -#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL) +#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL) config { u-boot,mmc-env-partition = "ssbl"; }; #endif -#ifdef CONFIG_STM32MP15x_STM32IMAGE +#ifdef CONFIG_STM32MP15X_STM32IMAGE /* only needed for boot with TF-A, witout FIP support */ firmware { optee { diff --git a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi index eb283cacd27d..139940bd5d47 100644 --- a/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi +++ b/arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi @@ -28,7 +28,7 @@ #address-cells = <1>; #size-cells = <1>; -#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL) +#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL) partition@0 { label = "fsbl1"; reg = <0x00000000 0x00040000>; @@ -82,7 +82,7 @@ #address-cells = <1>; #size-cells = <1>; -#if defined(CONFIG_STM32MP15x_STM32IMAGE) || defined(CONFIG_SPL) +#if defined(CONFIG_STM32MP15X_STM32IMAGE) || defined(CONFIG_SPL) partition@0 { label = "fsbl"; reg = <0x00000000 0x00200000>; diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 241fcf3e0d22..a1763ff19993 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -35,7 +35,7 @@ config ENV_SIZE choice prompt "Select STMicroelectronics STM32MPxxx Soc" - default STM32MP15x + default STM32MP15X config STM32MP13X bool "Support STMicroelectronics STM32MP13x Soc" @@ -55,7 +55,7 @@ config STM32MP13X support of STMicroelectronics SOC STM32MP13x family STMicroelectronics MPU with core ARMv7 -config STM32MP15x +config STM32MP15X bool "Support STMicroelectronics STM32MP15x Soc" select ARCH_SUPPORT_PSCI select BINMAN @@ -127,7 +127,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 config STM32_ETZPC bool "STM32 Extended TrustZone Protection" - depends on STM32MP15x || STM32MP13X + depends on STM32MP15X || STM32MP13X default y imply BOOTP_SERVERIP help diff --git a/arch/arm/mach-stm32mp/Kconfig.15x b/arch/arm/mach-stm32mp/Kconfig.15x index 1d32f8bf3395..71c14eb4955f 100644 --- a/arch/arm/mach-stm32mp/Kconfig.15x +++ b/arch/arm/mach-stm32mp/Kconfig.15x @@ -1,6 +1,6 @@ -if STM32MP15x +if STM32MP15X -config STM32MP15x_STM32IMAGE +config STM32MP15X_STM32IMAGE bool "Support STM32 image for generated U-Boot image" depends on TFABOOT help @@ -11,7 +11,7 @@ choice prompt "STM32MP15x board select" optional -config TARGET_ST_STM32MP15x +config TARGET_ST_STM32MP15X bool "STMicroelectronics STM32MP15x boards" imply BOOTSTAGE imply CMD_BOOTSTAGE diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile index 3d194de0631c..ee8a5428feba 100644 --- a/arch/arm/mach-stm32mp/Makefile +++ b/arch/arm/mach-stm32mp/Makefile @@ -8,7 +8,7 @@ obj-y += syscon.o obj-y += bsec.o obj-y += soc.o -obj-$(CONFIG_STM32MP15x) += stm32mp1/ +obj-$(CONFIG_STM32MP15X) += stm32mp1/ obj-$(CONFIG_STM32MP13X) += stm32mp1/ obj-$(CONFIG_STM32MP25X) += stm32mp2/ diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c index dcef6ac4fb82..c7fe232f86e0 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32key.c +++ b/arch/arm/mach-stm32mp/cmd_stm32key.c @@ -20,7 +20,7 @@ */ #define STM32_OTP_CLOSE_ID 0 #define STM32_OTP_STM32MP13X_CLOSE_MASK 0x3F -#define STM32_OTP_STM32MP15x_CLOSE_MASK BIT(6) +#define STM32_OTP_STM32MP15X_CLOSE_MASK BIT(6) /* PKH is the first element of the key list */ #define STM32KEY_PKH 0 @@ -64,7 +64,7 @@ static u8 get_key_nb(void) if (IS_ENABLED(CONFIG_STM32MP13X)) return ARRAY_SIZE(stm32mp13_list); - if (IS_ENABLED(CONFIG_STM32MP15x)) + if (IS_ENABLED(CONFIG_STM32MP15X)) return ARRAY_SIZE(stm32mp15_list); } @@ -73,7 +73,7 @@ static const struct stm32key *get_key(u8 index) if (IS_ENABLED(CONFIG_STM32MP13X)) return &stm32mp13_list[index]; - if (IS_ENABLED(CONFIG_STM32MP15x)) + if (IS_ENABLED(CONFIG_STM32MP15X)) return &stm32mp15_list[index]; } @@ -82,8 +82,8 @@ static u32 get_otp_close_mask(void) if (IS_ENABLED(CONFIG_STM32MP13X)) return STM32_OTP_STM32MP13X_CLOSE_MASK; - if (IS_ENABLED(CONFIG_STM32MP15x)) - return STM32_OTP_STM32MP15x_CLOSE_MASK; + if (IS_ENABLED(CONFIG_STM32MP15X)) + return STM32_OTP_STM32MP15X_CLOSE_MASK; } static int get_misc_dev(struct udevice **dev) diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h index 934ffb1105a0..bf184c8a8846 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h @@ -23,14 +23,14 @@ #define CMD_SIZE 512 /* SMC is only supported in SPMIN for STM32MP15x */ -#ifdef CONFIG_STM32MP15x +#ifdef CONFIG_STM32MP15X #define OTP_SIZE_SMC 1024 #else #define OTP_SIZE_SMC 0 #endif /* size of the OTP struct in NVMEM PTA */ #define _OTP_SIZE_TA(otp) (((otp) * 2 + 2) * 4) -#if defined(CONFIG_STM32MP13X) || defined(CONFIG_STM32MP15x) +#if defined(CONFIG_STM32MP13X) || defined(CONFIG_STM32MP15X) /* STM32MP1 with BSEC2 */ #define OTP_SIZE_TA _OTP_SIZE_TA(96) #else diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h index 2d7d973368c1..f598da99fbab 100644 --- a/arch/arm/mach-stm32mp/include/mach/stm32.h +++ b/arch/arm/mach-stm32mp/include/mach/stm32.h @@ -71,11 +71,11 @@ enum forced_boot_mode { * only address used before device tree parsing */ -#if defined(CONFIG_STM32MP15x) || defined(CONFIG_STM32MP13X) +#if defined(CONFIG_STM32MP15X) || defined(CONFIG_STM32MP13X) #define STM32_RCC_BASE 0x50000000 #define STM32_PWR_BASE 0x50001000 #define STM32_SYSCFG_BASE 0x50020000 -#ifdef CONFIG_STM32MP15x +#ifdef CONFIG_STM32MP15X #define STM32_DBGMCU_BASE 0x50081000 #endif #define STM32_FMC2_BASE 0x58002000 @@ -88,7 +88,7 @@ enum forced_boot_mode { #define STM32_STGEN_BASE 0x5C008000 #define STM32_TAMP_BASE 0x5C00A000 -#ifdef CONFIG_STM32MP15x +#ifdef CONFIG_STM32MP15X #define STM32_USART1_BASE 0x5C000000 #define STM32_USART2_BASE 0x4000E000 #endif @@ -107,7 +107,7 @@ enum forced_boot_mode { #define STM32_SDMMC2_BASE 0x58007000 #define STM32_SDMMC3_BASE 0x48004000 -#ifdef CONFIG_STM32MP15x +#ifdef CONFIG_STM32MP15X #define STM32_SYSRAM_BASE 0x2FFC0000 #define STM32_SYSRAM_SIZE SZ_256K #endif @@ -129,7 +129,7 @@ enum forced_boot_mode { /* TAMP registers */ #define TAMP_BACKUP_REGISTER(x) (STM32_TAMP_BASE + 0x100 + 4 * x) -#ifdef CONFIG_STM32MP15x +#ifdef CONFIG_STM32MP15X #define TAMP_BACKUP_MAGIC_NUMBER TAMP_BACKUP_REGISTER(4) #define TAMP_BACKUP_BRANCH_ADDRESS TAMP_BACKUP_REGISTER(5) #define TAMP_FWU_BOOT_INFO_REG TAMP_BACKUP_REGISTER(10) @@ -181,7 +181,7 @@ enum forced_boot_mode { #define STM32_BSEC_LOCK(id) (STM32_BSEC_LOCK_OFFSET + (id) * 4) /* BSEC OTP index */ -#ifdef CONFIG_STM32MP15x +#ifdef CONFIG_STM32MP15X #define BSEC_OTP_RPN 1 #define BSEC_OTP_SERIAL 13 #define BSEC_OTP_PKG 16 diff --git a/arch/arm/mach-stm32mp/stm32mp1/Makefile b/arch/arm/mach-stm32mp/stm32mp1/Makefile index e74342d0c608..857148747ef7 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/Makefile +++ b/arch/arm/mach-stm32mp/stm32mp1/Makefile @@ -6,7 +6,7 @@ obj-y += cpu.o obj-$(CONFIG_STM32MP13X) += stm32mp13x.o -obj-$(CONFIG_STM32MP15x) += stm32mp15x.o +obj-$(CONFIG_STM32MP15X) += stm32mp15x.o obj-$(CONFIG_STM32_ECDSA_VERIFY) += ecdsa_romapi.o ifdef CONFIG_SPL_BUILD diff --git a/arch/arm/mach-stm32mp/stm32mp1/fdt.c b/arch/arm/mach-stm32mp/stm32mp1/fdt.c index 9436b872e31e..d0b6c3cc5a55 100644 --- a/arch/arm/mach-stm32mp/stm32mp1/fdt.c +++ b/arch/arm/mach-stm32mp/stm32mp1/fdt.c @@ -275,7 +275,7 @@ static int stm32_fdt_fixup_etzpc(void *fdt, int soc_node) array_size = ARRAY_SIZE(stm32mp13_ip_addr); } - if (IS_ENABLED(CONFIG_STM32MP15x)) { + if (IS_ENABLED(CONFIG_STM32MP15X)) { array = stm32mp15_ip_addr; array_size = ARRAY_SIZE(stm32mp15_ip_addr); } @@ -494,7 +494,7 @@ int ft_system_setup(void *blob, struct bd_info *bd) if (IS_ENABLED(CONFIG_STM32MP13X)) stm32mp13_fdt_fixup(blob, soc, cpu, name); - if (IS_ENABLED(CONFIG_STM32MP15x)) { + if (IS_ENABLED(CONFIG_STM32MP15X)) { stm32mp15_fdt_fixup(blob, soc, cpu, name); /* @@ -505,7 +505,7 @@ int ft_system_setup(void *blob, struct bd_info *bd) * under CONFIG_STM32MP15x_STM32IMAGE only for compatibility * when FIP is not used by TF-A */ - if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE) && + if (IS_ENABLED(CONFIG_STM32MP15X_STM32IMAGE) && !tee_find_device(NULL, NULL, NULL, NULL)) stm32_fdt_disable_optee(blob); } diff --git a/board/st/common/Kconfig b/board/st/common/Kconfig index 6d1b76ba43a8..5efac658cf4d 100644 --- a/board/st/common/Kconfig +++ b/board/st/common/Kconfig @@ -1,7 +1,7 @@ config CMD_STBOARD bool "stboard - command for OTP board information" depends on ARCH_STM32MP - default y if TARGET_ST_STM32MP25X || TARGET_ST_STM32MP15x || TARGET_ST_STM32MP13X + default y if TARGET_ST_STM32MP25X || TARGET_ST_STM32MP15X || TARGET_ST_STM32MP13X help This compile the stboard command to read and write the board in the OTP. diff --git a/board/st/stm32mp1/Kconfig b/board/st/stm32mp1/Kconfig index 7d0d41bfea05..96de41546f1d 100644 --- a/board/st/stm32mp1/Kconfig +++ b/board/st/stm32mp1/Kconfig @@ -1,4 +1,4 @@ -if TARGET_ST_STM32MP15x +if TARGET_ST_STM32MP15X config SYS_BOARD default "stm32mp1" diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 8f5719c28b33..a17c314daeb8 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -114,7 +114,7 @@ int checkboard(void) int fdt_compat_len; if (IS_ENABLED(CONFIG_TFABOOT)) { - if (IS_ENABLED(CONFIG_STM32MP15x_STM32IMAGE)) + if (IS_ENABLED(CONFIG_STM32MP15X_STM32IMAGE)) mode = "trusted - stm32image"; else mode = "trusted"; @@ -616,7 +616,7 @@ error: static bool board_is_stm32mp15x_dk2(void) { - if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) && + if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15X) && of_machine_is_compatible("st,stm32mp157c-dk2")) return true; @@ -625,7 +625,7 @@ static bool board_is_stm32mp15x_dk2(void) static bool board_is_stm32mp15x_ev1(void) { - if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) && + if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15X) && (of_machine_is_compatible("st,stm32mp157a-ev1") || of_machine_is_compatible("st,stm32mp157c-ev1") || of_machine_is_compatible("st,stm32mp157d-ev1") || diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 3032d83b992e..005f1d55f80e 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -13,7 +13,7 @@ CONFIG_SPL_STACK=0x30000000 CONFIG_SPL=y CONFIG_CMD_STM32KEY=y CONFIG_TYPEC_STUSB160X=y -CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_TARGET_ST_STM32MP15X=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_CMD_STM32PROG=y CONFIG_SPL_SPI_FLASH_SUPPORT=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 4aff6398846f..3302b3069965 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -9,7 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_DDR_CACHEABLE_SIZE=0x8000000 CONFIG_CMD_STM32KEY=y CONFIG_TYPEC_STUSB160X=y -CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_TARGET_ST_STM32MP15X=y CONFIG_ENV_OFFSET_REDUND=0x940000 CONFIG_CMD_STM32PROG=y # CONFIG_ARMV7_NONSEC is not set diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index ec32f1ea0f2c..84b0854b5573 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -9,8 +9,8 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_DDR_CACHEABLE_SIZE=0x10000000 CONFIG_CMD_STM32KEY=y CONFIG_TYPEC_STUSB160X=y -CONFIG_STM32MP15x_STM32IMAGE=y -CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_STM32MP15X_STM32IMAGE=y +CONFIG_TARGET_ST_STM32MP15X=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_CMD_STM32PROG=y # CONFIG_ARMV7_NONSEC is not set diff --git a/drivers/clk/stm32/Kconfig b/drivers/clk/stm32/Kconfig index 7dbddd032b89..c05015efe8b4 100644 --- a/drivers/clk/stm32/Kconfig +++ b/drivers/clk/stm32/Kconfig @@ -23,7 +23,7 @@ config CLK_STM32_CORE config CLK_STM32MP1 bool "Enable RCC clock driver for STM32MP15" depends on ARCH_STM32MP && CLK - default y if STM32MP15x + default y if STM32MP15X help Enable the STM32 clock (RCC) driver. Enable support for manipulating STM32MP15's on-SoC clocks.