From patchwork Tue Sep 26 02:39:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2" X-Patchwork-Id: 1839414 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=PDOG5piC; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4RvkV61Fndz1yp0 for ; Tue, 26 Sep 2023 12:39:40 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BDABC385B53C for ; Tue, 26 Sep 2023 02:39:38 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) by sourceware.org (Postfix) with ESMTPS id 44AA03858D35 for ; Tue, 26 Sep 2023 02:39:24 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 44AA03858D35 Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695695964; x=1727231964; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=fFbxaLrwJnAWDjs78nWVYBmRO2svyZex46wUbGWwcvg=; b=PDOG5piC6O10up77H3YJ/x7KSTLNHJrolBD0oDTE81kWu1vLHaQfjJqs D2CuGPjiQgbj09XWyZb9Tj3W01Fwootz/1H9cO3rvWe1xSEv4WoQ9DqtP vkkcQGX2CSyhS5nkLZPpMdPJ+2jQMQlLkhVDcM9rsh/4DY2lfb5rkTRFV BuvZVkmeeP99t9LbFLYgWGZkYsCvSFFBMb9x123rMOW0prc/NDig4UKrV aGlahZq6SR7Lk4nCCSW62ErOgKV0MU6Zzf3w5PCdpGqcNPFu0R8OpgJpZ 2aTh0EQjqCRa0+MBVa2h3z+rkbIKYxDKrRLeOaqUxNH4ez7CwESRyG4Fy Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10843"; a="378743522" X-IronPort-AV: E=Sophos;i="6.03,176,1694761200"; d="scan'208";a="378743522" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Sep 2023 19:39:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10843"; a="748640852" X-IronPort-AV: E=Sophos;i="6.03,176,1694761200"; d="scan'208";a="748640852" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga002.jf.intel.com with ESMTP; 25 Sep 2023 19:39:18 -0700 Received: from pli-ubuntu.sh.intel.com (pli-ubuntu.sh.intel.com [10.239.159.47]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 654E210056B4; Tue, 26 Sep 2023 10:39:17 +0800 (CST) From: pan2.li@intel.com To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, pan2.li@intel.com, yanzhang.wang@intel.com, kito.cheng@gmail.com Subject: [PATCH v1] RISC-V: Support FP nearbyint auto-vectorization Date: Tue, 26 Sep 2023 10:39:16 +0800 Message-Id: <20230926023916.2631146-1-pan2.li@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org From: Pan Li This patch would like to support auto-vectorization for the nearbyint API in math.h. It depends on the -ffast-math option. When we would like to call nearbyint/nearbyintf like v2 = nearbyint (v1), we will convert it into below insns (reference the implementation of llvm). * frflags a5 * vfcvt.x.f v3, v1, RDN * vfcvt.f.x v2, v3 * fsflags a5 However, the floating point value may not need the cvt as above if its mantissa is zero. Take single precision floating point as example: Assume we have RTZ rounding mode +------------+---------------+-----------------+ | raw float | binary layout | after nearbyint | +------------+---------------+-----------------+ | 8388607.5 | 0x4affffff | 8388607.0 | | 8388608.0 | 0x4b000000 | 8388608.0 | | 8388609.0 | 0x4b000001 | 8388609.0 | +------------+---------------+-----------------+ All single floating point >= 8388608.0 will have all zero mantisaa. We leverage vmflt and mask to filter them out in vector and only do the cvt on mask. Befor this patch: math-nearbyint-1.c:21:1: missed: couldn't vectorize loop ... .L3: flw fa0,0(s0) addi s0,s0,4 addi s1,s1,4 call nearbyint fsw fa0,-4(s1) bne s0,s2,.L3 After this patch: vfabs.v v2,v1 vmflt.vf v0,v2,fa5 frflags a7 vfcvt.x.f.v v4,v1,v0.t vfcvt.f.x.v v2,v4,v0.t fsflags a7 vfsgnj.vv v2,v2,v1 Please note VLS mode is also involved in this patch and covered by the test cases. gcc/ChangeLog: * config/riscv/autovec.md (nearbyint2): New pattern. * config/riscv/riscv-protos.h (enum insn_type): New enum. (expand_vec_nearbyint): New function decl. * config/riscv/riscv-v.cc (gen_nearbyint_const_fp): New function impl. (expand_vec_nearbyint): Ditto. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/unop/test-math.h: Add helper function. * gcc.target/riscv/rvv/autovec/unop/math-nearbyint-0.c: New test. * gcc.target/riscv/rvv/autovec/unop/math-nearbyint-1.c: New test. * gcc.target/riscv/rvv/autovec/unop/math-nearbyint-2.c: New test. * gcc.target/riscv/rvv/autovec/unop/math-nearbyint-3.c: New test. * gcc.target/riscv/rvv/autovec/unop/math-nearbyint-run-1.c: New test. * gcc.target/riscv/rvv/autovec/unop/math-nearbyint-run-2.c: New test. * gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c: New test. Signed-off-by: Pan Li Signed-off-by: Pan Li --- gcc/config/riscv/autovec.md | 11 ++++ gcc/config/riscv/riscv-protos.h | 2 + gcc/config/riscv/riscv-v.cc | 36 ++++++++++++ .../riscv/rvv/autovec/unop/math-nearbyint-0.c | 20 +++++++ .../riscv/rvv/autovec/unop/math-nearbyint-1.c | 20 +++++++ .../riscv/rvv/autovec/unop/math-nearbyint-2.c | 20 +++++++ .../riscv/rvv/autovec/unop/math-nearbyint-3.c | 22 +++++++ .../rvv/autovec/unop/math-nearbyint-run-1.c | 48 +++++++++++++++ .../rvv/autovec/unop/math-nearbyint-run-2.c | 48 +++++++++++++++ .../riscv/rvv/autovec/unop/test-math.h | 33 +++++++++++ .../riscv/rvv/autovec/vls/math-nearbyint-1.c | 58 +++++++++++++++++++ 11 files changed, 318 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-0.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-run-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-run-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md index a005e17457e..b47f086f5e6 100644 --- a/gcc/config/riscv/autovec.md +++ b/gcc/config/riscv/autovec.md @@ -2210,6 +2210,7 @@ (define_expand "avg3_ceil" ;; Includes: ;; - ceil/ceilf ;; - floor/floorf +;; - nearbyint/nearbyintf ;; ------------------------------------------------------------------------- (define_expand "ceil2" [(match_operand:V_VLSF 0 "register_operand") @@ -2230,3 +2231,13 @@ (define_expand "floor2" DONE; } ) + +(define_expand "nearbyint2" + [(match_operand:V_VLSF 0 "register_operand") + (match_operand:V_VLSF 1 "register_operand")] + "TARGET_VECTOR && !flag_trapping_math && !flag_rounding_math" + { + riscv_vector::expand_vec_nearbyint (operands[0], operands[1], mode, mode); + DONE; + } +) diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h index 63eb2475705..f87bdef0f71 100644 --- a/gcc/config/riscv/riscv-protos.h +++ b/gcc/config/riscv/riscv-protos.h @@ -296,6 +296,7 @@ enum insn_type : unsigned int UNARY_OP_TAMA = __MASK_OP_TAMA | UNARY_OP_P, UNARY_OP_TAMU = __MASK_OP_TAMU | UNARY_OP_P, UNARY_OP_FRM_DYN = UNARY_OP | FRM_DYN_P, + UNARY_OP_TAMU_FRM_DYN = UNARY_OP_TAMU | FRM_DYN_P, UNARY_OP_TAMU_FRM_RUP = UNARY_OP_TAMU | FRM_RUP_P, UNARY_OP_TAMU_FRM_RDN = UNARY_OP_TAMU | FRM_RDN_P, @@ -460,6 +461,7 @@ void expand_cond_len_binop (unsigned, rtx *); void expand_reduction (unsigned, unsigned, rtx *, rtx); void expand_vec_ceil (rtx, rtx, machine_mode, machine_mode); void expand_vec_floor (rtx, rtx, machine_mode, machine_mode); +void expand_vec_nearbyint (rtx, rtx, machine_mode, machine_mode); #endif bool sew64_scalar_helper (rtx *, rtx *, rtx, machine_mode, bool, void (*)(rtx *, rtx)); diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc index a1ffefb23f3..4749dadf2d4 100644 --- a/gcc/config/riscv/riscv-v.cc +++ b/gcc/config/riscv/riscv-v.cc @@ -3571,6 +3571,13 @@ gen_floor_const_fp (machine_mode inner_mode) return gen_ceil_const_fp (inner_mode); } +static rtx +gen_nearbyint_const_fp (machine_mode inner_mode) +{ + /* The nearbyint needs the same floating point const as ceil. */ + return gen_ceil_const_fp (inner_mode); +} + static rtx emit_vec_float_cmp_mask (rtx fp_vector, rtx_code code, rtx fp_scalar, machine_mode vec_fp_mode) @@ -3676,4 +3683,33 @@ expand_vec_floor (rtx op_0, rtx op_1, machine_mode vec_fp_mode, emit_vec_copysign (op_0, op_0, op_1, vec_fp_mode); } +void +expand_vec_nearbyint (rtx op_0, rtx op_1, machine_mode vec_fp_mode, + machine_mode vec_int_mode) +{ + /* Step-1: Get the abs float value for mask generation. */ + emit_vec_abs (op_0, op_1, vec_fp_mode); + + /* Step-2: Generate the mask on const fp. */ + rtx const_fp = gen_nearbyint_const_fp (GET_MODE_INNER (vec_fp_mode)); + rtx mask = emit_vec_float_cmp_mask (op_0, LT, const_fp, vec_fp_mode); + + /* Step-3: Backup FP exception flags, nearbyint never raise exceptions. */ + rtx fflags = gen_reg_rtx (SImode); + emit_insn (gen_riscv_frflags (fflags)); + + /* Step-4: Convert to integer on mask, with rounding down (aka nearbyint). */ + rtx tmp = gen_reg_rtx (vec_int_mode); + emit_vec_cvt_x_f (tmp, op_1, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode); + + /* Step-5: Convert to floating-point on mask for the nearbyint result. */ + emit_vec_cvt_f_x (op_0, tmp, mask, UNARY_OP_TAMU_FRM_DYN, vec_fp_mode); + + /* Step-6: Restore FP exception flags. */ + emit_insn (gen_riscv_fsflags (fflags)); + + /* Step-7: Retrieve the sign bit for -0.0. */ + emit_vec_copysign (op_0, op_0, op_1, vec_fp_mode); +} + } // namespace riscv_vector diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-0.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-0.c new file mode 100644 index 00000000000..f67b22ac02d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-0.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv_zvfh -mabi=lp64d -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "test-math.h" + +/* +** test__Float16___builtin_nearbyintf16: +** ... +** vsetvli\s+[atx][0-9]+,\s*zero,\s*e16,\s*m1,\s*ta,\s*mu +** vfabs\.v\s+v[0-9]+,\s*v[0-9]+ +** vmflt\.vf\s+v0,\s*v[0-9]+,\s*[fa]+[0-9]+ +** frflags\s+[axt][0-9]+ +** vfcvt\.x\.f\.v\s+v[0-9]+,\s*v[0-9]+,\s*v0\.t +** vfcvt\.f\.x\.v\s+v[0-9]+,\s*v[0-9]+,\s*v0\.t +** fsflags\s+[axt][0-9]+ +** vfsgnj\.vv\s+v[0-9]+,v[0-9]+,v[0-9]+ +** ... +*/ +TEST_UNARY_CALL (_Float16, __builtin_nearbyintf16) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-1.c new file mode 100644 index 00000000000..93639863412 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-1.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "test-math.h" + +/* +** test_float___builtin_nearbyintf: +** ... +** vsetvli\s+[atx][0-9]+,\s*zero,\s*e32,\s*m1,\s*ta,\s*mu +** vfabs\.v\s+v[0-9]+,\s*v[0-9]+ +** vmflt\.vf\s+v0,\s*v[0-9]+,\s*[fa]+[0-9]+ +** frflags\s+[axt][0-9]+ +** vfcvt\.x\.f\.v\s+v[0-9]+,\s*v[0-9]+,\s*v0\.t +** vfcvt\.f\.x\.v\s+v[0-9]+,\s*v[0-9]+,\s*v0\.t +** fsflags\s+[axt][0-9]+ +** vfsgnj\.vv\s+v[0-9]+,v[0-9]+,v[0-9]+ +** ... +*/ +TEST_UNARY_CALL (float, __builtin_nearbyintf) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-2.c new file mode 100644 index 00000000000..d31de739d2d --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-2.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "test-math.h" + +/* +** test_double___builtin_nearbyint: +** ... +** vsetvli\s+[atx][0-9]+,\s*zero,\s*e64,\s*m1,\s*ta,\s*mu +** vfabs\.v\s+v[0-9]+,\s*v[0-9]+ +** vmflt\.vf\s+v0,\s*v[0-9]+,\s*[fa]+[0-9]+ +** frflags\s+[axt][0-9]+ +** vfcvt\.x\.f\.v\s+v[0-9]+,\s*v[0-9]+,\s*v0\.t +** vfcvt\.f\.x\.v\s+v[0-9]+,\s*v[0-9]+,\s*v0\.t +** fsflags\s+[axt][0-9]+ +** vfsgnj\.vv\s+v[0-9]+,v[0-9]+,v[0-9]+ +** ... +*/ +TEST_UNARY_CALL (double, __builtin_nearbyint) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-3.c new file mode 100644 index 00000000000..4fd99505b40 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-3.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math -fno-schedule-insns -fno-schedule-insns2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +#include "test-math.h" + +/* +** test_float___builtin_nearbyintf: +** ... +** vsetvli\s+[atx][0-9]+,\s*zero,\s*e32,\s*m1,\s*ta,\s*mu +** vfabs\.v\s+v[0-9]+,\s*v[0-9]+ +** vmflt\.vf\s+v0,\s*v[0-9]+,\s*[fa]+[0-9]+ +** frflags\s+[axt][0-9]+ +** vfcvt\.x\.f\.v\s+v[0-9]+,\s*v[0-9]+,\s*v0\.t +** vfcvt\.f\.x\.v\s+v[0-9]+,\s*v[0-9]+,\s*v0\.t +** fsflags\s+[axt][0-9]+ +** vfsgnj\.vv\s+v[0-9]+,v[0-9]+,v[0-9]+ +** ... +** vmerge\.vvm\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+,\s*v0 +** ... +*/ +TEST_COND_UNARY_CALL (float, __builtin_nearbyintf) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-run-1.c new file mode 100644 index 00000000000..7f49485822a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-run-1.c @@ -0,0 +1,48 @@ +/* { dg-do run { target { riscv_vector } } } */ +/* { dg-additional-options "-std=c99 -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math" } */ + +#include "test-math.h" + +#define ARRAY_SIZE 128 + +float in[ARRAY_SIZE]; +float out[ARRAY_SIZE]; +float ref[ARRAY_SIZE]; + +TEST_UNARY_CALL (float, __builtin_nearbyintf) +TEST_ASSERT (float) + +TEST_INIT (float, 1.2, 1.0, 1) +TEST_INIT (float, -1.2, -1.0, 2) +TEST_INIT (float, 3.0, 3.0, 3) +TEST_INIT (float, 8388607.5, 8388607.0, 4) +TEST_INIT (float, 8388609.0, 8388609.0, 5) +TEST_INIT (float, 0.0, 0.0, 6) +TEST_INIT (float, -0.0, -0.0, 7) +TEST_INIT (float, -8388607.5, -8388607.0, 8) +TEST_INIT (float, -8388608.0, -8388608.0, 9) + +int +main () +{ + unsigned fflags_before = get_fflags (); + + set_rm (FRM_RTZ); + + RUN_TEST (float, 1, __builtin_nearbyintf, in, out, ref, ARRAY_SIZE); + RUN_TEST (float, 2, __builtin_nearbyintf, in, out, ref, ARRAY_SIZE); + RUN_TEST (float, 3, __builtin_nearbyintf, in, out, ref, ARRAY_SIZE); + RUN_TEST (float, 4, __builtin_nearbyintf, in, out, ref, ARRAY_SIZE); + RUN_TEST (float, 5, __builtin_nearbyintf, in, out, ref, ARRAY_SIZE); + RUN_TEST (float, 6, __builtin_nearbyintf, in, out, ref, ARRAY_SIZE); + RUN_TEST (float, 7, __builtin_nearbyintf, in, out, ref, ARRAY_SIZE); + RUN_TEST (float, 8, __builtin_nearbyintf, in, out, ref, ARRAY_SIZE); + RUN_TEST (float, 9, __builtin_nearbyintf, in, out, ref, ARRAY_SIZE); + + unsigned fflags_after = get_fflags (); + + if (fflags_before != fflags_after) + __builtin_abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-run-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-run-2.c new file mode 100644 index 00000000000..4f8c7246b5e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/math-nearbyint-run-2.c @@ -0,0 +1,48 @@ +/* { dg-do run { target { riscv_vector } } } */ +/* { dg-additional-options "-std=c99 -O3 -ftree-vectorize -fno-vect-cost-model -ffast-math" } */ + +#include "test-math.h" + +#define ARRAY_SIZE 128 + +double in[ARRAY_SIZE]; +double out[ARRAY_SIZE]; +double ref[ARRAY_SIZE]; + +TEST_UNARY_CALL (double, __builtin_nearbyint) +TEST_ASSERT (double) + +TEST_INIT (double, 1.2, 1.0, 1) +TEST_INIT (double, -1.8, -2.0, 2) +TEST_INIT (double, 3.0, 3.0, 3) +TEST_INIT (double, 4503599627370495.5, 4503599627370496.0, 4) +TEST_INIT (double, 4503599627370497.0, 4503599627370497.0, 5) +TEST_INIT (double, 0.0, 0.0, 6) +TEST_INIT (double, -0.0, -0.0, 7) +TEST_INIT (double, -4503599627370495.5, -4503599627370496.0, 8) +TEST_INIT (double, -4503599627370496.0, -4503599627370496.0, 9) + +int +main () +{ + unsigned fflags_before = get_fflags (); + + set_rm (FRM_RNE); + + RUN_TEST (double, 1, __builtin_nearbyint, in, out, ref, ARRAY_SIZE); + RUN_TEST (double, 2, __builtin_nearbyint, in, out, ref, ARRAY_SIZE); + RUN_TEST (double, 3, __builtin_nearbyint, in, out, ref, ARRAY_SIZE); + RUN_TEST (double, 4, __builtin_nearbyint, in, out, ref, ARRAY_SIZE); + RUN_TEST (double, 5, __builtin_nearbyint, in, out, ref, ARRAY_SIZE); + RUN_TEST (double, 6, __builtin_nearbyint, in, out, ref, ARRAY_SIZE); + RUN_TEST (double, 7, __builtin_nearbyint, in, out, ref, ARRAY_SIZE); + RUN_TEST (double, 8, __builtin_nearbyint, in, out, ref, ARRAY_SIZE); + RUN_TEST (double, 9, __builtin_nearbyint, in, out, ref, ARRAY_SIZE); + + unsigned fflags_after = get_fflags (); + + if (fflags_before != fflags_after) + __builtin_abort (); + + return 0; +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/test-math.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/test-math.h index d035835f370..b63ca56d848 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/test-math.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/unop/test-math.h @@ -36,3 +36,36 @@ test_##TYPE##_init_##NUM (IN, REF, SIZE); \ test_##TYPE##_##CALL (OUT, IN, SIZE); \ test_##TYPE##_assert (OUT, REF, SIZE); + +#define FRM_RNE 0 +#define FRM_RTZ 1 +#define FRM_RDN 2 +#define FRM_RUP 3 +#define FRM_RMM 4 +#define FRM_DYN 7 + +static inline void +set_rm (unsigned rm) +{ + __asm__ volatile ( + "fsrm %0" + : + :"r"(rm) + : + ); +} + +static inline unsigned +get_fflags () +{ + unsigned fflags = 0; + + __asm__ volatile ( + "frflags %0" + :"=r"(fflags) + : + : + ); + + return fflags; +} diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c new file mode 100644 index 00000000000..8c8498c5982 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/math-nearbyint-1.c @@ -0,0 +1,58 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized" } */ + +#include "def.h" + +DEF_OP_V (nearbyintf16, 1, _Float16, __builtin_nearbyintf16) +DEF_OP_V (nearbyintf16, 2, _Float16, __builtin_nearbyintf16) +DEF_OP_V (nearbyintf16, 4, _Float16, __builtin_nearbyintf16) +DEF_OP_V (nearbyintf16, 8, _Float16, __builtin_nearbyintf16) +DEF_OP_V (nearbyintf16, 16, _Float16, __builtin_nearbyintf16) +DEF_OP_V (nearbyintf16, 32, _Float16, __builtin_nearbyintf16) +DEF_OP_V (nearbyintf16, 64, _Float16, __builtin_nearbyintf16) +DEF_OP_V (nearbyintf16, 128, _Float16, __builtin_nearbyintf16) +DEF_OP_V (nearbyintf16, 256, _Float16, __builtin_nearbyintf16) +DEF_OP_V (nearbyintf16, 512, _Float16, __builtin_nearbyintf16) +DEF_OP_V (nearbyintf16, 1024, _Float16, __builtin_nearbyintf16) +DEF_OP_V (nearbyintf16, 2048, _Float16, __builtin_nearbyintf16) + +DEF_OP_V (nearbyintf, 1, float, __builtin_nearbyintf) +DEF_OP_V (nearbyintf, 2, float, __builtin_nearbyintf) +DEF_OP_V (nearbyintf, 4, float, __builtin_nearbyintf) +DEF_OP_V (nearbyintf, 8, float, __builtin_nearbyintf) +DEF_OP_V (nearbyintf, 16, float, __builtin_nearbyintf) +DEF_OP_V (nearbyintf, 32, float, __builtin_nearbyintf) +DEF_OP_V (nearbyintf, 64, float, __builtin_nearbyintf) +DEF_OP_V (nearbyintf, 128, float, __builtin_nearbyintf) +DEF_OP_V (nearbyintf, 256, float, __builtin_nearbyintf) +DEF_OP_V (nearbyintf, 512, float, __builtin_nearbyintf) +DEF_OP_V (nearbyintf, 1024, float, __builtin_nearbyintf) + +DEF_OP_V (nearbyint, 1, double, __builtin_nearbyint) +DEF_OP_V (nearbyint, 2, double, __builtin_nearbyint) +DEF_OP_V (nearbyint, 4, double, __builtin_nearbyint) +DEF_OP_V (nearbyint, 8, double, __builtin_nearbyint) +DEF_OP_V (nearbyint, 16, double, __builtin_nearbyint) +DEF_OP_V (nearbyint, 32, double, __builtin_nearbyint) +DEF_OP_V (nearbyint, 64, double, __builtin_nearbyint) +DEF_OP_V (nearbyint, 128, double, __builtin_nearbyint) +DEF_OP_V (nearbyint, 256, double, __builtin_nearbyint) +DEF_OP_V (nearbyint, 512, double, __builtin_nearbyint) + +/* { dg-final { scan-assembler-not {csrr} } } */ +/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */ +/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */ +/* { dg-final { scan-assembler-times {vfcvt\.x\.f\.v\s+v[0-9]+,\s*v[0-9]+,\s*v0\.t} 30 } } */ +/* { dg-final { scan-assembler-times {vfcvt\.f\.x\.v\s+v[0-9]+,\s*v[0-9]+,\s*v0\.t} 30 } } */ +/* { dg-final { scan-assembler-times {frflags\s+[atx][0-9]+} 30 } } */ +/* { dg-final { scan-assembler-times {fsflags\s+[atx][0-9]+} 30 } } */