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(no To-header on input) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Louis Kuo This adds the bindings, for the mediatek ISP3.0 SENINF module embedded in some Mediatek SoC, such as the mt8365 Signed-off-by: Louis Kuo Signed-off-by: Phi-Bang Nguyen Signed-off-by: Laurent Pinchart Signed-off-by: Julien Stephan --- .../media/mediatek,mt8365-seninf.yaml | 295 ++++++++++++++++++ MAINTAINERS | 7 + 2 files changed, 302 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8365-seninf.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8365-seninf.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8365-seninf.yaml new file mode 100644 index 000000000000..1697e94853f5 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mt8365-seninf.yaml @@ -0,0 +1,295 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2023 MediaTek, BayLibre +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mt8365-seninf.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Sensor Interface 3.0 + +maintainers: + - Laurent Pinchart + - Julien Stephan + - Andy Hsieh + +description: + The ISP3.0 SENINF is the CSI-2 and parallel camera sensor interface found in + multiple MediaTek SoCs. It can support up to three physical CSI-2 + input ports, configured in DPHY (2 or 4 data lanes) or CPHY depending on the SoC. + On the output side, SENINF can be connected either to CAMSV instance or + to the internal ISP. CAMSV is used to transfer the sensor data (Raw, YUV) + to DRAM directly, without internal ISP processing. + +properties: + compatible: + const: mediatek,mt8365-seninf + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + items: + - description: Seninf camsys clock + - description: Seninf top mux clock + + clock-names: + items: + - const: camsys + - const: top_mux + + phys: + minItems: 1 + maxItems: 4 + description: + phandle to the PHYs connected to CSI0/A, CSI1, CSI2 and CSI0B + + phy-names: + minItems: 1 + items: + - const: csi0 + - const: csi1 + - const: csi2 + - const: csi0b + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: CSI0 or CSI0A port + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + data-lanes: + minItems: 1 + maxItems: 4 + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: CSI1 port + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + data-lanes: + minItems: 1 + maxItems: 4 + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: CSI2 port + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + data-lanes: + minItems: 1 + maxItems: 4 + + port@3: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: CSI0B port + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + clock-lanes: + maxItems: 1 + data-lanes: + minItems: 1 + maxItems: 2 + + port@4: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: connection point for cam0 + + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + + port@5: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: connection point for cam1 + + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + + port@6: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: connection point for camsv0 + + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + + port@7: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: connection point for camsv1 + + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + + port@8: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: connection point for camsv2 + + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + + port@9: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: connection point for camsv3 + + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + + required: + - port@0 + - port@1 + - port@2 + - port@3 + - port@4 + - port@5 + - port@6 + - port@7 + - port@8 + - port@9 + +required: + - compatible + - interrupts + - clocks + - clock-names + - power-domains + - ports + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + seninf: seninf@15040000 { + compatible = "mediatek,mt8365-seninf"; + reg = <0 0x15040000 0 0x6000>; + interrupts = ; + clocks = <&camsys CLK_CAM_SENIF>, + <&topckgen CLK_TOP_SENIF_SEL>; + clock-names = "camsys", "top_mux"; + + power-domains = <&spm MT8365_POWER_DOMAIN_CAM>; + + phys = <&mipi_csi0 PHY_TYPE_DPHY>; + phy-names = "csi0"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + seninf_in1: endpoint { + clock-lanes = <2>; + data-lanes = <1 3 0 4>; + remote-endpoint = <&isp1_out>; + }; + }; + + port@1 { + reg = <1>; + }; + + port@2 { + reg = <2>; + }; + + port@3 { + reg = <3>; + }; + + port@4 { + reg = <4>; + seninf_camsv1_endpoint: endpoint { + remote-endpoint = <&camsv1_endpoint>; + }; + }; + + port@5 { + reg = <5>; + }; + + port@6 { + reg = <6>; + }; + + port@7 { + reg = <7>; + }; + + port@8 { + reg = <8>; + }; + + port@9 { + reg = <9>; + }; + + }; + }; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index e0976ae2a523..af273a477139 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13350,6 +13350,13 @@ M: Sean Wang S: Maintained F: drivers/char/hw_random/mtk-rng.c +MEDIATEK ISP3.0 DRIVER +M: Laurent Pinchart +M: Julien Stephan +M: Andy Hsieh +S: Supported +F: Documentation/devicetree/bindings/media/mediatek,mt8365-seninf.yaml + MEDIATEK SMI DRIVER M: Yong Wu L: linux-mediatek@lists.infradead.org (moderated for non-subscribers) From patchwork Fri Jun 30 10:01:52 2023 Content-Type: text/plain; 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Fri, 30 Jun 2023 03:05:45 -0700 (PDT) Received: from localhost.localdomain ([2a01:e0a:55f:21e0:9e19:4376:dea6:dbfa]) by smtp.gmail.com with ESMTPSA id x11-20020adff0cb000000b0031424f4ef1dsm743280wro.19.2023.06.30.03.05.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jun 2023 03:05:44 -0700 (PDT) From: Julien Stephan Cc: Phi-bang Nguyen , Julien Stephan , Andy Hsieh , AngeloGioacchino Del Regno , Conor Dooley , daoyuan huang , devicetree@vger.kernel.org, Florian Sylvestre , Krzysztof Kozlowski , Laurent Pinchart , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-media@vger.kernel.org, Louis Kuo , Matthias Brugger , Mauro Carvalho Chehab , Moudy Ho , Ping-Hsun Wu , Rob Herring , Vasily Gorbik Subject: [PATCH v2 3/4] dt-bindings: media: add mediatek ISP3.0 camsv Date: Fri, 30 Jun 2023 12:01:52 +0200 Message-ID: <20230630100321.1951138-4-jstephan@baylibre.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230630100321.1951138-1-jstephan@baylibre.com> References: <20230630100321.1951138-1-jstephan@baylibre.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Phi-bang Nguyen This adds the bindings, for the ISP3.0 camsv module embedded in some Mediatek SoC, such as the mt8365 Signed-off-by: Phi-bang Nguyen Signed-off-by: Julien Stephan --- .../bindings/media/mediatek,mt8365-camsv.yaml | 113 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 114 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8365-camsv.yaml diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8365-camsv.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8365-camsv.yaml new file mode 100644 index 000000000000..d81fa5d6db74 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mt8365-camsv.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (c) 2023 MediaTek, BayLibre +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mt8365-camsv.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek CAMSV 3.0 + +maintainers: + - Laurent Pinchart + - Julien Stephan + - Andy Hsieh + +description: + The CAMSV is a set of DMA engines connected to the SENINF CSI-2 + receivers. The number of CAMSVs depend on the SoC model. + +properties: + compatible: + const: mediatek,mt8365-camsv + + reg: + maxItems: 3 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + items: + - description: cam clock + - description: camtg clock + - description: camsv clock + + clock-names: + items: + - const: camsys_cam_cgpdn + - const: camsys_camtg_cgpdn + - const: camsys_camsv + + iommus: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + unevaluatedProperties: false + description: connection point for camsv0 + + properties: + endpoint: + $ref: /schemas/graph.yaml#/$defs/endpoint-base + unevaluatedProperties: false + + required: + - port@0 + +required: + - compatible + - interrupts + - clocks + - clock-names + - power-domains + - iommus + - ports + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + camsv1: camsv@15050000 { + compatible = "mediatek,mt8365-camsv"; + reg = <0 0x15050000 0 0x0040>, + <0 0x15050208 0 0x0020>, + <0 0x15050400 0 0x0100>; + interrupts = ; + clocks = <&camsys CLK_CAM>, + <&camsys CLK_CAMTG>, + <&camsys CLK_CAMSV0>; + clock-names = "camsys_cam_cgpdn", "camsys_camtg_cgpdn", + "camsys_camsv"; + iommus = <&iommu M4U_PORT_CAM_IMGO>; + power-domains = <&spm MT8365_POWER_DOMAIN_CAM>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + camsv1_endpoint: endpoint { + remote-endpoint = <&seninf_camsv1_endpoint>; + }; + }; + }; + }; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index 9fda342ad331..60b2bceca584 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13355,6 +13355,7 @@ M: Laurent Pinchart M: Julien Stephan M: Andy Hsieh S: Supported +F: Documentation/devicetree/bindings/media/mediatek,mt8365-camsv.yaml F: Documentation/devicetree/bindings/media/mediatek,mt8365-seninf.yaml F: drivers/media/platform/mediatek/isp/isp_30/seninf/*