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X-Spam-Score: -5.4 (-----) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Guo Ren There are no load/store operations to fence at the reset point. Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- lib/utils/reset/fdt_reset_thead.c | 1 - lib/utils/reset/fdt_reset_thead_asm.S | 2 -- 2 files changed, 3 [...] Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [139.178.84.217 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Guo Ren There are no load/store operations to fence at the reset point. Signed-off-by: Guo Ren Signed-off-by: Guo Ren --- lib/utils/reset/fdt_reset_thead.c | 1 - lib/utils/reset/fdt_reset_thead_asm.S | 2 -- 2 files changed, 3 deletions(-) diff --git a/lib/utils/reset/fdt_reset_thead.c b/lib/utils/reset/fdt_reset_thead.c index e1d6885debae..ff7d2981b42f 100644 --- a/lib/utils/reset/fdt_reset_thead.c +++ b/lib/utils/reset/fdt_reset_thead.c @@ -27,7 +27,6 @@ static void clone_csrs(int cnt) /* Mask csr BIT[31 - 20] */ *(u32 *)&__fdt_reset_thead_csrr &= BIT(20) - 1; - smp_mb(); /* Write csr BIT[31 - 20] to __fdt_reset_thead_csrr */ *(u32 *)&__fdt_reset_thead_csrr |= custom_csr[i].index << 20; diff --git a/lib/utils/reset/fdt_reset_thead_asm.S b/lib/utils/reset/fdt_reset_thead_asm.S index 8237951fd82d..650f8585cdd2 100644 --- a/lib/utils/reset/fdt_reset_thead_asm.S +++ b/lib/utils/reset/fdt_reset_thead_asm.S @@ -27,7 +27,6 @@ __thead_pre_start_warm: */ li t1, 0x70013 csrw 0x7c2, t1 - fence rw,rw lla t1, custom_csr @@ -43,5 +42,4 @@ __reset_thead_csr_stub: */ li t1, 0x70013 csrw 0x7c2, t1 - fence rw,rw j _start_warm From patchwork Tue May 23 09:46:49 2023 Content-Type: text/plain; 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The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Guo Ren Correct the naming convention to fit Linux kernel upstream rule. Link: https://lore.kernel.org/linux-riscv/CAJF2gTRG5edPnVmhMtv67OANpOynL0br0wcrQCave88_KkyZcg@mail.gmail.com/ Signed-off-by: Guo Ren Signed-off-by: Guo Ren List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "opensbi" Errors-To: opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Guo Ren Correct the naming convention to fit Linux kernel upstream rule. Link: https://lore.kernel.org/linux-riscv/CAJF2gTRG5edPnVmhMtv67OANpOynL0br0wcrQCave88_KkyZcg@mail.gmail.com/ Signed-off-by: Guo Ren Signed-off-by: Guo Ren Cc: Conor Dooley Cc: Jisheng Zhang Cc: Wei Fu --- docs/platform/thead-c9xx.md | 21 +++++------- lib/utils/reset/fdt_reset_thead.c | 57 +++++++++++++++---------------- 2 files changed, 35 insertions(+), 43 deletions(-) diff --git a/docs/platform/thead-c9xx.md b/docs/platform/thead-c9xx.md index 8bb9e91f1a9b..35cca94b5bb9 100644 --- a/docs/platform/thead-c9xx.md +++ b/docs/platform/thead-c9xx.md @@ -19,9 +19,6 @@ because it uses generic platform. CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic /usr/bin/make ``` -The *T-HEAD C9xx* DTB provided to OpenSBI generic firmwares will usually have -"riscv,clint0", "riscv,plic0", "thead,reset-sample" compatible strings. - DTS Example1: (Single core, eg: Allwinner D1 - c906) ---------------------------------------------------- @@ -75,8 +72,8 @@ DTS Example1: (Single core, eg: Allwinner D1 - c906) } ``` -DTS Example2: (Multi cores with soc reset-regs) ------------------------------------------------ +DTS Example2: (Multi cores, eg: T-HEAD th1520 - c910) +----------------------------------------------------- ``` cpus { @@ -143,13 +140,11 @@ DTS Example2: (Multi cores with soc reset-regs) compatible = "simple-bus"; ranges; - reset: reset-sample { - compatible = "thead,reset-sample"; - entry-reg = <0xff 0xff019050>; - entry-cnt = <4>; - control-reg = <0xff 0xff015004>; - control-val = <0x1c>; - csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>; + reset-controller@ffff019050 { + compatible = "thead,th1520-cpu-reset"; + reg = <0xff 0xff019050 0x0 0x4>, <0xff 0xff015004 0x0 0x0>; + reset-ctrl-val = <0x1c>; + csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc 0x7ce>; }; clint0: clint@ffdc000000 { @@ -186,7 +181,7 @@ DTS Example2: (Multi cores with old reset csrs) ----------------------------------------------- ``` reset: reset-sample { - compatible = "thead,reset-sample"; + compatible = "thead,common-cpu-reset"; using-csr-reset; csr-copy = <0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc 0x3b0 0x3b1 0x3b2 0x3b3 diff --git a/lib/utils/reset/fdt_reset_thead.c b/lib/utils/reset/fdt_reset_thead.c index ff7d2981b42f..760c117f6178 100644 --- a/lib/utils/reset/fdt_reset_thead.c +++ b/lib/utils/reset/fdt_reset_thead.c @@ -5,6 +5,8 @@ #include #include #include +#include +#include #include #include #include @@ -58,11 +60,10 @@ extern void __thead_pre_start_warm(void); static int thead_reset_init(void *fdt, int nodeoff, const struct fdt_match *match) { - char *p; - const fdt64_t *val; + int rc, len, i; + u32 tmp; const fdt32_t *val_w; - int len, i; - u32 t, tmp = 0; + uint64_t reg_addr, reg_size; /* Prepare clone csrs */ val_w = fdt_getprop(fdt, nodeoff, "csr-copy", &len); @@ -85,45 +86,41 @@ static int thead_reset_init(void *fdt, int nodeoff, if (fdt_getprop(fdt, nodeoff, "using-csr-reset", &len)) { csr_write(0x7c7, (ulong)&__thead_pre_start_warm); csr_write(0x7c6, -1); + goto out; } /* Custom reset method for secondary harts */ - val = fdt_getprop(fdt, nodeoff, "entry-reg", &len); - if (len > 0 && val) { - p = (char *)(ulong)fdt64_to_cpu(*val); - - val_w = fdt_getprop(fdt, nodeoff, "entry-cnt", &len); - if (len > 0 && val_w) { - tmp = fdt32_to_cpu(*val_w); - - for (i = 0; i < tmp; i++) { - t = (ulong)&__thead_pre_start_warm; - writel(t, p + (8 * i)); - t = (u64)(ulong)&__thead_pre_start_warm >> 32; - writel(t, p + (8 * i) + 4); - } - } + rc = fdt_get_node_addr_size(fdt, nodeoff, 0, ®_addr, ®_size); + if (rc < 0) + return SBI_ENODEV; + + for (i = 0; i < reg_size; i++) { + tmp = (ulong)&__thead_pre_start_warm; + writel(tmp, (char *)(ulong)reg_addr + (i * 8)); + tmp = (u64)(ulong)&__thead_pre_start_warm >> 32; + writel(tmp, (char *)(ulong)reg_addr + (i * 8) + 4); + } - val = fdt_getprop(fdt, nodeoff, "control-reg", &len); - if (len > 0 && val) { - p = (void *)(ulong)fdt64_to_cpu(*val); + rc = fdt_get_node_addr_size(fdt, nodeoff, 1, ®_addr, ®_size); + if (rc < 0) + return SBI_ENODEV; - val_w = fdt_getprop(fdt, nodeoff, "control-val", &len); - if (len > 0 && val_w) { - tmp = fdt32_to_cpu(*val_w); - tmp |= readl(p); - writel(tmp, p); - } - } + val_w = fdt_getprop(fdt, nodeoff, "reset-ctrl-val", &len); + if (len > 0 && val_w) { + tmp = fdt32_to_cpu(*val_w); + tmp |= readl((char *)(ulong)reg_addr); + writel(tmp, (char *)(ulong)reg_addr); } +out: sbi_system_reset_add_device(&thead_reset); return 0; } static const struct fdt_match thead_reset_match[] = { - { .compatible = "thead,reset-sample" }, + { .compatible = "thead,common-cpu-reset" }, + { .compatible = "thead,th1520-cpu-reset" }, { }, };