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Fri, 31 Mar 2023 15:39:17 +0000 (GMT) Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E846120040; Fri, 31 Mar 2023 15:39:16 +0000 (GMT) Received: from localhost.localdomain (unknown [9.179.0.144]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 31 Mar 2023 15:39:16 +0000 (GMT) From: Laurent Dufour To: mpe@ellerman.id.au, npiggin@gmail.com, christophe.leroy@csgroup.eu Subject: [PATCH 1/2] pseries/smp: export the smt level in the SYS FS. Date: Fri, 31 Mar 2023 17:39:04 +0200 Message-Id: <20230331153905.31698-2-ldufour@linux.ibm.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230331153905.31698-1-ldufour@linux.ibm.com> References: <20230331153905.31698-1-ldufour@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: PGc9QIzO_ZHUuoWKf1gThmRJW9B1TMUD X-Proofpoint-GUID: 3nWUCXfU9EBO2gnYWIsNv4wvaUa9ZIOj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-31_07,2023-03-31_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 mlxlogscore=999 malwarescore=0 lowpriorityscore=0 suspectscore=0 spamscore=0 impostorscore=0 phishscore=0 priorityscore=1501 mlxscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2303310123 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nathanl@linux.ibm.com, msuchanek@suse.de, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Srikar Dronamraju Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" There is no SMT level recorded in the kernel neither in user space. Indeed there is no real constraint about that and mixed SMT levels are allowed and system is working fine this way. However when new CPU are added, the kernel is onlining all the threads which is leading to mixed SMT levels and confuse end user a bit. To prevent this exports a SMT level from the kernel so user space application like the energy daemon, could read it to adjust their settings. There is no action unless recording the value when a SMT value is written into the new sysfs entry. User space applications like ppc64_cpu should update the sysfs when changing the SMT level to keep the system consistent. Suggested-by: Srikar Dronamraju Signed-off-by: Laurent Dufour --- arch/powerpc/platforms/pseries/pseries.h | 3 ++ arch/powerpc/platforms/pseries/smp.c | 39 ++++++++++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h index f8bce40ebd0c..af0a145af98f 100644 --- a/arch/powerpc/platforms/pseries/pseries.h +++ b/arch/powerpc/platforms/pseries/pseries.h @@ -23,7 +23,9 @@ extern int pSeries_machine_check_exception(struct pt_regs *regs); extern long pseries_machine_check_realmode(struct pt_regs *regs); void pSeries_machine_check_log_err(void); + #ifdef CONFIG_SMP +extern int pseries_smt; extern void smp_init_pseries(void); /* Get state of physical CPU from query_cpu_stopped */ @@ -34,6 +36,7 @@ int smp_query_cpu_stopped(unsigned int pcpu); #define QCSS_HARDWARE_ERROR -1 #define QCSS_HARDWARE_BUSY -2 #else +#define pseries_smt 1 static inline void smp_init_pseries(void) { } #endif diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c index c597711ef20a..6c382922f8f3 100644 --- a/arch/powerpc/platforms/pseries/smp.c +++ b/arch/powerpc/platforms/pseries/smp.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -45,6 +46,8 @@ #include "pseries.h" +int pseries_smt; + /* * The Primary thread of each non-boot processor was started from the OF client * interface by prom_hold_cpus and is spinning on secondary_hold_spinloop. @@ -280,3 +283,39 @@ void __init smp_init_pseries(void) pr_debug(" <- smp_init_pSeries()\n"); } + +static ssize_t pseries_smt_store(struct class *class, + struct class_attribute *attr, + const char *buf, size_t count) +{ + int smt; + + if (kstrtou32(buf, 0, &smt) || !smt || smt > (u32) threads_per_core) { + pr_err("Invalid pseries_smt specified.\n"); + return -EINVAL; + } + + pseries_smt = smt; + + return count; +} + +static ssize_t pseries_smt_show(struct class *class, struct class_attribute *attr, + char *buf) +{ + return sysfs_emit(buf, "%d\n", pseries_smt); +} + +static CLASS_ATTR_RW(pseries_smt); + +static int __init pseries_smt_init(void) +{ + int rc; + + pseries_smt = smt_enabled_at_boot; + rc = sysfs_create_file(kernel_kobj, &class_attr_pseries_smt.attr); + if (rc) + pr_err("Can't create pseries_smt sysfs/kernel entry.\n"); + return rc; +} +machine_device_initcall(pseries, pseries_smt_init); From patchwork Fri Mar 31 15:39:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Dufour X-Patchwork-Id: 1763835 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=XBBYpAUd; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Pp4Hv09RBz1yYb for ; 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Fri, 31 Mar 2023 15:39:18 +0000 (GMT) Received: from smtpav01.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C9A3B20040; Fri, 31 Mar 2023 15:39:17 +0000 (GMT) Received: from localhost.localdomain (unknown [9.179.0.144]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 31 Mar 2023 15:39:17 +0000 (GMT) From: Laurent Dufour To: mpe@ellerman.id.au, npiggin@gmail.com, christophe.leroy@csgroup.eu Subject: [PATCH 2/2] powerpc/pseries/cpuhp: respect current SMT when adding new CPU Date: Fri, 31 Mar 2023 17:39:05 +0200 Message-Id: <20230331153905.31698-3-ldufour@linux.ibm.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230331153905.31698-1-ldufour@linux.ibm.com> References: <20230331153905.31698-1-ldufour@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: H9apdsxfmK6GdWx27csX4-aUTx8w3LD6 X-Proofpoint-ORIG-GUID: qL5AAfG4VlfyGk0oo2RNr1iUO5wTj3Wq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-31_07,2023-03-31_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 malwarescore=0 suspectscore=0 clxscore=1015 priorityscore=1501 mlxlogscore=999 phishscore=0 lowpriorityscore=0 mlxscore=0 bulkscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2303310123 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nathanl@linux.ibm.com, msuchanek@suse.de, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Srikar Dronamraju Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" When a new CPU is added, the kernel is activating all its threads. This leads to weird, but functional, result when adding CPU on a SMT 4 system for instance. Here the newly added CPU 1 has 8 threads while the other one has 4 threads active (system has been booted with the 'smt-enabled=4' kernel option): ltcden3-lp12:~ # ppc64_cpu --info Core 0: 0* 1* 2* 3* 4 5 6 7 Core 1: 8* 9* 10* 11* 12* 13* 14* 15* We rely on the newly pseries_smt value which should be updated when changing the SMT level by ppc64_cpu --smt=x and at boot time using the smt-enabled kernel option. This way on a LPAR running in SMT=4, newly added CPU will be running 4 threads, which is what a end user would expect. Cc: Srikar Dronamraju Signed-off-by: Laurent Dufour --- arch/powerpc/platforms/pseries/hotplug-cpu.c | 18 +++++++++++++----- arch/powerpc/platforms/pseries/smp.c | 2 +- 2 files changed, 14 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c index 1a3cb313976a..e623ed8649b3 100644 --- a/arch/powerpc/platforms/pseries/hotplug-cpu.c +++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c @@ -382,7 +382,7 @@ static int dlpar_online_cpu(struct device_node *dn) { int rc = 0; unsigned int cpu; - int len, nthreads, i; + int len, nthreads, i, smt; const __be32 *intserv; u32 thread; @@ -392,6 +392,11 @@ static int dlpar_online_cpu(struct device_node *dn) nthreads = len / sizeof(u32); + smt = READ_ONCE(pseries_smt); + /* We should online at least one thread */ + if (smt < 1) + smt = 1; + cpu_maps_update_begin(); for (i = 0; i < nthreads; i++) { thread = be32_to_cpu(intserv[i]); @@ -400,10 +405,13 @@ static int dlpar_online_cpu(struct device_node *dn) continue; cpu_maps_update_done(); find_and_update_cpu_nid(cpu); - rc = device_online(get_cpu_device(cpu)); - if (rc) { - dlpar_offline_cpu(dn); - goto out; + /* Don't active CPU over the current SMT setting */ + if (smt-- > 0) { + rc = device_online(get_cpu_device(cpu)); + if (rc) { + dlpar_offline_cpu(dn); + goto out; + } } cpu_maps_update_begin(); diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c index 6c382922f8f3..ef8070651846 100644 --- a/arch/powerpc/platforms/pseries/smp.c +++ b/arch/powerpc/platforms/pseries/smp.c @@ -295,7 +295,7 @@ static ssize_t pseries_smt_store(struct class *class, return -EINVAL; } - pseries_smt = smt; + WRITE_ONCE(pseries_smt, smt); return count; }