From patchwork Fri Mar 31 09:14:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Kerr X-Patchwork-Id: 1763706 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=codeconstruct.com.au header.i=@codeconstruct.com.au header.a=rsa-sha256 header.s=2022a header.b=AdXI5EOc; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PnvlW5GXfz1yYb for ; Fri, 31 Mar 2023 20:15:35 +1100 (AEDT) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4PnvlW3bKHz3chd for ; Fri, 31 Mar 2023 20:15:35 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=codeconstruct.com.au header.i=@codeconstruct.com.au header.a=rsa-sha256 header.s=2022a header.b=AdXI5EOc; dkim-atps=neutral X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=codeconstruct.com.au (client-ip=203.29.241.158; helo=codeconstruct.com.au; envelope-from=jk@codeconstruct.com.au; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=codeconstruct.com.au header.i=@codeconstruct.com.au header.a=rsa-sha256 header.s=2022a header.b=AdXI5EOc; dkim-atps=neutral Received: from codeconstruct.com.au (pi.codeconstruct.com.au [203.29.241.158]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4Pnvl81pt4z3cdH for ; Fri, 31 Mar 2023 20:15:15 +1100 (AEDT) Received: by codeconstruct.com.au (Postfix, from userid 10000) id 3D76C203E3; Fri, 31 Mar 2023 17:15:14 +0800 (AWST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=codeconstruct.com.au; s=2022a; t=1680254114; bh=DwJVXzMJiN5hjRhApoLO5DGd/N9N6w0f4EJEHeB8P4Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=AdXI5EOc2F1wrp2rxwRLFAotgwLg2JiITCq9889wM24yT7ggqLXxJIA+6is9ph6M/ pgfdtkASAVW4Pq0+gcaq3q91PI17S2DTdW3tLS8VvGVDFfWeVsGZlSr33ZBuoSCSse WJ8/8PNldSvDa4t0DRmWG9d+4qof0y35dVXu/c8gezh8sHePMHHWJa45to8VeFfi4a dxEbvYKwqu0sT7qTmF+eKzWeGq8XEZeXVYvl7BmtLzIUxF9nBwsSq3GJWf/+PzPsrT UXxG8+X1SFYc+uo2fH6Pg2IpG46IhXnLBASx8dyP6dqVLIvI3sn3jFUp3gJVUHHhLI 76aLBJRbNj61g== From: Jeremy Kerr To: linux-i3c@lists.infradead.org Subject: [PATCH v3 1/3] i3c: dw: Add infrastructure for platform-specific implementations Date: Fri, 31 Mar 2023 17:14:59 +0800 Message-Id: <20230331091501.3800299-2-jk@codeconstruct.com.au> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230331091501.3800299-1-jk@codeconstruct.com.au> References: <20230331091501.3800299-1-jk@codeconstruct.com.au> MIME-Version: 1.0 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vitor Soares , devicetree@vger.kernel.org, Alexandre Belloni , linux-aspeed@lists.ozlabs.org, Rob Herring , Krzysztof Kozlowski , Matt Johnston , Jack Chen Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" The dw i3c core can be integrated into various SoC devices. Platforms that use this core may need a little configuration that is specific to that platform. Add some infrastructure to allow platform-specific behaviour: common probe/remove functions, a set of platform hook operations, and a pointer for platform-specific data in struct dw_i3c_master. Move the common api into a new (i3c local) header file. Platforms will provide their own struct platform_driver, which allocates struct dw_i3c_master, does any platform-specific probe behaviour, and calls into the common probe. A future change will add new platform support that uses this infrastructure. Signed-off-by: Jeremy Kerr --- v2: - structure for platform implementations as separate platform_drivers, to be implemented in separate source files - provide default ops rather than null checks v3: - remove ->platform_data to use an encapsulated dw_i3c_master for platform implementations instead --- drivers/i3c/master/dw-i3c-master.c | 76 +++++++++++++++++------------- drivers/i3c/master/dw-i3c-master.h | 54 +++++++++++++++++++++ 2 files changed, 97 insertions(+), 33 deletions(-) create mode 100644 drivers/i3c/master/dw-i3c-master.h diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c index 1c146a39e1bd..9fc03108a5db 100644 --- a/drivers/i3c/master/dw-i3c-master.c +++ b/drivers/i3c/master/dw-i3c-master.c @@ -21,6 +21,8 @@ #include #include +#include "dw-i3c-master.h" + #define DEVICE_CTRL 0x0 #define DEV_CTRL_ENABLE BIT(31) #define DEV_CTRL_RESUME BIT(30) @@ -189,8 +191,6 @@ #define DEV_ADDR_TABLE_STATIC_ADDR(x) ((x) & GENMASK(6, 0)) #define DEV_ADDR_TABLE_LOC(start, idx) ((start) + ((idx) << 2)) -#define MAX_DEVS 32 - #define I3C_BUS_SDR1_SCL_RATE 8000000 #define I3C_BUS_SDR2_SCL_RATE 6000000 #define I3C_BUS_SDR3_SCL_RATE 4000000 @@ -201,11 +201,6 @@ #define XFER_TIMEOUT (msecs_to_jiffies(1000)) -struct dw_i3c_master_caps { - u8 cmdfifodepth; - u8 datafifodepth; -}; - struct dw_i3c_cmd { u32 cmd_lo; u32 cmd_hi; @@ -224,25 +219,6 @@ struct dw_i3c_xfer { struct dw_i3c_cmd cmds[]; }; -struct dw_i3c_master { - struct i3c_master_controller base; - u16 maxdevs; - u16 datstartaddr; - u32 free_pos; - struct { - struct list_head list; - struct dw_i3c_xfer *cur; - spinlock_t lock; - } xferqueue; - struct dw_i3c_master_caps caps; - void __iomem *regs; - struct reset_control *core_rst; - struct clk *core_clk; - char version[5]; - char type[5]; - u8 addrs[MAX_DEVS]; -}; - struct dw_i3c_i2c_dev_data { u8 index; }; @@ -602,6 +578,10 @@ static int dw_i3c_master_bus_init(struct i3c_master_controller *m) u32 thld_ctrl; int ret; + ret = master->platform_ops->init(master); + if (ret) + return ret; + switch (bus->mode) { case I3C_BUS_MODE_MIXED_FAST: case I3C_BUS_MODE_MIXED_LIMITED: @@ -1124,14 +1104,23 @@ static const struct i3c_master_controller_ops dw_mipi_i3c_ops = { .i2c_xfers = dw_i3c_master_i2c_xfers, }; -static int dw_i3c_probe(struct platform_device *pdev) +/* default platform ops implementations */ +static int dw_i3c_platform_init_nop(struct dw_i3c_master *i3c) +{ + return 0; +} + +static const struct dw_i3c_platform_ops dw_i3c_platform_ops_default = { + .init = dw_i3c_platform_init_nop, +}; + +int dw_i3c_common_probe(struct dw_i3c_master *master, + struct platform_device *pdev) { - struct dw_i3c_master *master; int ret, irq; - master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL); - if (!master) - return -ENOMEM; + if (!master->platform_ops) + master->platform_ops = &dw_i3c_platform_ops_default; master->regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(master->regs)) @@ -1192,10 +1181,10 @@ static int dw_i3c_probe(struct platform_device *pdev) return ret; } +EXPORT_SYMBOL_GPL(dw_i3c_common_probe); -static int dw_i3c_remove(struct platform_device *pdev) +int dw_i3c_common_remove(struct dw_i3c_master *master) { - struct dw_i3c_master *master = platform_get_drvdata(pdev); int ret; ret = i3c_master_unregister(&master->base); @@ -1208,6 +1197,27 @@ static int dw_i3c_remove(struct platform_device *pdev) return 0; } +EXPORT_SYMBOL_GPL(dw_i3c_common_remove); + +/* base platform implementation */ + +static int dw_i3c_probe(struct platform_device *pdev) +{ + struct dw_i3c_master *master; + + master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL); + if (!master) + return -ENOMEM; + + return dw_i3c_common_probe(master, pdev); +} + +static int dw_i3c_remove(struct platform_device *pdev) +{ + struct dw_i3c_master *master = platform_get_drvdata(pdev); + + return dw_i3c_common_remove(master); +} static const struct of_device_id dw_i3c_master_of_match[] = { { .compatible = "snps,dw-i3c-master-1.00a", }, diff --git a/drivers/i3c/master/dw-i3c-master.h b/drivers/i3c/master/dw-i3c-master.h new file mode 100644 index 000000000000..cd376daa28cf --- /dev/null +++ b/drivers/i3c/master/dw-i3c-master.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023 Code Construct + * + * Author: Jeremy Kerr + */ + +#include +#include +#include +#include + +#define DW_I3C_MAX_DEVS 32 + +struct dw_i3c_master_caps { + u8 cmdfifodepth; + u8 datafifodepth; +}; + +struct dw_i3c_master { + struct i3c_master_controller base; + u16 maxdevs; + u16 datstartaddr; + u32 free_pos; + struct { + struct list_head list; + struct dw_i3c_xfer *cur; + spinlock_t lock; + } xferqueue; + struct dw_i3c_master_caps caps; + void __iomem *regs; + struct reset_control *core_rst; + struct clk *core_clk; + char version[5]; + char type[5]; + u8 addrs[DW_I3C_MAX_DEVS]; + + /* platform-specific data */ + const struct dw_i3c_platform_ops *platform_ops; +}; + +struct dw_i3c_platform_ops { + /* + * Called on early bus init: the i3c has been set up, but before any + * transactions have taken place. Platform implementations may use to + * perform actual device enabling with the i3c core ready. + */ + int (*init)(struct dw_i3c_master *i3c); +}; + +extern int dw_i3c_common_probe(struct dw_i3c_master *master, + struct platform_device *pdev); +extern int dw_i3c_common_remove(struct dw_i3c_master *master); + From patchwork Fri Mar 31 09:15:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Kerr X-Patchwork-Id: 1763704 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=codeconstruct.com.au header.i=@codeconstruct.com.au header.a=rsa-sha256 header.s=2022a header.b=llF+FE5l; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PnvlM51dnz1yYb for ; Fri, 31 Mar 2023 20:15:27 +1100 (AEDT) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4PnvlM44p9z3fSQ for ; Fri, 31 Mar 2023 20:15:27 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=codeconstruct.com.au header.i=@codeconstruct.com.au header.a=rsa-sha256 header.s=2022a header.b=llF+FE5l; dkim-atps=neutral X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=codeconstruct.com.au (client-ip=203.29.241.158; helo=codeconstruct.com.au; envelope-from=jk@codeconstruct.com.au; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=codeconstruct.com.au header.i=@codeconstruct.com.au header.a=rsa-sha256 header.s=2022a header.b=llF+FE5l; dkim-atps=neutral Received: from codeconstruct.com.au (pi.codeconstruct.com.au [203.29.241.158]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4Pnvl813Ybz3c9x for ; Fri, 31 Mar 2023 20:15:15 +1100 (AEDT) Received: by codeconstruct.com.au (Postfix, from userid 10000) id 9DC10203E4; Fri, 31 Mar 2023 17:15:14 +0800 (AWST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=codeconstruct.com.au; s=2022a; t=1680254114; bh=4i6zbPriP30VDqxbtLw8DULJL2d8uZhDMuiqyIgkVgY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=llF+FE5l2BTyEOtFdJl1ZHwWFVvFUruhmn50cOTFqKwvroSsYIYR3jOcgxj9o27gg 5SJiv06viDhRw3SPrdDRDyQ2OILIRaIMp80XtSzZbU6YiWBf/OQ7PGS/xLpj7/X+CQ RfhUiynEx2JxXgsbz8dgz8/ipMoLjuJ1esyUTVlTVPJ7g6O3ED3KDtQSEj/orsHY6v 7fbUSswN0vE0YCfxGeNdTkrJ3mR/HX6+t5AsFci+VUGc6o5ZmB6bKpAN9PR1UBWF/F +jPv8qQfT8Ru9Vq6WY6lyAfE00tv2X3rX0IFmNCxswOwUv4WB0kmO+RiLwoop59wvA ILzrdfHa7c9Dg== From: Jeremy Kerr To: linux-i3c@lists.infradead.org Subject: [PATCH v3 2/3] dt-bindings: i3c: Add AST2600 i3c controller Date: Fri, 31 Mar 2023 17:15:00 +0800 Message-Id: <20230331091501.3800299-3-jk@codeconstruct.com.au> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230331091501.3800299-1-jk@codeconstruct.com.au> References: <20230331091501.3800299-1-jk@codeconstruct.com.au> MIME-Version: 1.0 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vitor Soares , devicetree@vger.kernel.org, Alexandre Belloni , linux-aspeed@lists.ozlabs.org, Rob Herring , Krzysztof Kozlowski , Matt Johnston , Jack Chen Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" Add a devicetree binding for the ast2600 i3c controller hardware. This is heavily based on the designware i3c core, plus a reset facility and two platform-specific properties: - sda-pullup-ohms: to specify the value of the configurable pullup resistors on the SDA line - aspeed,global-regs: to reference the (ast2600-specific) i3c global register block, and the device index to use within it. Reviewed-by: Krzysztof Kozlowski (on v1) Signed-off-by: Jeremy Kerr --- v2: - example: replace aspeed clock defines with constants, so we're not reliant on recent clk patches. --- .../bindings/i3c/aspeed,ast2600-i3c.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/i3c/aspeed,ast2600-i3c.yaml diff --git a/Documentation/devicetree/bindings/i3c/aspeed,ast2600-i3c.yaml b/Documentation/devicetree/bindings/i3c/aspeed,ast2600-i3c.yaml new file mode 100644 index 000000000000..fcc3dbff9c9a --- /dev/null +++ b/Documentation/devicetree/bindings/i3c/aspeed,ast2600-i3c.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i3c/aspeed,ast2600-i3c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED AST2600 i3c controller + +maintainers: + - Jeremy Kerr + +allOf: + - $ref: i3c.yaml# + +properties: + compatible: + const: aspeed,ast2600-i3c + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + interrupts: + maxItems: 1 + + sda-pullup-ohms: + enum: [545, 750, 2000] + default: 2000 + description: | + Value to configure SDA pullup resistor, in Ohms. + + aspeed,global-regs: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to i3c global register syscon node + - description: index of this i3c controller in the global register set + description: | + A (phandle, controller index) reference to the i3c global register set + used for this device. + +required: + - compatible + - reg + - clocks + - interrupts + - aspeed,global-regs + +unevaluatedProperties: false + +examples: + - | + #include + + i3c-master@2000 { + compatible = "aspeed,ast2600-i3c"; + reg = <0x2000 0x1000>; + #address-cells = <3>; + #size-cells = <0>; + clocks = <&syscon 0>; + resets = <&syscon 0>; + aspeed,global-regs = <&i3c_global 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i3c1_default>; + interrupts = ; + }; +... From patchwork Fri Mar 31 09:15:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeremy Kerr X-Patchwork-Id: 1763705 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=codeconstruct.com.au header.i=@codeconstruct.com.au header.a=rsa-sha256 header.s=2022a header.b=M29Uvf7F; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PnvlR4GTXz1yYb for ; Fri, 31 Mar 2023 20:15:31 +1100 (AEDT) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4PnvlR2z7Qz3fSY for ; Fri, 31 Mar 2023 20:15:31 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=codeconstruct.com.au header.i=@codeconstruct.com.au header.a=rsa-sha256 header.s=2022a header.b=M29Uvf7F; dkim-atps=neutral X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=codeconstruct.com.au (client-ip=203.29.241.158; helo=codeconstruct.com.au; envelope-from=jk@codeconstruct.com.au; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=codeconstruct.com.au header.i=@codeconstruct.com.au header.a=rsa-sha256 header.s=2022a header.b=M29Uvf7F; dkim-atps=neutral Received: from codeconstruct.com.au (pi.codeconstruct.com.au [203.29.241.158]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4Pnvl81KFDz3cB1 for ; Fri, 31 Mar 2023 20:15:15 +1100 (AEDT) Received: by codeconstruct.com.au (Postfix, from userid 10000) id 0A50B20411; Fri, 31 Mar 2023 17:15:15 +0800 (AWST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=codeconstruct.com.au; s=2022a; t=1680254115; bh=Isit+42hJAL9l6M+xBH0lc98NTVjBMcOTLmr8l/AXNs=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=M29Uvf7Fm0GACasovv4IFVNJvqyyqVwjE5iiwczLMWWR5h6eO4pGg1joMSZ1O0n3K lTT1MUTs7/QerdhIL1/Lqo8eER+P51W3PrC4xHoamvQfMgK9S1GQBNFvUxpQT2mbqm H8BtPnbehsi+7qLXPSTLsx+EPrVFSX8oDeGkFUnoVeiF4nIdoB4uqQ8u0Njx32tSYI tEUx1KtZnBdx6e9vn5Pb9MZocbNautj36W7ZqYkOsfPyDVK7CA8fe00C+5zxTF3Uzs qlG9kWKYfDVOi1CVcMbthTDh+3DxAARdUXbo85qeK17HA+28WU9adPK4tIDphGW5mA bpX+4WZ1hGm1A== From: Jeremy Kerr To: linux-i3c@lists.infradead.org Subject: [PATCH v3 3/3] i3c: ast2600: Add AST2600 platform-specific driver Date: Fri, 31 Mar 2023 17:15:01 +0800 Message-Id: <20230331091501.3800299-4-jk@codeconstruct.com.au> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230331091501.3800299-1-jk@codeconstruct.com.au> References: <20230331091501.3800299-1-jk@codeconstruct.com.au> MIME-Version: 1.0 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vitor Soares , devicetree@vger.kernel.org, Alexandre Belloni , linux-aspeed@lists.ozlabs.org, Rob Herring , Krzysztof Kozlowski , Matt Johnston , Jack Chen Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" Now that we have platform-specific infrastructure for the dw i3c driver, add platform support for the ASPEED AST2600 SoC. The AST2600 has a small set of "i3c global" registers, providing platform-level i3c configuration outside of the i3c core. For the ast2600, we need a couple of extra setup operations: - on probe: find the i3c global register set and parse the SDA pullup resistor values - on init: set the pullups accordingly, and set the i3c instance IDs Signed-off-by: Jeremy Kerr --- v2: - use new dw platform infrastructure v3: - switch to embedded struct for platform data - drop of_match_ptr() --- MAINTAINERS | 6 + drivers/i3c/master/Kconfig | 14 ++ drivers/i3c/master/Makefile | 1 + drivers/i3c/master/ast2600-i3c-master.c | 168 ++++++++++++++++++++++++ 4 files changed, 189 insertions(+) create mode 100644 drivers/i3c/master/ast2600-i3c-master.c diff --git a/MAINTAINERS b/MAINTAINERS index bd8ebc25afcf..ecadd5ccf771 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9714,6 +9714,12 @@ S: Orphan F: Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml F: drivers/i3c/master/dw* +I3C DRIVER FOR ASPEED AST2600 +M: Jeremy Kerr +S: Maintained +F: Documentation/devicetree/bindings/i3c/aspeed,ast2600-i3c.yaml +F: drivers/i3c/master/ast2600-i3c-master.c + I3C SUBSYSTEM M: Alexandre Belloni L: linux-i3c@lists.infradead.org (moderated for non-subscribers) diff --git a/drivers/i3c/master/Kconfig b/drivers/i3c/master/Kconfig index 3b8f95916f46..90dee3ec5520 100644 --- a/drivers/i3c/master/Kconfig +++ b/drivers/i3c/master/Kconfig @@ -22,6 +22,20 @@ config DW_I3C_MASTER This driver can also be built as a module. If so, the module will be called dw-i3c-master. +config AST2600_I3C_MASTER + tristate "ASPEED AST2600 I3C master driver" + depends on DW_I3C_MASTER + depends on ARCH_ASPEED || COMPILE_TEST + select MFD_SYSCON + help + Support for ASPEED AST2600 I3C Controller. + + This hardware is an instance of the DW I3C controller; this + driver adds platform- specific support for AST2600 hardware. + + This driver can also be built as a module. If so, the module + will be called ast2600-i3c-master. + config SVC_I3C_MASTER tristate "Silvaco I3C Dual-Role Master driver" depends on I3C diff --git a/drivers/i3c/master/Makefile b/drivers/i3c/master/Makefile index b3fee0f690b2..3e97960160bc 100644 --- a/drivers/i3c/master/Makefile +++ b/drivers/i3c/master/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_CDNS_I3C_MASTER) += i3c-master-cdns.o obj-$(CONFIG_DW_I3C_MASTER) += dw-i3c-master.o +obj-$(CONFIG_AST2600_I3C_MASTER) += ast2600-i3c-master.o obj-$(CONFIG_SVC_I3C_MASTER) += svc-i3c-master.o obj-$(CONFIG_MIPI_I3C_HCI) += mipi-i3c-hci/ diff --git a/drivers/i3c/master/ast2600-i3c-master.c b/drivers/i3c/master/ast2600-i3c-master.c new file mode 100644 index 000000000000..d265669c04f1 --- /dev/null +++ b/drivers/i3c/master/ast2600-i3c-master.c @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 Code Construct + * + * Author: Jeremy Kerr + */ + +#include +#include +#include +#include +#include +#include + +#include "dw-i3c-master.h" + +/* AST2600-specific global register set */ +#define AST2600_I3CG_REG0(idx) (((idx) * 4 * 4) + 0x10) +#define AST2600_I3CG_REG1(idx) (((idx) * 4 * 4) + 0x14) + +#define AST2600_I3CG_REG0_SDA_PULLUP_EN_MASK GENMASK(29, 28) +#define AST2600_I3CG_REG0_SDA_PULLUP_EN_2K (0x0 << 28) +#define AST2600_I3CG_REG0_SDA_PULLUP_EN_750 (0x2 << 28) + +#define AST2600_I3CG_REG1_I2C_MODE BIT(0) +#define AST2600_I3CG_REG1_TEST_MODE BIT(1) +#define AST2600_I3CG_REG1_ACT_MODE_MASK GENMASK(3, 2) +#define AST2600_I3CG_REG1_ACT_MODE(x) (((x) << 2) & AST2600_I3CG_REG1_ACT_MODE_MASK) +#define AST2600_I3CG_REG1_PENDING_INT_MASK GENMASK(7, 4) +#define AST2600_I3CG_REG1_PENDING_INT(x) (((x) << 4) & AST2600_I3CG_REG1_PENDING_INT_MASK) +#define AST2600_I3CG_REG1_SA_MASK GENMASK(14, 8) +#define AST2600_I3CG_REG1_SA(x) (((x) << 8) & AST2600_I3CG_REG1_SA_MASK) +#define AST2600_I3CG_REG1_SA_EN BIT(15) +#define AST2600_I3CG_REG1_INST_ID_MASK GENMASK(19, 16) +#define AST2600_I3CG_REG1_INST_ID(x) (((x) << 16) & AST2600_I3CG_REG1_INST_ID_MASK) + +#define AST2600_DEFAULT_SDA_PULLUP_OHMS 2000 + +struct ast2600_i3c { + struct dw_i3c_master dw; + struct regmap *global_regs; + unsigned int global_idx; + unsigned int sda_pullup; +}; + +static struct ast2600_i3c *to_ast2600_i3c(struct dw_i3c_master *dw) +{ + return container_of(dw, struct ast2600_i3c, dw); +} + +static int ast2600_i3c_pullup_to_reg(unsigned int ohms, u32 *regp) +{ + u32 reg; + + switch (ohms) { + case 2000: + reg = AST2600_I3CG_REG0_SDA_PULLUP_EN_2K; + break; + case 750: + reg = AST2600_I3CG_REG0_SDA_PULLUP_EN_750; + break; + case 545: + reg = AST2600_I3CG_REG0_SDA_PULLUP_EN_2K | + AST2600_I3CG_REG0_SDA_PULLUP_EN_750; + break; + default: + return -EINVAL; + } + + if (regp) + *regp = reg; + + return 0; +} + +static int ast2600_i3c_init(struct dw_i3c_master *dw) +{ + struct ast2600_i3c *i3c = to_ast2600_i3c(dw); + u32 reg = 0; + int rc; + + /* reg0: set SDA pullup values */ + rc = ast2600_i3c_pullup_to_reg(i3c->sda_pullup, ®); + if (rc) + return rc; + + rc = regmap_write(i3c->global_regs, + AST2600_I3CG_REG0(i3c->global_idx), reg); + if (rc) + return rc; + + /* reg1: set up the instance id, but leave everything else disabled, + * as it's all for client mode + */ + reg = AST2600_I3CG_REG1_INST_ID(i3c->global_idx); + rc = regmap_write(i3c->global_regs, + AST2600_I3CG_REG1(i3c->global_idx), reg); + + return rc; +} + +const struct dw_i3c_platform_ops ast2600_i3c_ops = { + .init = ast2600_i3c_init, +}; + +static int ast2600_i3c_probe(struct platform_device *pdev) +{ + struct device_node *np = pdev->dev.of_node; + struct of_phandle_args gspec; + struct ast2600_i3c *i3c; + int rc; + + i3c = devm_kzalloc(&pdev->dev, sizeof(*i3c), GFP_KERNEL); + if (!i3c) + return -ENOMEM; + + rc = of_parse_phandle_with_fixed_args(np, "aspeed,global-regs", 1, 0, + &gspec); + if (rc) + return -ENODEV; + + i3c->global_regs = syscon_node_to_regmap(gspec.np); + of_node_put(gspec.np); + + if (IS_ERR(i3c->global_regs)) + return PTR_ERR(i3c->global_regs); + + i3c->global_idx = gspec.args[0]; + + rc = of_property_read_u32(np, "sda-pullup-ohms", &i3c->sda_pullup); + if (rc) + i3c->sda_pullup = AST2600_DEFAULT_SDA_PULLUP_OHMS; + + rc = ast2600_i3c_pullup_to_reg(i3c->sda_pullup, NULL); + if (rc) + dev_err(&pdev->dev, "invalid sda-pullup value %d\n", + i3c->sda_pullup); + + i3c->dw.platform_ops = &ast2600_i3c_ops; + return dw_i3c_common_probe(&i3c->dw, pdev); +} + +static int ast2600_i3c_remove(struct platform_device *pdev) +{ + struct dw_i3c_master *dw_i3c = platform_get_drvdata(pdev); + + return dw_i3c_common_remove(dw_i3c); +} + +static const struct of_device_id ast2600_i3c_master_of_match[] = { + { .compatible = "aspeed,ast2600-i3c", }, + {}, +}; +MODULE_DEVICE_TABLE(of, ast2600_i3c_master_of_match); + +static struct platform_driver ast2600_i3c_driver = { + .probe = ast2600_i3c_probe, + .remove = ast2600_i3c_remove, + .driver = { + .name = "ast2600-i3c-master", + .of_match_table = ast2600_i3c_master_of_match, + }, +}; +module_platform_driver(ast2600_i3c_driver); + +MODULE_AUTHOR("Jeremy Kerr "); +MODULE_DESCRIPTION("ASPEED AST2600 I3C driver"); +MODULE_LICENSE("GPL");