From patchwork Thu Dec 22 13:31:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 1718829 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=a13h9910; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4NdB6v18qwz23dW for ; Fri, 23 Dec 2022 00:31:51 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235281AbiLVNbt (ORCPT ); Thu, 22 Dec 2022 08:31:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57246 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235195AbiLVNbq (ORCPT ); Thu, 22 Dec 2022 08:31:46 -0500 Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [IPv6:2607:f8b0:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 931DE14099 for ; Thu, 22 Dec 2022 05:31:43 -0800 (PST) Received: by mail-pl1-x62a.google.com with SMTP id t2so2039638ply.2 for ; Thu, 22 Dec 2022 05:31:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jU2cJ4xdN6chDPHsl9Khfnqy+f3tWHQm/Dd+taYpQwM=; b=a13h9910piJ6N2dL4cWrYiMpA01qJ7gVhjne6stZmDoxxqCW/F1Kx3hgr0N33Ukg/0 yRxYv5qfOrJ/rZHXx1gktdcSw8qCTEyHqH1s34NPyt1wI+l7G6BnTOp9r4K39lWtJYqe AISaekgUHDVnX1w5/a8BBI7VoTrOxNfuSc3vwbCmMfaQvD5HIbF7b/mlwUCFGlM2ldeT 1Br3ll4E2pcUU0b//Lg+dzHlRxmPeT8CMRzd3z5L4a4u4hY1P8tOzqzed/YHofNDQ6F1 EHC6EUehQFtOYxKIonvpwqNpAvG9hWoTk3hgXcYWPv68VqXqWrzSrfMr54aMh9sklOax 4HVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jU2cJ4xdN6chDPHsl9Khfnqy+f3tWHQm/Dd+taYpQwM=; b=8AjSnlhrfqICOYNI1dqvo1lLvj3X8jefcTDSJGNeewV0k4oAZ3LRKsiwcQU9W3pLJr B9iyPFqxGisv+jF7FmpRmKQdORL2ob2jpga11T6a0omWmMPK7ghVsa88EUiZye0cpxrY e367KX1O2LFLNPUgtN4iistfDFpIQOAV4RLIIJzz7OMlE/uP8vKXMt/6cuSR+uYEXTkE 9lKCCvI20iykxJIaWyWC+outSnztVi3EDFN/Hhb8CKCj/EDq9Imc3HCXx4COf4pMe7/l gXrUownu1FUOmYzPwo5bywGieL+XUozMRG64Y/thgRFJv2qEa0rn72c5QtX/uuhM5W8M Xi+A== X-Gm-Message-State: AFqh2kpwUOVyO8RNCWqQ5y00jWWkJP2/B8uIVD86MrS011vvzqtwjyVG H4vJgh7Pc2ObRI+OUxm/Z8+DZIAzxee1evI= X-Google-Smtp-Source: AMrXdXuI0wnuKIh/Wo7LU9h7ikh+A1AQ8D7iEuAsCzphFUQz7eAsNLmv9c1XePmbJkZTe/NRGGj/uA== X-Received: by 2002:a05:6a20:1b1d:b0:ac:5429:e609 with SMTP id ch29-20020a056a201b1d00b000ac5429e609mr5977045pzb.32.1671715903121; Thu, 22 Dec 2022 05:31:43 -0800 (PST) Received: from localhost.localdomain ([117.217.177.99]) by smtp.gmail.com with ESMTPSA id f66-20020a623845000000b00573a9d13e9esm737467pfa.36.2022.12.22.05.31.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Dec 2022 05:31:42 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: bhelgaas@google.com, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam , Krzysztof Kozlowski Subject: [PATCH v2 1/3] dt-bindings: PCI: qcom: Update maintainers Date: Thu, 22 Dec 2022 19:01:21 +0530 Message-Id: <20221222133123.50676-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221222133123.50676-1-manivannan.sadhasivam@linaro.org> References: <20221222133123.50676-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Stanimir has left mm-sol and already expressed his wish to not continue maintaining the PCIe RC driver. So his entry can be removed. Adding myself as the co-maintainer since I took over the PCIe RC driver maintainership from Stanimir. Acked-by: Krzysztof Kozlowski Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 54f07852d279..02450fb26bb9 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -8,7 +8,7 @@ title: Qualcomm PCI express root complex maintainers: - Bjorn Andersson - - Stanimir Varbanov + - Manivannan Sadhasivam description: | Qualcomm PCIe root complex controller is based on the Synopsys DesignWare From patchwork Thu Dec 22 13:31:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 1718831 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Currently, the binding only documents the internal MSI implementation. Let's document the GIC-ITS imeplementation by making use of msi-map and msi-map-mask properties. Only one of the implementation should be used at a time. Signed-off-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 02450fb26bb9..10fec6a7abfc 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -104,14 +104,20 @@ required: - compatible - reg - reg-names - - interrupts - - interrupt-names - - "#interrupt-cells" - interrupt-map-mask - interrupt-map - clocks - clock-names +oneOf: + - required: + - interrupts + - interrupt-names + - "#interrupt-cells" + - required: + - msi-map + - msi-map-mask + allOf: - $ref: /schemas/pci/pci-bus.yaml# - if: From patchwork Thu Dec 22 13:31:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 1718832 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Add support for it. Currently, BDF (0:0.0) and BDF (1:0.0) are enabled and with the msi-map-mask of 0xff00, all the 32 devices under these two busses can share the same Device ID. The GIC-ITS MSI implementation provides an advantage over internal MSI implementation using Locality-specific Peripheral Interrupts (LPI) that would allow MSIs to be targeted for each CPU core. It should be noted that the MSIs for BDF (1:0.0) only works with Device ID of 0x5980 and 0x5a00. Hence, the IDs are swapped. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 570475040d95..c4dd5838fac6 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -1733,9 +1733,13 @@ pcie0: pci@1c00000 { ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>, <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>; - interrupts = ; - interrupt-names = "msi"; - #interrupt-cells = <1>; + /* + * MSIs for BDF (1:0.0) only works with Device ID 0x5980. + * Hence, the IDs are swapped. + */ + msi-map = <0x0 &gic_its 0x5981 0x1>, + <0x100 &gic_its 0x5980 0x1>; + msi-map-mask = <0xff00>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ <0 0 0 2 &intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ @@ -1842,9 +1846,13 @@ pcie1: pci@1c08000 { ranges = <0x01000000 0x0 0x40200000 0 0x40200000 0x0 0x100000>, <0x02000000 0x0 0x40300000 0 0x40300000 0x0 0x1fd00000>; - interrupts = ; - interrupt-names = "msi"; - #interrupt-cells = <1>; + /* + * MSIs for BDF (1:0.0) only works with Device ID 0x5a00. + * Hence, the IDs are swapped. + */ + msi-map = <0x0 &gic_its 0x5a01 0x1>, + <0x100 &gic_its 0x5a00 0x1>; + msi-map-mask = <0xff00>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ <0 0 0 2 &intc 0 0 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */