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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.22 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:23 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 091/149] global: Migrate CONFIG_MXC_USB_FLAGS et al to CFG Date: Sun, 4 Dec 2022 10:13:22 -0500 Message-Id: <20221204151420.56851-1-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221202214251.3027264-41-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform simple renames of: CONFIG_MXC_USB_FLAGS to CFG_MXC_USB_FLAGS CONFIG_MXC_USB_PORT to CFG_MXC_USB_PORT CONFIG_MXC_USB_PORTSC to CFG_MXC_USB_PORTSC Signed-off-by: Tom Rini --- drivers/usb/host/ehci-mx5.c | 4 ++-- drivers/usb/host/ehci-mx6.c | 8 ++++---- include/configs/apalis_imx6.h | 4 ++-- include/configs/aristainetos2.h | 4 ++-- include/configs/brppt2.h | 2 +- include/configs/cl-som-imx7.h | 4 ++-- include/configs/cm_fx6.h | 4 ++-- include/configs/colibri-imx6ull.h | 4 ++-- include/configs/colibri_imx6.h | 4 ++-- include/configs/colibri_imx7.h | 4 ++-- include/configs/dart_6ul.h | 4 ++-- include/configs/dh_imx6.h | 4 ++-- include/configs/display5.h | 2 +- include/configs/embestmx6boards.h | 4 ++-- include/configs/ge_b1x5v2.h | 4 ++-- include/configs/gw_ventana.h | 4 ++-- include/configs/imx6_logic.h | 4 ++-- include/configs/imx6dl-mamoj.h | 4 ++-- include/configs/imx6q-bosch-acc.h | 4 ++-- include/configs/imx7-cm.h | 2 +- include/configs/imx8mm-cl-iot-gate.h | 2 +- include/configs/kontron-sl-mx6ul.h | 4 ++-- include/configs/kontron-sl-mx8mm.h | 4 ++-- include/configs/kp_imx53.h | 4 ++-- include/configs/kp_imx6q_tpc.h | 4 ++-- include/configs/liteboard.h | 4 ++-- include/configs/m53menlo.h | 6 +++--- include/configs/meerkat96.h | 2 +- include/configs/mx51evk.h | 6 +++--- include/configs/mx53cx9020.h | 6 +++--- include/configs/mx53loco.h | 6 +++--- include/configs/mx53ppd.h | 6 +++--- include/configs/mx6cuboxi.h | 2 +- include/configs/mx6memcal.h | 2 +- include/configs/mx6sabreauto.h | 4 ++-- include/configs/mx6sabresd.h | 4 ++-- include/configs/mx6slevk.h | 4 ++-- include/configs/mx6sllevk.h | 2 +- include/configs/mx6sxsabreauto.h | 4 ++-- include/configs/mx6sxsabresd.h | 4 ++-- include/configs/mx6ul_14x14_evk.h | 4 ++-- include/configs/mx7dsabresd.h | 2 +- include/configs/mx7ulp_com.h | 2 +- include/configs/mys_6ulx.h | 4 ++-- include/configs/nitrogen6x.h | 4 ++-- include/configs/novena.h | 4 ++-- include/configs/npi_imx6ull.h | 4 ++-- include/configs/o4-imx6ull-nano.h | 2 +- include/configs/opos6uldev.h | 4 ++-- include/configs/pcl063.h | 4 ++-- include/configs/pcl063_ull.h | 4 ++-- include/configs/pico-imx6.h | 4 ++-- include/configs/pico-imx6ul.h | 4 ++-- include/configs/pico-imx7d.h | 4 ++-- include/configs/somlabs_visionsom_6ull.h | 4 ++-- include/configs/tbs2910.h | 2 +- include/configs/tqma6.h | 2 +- include/configs/usbarmory.h | 6 +++--- include/configs/verdin-imx8mm.h | 2 +- include/configs/vining_2000.h | 4 ++-- include/configs/wandboard.h | 4 ++-- include/configs/warp7.h | 2 +- include/configs/xpress.h | 4 ++-- 63 files changed, 119 insertions(+), 119 deletions(-) diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c index 964a53bb7c0e..c11279867c7c 100644 --- a/drivers/usb/host/ehci-mx5.c +++ b/drivers/usb/host/ehci-mx5.c @@ -299,10 +299,10 @@ static int ehci_usb_probe(struct udevice *dev) HC_LENGTH(ehci_readl(&(hccr)->cr_capbase))); setbits_le32(&ehci->usbmode, CM_HOST); - __raw_writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); + __raw_writel(CFG_MXC_USB_PORTSC, &ehci->portsc); setbits_le32(&ehci->portsc, USB_EN); - mxc_set_usbcontrol(priv->portnr, CONFIG_MXC_USB_FLAGS); + mxc_set_usbcontrol(priv->portnr, CFG_MXC_USB_FLAGS); mdelay(10); return ehci_register(dev, hccr, hcor, &mx5_ehci_ops, 0, diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index fa2ca2a1d912..0a12db614ff4 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -70,8 +70,8 @@ DECLARE_GLOBAL_DATA_PTR; #define UCMD_RESET (1 << 1) /* controller reset */ /* If this is not defined, assume MX6/MX7/MX8M SoC default */ -#ifndef CONFIG_MXC_USB_PORTSC -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#ifndef CFG_MXC_USB_PORTSC +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* Base address for this IP block is 0x02184800 */ @@ -411,7 +411,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, return 0; setbits_le32(&ehci->usbmode, CM_HOST); - writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc); + writel(CFG_MXC_USB_PORTSC, &ehci->portsc); setbits_le32(&ehci->portsc, USB_EN); mdelay(10); @@ -454,7 +454,7 @@ static u32 mx6_portsc(enum usb_phy_interface phy_type) case USBPHY_INTERFACE_MODE_HSIC: return PORT_PTS_HSIC; default: - return CONFIG_MXC_USB_PORTSC; + return CFG_MXC_USB_PORTSC; } } diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 2fb4cfa5e9a1..8a9f3ef75a7d 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -26,8 +26,8 @@ /* USB Configs */ /* Host */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Framebuffer and LCD */ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index be1478ea8b67..286435d6f84c 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -413,8 +413,8 @@ /* DMA stuff, needed for GPMI/MXS NAND support */ /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* UBI support */ diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index 32d9f503d9f0..38c98c5e21c4 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -79,6 +79,6 @@ BUR_COMMON_ENV \ #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_BRPP2_IMX6_H */ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index b7920c7b3057..0a667c60b61b 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -96,7 +96,7 @@ #endif /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* __CONFIG_H */ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 90ebec4a94ca..7d0f2b6dc13a 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -135,8 +135,8 @@ #define CFG_FEC_MXC_PHYADDR 0 /* USB */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Boot */ #define CFG_SYS_BOOTMAPSZ (8 << 20) diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 5b802aa92a9c..ba45ee4efd37 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -123,8 +123,8 @@ /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* USB Device Firmware Update support */ #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 3c67aab04c1c..4b2841833b5a 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -23,8 +23,8 @@ /* USB Configs */ /* Host */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Command definition */ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 91f87ea283fe..c568643977ca 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -167,7 +167,7 @@ /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index fb619105a760..c5781670864b 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -47,8 +47,8 @@ #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define ENV_MMC \ "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 348be5a6ec64..5cf73274d5e1 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -32,8 +32,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* USB Gadget (DFU, UMS) */ #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE) diff --git a/include/configs/display5.h b/include/configs/display5.h index cd1544be039f..3b96fff7d6f8 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -288,5 +288,5 @@ /* The 0x120000 value corresponds to above SPI-NOR memory MAP */ #endif -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_H */ diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 81a92c9bb971..31c7e104f6b8 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -18,8 +18,8 @@ #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index 529b8fc53e57..49b058cb10d4 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -24,8 +24,8 @@ #endif /* USB */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Memory */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index c6ace9d65eb3..0a9dfe736f7d 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -36,8 +36,8 @@ /* Various command support */ /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Miscellaneous configurable options */ diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index f9544cd430ca..85c054451f35 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -117,8 +117,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* Falcon Mode */ diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index db08e43f0d86..6c61b3f44801 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -43,8 +43,8 @@ #define CFG_FEC_MXC_PHYADDR 1 /* USB */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Falcon */ diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h index e28185f24dd3..2c998cdcfc72 100644 --- a/include/configs/imx6q-bosch-acc.h +++ b/include/configs/imx6q-bosch-acc.h @@ -110,7 +110,7 @@ #endif #endif -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* __IMX6Q_ACC_H */ diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index 84fb1bfb7598..106fbdb9053c 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -79,6 +79,6 @@ /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_H */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 64cdc401d039..2641d7bc960b 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -139,6 +139,6 @@ #define CFG_FEC_MXC_PHYADDR 0 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /*__IMX8MM_CL_IOT_GATE_H*/ diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index 4354f3945e83..1c92cd787677 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -25,8 +25,8 @@ #define CFG_MXC_UART_BASE UART4_BASE #ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* Boot order for distro boot */ diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index d80238bd02f2..eee3d2ddb037 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -25,8 +25,8 @@ /* Board and environment settings */ #ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* GUID for capsule updatable firmware image */ diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h index da8a67b4ab63..6e383cbe75f7 100644 --- a/include/configs/kp_imx53.h +++ b/include/configs/kp_imx53.h @@ -11,8 +11,8 @@ #include /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Command definition */ diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index 99321b320f5f..1aa4b8ab5987 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -18,8 +18,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #define CFG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 63e5dbfab775..5811059c8e2b 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -95,8 +95,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #ifdef CONFIG_CMD_NET diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 9aac5677fb75..1ecbba1b58ff 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -70,9 +70,9 @@ * USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORT 1 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* LVDS display */ diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h index 9e480fe0558e..6ffc1282411a 100644 --- a/include/configs/meerkat96.h +++ b/include/configs/meerkat96.h @@ -24,6 +24,6 @@ /* Environment configs */ /* USB configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 123b7a533b17..dff54d04a678 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -33,9 +33,9 @@ #define CFG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR /* USB Configs */ -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI -#define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED +#define CFG_MXC_USB_PORT 1 +#define CFG_MXC_USB_PORTSC PORT_PTS_ULPI +#define CFG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED /* Framebuffer and LCD */ diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index 1a3ec6e0cdb8..e995776d30d5 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -23,9 +23,9 @@ /* USB Configs */ -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORT 1 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Command definition */ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index d87f9e942c51..7398804e6b54 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -17,9 +17,9 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB Configs */ -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORT 1 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* PMIC Controller */ #define CFG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 94d2191af91d..df65dbeea41c 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -12,9 +12,9 @@ #include /* USB Configs */ -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORT 1 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Command definition */ diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 871d52c343f5..f0d6405d3012 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -15,7 +15,7 @@ #define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* USB */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) /* Command definition */ diff --git a/include/configs/mx6memcal.h b/include/configs/mx6memcal.h index b664962a26a5..f2edd13eb881 100644 --- a/include/configs/mx6memcal.h +++ b/include/configs/mx6memcal.h @@ -31,6 +31,6 @@ #define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_MXC_USB_PORTSC PORT_PTS_UTMI +#define CFG_MXC_USB_PORTSC PORT_PTS_UTMI #endif /* __CONFIG_H */ diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index 274c14bbd383..da98139d7d77 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -12,8 +12,8 @@ #define CONSOLE_DEV "ttymxc3" /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define CFG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index af9978e02c89..2b028e3aa2b1 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -29,8 +29,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #endif /* __MX6SABRESD_CONFIG_H */ diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index f6d9ac20821f..39c8ef060c7f 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -90,8 +90,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #define CFG_SYS_FSL_USDHC_NUM 3 diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index aec3e51bff87..290996b51bc7 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -94,7 +94,7 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif #include diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 3d0f6e452d65..1c14a6beb0ac 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -96,8 +96,8 @@ #define CFG_FEC_MXC_PHYADDR 0x0 #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #define CFG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 8c39e6d6cf4d..8b02c3b63101 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -118,8 +118,8 @@ #define CFG_FEC_MXC_PHYADDR 0x1 #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #ifdef CONFIG_CMD_PCI diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 3f8a90b626d1..635ae78abcb5 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -116,8 +116,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #ifdef CONFIG_CMD_NET diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 9c938f04e93c..94bee75fdea5 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -99,6 +99,6 @@ #endif /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_H */ diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index 5ee5129801d2..a310c64e7948 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -51,5 +51,5 @@ #define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CFG_SYS_INIT_RAM_SIZE SZ_256K -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_H */ diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index 0c0235b42984..2571098d06c6 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -30,8 +30,8 @@ #define CFG_SYS_NAND_BASE 0x40000000 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200n8\0" \ diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 5625771bad14..c9c599d07621 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -21,8 +21,8 @@ #define CFG_FEC_MXC_PHYADDR 6 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #ifdef CONFIG_CMD_MMC #define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) diff --git a/include/configs/novena.h b/include/configs/novena.h index 7243549b68d8..dc5b04312905 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -53,8 +53,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* Extra U-Boot environment. */ diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index 24d7b0c26e86..5f933391cc01 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -29,8 +29,8 @@ #define CFG_SYS_NAND_BASE 0x40000000 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #ifdef CONFIG_CMD_NET #define CFG_FEC_MXC_PHYADDR 0x1 diff --git a/include/configs/o4-imx6ull-nano.h b/include/configs/o4-imx6ull-nano.h index 0e1083a2130c..9050da8738b1 100644 --- a/include/configs/o4-imx6ull-nano.h +++ b/include/configs/o4-imx6ull-nano.h @@ -12,7 +12,7 @@ #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #if IS_ENABLED(CONFIG_CMD_USB) -# define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +# define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* CONFIG_CMD_USB */ #define CFG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index 459134b93f83..1edb1826c4e8 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -19,8 +19,8 @@ /* USB */ #ifdef CONFIG_USB_EHCI_MX6 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* LCD */ diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index e8c48cf83652..38dcee053596 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -42,8 +42,8 @@ #define CFG_SYS_NAND_BASE 0x40000000 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200n8\0" \ diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index bd04268a3ef3..d742201ce43b 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -44,8 +44,8 @@ #define CFG_SYS_NAND_BASE 0x40000000 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define ENV_MMC \ "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \ diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index a1d0dd93c526..d806d7d9c57d 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -16,8 +16,8 @@ #define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 64e0a5564810..4caa82337583 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -23,8 +23,8 @@ #define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index dbeaeea77f7d..fd8962e9f751 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -107,7 +107,7 @@ #define CFG_SYS_FSL_USDHC_NUM 2 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index 3418d4e2b559..041a83b057d4 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -61,8 +61,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #ifdef CONFIG_CMD_NET diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 9b396e6e73b0..535859792d3b 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -27,7 +27,7 @@ /* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* CONFIG_CMD_USB */ #define CFG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index cb5f7fc25af9..af5a474cf31e 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -39,7 +39,7 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #if defined(CONFIG_TQMA6X_MMC_BOOT) diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 00b45cc3d2ad..27e61f5b8f46 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -23,9 +23,9 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB */ -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORT 1 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Linux boot */ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 27d7efb883de..8cb1f1aff353 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -67,6 +67,6 @@ #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __VERDIN_IMX8MM_H */ diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 7954ed9910c7..6db68c1e7001 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -36,8 +36,8 @@ /* Network */ #define CFG_FEC_MXC_PHYADDR 0x0 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #ifdef CONFIG_CMD_PCI #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6) diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 8853bcd7be28..7b8c5cbe7a8f 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -17,8 +17,8 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0\0" \ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index 0826e0bbe025..5d2956a5963c 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -93,7 +93,7 @@ #define CFG_SYS_FSL_USDHC_NUM 1 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) /* USB Device Firmware Update support */ #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/xpress.h b/include/configs/xpress.h index c8ae047e62c3..a2aa31008ec9 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -28,8 +28,8 @@ /* Environment is in stored in the eMMC boot partition */ /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define CFG_FEC_ENET_DEV 0 #define CFG_FEC_MXC_PHYADDR 0x0 From patchwork Sun Dec 4 15:13:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1711964 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.24 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:25 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 093/149] global: Migrate CONFIG_OTHBOOTARGS to CFG Date: Sun, 4 Dec 2022 10:13:24 -0500 Message-Id: <20221204151420.56851-3-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_OTHBOOTARGS to CFG_OTHBOOTARGS Signed-off-by: Tom Rini --- include/configs/x86-common.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 65a1e63e00e6..5d461e8d0c64 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -27,9 +27,9 @@ /* Default environment */ #define CONFIG_RAMDISK_ADDR 0x4000000 #if defined(CONFIG_GENERATE_ACPI_TABLE) || defined(CONFIG_EFI_STUB) -#define CONFIG_OTHBOOTARGS "othbootargs=\0" +#define CFG_OTHBOOTARGS "othbootargs=\0" #else -#define CONFIG_OTHBOOTARGS "othbootargs=acpi=off\0" +#define CFG_OTHBOOTARGS "othbootargs=acpi=off\0" #endif #if defined(CONFIG_DISTRO_DEFAULTS) @@ -49,7 +49,7 @@ "pciconfighost=1\0" \ "netdev=eth0\0" \ "consoledev=ttyS0\0" \ - CONFIG_OTHBOOTARGS \ + CFG_OTHBOOTARGS \ "scriptaddr=0x7000000\0" \ "kernel_addr_r=0x1000000\0" \ "ramdisk_addr_r=0x4000000\0" \ From patchwork Sun Dec 4 15:13:25 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.25 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:26 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 094/149] global: Migrate CONFIG_PCIE_IMX_PERST_GPIO to CFG Date: Sun, 4 Dec 2022 10:13:25 -0500 Message-Id: <20221204151420.56851-4-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_PCIE_IMX_PERST_GPIO to CFG_PCIE_IMX_PERST_GPIO Signed-off-by: Tom Rini --- drivers/pci/pcie_imx.c | 12 ++++++------ include/configs/mx6sabresd.h | 2 +- include/configs/mx6sxsabresd.h | 2 +- include/configs/novena.h | 2 +- include/configs/tbs2910.h | 2 +- include/configs/vining_2000.h | 2 +- 6 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c index 46ac01713ff7..902507aaae38 100644 --- a/drivers/pci/pcie_imx.c +++ b/drivers/pci/pcie_imx.c @@ -566,7 +566,7 @@ int imx6_pcie_toggle_reset(struct gpio_desc *gpio, bool active_high) * do self-initialisation. * * In case your #PERST pin is connected to a plain GPIO pin of the - * CPU, you can define CONFIG_PCIE_IMX_PERST_GPIO in your board's + * CPU, you can define CFG_PCIE_IMX_PERST_GPIO in your board's * configuration file and the condition below will handle the rest * of the reset toggling. * @@ -578,13 +578,13 @@ int imx6_pcie_toggle_reset(struct gpio_desc *gpio, bool active_high) * Linux at all in the first place since it's in some non-reset * state due to being previously used in U-Boot. */ -#ifdef CONFIG_PCIE_IMX_PERST_GPIO - gpio_request(CONFIG_PCIE_IMX_PERST_GPIO, "pcie_reset"); - gpio_direction_output(CONFIG_PCIE_IMX_PERST_GPIO, 0); +#ifdef CFG_PCIE_IMX_PERST_GPIO + gpio_request(CFG_PCIE_IMX_PERST_GPIO, "pcie_reset"); + gpio_direction_output(CFG_PCIE_IMX_PERST_GPIO, 0); mdelay(20); - gpio_set_value(CONFIG_PCIE_IMX_PERST_GPIO, 1); + gpio_set_value(CFG_PCIE_IMX_PERST_GPIO, 1); mdelay(20); - gpio_free(CONFIG_PCIE_IMX_PERST_GPIO); + gpio_free(CFG_PCIE_IMX_PERST_GPIO); #else if (dm_gpio_is_valid(gpio)) { /* Assert PERST# for 20ms then de-assert */ diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 2b028e3aa2b1..116a9c6abcf3 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -20,7 +20,7 @@ #define CFG_SYS_FSL_USDHC_NUM 3 #ifdef CONFIG_CMD_PCI -#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) +#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) #endif diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 8b02c3b63101..85e5cfbb58db 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -123,7 +123,7 @@ #endif #ifdef CONFIG_CMD_PCI -#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) +#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) #endif diff --git a/include/configs/novena.h b/include/configs/novena.h index dc5b04312905..6f4353e7df78 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -41,7 +41,7 @@ /* PCI express */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(3, 29) +#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(3, 29) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(7, 12) #endif diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 535859792d3b..256331ae1733 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -22,7 +22,7 @@ /* PCI */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) +#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) #endif /* USB */ diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 6db68c1e7001..7bfc22c043fe 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -40,7 +40,7 @@ #define CFG_MXC_USB_FLAGS 0 #ifdef CONFIG_CMD_PCI -#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6) +#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6) #endif #define CFG_IMX6_PWM_PER_CLK 66000000 From patchwork Sun Dec 4 15:13:26 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.26 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:27 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 095/149] global: Migrate CONFIG_PCIE_IMX_POWER_GPIO to CFG Date: Sun, 4 Dec 2022 10:13:26 -0500 Message-Id: <20221204151420.56851-5-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_PCIE_IMX_POWER_GPIO to CFG_PCIE_IMX_POWER_GPIO Signed-off-by: Tom Rini --- drivers/pci/pcie_imx.c | 10 +++++----- include/configs/mx6sabresd.h | 2 +- include/configs/mx6sxsabresd.h | 2 +- include/configs/novena.h | 2 +- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c index 902507aaae38..da48466480cb 100644 --- a/drivers/pci/pcie_imx.c +++ b/drivers/pci/pcie_imx.c @@ -534,13 +534,13 @@ static int imx6_pcie_init_phy(void) int imx6_pcie_toggle_power(struct udevice *vpcie) { -#ifdef CONFIG_PCIE_IMX_POWER_GPIO - gpio_request(CONFIG_PCIE_IMX_POWER_GPIO, "pcie_power"); - gpio_direction_output(CONFIG_PCIE_IMX_POWER_GPIO, 0); +#ifdef CFG_PCIE_IMX_POWER_GPIO + gpio_request(CFG_PCIE_IMX_POWER_GPIO, "pcie_power"); + gpio_direction_output(CFG_PCIE_IMX_POWER_GPIO, 0); mdelay(20); - gpio_set_value(CONFIG_PCIE_IMX_POWER_GPIO, 1); + gpio_set_value(CFG_PCIE_IMX_POWER_GPIO, 1); mdelay(20); - gpio_free(CONFIG_PCIE_IMX_POWER_GPIO); + gpio_free(CFG_PCIE_IMX_POWER_GPIO); #endif #if CONFIG_IS_ENABLED(DM_REGULATOR) diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 116a9c6abcf3..1aa8a56cceb6 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -21,7 +21,7 @@ #ifdef CONFIG_CMD_PCI #define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) -#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) +#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) #endif /* PMIC */ diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 85e5cfbb58db..fe0ad34ef9c1 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -124,7 +124,7 @@ #ifdef CONFIG_CMD_PCI #define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) -#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) +#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) #endif #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR diff --git a/include/configs/novena.h b/include/configs/novena.h index 6f4353e7df78..5e8b7fa62170 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -42,7 +42,7 @@ /* PCI express */ #ifdef CONFIG_CMD_PCI #define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(3, 29) -#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(7, 12) +#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(7, 12) #endif /* PMIC */ From patchwork Sun Dec 4 15:13:27 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.28 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:28 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 096/149] global: Migrate CONFIG_PHY_ET1011C_TX_CLK_FIX to CFG Date: Sun, 4 Dec 2022 10:13:27 -0500 Message-Id: <20221204151420.56851-6-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_PHY_ET1011C_TX_CLK_FIX to CFG_PHY_ET1011C_TX_CLK_FIX Signed-off-by: Tom Rini --- drivers/net/phy/et1011c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/phy/et1011c.c b/drivers/net/phy/et1011c.c index c243c5b72f81..7eff5ec7cacb 100644 --- a/drivers/net/phy/et1011c.c +++ b/drivers/net/phy/et1011c.c @@ -60,7 +60,7 @@ static int et1011c_parse_status(struct phy_device *phydev) mii_reg | ET1011C_GMII_INTERFACE | ET1011C_SYS_CLK_EN | -#ifdef CONFIG_PHY_ET1011C_TX_CLK_FIX +#ifdef CFG_PHY_ET1011C_TX_CLK_FIX ET1011C_TX_CLK_EN | #endif ET1011C_TX_FIFO_DEPTH_16); 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.29 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:29 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 097/149] global: Migrate CONFIG_PHY_ID to CFG Date: Sun, 4 Dec 2022 10:13:28 -0500 Message-Id: <20221204151420.56851-7-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_PHY_ID to CFG_PHY_ID Signed-off-by: Tom Rini --- board/egnite/ethernut5/ethernut5.c | 2 +- include/configs/ethernut5.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/board/egnite/ethernut5/ethernut5.c b/board/egnite/ethernut5/ethernut5.c index ceb0d2cf0aa3..9953df017e19 100644 --- a/board/egnite/ethernut5/ethernut5.c +++ b/board/egnite/ethernut5/ethernut5.c @@ -160,7 +160,7 @@ int board_eth_init(struct bd_info *bis) /* Set peripheral pins. */ at91_macb_hw_init(); /* Basic EMAC initialization. */ - if (macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, CONFIG_PHY_ID)) + if (macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, CFG_PHY_ID)) return -1; /* * Early board revisions have a pull-down at the PHY's MODE0 diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 3fd58d6bd4a7..182369def910 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -48,7 +48,7 @@ /* JFFS2 */ /* Ethernet */ -#define CONFIG_PHY_ID 0 +#define CFG_PHY_ID 0 /* MMC */ #ifdef CONFIG_CMD_MMC From patchwork Sun Dec 4 15:13:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1711969 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.30 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:31 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 098/149] global: Migrate CONFIG_PHY_IRAM_BASE to CFG Date: Sun, 4 Dec 2022 10:13:29 -0500 Message-Id: <20221204151420.56851-8-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_PHY_IRAM_BASE to CFG_PHY_IRAM_BASE Signed-off-by: Tom Rini --- arch/arm/mach-exynos/lowlevel_init.c | 6 +++--- include/configs/exynos5420-common.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c index 243b5c80c90e..c57b8aee7989 100644 --- a/arch/arm/mach-exynos/lowlevel_init.c +++ b/arch/arm/mach-exynos/lowlevel_init.c @@ -77,10 +77,10 @@ static void low_power_start(void) branch_bx(0x0); } - reg_val = readl(CONFIG_PHY_IRAM_BASE + 0x4); + reg_val = readl(CFG_PHY_IRAM_BASE + 0x4); if (reg_val != (uint32_t)&low_power_start) { /* Store jump address as low_power_start if not present */ - writel((uint32_t)&low_power_start, CONFIG_PHY_IRAM_BASE + 0x4); + writel((uint32_t)&low_power_start, CFG_PHY_IRAM_BASE + 0x4); dsb(); sev(); } @@ -164,7 +164,7 @@ static void secondary_cores_configure(void) writel((uint32_t)&low_power_start, CFG_LOWPOWER_ADDR); writel(CPU_RST_FLAG_VAL, EXYNOS5420_SPARE_BASE); /* Store jump address for power down */ - writel((uint32_t)&power_down_core, CONFIG_PHY_IRAM_BASE + 0x4); + writel((uint32_t)&power_down_core, CFG_PHY_IRAM_BASE + 0x4); /* Need all core power down check */ dsb(); diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index bd43efa553c7..b75fe1b0a86c 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -10,7 +10,7 @@ #define CFG_IRAM_TOP 0x02074000 -#define CONFIG_PHY_IRAM_BASE 0x02020000 +#define CFG_PHY_IRAM_BASE 0x02020000 /* * Low Power settings From patchwork Sun Dec 4 15:13:30 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.31 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:32 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 099/149] global: Migrate CONFIG_PL011_CLOCK to CFG Date: Sun, 4 Dec 2022 10:13:30 -0500 Message-Id: <20221204151420.56851-9-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_PL011_CLOCK to CFG_PL011_CLOCK Signed-off-by: Tom Rini --- README | 2 +- arch/arm/cpu/armv7/s5p4418/cpu.c | 2 +- board/armltd/total_compute/total_compute.c | 2 +- board/armltd/vexpress64/vexpress64.c | 2 +- drivers/serial/serial_pl01x.c | 8 ++++---- include/configs/corstone1000.h | 2 +- include/configs/highbank.h | 2 +- include/configs/lx2160a_common.h | 2 +- include/configs/mxs.h | 2 +- include/configs/s5p4418_nanopi2.h | 2 +- include/configs/synquacer.h | 2 +- include/configs/thunderx_88xx.h | 2 +- include/configs/total_compute.h | 2 +- include/configs/vexpress_aemv8.h | 4 ++-- include/configs/vexpress_common.h | 2 +- 15 files changed, 19 insertions(+), 19 deletions(-) diff --git a/README b/README index 05618352fa93..8354cf5699b9 100644 --- a/README +++ b/README @@ -413,7 +413,7 @@ The following options need to be configured: controller register space - Serial Ports: - CONFIG_PL011_CLOCK + CFG_PL011_CLOCK If you have Amba PrimeCell PL011 UARTs, set this variable to the clock speed of the UARTs. diff --git a/arch/arm/cpu/armv7/s5p4418/cpu.c b/arch/arm/cpu/armv7/s5p4418/cpu.c index 3baa761ec7a9..7ba9c0b03236 100644 --- a/arch/arm/cpu/armv7/s5p4418/cpu.c +++ b/arch/arm/cpu/armv7/s5p4418/cpu.c @@ -64,7 +64,7 @@ static void serial_device_init(void) /* set clock */ clk_disable(clk); - clk_set_rate(clk, CONFIG_PL011_CLOCK); + clk_set_rate(clk, CFG_PL011_CLOCK); clk_enable(clk); } #endif diff --git a/board/armltd/total_compute/total_compute.c b/board/armltd/total_compute/total_compute.c index b7772f79a31a..53941b5f5f28 100644 --- a/board/armltd/total_compute/total_compute.c +++ b/board/armltd/total_compute/total_compute.c @@ -13,7 +13,7 @@ static const struct pl01x_serial_plat serial_plat = { .base = UART0_BASE, .type = TYPE_PL011, - .clock = CONFIG_PL011_CLOCK, + .clock = CFG_PL011_CLOCK, }; U_BOOT_DRVINFO(total_compute_serials) = { diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index 4ca544f1017d..99fb67ecedc2 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -29,7 +29,7 @@ DECLARE_GLOBAL_DATA_PTR; static const struct pl01x_serial_plat serial_plat = { .base = V2M_UART0, .type = TYPE_PL011, - .clock = CONFIG_PL011_CLOCK, + .clock = CFG_PL011_CLOCK, }; U_BOOT_DRVINFO(vexpress_serials) = { diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c index d3c3d3e2d188..dd2881931dfd 100644 --- a/drivers/serial/serial_pl01x.c +++ b/drivers/serial/serial_pl01x.c @@ -193,7 +193,7 @@ static void pl01x_serial_init_baud(int baudrate) #if defined(CONFIG_PL011_SERIAL) pl01x_type = TYPE_PL011; - clock = CONFIG_PL011_CLOCK; + clock = CFG_PL011_CLOCK; #endif base_regs = (struct pl01x_regs *)port[CONFIG_CONS_INDEX]; @@ -343,8 +343,8 @@ static const struct udevice_id pl01x_serial_id[] ={ {} }; -#ifndef CONFIG_PL011_CLOCK -#define CONFIG_PL011_CLOCK 0 +#ifndef CFG_PL011_CLOCK +#define CFG_PL011_CLOCK 0 #endif int pl01x_serial_of_to_plat(struct udevice *dev) @@ -359,7 +359,7 @@ int pl01x_serial_of_to_plat(struct udevice *dev) return -EINVAL; plat->base = addr; - plat->clock = dev_read_u32_default(dev, "clock", CONFIG_PL011_CLOCK); + plat->clock = dev_read_u32_default(dev, "clock", CFG_PL011_CLOCK); ret = clk_get_by_index(dev, 0, &clk); if (!ret) { ret = clk_enable(&clk); diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h index 8aec52d508e2..3347c11792d5 100644 --- a/include/configs/corstone1000.h +++ b/include/configs/corstone1000.h @@ -16,7 +16,7 @@ #define V2M_BASE 0x80000000 -#define CONFIG_PL011_CLOCK 50000000 +#define CFG_PL011_CLOCK 50000000 /* Physical Memory Map */ #define PHYS_SDRAM_1 (V2M_BASE) diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 76e6054b0cc1..97bb439f7357 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -8,7 +8,7 @@ #define CFG_SYS_BOOTMAPSZ (16 << 20) -#define CONFIG_PL011_CLOCK 150000000 +#define CFG_PL011_CLOCK 150000000 /* * Miscellaneous configurable options diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index c1a98fd3e4cb..f8a20ea16f9d 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -39,7 +39,7 @@ /* Serial Port */ -#define CONFIG_PL011_CLOCK (get_bus_freq(0) / 4) +#define CFG_PL011_CLOCK (get_bus_freq(0) / 4) #define CFG_SYS_SERIAL0 0x21c0000 #define CFG_SYS_SERIAL1 0x21d0000 #define CFG_SYS_SERIAL2 0x21e0000 diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 32e0e06617e5..90cb1a5e4a00 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -77,7 +77,7 @@ * DUART Serial Driver. * Conflicts with AUART driver which can be set by board. */ -#define CONFIG_PL011_CLOCK 24000000 +#define CFG_PL011_CLOCK 24000000 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } /* Default baudrate can be overridden by board! */ diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index bfe559f6e2cd..0e7d01925eef 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -76,7 +76,7 @@ /*----------------------------------------------------------------------- * serial console configuration */ -#define CONFIG_PL011_CLOCK 50000000 +#define CFG_PL011_CLOCK 50000000 #define CONFIG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \ (void *)PHY_BASEADDR_UART1, \ (void *)PHY_BASEADDR_UART2, \ diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index e65d6238163f..350cc69c28dc 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -31,7 +31,7 @@ /* Serial (pl011) */ #define UART_CLK (62500000) -#define CONFIG_PL011_CLOCK UART_CLK +#define CFG_PL011_CLOCK UART_CLK #define CONFIG_PL01x_PORTS {(void *)(0x2a400000)} /* Support MTD */ diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 8ba40546b2c0..2bca86bed939 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -17,7 +17,7 @@ /* PL011 Serial Configuration */ -#define CONFIG_PL011_CLOCK 24000000 +#define CFG_PL011_CLOCK 24000000 /* Generic Interrupt Controller Definitions */ #define GICD_BASE (0x801000000000) diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index e007be8e4564..436bf622e174 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -14,7 +14,7 @@ #define UART0_BASE 0x7ff80000 /* PL011 Serial Configuration */ -#define CONFIG_PL011_CLOCK 7372800 +#define CFG_PL011_CLOCK 7372800 /* Miscellaneous configurable options */ diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 87b8c5d57ee7..43f7e454d812 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -86,9 +86,9 @@ /* PL011 Serial Configuration */ #ifdef CONFIG_TARGET_VEXPRESS64_JUNO -#define CONFIG_PL011_CLOCK 7372800 +#define CFG_PL011_CLOCK 7372800 #else -#define CONFIG_PL011_CLOCK 24000000 +#define CFG_PL011_CLOCK 24000000 #endif /* Physical Memory Map */ diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 705a941e3603..3fc70de57713 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -116,7 +116,7 @@ #define CFG_SYS_TIMER_COUNTER (V2M_TIMER01 + 0x4) /* PL011 Serial Configuration */ -#define CONFIG_PL011_CLOCK 24000000 +#define CFG_PL011_CLOCK 24000000 #define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \ (void *)CFG_SYS_SERIAL1} From patchwork Sun Dec 4 15:13:31 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:33 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 100/149] global: Migrate CONFIG_PL01x_PORTS to CFG Date: Sun, 4 Dec 2022 10:13:31 -0500 Message-Id: <20221204151420.56851-10-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_PL01x_PORTS to CFG_PL01x_PORTS Signed-off-by: Tom Rini --- README | 2 +- drivers/serial/serial_pl01x.c | 2 +- include/configs/lx2160a_common.h | 2 +- include/configs/mxs.h | 2 +- include/configs/s5p4418_nanopi2.h | 2 +- include/configs/synquacer.h | 2 +- include/configs/vexpress_common.h | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) diff --git a/README b/README index 8354cf5699b9..12672d2bfb00 100644 --- a/README +++ b/README @@ -418,7 +418,7 @@ The following options need to be configured: If you have Amba PrimeCell PL011 UARTs, set this variable to the clock speed of the UARTs. - CONFIG_PL01x_PORTS + CFG_PL01x_PORTS If you have Amba PrimeCell PL010 or PL011 UARTs on your board, define this to a list of base addresses for each (supported) diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c index dd2881931dfd..7449e9b90430 100644 --- a/drivers/serial/serial_pl01x.c +++ b/drivers/serial/serial_pl01x.c @@ -29,7 +29,7 @@ DECLARE_GLOBAL_DATA_PTR; #ifndef CONFIG_DM_SERIAL -static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS; +static volatile unsigned char *const port[] = CFG_PL01x_PORTS; static enum pl01x_type pl01x_type __section(".data"); static struct pl01x_regs *base_regs __section(".data"); #define NUM_PORTS (sizeof(port)/sizeof(port[0])) diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index f8a20ea16f9d..6f46ca78d4d8 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -45,7 +45,7 @@ #define CFG_SYS_SERIAL2 0x21e0000 #define CFG_SYS_SERIAL3 0x21f0000 /*below might needs to be removed*/ -#define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \ +#define CFG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \ (void *)CFG_SYS_SERIAL1, \ (void *)CFG_SYS_SERIAL2, \ (void *)CFG_SYS_SERIAL3 } diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 90cb1a5e4a00..6ebfee692717 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -78,7 +78,7 @@ * Conflicts with AUART driver which can be set by board. */ #define CFG_PL011_CLOCK 24000000 -#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } +#define CFG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } /* Default baudrate can be overridden by board! */ /* NAND */ diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index 0e7d01925eef..2fa44e65fc16 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -77,7 +77,7 @@ * serial console configuration */ #define CFG_PL011_CLOCK 50000000 -#define CONFIG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \ +#define CFG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \ (void *)PHY_BASEADDR_UART1, \ (void *)PHY_BASEADDR_UART2, \ (void *)PHY_BASEADDR_UART3} diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index 350cc69c28dc..8f44c6f66a92 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -32,7 +32,7 @@ /* Serial (pl011) */ #define UART_CLK (62500000) #define CFG_PL011_CLOCK UART_CLK -#define CONFIG_PL01x_PORTS {(void *)(0x2a400000)} +#define CFG_PL01x_PORTS {(void *)(0x2a400000)} /* Support MTD */ #define CFG_SYS_FLASH_BASE (0x08000000) diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 3fc70de57713..ba7731bfca6b 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -117,7 +117,7 @@ /* PL011 Serial Configuration */ #define CFG_PL011_CLOCK 24000000 -#define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \ +#define CFG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \ (void *)CFG_SYS_SERIAL1} #define CFG_SYS_SERIAL0 V2M_UART0 From patchwork Sun Dec 4 15:13:32 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.34 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:34 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 101/149] global: Migrate CONFIG_PME_PLAT_CLK_DIV to CFG Date: Sun, 4 Dec 2022 10:13:32 -0500 Message-Id: <20221204151420.56851-11-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_PME_PLAT_CLK_DIV to CFG_PME_PLAT_CLK_DIV Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc85xx/speed.c | 6 +++--- arch/powerpc/include/asm/config_mpc85xx.h | 8 ++++---- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index eec071022e59..c2e3e00f7ba8 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -67,7 +67,7 @@ void get_sys_info(sys_info_t *sys_info) [14] = 4, /* CC4 PPL / 4 */ }; uint i, freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS]; -#if !defined(CFG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV) +#if !defined(CFG_FM_PLAT_CLK_DIV) || !defined(CFG_PME_PLAT_CLK_DIV) uint rcw_tmp; #endif uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS]; @@ -206,7 +206,7 @@ void get_sys_info(sys_info_t *sys_info) #define FM1_CLK_SEL 0x1c000000 #define FM1_CLK_SHIFT 26 #endif -#if !defined(CFG_FM_PLAT_CLK_DIV) || !defined(CONFIG_PME_PLAT_CLK_DIV) +#if !defined(CFG_FM_PLAT_CLK_DIV) || !defined(CFG_PME_PLAT_CLK_DIV) #if defined(CONFIG_ARCH_T1024) rcw_tmp = in_be32(&gur->rcwsr[15]) - 4; #else @@ -215,7 +215,7 @@ void get_sys_info(sys_info_t *sys_info) #endif #ifdef CONFIG_SYS_DPAA_PME -#ifndef CONFIG_PME_PLAT_CLK_DIV +#ifndef CFG_PME_PLAT_CLK_DIV switch ((rcw_tmp & PME_CLK_SEL) >> PME_CLK_SHIFT) { case 1: sys_info->freq_pme = freq_c_pll[CFG_SYS_PME_CLK]; diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 283181ec2d3d..fc584895eecf 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -144,8 +144,8 @@ #define CONFIG_SYS_FSL_SRDS_1 #define CFG_SYS_NUM_FMAN 1 #define CFG_SYS_NUM_FM1_DTSEC 5 -#define CONFIG_PME_PLAT_CLK_DIV 2 -#define CFG_SYS_PME_CLK CONFIG_PME_PLAT_CLK_DIV +#define CFG_PME_PLAT_CLK_DIV 2 +#define CFG_SYS_PME_CLK CFG_PME_PLAT_CLK_DIV #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CFG_FM_PLAT_CLK_DIV 1 #define CFG_SYS_FM1_CLK CFG_FM_PLAT_CLK_DIV @@ -182,8 +182,8 @@ #define CFG_SYS_FSL_SRIO_OB_WIN_NUM 9 #define CFG_SYS_FSL_SRIO_IB_WIN_NUM 5 #endif -#define CONFIG_PME_PLAT_CLK_DIV 1 -#define CFG_SYS_PME_CLK CONFIG_PME_PLAT_CLK_DIV +#define CFG_PME_PLAT_CLK_DIV 1 +#define CFG_SYS_PME_CLK CFG_PME_PLAT_CLK_DIV #define CFG_SYS_FM1_CLK 0 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CFG_SYS_FM_MURAM_SIZE 0x28000 From patchwork Sun Dec 4 15:13:33 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.35 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:36 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 102/149] global: Migrate CONFIG_POSTBOOTMENU to CFG Date: Sun, 4 Dec 2022 10:13:33 -0500 Message-Id: <20221204151420.56851-12-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_POSTBOOTMENU to CFG_POSTBOOTMENU Signed-off-by: Tom Rini --- cmd/bootmenu.c | 4 ++-- include/configs/nokia_rx51.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c index 3340be16325b..e5a10f5d5c4d 100644 --- a/cmd/bootmenu.c +++ b/cmd/bootmenu.c @@ -577,8 +577,8 @@ cleanup: free(command); } -#ifdef CONFIG_POSTBOOTMENU - run_command(CONFIG_POSTBOOTMENU, 0); +#ifdef CFG_POSTBOOTMENU + run_command(CFG_POSTBOOTMENU, 0); #endif if (efi_ret != EFI_SUCCESS || cmd_ret != CMD_RET_SUCCESS) diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 97d086852902..a64b7b34dc15 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -128,7 +128,7 @@ "bootmenu_delay=30\0" \ "" -#define CONFIG_POSTBOOTMENU \ +#define CFG_POSTBOOTMENU \ "echo;" \ "echo Extra commands:;" \ "echo run sdboot - Boot from SD card slot.;" \ From patchwork Sun Dec 4 15:13:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1711974 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.36 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:37 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 103/149] global: Migrate CONFIG_POWER_LTC3676_I2C_ADDR to CFG Date: Sun, 4 Dec 2022 10:13:34 -0500 Message-Id: <20221204151420.56851-13-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_POWER_LTC3676_I2C_ADDR to CFG_POWER_LTC3676_I2C_ADDR Signed-off-by: Tom Rini --- board/gateworks/gw_ventana/gw_ventana_spl.c | 4 ++-- drivers/power/pmic/pmic_ltc3676.c | 2 +- include/configs/gw_ventana.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c index e85a00954cee..6ad994af1c64 100644 --- a/board/gateworks/gw_ventana/gw_ventana_spl.c +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c @@ -851,8 +851,8 @@ void setup_pmic(void) } /* configure LTC3676 PMIC */ - else if (!i2c_probe(CONFIG_POWER_LTC3676_I2C_ADDR)) { - debug("probed LTC3676@0x%x\n", CONFIG_POWER_LTC3676_I2C_ADDR); + else if (!i2c_probe(CFG_POWER_LTC3676_I2C_ADDR)) { + debug("probed LTC3676@0x%x\n", CFG_POWER_LTC3676_I2C_ADDR); power_ltc3676_init(i2c_pmic); p = pmic_get("LTC3676_PMIC"); if (!p || pmic_probe(p)) diff --git a/drivers/power/pmic/pmic_ltc3676.c b/drivers/power/pmic/pmic_ltc3676.c index 00c3e201cd56..af94f37b0f10 100644 --- a/drivers/power/pmic/pmic_ltc3676.c +++ b/drivers/power/pmic/pmic_ltc3676.c @@ -23,7 +23,7 @@ int power_ltc3676_init(unsigned char bus) p->name = name; p->interface = PMIC_I2C; p->number_of_regs = LTC3676_NUM_OF_REGS; - p->hw.i2c.addr = CONFIG_POWER_LTC3676_I2C_ADDR; + p->hw.i2c.addr = CFG_POWER_LTC3676_I2C_ADDR; p->hw.i2c.tx_num = 1; p->bus = bus; diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 0a9dfe736f7d..85a2ad21dc03 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -31,7 +31,7 @@ * PMIC */ #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 -#define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c +#define CFG_POWER_LTC3676_I2C_ADDR 0x3c /* Various command support */ From patchwork Sun Dec 4 15:13:35 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.37 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:38 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 104/149] global: Migrate CONFIG_POWER_PFUZE100_I2C_ADDR to CFG Date: Sun, 4 Dec 2022 10:13:35 -0500 Message-Id: <20221204151420.56851-14-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_POWER_PFUZE100_I2C_ADDR to CFG_POWER_PFUZE100_I2C_ADDR Signed-off-by: Tom Rini --- board/gateworks/gw_ventana/gw_ventana_spl.c | 4 ++-- drivers/power/pmic/pmic_pfuze100.c | 2 +- include/configs/el6x_common.h | 2 +- include/configs/gw_ventana.h | 2 +- include/configs/imx8mq_evk.h | 2 +- include/configs/kontron_pitx_imx8m.h | 2 +- include/configs/mx6sabreauto.h | 2 +- include/configs/mx6sabresd.h | 2 +- include/configs/novena.h | 2 +- include/configs/tqma6.h | 2 +- include/configs/vining_2000.h | 2 +- 11 files changed, 12 insertions(+), 12 deletions(-) diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c index 6ad994af1c64..2f046c9c0b3e 100644 --- a/board/gateworks/gw_ventana/gw_ventana_spl.c +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c @@ -791,8 +791,8 @@ void setup_pmic(void) i2c_set_bus_num(i2c_pmic); /* configure PFUZE100 PMIC */ - if (!i2c_probe(CONFIG_POWER_PFUZE100_I2C_ADDR)) { - debug("probed PFUZE100@0x%x\n", CONFIG_POWER_PFUZE100_I2C_ADDR); + if (!i2c_probe(CFG_POWER_PFUZE100_I2C_ADDR)) { + debug("probed PFUZE100@0x%x\n", CFG_POWER_PFUZE100_I2C_ADDR); power_pfuze100_init(i2c_pmic); p = pmic_get("PFUZE100"); if (p && !pmic_probe(p)) { diff --git a/drivers/power/pmic/pmic_pfuze100.c b/drivers/power/pmic/pmic_pfuze100.c index c646a0c31f82..5115b55e49dc 100644 --- a/drivers/power/pmic/pmic_pfuze100.c +++ b/drivers/power/pmic/pmic_pfuze100.c @@ -23,7 +23,7 @@ int power_pfuze100_init(unsigned char bus) p->name = name; p->interface = PMIC_I2C; p->number_of_regs = PFUZE100_NUM_OF_REGS; - p->hw.i2c.addr = CONFIG_POWER_PFUZE100_I2C_ADDR; + p->hw.i2c.addr = CFG_POWER_PFUZE100_I2C_ADDR; p->hw.i2c.tx_num = 1; p->bus = bus; diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index 6913a91c4c19..78af42d04504 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -17,7 +17,7 @@ #define CFG_SYS_FSL_USDHC_NUM 2 /* PMIC */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 /* Commands */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 85a2ad21dc03..ebc5d03d0d5c 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -30,7 +30,7 @@ /* * PMIC */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 #define CFG_POWER_LTC3676_I2C_ADDR 0x3c /* Various command support */ diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index a7a51907f5c9..d2de2900c063 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -18,7 +18,7 @@ #define CFG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 #endif /* ENET Config */ diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index bf590efb4348..e3a021c987c6 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -20,7 +20,7 @@ /* For RAW image gives a error info not panic */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 #endif /* ENET1 Config */ diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index da98139d7d77..05ae2fce1fd7 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -36,6 +36,6 @@ /* DMA stuff, needed for GPMI/MXS NAND support */ /* PMIC */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 #endif /* __MX6SABREAUTO_CONFIG_H */ diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 1aa8a56cceb6..30d3b9d93074 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -25,7 +25,7 @@ #endif /* PMIC */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 /* USB Configs */ #ifdef CONFIG_CMD_USB diff --git a/include/configs/novena.h b/include/configs/novena.h index 5e8b7fa62170..39d3afd1c8ee 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -46,7 +46,7 @@ #endif /* PMIC */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 /* UART */ #define CFG_MXC_UART_BASE UART2_BASE diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index af5a474cf31e..8c75a75a9e59 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -31,7 +31,7 @@ #define CFG_I2C_MULTI_BUS #if !defined(CONFIG_DM_PMIC) -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 #define TQMA6_PFUZE100_I2C_BUS 2 #endif diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 7bfc22c043fe..30654191a264 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -31,7 +31,7 @@ #define CFG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR /* PMIC */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 /* Network */ #define CFG_FEC_MXC_PHYADDR 0x0 From patchwork Sun Dec 4 15:13:36 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.39 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:39 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 105/149] global: Migrate CONFIG_POWER_PFUZE3000_I2C_ADDR to CFG Date: Sun, 4 Dec 2022 10:13:36 -0500 Message-Id: <20221204151420.56851-15-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_POWER_PFUZE3000_I2C_ADDR to CFG_POWER_PFUZE3000_I2C_ADDR Signed-off-by: Tom Rini --- drivers/power/pmic/pmic_pfuze3000.c | 2 +- include/configs/cl-som-imx7.h | 2 +- include/configs/pico-imx7d.h | 2 +- include/configs/udoo_neo.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/power/pmic/pmic_pfuze3000.c b/drivers/power/pmic/pmic_pfuze3000.c index 1077fa5e9d98..a6d97252bc9e 100644 --- a/drivers/power/pmic/pmic_pfuze3000.c +++ b/drivers/power/pmic/pmic_pfuze3000.c @@ -23,7 +23,7 @@ int power_pfuze3000_init(unsigned char bus) p->name = name; p->interface = PMIC_I2C; p->number_of_regs = PFUZE3000_NUM_OF_REGS; - p->hw.i2c.addr = CONFIG_POWER_PFUZE3000_I2C_ADDR; + p->hw.i2c.addr = CFG_POWER_PFUZE3000_I2C_ADDR; p->hw.i2c.tx_num = 1; p->bus = bus; diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index 0a667c60b61b..280ae1e9cca8 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -19,7 +19,7 @@ #define IMX_FEC_BASE ENET_IPS_BASE_ADDR /* PMIC */ -#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE3000_I2C_ADDR 0x08 #define CFG_SYS_I2C_PCA953X_ADDR 0x20 #define CFG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index fd8962e9f751..5774184300c2 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -98,7 +98,7 @@ #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* PMIC */ -#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE3000_I2C_ADDR 0x08 /* FLASH and environment organization */ diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index 842abb7b7a22..80386414f89f 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -62,7 +62,7 @@ #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* PMIC */ -#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE3000_I2C_ADDR 0x08 #define PFUZE3000_I2C_BUS 0 #endif /* __CONFIG_H */ From patchwork Sun Dec 4 15:13:37 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:40 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 106/149] global: Migrate CONFIG_PRAM to CFG Date: Sun, 4 Dec 2022 10:13:37 -0500 Message-Id: <20221204151420.56851-16-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_PRAM to CFG_PRAM Signed-off-by: Tom Rini --- README | 4 ++-- common/board_f.c | 8 ++++---- common/board_r.c | 6 +++--- include/configs/M5208EVBE.h | 2 +- include/configs/M5235EVB.h | 2 +- include/configs/M5249EVB.h | 2 +- include/configs/M53017EVB.h | 2 +- include/configs/M5329EVB.h | 2 +- include/configs/M5373EVB.h | 2 +- include/configs/am43xx_evm.h | 2 +- include/configs/km/km-powerpc.h | 2 +- include/configs/km/pg-wcom-ls102xa.h | 2 +- include/configs/kmcent2.h | 2 +- include/configs/nokia_rx51.h | 2 +- include/configs/stmark2.h | 2 +- include/configs/ti_omap5_common.h | 2 +- 16 files changed, 22 insertions(+), 22 deletions(-) diff --git a/README b/README index 12672d2bfb00..2d3a48e88a59 100644 --- a/README +++ b/README @@ -1069,11 +1069,11 @@ The following options need to be configured: or define CFG_ENV_FLAGS_LIST_STATIC. - Protected RAM: - CONFIG_PRAM + CFG_PRAM Define this variable to enable the reservation of "protected RAM", i. e. RAM which is not overwritten - by U-Boot. Define CONFIG_PRAM to hold the number of + by U-Boot. Define CFG_PRAM to hold the number of kB you want to reserve for pRAM. You can overwrite this default value by defining an environment variable "pram" to the number of kB you want to diff --git a/common/board_f.c b/common/board_f.c index e027248db56d..2b4edf30c930 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -380,19 +380,19 @@ static int setup_dest_addr(void) return arch_setup_dest_addr(); } -#ifdef CONFIG_PRAM +#ifdef CFG_PRAM /* reserve protected RAM */ static int reserve_pram(void) { ulong reg; - reg = env_get_ulong("pram", 10, CONFIG_PRAM); + reg = env_get_ulong("pram", 10, CFG_PRAM); gd->relocaddr -= (reg << 10); /* size is in kB */ debug("Reserving %ldk for protected RAM at %08lx\n", reg, gd->relocaddr); return 0; } -#endif /* CONFIG_PRAM */ +#endif /* CFG_PRAM */ /* Round memory pointer down to next 4 kB limit */ static int reserve_round_4k(void) @@ -925,7 +925,7 @@ static const init_fnc_t init_sequence_f[] = { #ifdef CONFIG_OF_BOARD_FIXUP fix_fdt, #endif -#ifdef CONFIG_PRAM +#ifdef CFG_PRAM reserve_pram, #endif reserve_round_4k, diff --git a/common/board_r.c b/common/board_r.c index 347bb7f7c02d..42060ee709d5 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -533,7 +533,7 @@ static int initr_ide(void) } #endif -#if defined(CONFIG_PRAM) +#if defined(CFG_PRAM) /* * Export available size of memory for Linux, taking into account the * protected RAM at top of memory @@ -543,7 +543,7 @@ int initr_mem(void) ulong pram = 0; char memsz[32]; - pram = env_get_ulong("pram", 10, CONFIG_PRAM); + pram = env_get_ulong("pram", 10, CFG_PRAM); sprintf(memsz, "%ldk", (long int)((gd->ram_size / 1024) - pram)); env_set("mem", memsz); @@ -791,7 +791,7 @@ static init_fnc_t init_sequence_r[] = { */ last_stage_init, #endif -#if defined(CONFIG_PRAM) +#if defined(CFG_PRAM) initr_mem, #endif run_main_loop, diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index f7aba6e417f8..a4fda551f1f7 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -29,7 +29,7 @@ "save\0" \ "" -#define CONFIG_PRAM 512 /* 512 KB */ +#define CFG_PRAM 512 /* 512 KB */ #define CFG_SYS_CLK 166666666 /* CPU Core Clock */ #define CFG_SYS_PLL_ODR 0x36 diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 049516edf4ae..8939c8e7ab9c 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -39,7 +39,7 @@ "save\0" \ "" -#define CONFIG_PRAM 512 /* 512 KB */ +#define CFG_PRAM 512 /* 512 KB */ #define CFG_SYS_CLK 75000000 #define CFG_SYS_CPU_CLK CFG_SYS_CLK * 2 diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index c71130909fca..4fd539c01749 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -57,7 +57,7 @@ #define CFG_SYS_FLASH_BASE (CFG_SYS_CS0_BASE) #if 0 /* test-only */ -#define CONFIG_PRAM 512 /* test-only for SDRAM problem!!!!!!!!!!!!!!!!!!!! */ +#define CFG_PRAM 512 /* test-only for SDRAM problem!!!!!!!!!!!!!!!!!!!! */ #endif /* diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index b6d82c730c64..6359915e09a6 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -42,7 +42,7 @@ "save\0" \ "" -#define CONFIG_PRAM 512 /* 512 KB */ +#define CFG_PRAM 512 /* 512 KB */ #define CFG_SYS_CLK 80000000 #define CFG_SYS_CPU_CLK CFG_SYS_CLK * 3 diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index d74a636fd7f8..456135bdc64a 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -34,7 +34,7 @@ "save\0" \ "" -#define CONFIG_PRAM 512 /* 512 KB */ +#define CFG_PRAM 512 /* 512 KB */ #define CFG_SYS_CLK 80000000 #define CFG_SYS_CPU_CLK CFG_SYS_CLK * 3 diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index fa6f2d23e74e..4e8dcb5ef7f7 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -36,7 +36,7 @@ "save\0" \ "" -#define CONFIG_PRAM 512 /* 512 KB */ +#define CFG_PRAM 512 /* 512 KB */ #define CFG_SYS_CLK 80000000 #define CFG_SYS_CPU_CLK CFG_SYS_CLK * 3 diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index f43e00e8a2b6..a2f73c475434 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -152,7 +152,7 @@ #if defined(CONFIG_TI_SECURE_DEVICE) /* Avoid relocating onto firewalled area at end of DRAM */ -#define CONFIG_PRAM (64 * 1024) +#define CFG_PRAM (64 * 1024) #endif /* CONFIG_TI_SECURE_DEVICE */ #endif /* __CONFIG_AM43XX_EVM_H */ diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h index 260a05f59e7f..ffc669ae9922 100644 --- a/include/configs/km/km-powerpc.h +++ b/include/configs/km/km-powerpc.h @@ -25,7 +25,7 @@ /* set the default PRAM value to at least PNVRAM + PHRAM when pram env variable * is not valid yet, which is the case for when u-boot copies itself to RAM */ -#define CONFIG_PRAM ((CONFIG_KM_PNVRAM + CONFIG_KM_PHRAM)>>10) +#define CFG_PRAM ((CONFIG_KM_PNVRAM + CONFIG_KM_PHRAM)>>10) /* architecture specific default bootargs */ #define CFG_KM_DEF_BOOT_ARGS_CPU "" diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 4adecacd5ece..a5dde8e441c9 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -12,7 +12,7 @@ #define CFG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CFG_SYS_INIT_RAM_SIZE OCRAM_SIZE -#define CONFIG_PRAM ((CONFIG_KM_PNVRAM + \ +#define CFG_PRAM ((CONFIG_KM_PNVRAM + \ CONFIG_KM_PHRAM + \ CONFIG_KM_RESERVED_PRAM) >> 10) diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 8d98928a6eeb..1dff1531c73a 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -181,7 +181,7 @@ /* set the default PRAM value to at least PNVRAM + PHRAM when pram env variable * is not valid yet, which is the case for when u-boot copies itself to RAM */ -#define CONFIG_PRAM ((CONFIG_KM_PNVRAM + CONFIG_KM_PHRAM) >> 10) +#define CFG_PRAM ((CONFIG_KM_PNVRAM + CONFIG_KM_PHRAM) >> 10) /* * IFC Definitions diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index a64b7b34dc15..54eea322dd3f 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -169,6 +169,6 @@ #define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE) /* Reserve protected RAM for attached kernel */ -#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1) +#define CFG_PRAM ((KERNEL_MAXSIZE >> 10)+1) #endif /* __CONFIG_H */ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index fe2ba9a03b41..19589be270ff 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -36,7 +36,7 @@ /* Input, PCI, Flexbus, and VCO */ -#define CONFIG_PRAM 2048 /* 2048 KB */ +#define CFG_PRAM 2048 /* 2048 KB */ #define CFG_SYS_MBAR 0xFC000000 diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index e9723ed5b3dd..74a39c40785c 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -279,7 +279,7 @@ * firewall violation, we tell u-boot that memory is protected RAM (PRAM) */ #if (CONFIG_TI_SECURE_EMIF_REGION_START == 0) -#define CONFIG_PRAM (CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE) >> 10 +#define CFG_PRAM (CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE) >> 10 #endif #else /* From patchwork Sun Dec 4 15:13:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1711977 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=konsulko.com header.i=@konsulko.com header.a=rsa-sha256 header.s=google header.b=G+G2HPzS; dkim-atps=neutral Received: from phobos.denx.de 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:41 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 107/149] global: Migrate CONFIG_QBMAN_CLK_DIV to CFG Date: Sun, 4 Dec 2022 10:13:38 -0500 Message-Id: <20221204151420.56851-17-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_QBMAN_CLK_DIV to CFG_QBMAN_CLK_DIV Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc85xx/speed.c | 6 +++--- arch/powerpc/include/asm/config_mpc85xx.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index c2e3e00f7ba8..9af40310b46f 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -249,10 +249,10 @@ void get_sys_info(sys_info_t *sys_info) #endif #ifdef CONFIG_SYS_DPAA_QBMAN -#ifndef CONFIG_QBMAN_CLK_DIV -#define CONFIG_QBMAN_CLK_DIV 2 +#ifndef CFG_QBMAN_CLK_DIV +#define CFG_QBMAN_CLK_DIV 2 #endif - sys_info->freq_qman = sys_info->freq_systembus / CONFIG_QBMAN_CLK_DIV; + sys_info->freq_qman = sys_info->freq_systembus / CFG_QBMAN_CLK_DIV; #endif #if defined(CONFIG_SYS_MAPLE) diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index fc584895eecf..d731ac3f4d78 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -163,7 +163,7 @@ #define CFG_SYS_NUM_FM1_10GEC 1 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CFG_SYS_FM1_CLK 0 -#define CONFIG_QBMAN_CLK_DIV 1 +#define CFG_QBMAN_CLK_DIV 1 #define CFG_SYS_FM_MURAM_SIZE 0x30000 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE #define QE_MURAM_SIZE 0x6000UL From patchwork Sun Dec 4 15:13:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1711979 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.42 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:43 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 108/149] global: Migrate CONFIG_RAMDISK_ADDR to CFG Date: Sun, 4 Dec 2022 10:13:39 -0500 Message-Id: <20221204151420.56851-18-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_RAMDISK_ADDR to CFG_RAMDISK_ADDR Signed-off-by: Tom Rini --- cmd/qfw.c | 4 ++-- doc/usage/cmd/qfw.rst | 2 +- include/configs/x86-common.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/cmd/qfw.c b/cmd/qfw.c index 95ddc4b79ec7..0c49c6074e16 100644 --- a/cmd/qfw.c +++ b/cmd/qfw.c @@ -130,8 +130,8 @@ static int qemu_fwcfg_do_load(struct cmd_tbl *cmdtp, int flag, env = env_get("ramdiskaddr"); initrd_addr = env ? (void *)hextoul(env, NULL) : -#ifdef CONFIG_RAMDISK_ADDR - (void *)CONFIG_RAMDISK_ADDR; +#ifdef CFG_RAMDISK_ADDR + (void *)CFG_RAMDISK_ADDR; #else NULL; #endif diff --git a/doc/usage/cmd/qfw.rst b/doc/usage/cmd/qfw.rst index b3704b92d6d9..cc0e27c27790 100644 --- a/doc/usage/cmd/qfw.rst +++ b/doc/usage/cmd/qfw.rst @@ -31,7 +31,7 @@ kernel_addr initrd_addr address to which the file specified by the -initrd parameter of QEMU shall be loaded. Defaults to environment variable *ramdiskaddr* and further to - the value of *CONFIG_RAMDISK_ADDR*. + the value of *CFG_RAMDISK_ADDR*. Examples -------- diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 5d461e8d0c64..f421ec580344 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -25,7 +25,7 @@ */ /* Default environment */ -#define CONFIG_RAMDISK_ADDR 0x4000000 +#define CFG_RAMDISK_ADDR 0x4000000 #if defined(CONFIG_GENERATE_ACPI_TABLE) || defined(CONFIG_EFI_STUB) #define CFG_OTHBOOTARGS "othbootargs=\0" #else From patchwork Sun Dec 4 15:13:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1711981 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=konsulko.com header.i=@konsulko.com header.a=rsa-sha256 header.s=google header.b=coUk8yYp; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NQ9Xn3xfQz23nB for ; Mon, 5 Dec 2022 02:27:37 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 190C285643; Sun, 4 Dec 2022 16:15:29 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=konsulko.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=konsulko.com header.i=@konsulko.com header.b="coUk8yYp"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 22C05852FA; Sun, 4 Dec 2022 16:14:50 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [IPv6:2a00:1450:4864:20::62b]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 669C2855F1 for ; Sun, 4 Dec 2022 16:14:45 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=konsulko.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=trini@konsulko.com Received: by mail-ej1-x62b.google.com with SMTP id n21so22283217ejb.9 for ; Sun, 04 Dec 2022 07:14:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=konsulko.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=fL0AHccVQlNbY/wR2CJXM7t2fT0lnw7T89NFrJ1Ep9M=; b=coUk8yYpU13jz2QiQPldRZTJoAdO8CXIKW92nkATTaQDg3v6h5+IIQ1h3WAPjT9AnL TwKi7B2xdWL7Ek+osusIl+ZB+iNI1W5vTNWPL/ba/Yinwk+c+b9UZP2TTWaw8+7pMi46 TCoZZ1OqEg9T5mtYpCCmL4YJq8iW4r98XMpHM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fL0AHccVQlNbY/wR2CJXM7t2fT0lnw7T89NFrJ1Ep9M=; b=GPBrglF9HW7TCD3hGeoaRsRjhYF8ujBrfnVxYp7rd/ztes9yt74XNCie0h1+ioP4KT xC97vDQZ0F+zf69VV6vt4ISK5zuQFXCDTeGKPaxSpVWsEN+hwfa8l0kXfSf++23qW9n7 iknOpXOHrRlc4v+UNNPN+WQbxYSUYL8gJ+Z/1XJk1sQo1hmHjV/F5ysEyolzOonk56bb 9/9rsFmCD/8W3Eui4bX4OZJnY/zXgJUAIGFSw6Ao2wYD8044hiUnebm8H6VAcYQF4JL0 Nitz2i9KYqDJm657kf4snw2zcwHY2XW6yJzPhbaPdsH7Vc3U87oWMarkWfPvErJiDupl mp3w== X-Gm-Message-State: ANoB5pmQEj+BBxJRBr2mRraiQrSE7nMAFqhzgdEWsZsq87mNxI4r74XB LNnyTE9fkmC/DqywrdsooAQYRRbpFMFxZt3B X-Google-Smtp-Source: AA0mqf5CGmcckM/Ok6SIckoeXJk5UoOq4qEnFi7j9O8G4ceS9rCVkDxNCCFdFch+JSj4sD3RwJ/iIA== X-Received: by 2002:a17:906:2355:b0:7c0:e6da:e25a with SMTP id m21-20020a170906235500b007c0e6dae25amr2952591eja.22.1670166884667; Sun, 04 Dec 2022 07:14:44 -0800 (PST) Received: from bill-the-cat.lan (2603-6081-7b00-6400-61c7-2644-b62d-0af3.res6.spectrum.com. [2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:44 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 109/149] global: Migrate CONFIG_RESET_VECTOR_ADDRESS to CFG Date: Sun, 4 Dec 2022 10:13:40 -0500 Message-Id: <20221204151420.56851-19-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_RESET_VECTOR_ADDRESS to CFG_RESET_VECTOR_ADDRESS Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc85xx/Kconfig | 2 +- arch/powerpc/cpu/mpc85xx/u-boot.lds | 4 ++-- arch/powerpc/dts/kmcent2-u-boot.dtsi | 2 +- arch/powerpc/dts/u-boot.dtsi | 6 +++--- board/freescale/p1_p2_rdb_pc/README | 2 +- board/freescale/p2041rdb/README | 2 +- board/freescale/t104xrdb/README | 2 +- board/freescale/t208xqds/README | 2 +- board/freescale/t208xrdb/README | 2 +- include/configs/P1010RDB.h | 8 ++++---- include/configs/P2041RDB.h | 8 ++++---- include/configs/T102xRDB.h | 10 +++++----- include/configs/T104xRDB.h | 8 ++++---- include/configs/T208xQDS.h | 10 +++++----- include/configs/T208xRDB.h | 10 +++++----- include/configs/T4240RDB.h | 8 ++++---- include/configs/kmcent2.h | 2 +- include/configs/p1_p2_rdb_pc.h | 4 ++-- 18 files changed, 46 insertions(+), 46 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 3275d4fa9b88..6ab8a5249a42 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -931,7 +931,7 @@ config ARCH_T4240 imply FSL_SATA config MPC85XX_HAVE_RESET_VECTOR - bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS - 0xffc" + bool "Indicate reset vector at CFG_RESET_VECTOR_ADDRESS - 0xffc" depends on MPC85xx config BTB diff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds index fa3aa954cbb5..3af0dfdf336b 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds @@ -5,8 +5,8 @@ #include "config.h" -#ifdef CONFIG_RESET_VECTOR_ADDRESS -#define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS +#ifdef CFG_RESET_VECTOR_ADDRESS +#define RESET_VECTOR_ADDRESS CFG_RESET_VECTOR_ADDRESS #else #define RESET_VECTOR_ADDRESS 0xfffffffc #endif diff --git a/arch/powerpc/dts/kmcent2-u-boot.dtsi b/arch/powerpc/dts/kmcent2-u-boot.dtsi index 28f303b749e9..53bac5533f24 100644 --- a/arch/powerpc/dts/kmcent2-u-boot.dtsi +++ b/arch/powerpc/dts/kmcent2-u-boot.dtsi @@ -91,7 +91,7 @@ align = <256>; }; powerpc-mpc85xx-bootpg-resetvec { - offset = <(CONFIG_RESET_VECTOR_ADDRESS - 0xffc)>; + offset = <(CFG_RESET_VECTOR_ADDRESS - 0xffc)>; }; }; }; diff --git a/arch/powerpc/dts/u-boot.dtsi b/arch/powerpc/dts/u-boot.dtsi index b4b5257362e5..6b7375cff215 100644 --- a/arch/powerpc/dts/u-boot.dtsi +++ b/arch/powerpc/dts/u-boot.dtsi @@ -23,11 +23,11 @@ u-boot-dtb-with-ucode { align = <4>; }; -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc #endif powerpc-mpc85xx-bootpg-resetvec { - offset = <(CONFIG_RESET_VECTOR_ADDRESS - 0xffc)>; + offset = <(CFG_RESET_VECTOR_ADDRESS - 0xffc)>; }; }; }; diff --git a/board/freescale/p1_p2_rdb_pc/README b/board/freescale/p1_p2_rdb_pc/README index f542decec79b..fd849bfc29a2 100644 --- a/board/freescale/p1_p2_rdb_pc/README +++ b/board/freescale/p1_p2_rdb_pc/README @@ -57,7 +57,7 @@ enabled in relative defconfig file, 1. CONFIG_DEFAULT_DEVICE_TREE="p1020rdb" (Change default device tree name if required) 2. CONFIG_OF_CONTROL 3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at - CONFIG_RESET_VECTOR_ADDRESS - 0xffc + CFG_RESET_VECTOR_ADDRESS - 0xffc If device tree support is enabled in defconfig, 1. use 'u-boot.bin' for NOR boot. diff --git a/board/freescale/p2041rdb/README b/board/freescale/p2041rdb/README index 96612daeeb11..ae7702773723 100644 --- a/board/freescale/p2041rdb/README +++ b/board/freescale/p2041rdb/README @@ -98,7 +98,7 @@ enabled in relative defconfig file, 1. CONFIG_DEFAULT_DEVICE_TREE="p2041rdb" (Change default device tree name if required) 2. CONFIG_OF_CONTROL 3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at - CONFIG_RESET_VECTOR_ADDRESS - 0xffc + CFG_RESET_VECTOR_ADDRESS - 0xffc CPLD command ============ diff --git a/board/freescale/t104xrdb/README b/board/freescale/t104xrdb/README index e90dca416639..f312e6a3e32b 100644 --- a/board/freescale/t104xrdb/README +++ b/board/freescale/t104xrdb/README @@ -379,7 +379,7 @@ enabled in relative defconfig file, 1. CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" (Change default device tree name if required) 2. CONFIG_OF_CONTROL 3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at - CONFIG_RESET_VECTOR_ADDRESS - 0xffc + CFG_RESET_VECTOR_ADDRESS - 0xffc If device tree support is enabled in defconfig, 1. use 'u-boot.bin' for NOR boot. diff --git a/board/freescale/t208xqds/README b/board/freescale/t208xqds/README index 63953d6b9b66..0d80c6901fb2 100755 --- a/board/freescale/t208xqds/README +++ b/board/freescale/t208xqds/README @@ -285,7 +285,7 @@ enabled in relative defconfig file, 1. CONFIG_DEFAULT_DEVICE_TREE="t2080qds" (Change default device tree name if required) 2. CONFIG_OF_CONTROL 3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at - CONFIG_RESET_VECTOR_ADDRESS - 0xffc + CFG_RESET_VECTOR_ADDRESS - 0xffc If device tree support is enabled in defconfig, 1. use 'u-boot.bin' for NOR boot. diff --git a/board/freescale/t208xrdb/README b/board/freescale/t208xrdb/README index 60551f6723e6..533054bfe192 100644 --- a/board/freescale/t208xrdb/README +++ b/board/freescale/t208xrdb/README @@ -281,7 +281,7 @@ enabled in relative defconfig file, 1. CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" (Change default device tree name if required) 2. CONFIG_OF_CONTROL 3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at - CONFIG_RESET_VECTOR_ADDRESS - 0xffc + CFG_RESET_VECTOR_ADDRESS - 0xffc If device tree support is enabled in defconfig, 1. use 'u-boot.bin' for NOR boot. diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index b57e8638ab71..9efae58ce903 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -24,7 +24,7 @@ #ifdef CONFIG_SPIFLASH #ifdef CONFIG_NXP_ESBC -#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc +#define CFG_RESET_VECTOR_ADDRESS 0x110bfffc #else #define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10) #define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) @@ -52,11 +52,11 @@ #endif #ifdef CONFIG_NAND_SECBOOT /* NAND Boot */ -#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc +#define CFG_RESET_VECTOR_ADDRESS 0x110bfffc #endif -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif /* High Level Configuration Options */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 6e755fc0a8f5..28f53ae78a1c 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -12,7 +12,7 @@ #define __CONFIG_H #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc #endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE @@ -20,13 +20,13 @@ #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc #endif /* High Level Configuration Options */ -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif #define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 063b864f9ff0..7ee46abffdb6 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -28,7 +28,7 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC +#define CFG_RESET_VECTOR_ADDRESS 0x30000FFC #define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) #define CFG_SYS_SPI_FLASH_U_BOOT_START (0x30000000) @@ -36,7 +36,7 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC +#define CFG_RESET_VECTOR_ADDRESS 0x30000FFC #define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CFG_SYS_MMC_U_BOOT_DST (0x30000000) #define CFG_SYS_MMC_U_BOOT_START (0x30000000) @@ -45,8 +45,8 @@ #endif /* CONFIG_RAMBOOT_PBL */ -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif /* @@ -87,7 +87,7 @@ #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc #endif /* diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 9d04d30a5387..f196bd76e6ec 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -29,7 +29,7 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC +#define CFG_RESET_VECTOR_ADDRESS 0x30000FFC #define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) #define CFG_SYS_SPI_FLASH_U_BOOT_START (0x30000000) @@ -37,7 +37,7 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC +#define CFG_RESET_VECTOR_ADDRESS 0x30000FFC #define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CFG_SYS_MMC_U_BOOT_DST (0x30000000) #define CFG_SYS_MMC_U_BOOT_START (0x30000000) @@ -48,8 +48,8 @@ /* High Level Configuration Options */ -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif #define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 3b98d25aa47a..2023d7497f69 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -30,7 +30,7 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC +#define CFG_RESET_VECTOR_ADDRESS 0x200FFC #define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) #define CFG_SYS_SPI_FLASH_U_BOOT_START (0x00200000) @@ -38,7 +38,7 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC +#define CFG_RESET_VECTOR_ADDRESS 0x200FFC #define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CFG_SYS_MMC_U_BOOT_DST (0x00200000) #define CFG_SYS_MMC_U_BOOT_START (0x00200000) @@ -52,11 +52,11 @@ #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc #endif -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif /* diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 60c2947bfc1d..f213d2de770c 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -30,7 +30,7 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC +#define CFG_RESET_VECTOR_ADDRESS 0x200FFC #define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) #define CFG_SYS_SPI_FLASH_U_BOOT_START (0x00200000) @@ -38,7 +38,7 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC +#define CFG_RESET_VECTOR_ADDRESS 0x200FFC #define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CFG_SYS_MMC_U_BOOT_DST (0x00200000) #define CFG_SYS_MMC_U_BOOT_START (0x00200000) @@ -52,11 +52,11 @@ #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc #endif -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif /* diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 01a9f43cbaeb..506f1b7e268b 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -16,13 +16,13 @@ #ifdef CONFIG_RAMBOOT_PBL #ifndef CONFIG_SDCARD -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc #else #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 #ifdef CONFIG_SDCARD -#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC +#define CFG_RESET_VECTOR_ADDRESS 0x200FFC #define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CFG_SYS_MMC_U_BOOT_DST 0x00200000 #define CFG_SYS_MMC_U_BOOT_START 0x00200000 @@ -34,8 +34,8 @@ /* High Level Configuration Options */ -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif #define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 1dff1531c73a..1eaf1968321c 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -133,7 +133,7 @@ /* High Level Configuration Options */ -#define CONFIG_RESET_VECTOR_ADDRESS 0xebfffffc +#define CFG_RESET_VECTOR_ADDRESS 0xebfffffc #define CFG_SYS_NUM_CPC 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.44 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:45 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 110/149] global: Migrate CONFIG_SAR2_REG to CFG Date: Sun, 4 Dec 2022 10:13:41 -0500 Message-Id: <20221204151420.56851-20-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SAR2_REG to CFG_SAR2_REG Signed-off-by: Tom Rini --- arch/arm/mach-mvebu/cpu.c | 4 ++-- arch/arm/mach-mvebu/include/mach/soc.h | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 67ad5e5907be..9139df1ae248 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -195,7 +195,7 @@ void get_sar_freq(struct sar_freq_modes *sar_freq) int i; #if defined(CONFIG_ARMADA_375) || defined(CONFIG_ARMADA_MSYS) - val = readl(CONFIG_SAR2_REG); /* SAR - Sample At Reset */ + val = readl(CFG_SAR2_REG); /* SAR - Sample At Reset */ #else val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */ #endif @@ -205,7 +205,7 @@ void get_sar_freq(struct sar_freq_modes *sar_freq) * Shift CPU0 clock frequency select bit from SAR2 register * into correct position */ - freq |= ((readl(CONFIG_SAR2_REG) & SAR2_CPU_FREQ_MASK) + freq |= ((readl(CFG_SAR2_REG) & SAR2_CPU_FREQ_MASK) >> SAR2_CPU_FREQ_OFFS) << 3; #endif for (i = 0; sar_freq_tab[i].val != 0xff; i++) { diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index e6383d4a86e2..1210d26c7461 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -135,7 +135,7 @@ #if defined(CONFIG_ARMADA_375) /* SAR values for Armada 375 */ #define CONFIG_SAR_REG (MVEBU_REGISTER(0xe8200)) -#define CONFIG_SAR2_REG (MVEBU_REGISTER(0xe8204)) +#define CFG_SAR2_REG (MVEBU_REGISTER(0xe8204)) #define SAR_CPU_FREQ_OFFS 17 #define SAR_CPU_FREQ_MASK (0x1f << SAR_CPU_FREQ_OFFS) @@ -174,7 +174,7 @@ #elif defined(CONFIG_ARMADA_MSYS) /* SAR values for MSYS */ #define CONFIG_SAR_REG (MBUS_DFX_BASE + 0xf8200) -#define CONFIG_SAR2_REG (MBUS_DFX_BASE + 0xf8204) +#define CFG_SAR2_REG (MBUS_DFX_BASE + 0xf8204) #define SAR_CPU_FREQ_OFFS 18 #define SAR_CPU_FREQ_MASK (0x7 << SAR_CPU_FREQ_OFFS) @@ -192,7 +192,7 @@ #elif defined(CONFIG_ARMADA_XP) /* SAR values for Armada XP */ #define CONFIG_SAR_REG (MVEBU_REGISTER(0x18230)) -#define CONFIG_SAR2_REG (MVEBU_REGISTER(0x18234)) +#define CFG_SAR2_REG (MVEBU_REGISTER(0x18234)) #define SAR_CPU_FREQ_OFFS 21 #define SAR_CPU_FREQ_MASK (0x7 << SAR_CPU_FREQ_OFFS) From patchwork Sun Dec 4 15:13:42 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:46 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 111/149] global: Migrate CONFIG_SAR_REG to CFG Date: Sun, 4 Dec 2022 10:13:42 -0500 Message-Id: <20221204151420.56851-21-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SAR_REG to CFG_SAR_REG Signed-off-by: Tom Rini --- arch/arm/mach-kirkwood/include/mach/kw88f6281.h | 2 +- arch/arm/mach-kirkwood/include/mach/soc.h | 2 +- arch/arm/mach-mvebu/cpu.c | 4 ++-- arch/arm/mach-mvebu/include/mach/soc.h | 12 ++++++------ 4 files changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h index 7f8e156a6bdc..67f0b3ec6772 100644 --- a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h +++ b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h @@ -15,7 +15,7 @@ #define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE /* TCLK Core Clock definition */ -#define CFG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(21)) ? \ +#define CFG_SYS_TCLK ((readl(CFG_SAR_REG) & BIT(21)) ? \ 166666667 : 200000000) #endif /* _ASM_ARCH_KW88F6281_H */ diff --git a/arch/arm/mach-kirkwood/include/mach/soc.h b/arch/arm/mach-kirkwood/include/mach/soc.h index 5f545c6f4349..4a7efc50f67a 100644 --- a/arch/arm/mach-kirkwood/include/mach/soc.h +++ b/arch/arm/mach-kirkwood/include/mach/soc.h @@ -62,7 +62,7 @@ #define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE #define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE -#define CONFIG_SAR_REG (KW_MPP_BASE + 0x0030) +#define CFG_SAR_REG (KW_MPP_BASE + 0x0030) #if defined (CONFIG_KW88F6281) #include diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 9139df1ae248..329d13691f0e 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -83,7 +83,7 @@ u32 get_boot_device(void) /* * Now check the SAR register for the strapped boot-device */ - val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */ + val = readl(CFG_SAR_REG); /* SAR - Sample At Reset */ boot_device = (val & BOOT_DEV_SEL_MASK) >> BOOT_DEV_SEL_OFFS; debug("SAR_REG=0x%08x boot_device=0x%x\n", val, boot_device); switch (boot_device) { @@ -197,7 +197,7 @@ void get_sar_freq(struct sar_freq_modes *sar_freq) #if defined(CONFIG_ARMADA_375) || defined(CONFIG_ARMADA_MSYS) val = readl(CFG_SAR2_REG); /* SAR - Sample At Reset */ #else - val = readl(CONFIG_SAR_REG); /* SAR - Sample At Reset */ + val = readl(CFG_SAR_REG); /* SAR - Sample At Reset */ #endif freq = (val & SAR_CPU_FREQ_MASK) >> SAR_CPU_FREQ_OFFS; #if defined(SAR2_CPU_FREQ_MASK) diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 1210d26c7461..6edd2e2d79c7 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -134,7 +134,7 @@ #if defined(CONFIG_ARMADA_375) /* SAR values for Armada 375 */ -#define CONFIG_SAR_REG (MVEBU_REGISTER(0xe8200)) +#define CFG_SAR_REG (MVEBU_REGISTER(0xe8200)) #define CFG_SAR2_REG (MVEBU_REGISTER(0xe8204)) #define SAR_CPU_FREQ_OFFS 17 @@ -146,11 +146,11 @@ #define BOOT_FROM_UART 0x30 #define BOOT_FROM_SPI 0x38 -#define CFG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(20)) ? \ +#define CFG_SYS_TCLK ((readl(CFG_SAR_REG) & BIT(20)) ? \ 200000000 : 166000000) #elif defined(CONFIG_ARMADA_38X) /* SAR values for Armada 38x */ -#define CONFIG_SAR_REG (MVEBU_REGISTER(0x18600)) +#define CFG_SAR_REG (MVEBU_REGISTER(0x18600)) #define SAR_CPU_FREQ_OFFS 10 #define SAR_CPU_FREQ_MASK (0x1f << SAR_CPU_FREQ_OFFS) @@ -169,11 +169,11 @@ #define BOOT_FROM_MMC 0x30 #define BOOT_FROM_MMC_ALT 0x31 -#define CFG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(15)) ? \ +#define CFG_SYS_TCLK ((readl(CFG_SAR_REG) & BIT(15)) ? \ 200000000 : 250000000) #elif defined(CONFIG_ARMADA_MSYS) /* SAR values for MSYS */ -#define CONFIG_SAR_REG (MBUS_DFX_BASE + 0xf8200) +#define CFG_SAR_REG (MBUS_DFX_BASE + 0xf8200) #define CFG_SAR2_REG (MBUS_DFX_BASE + 0xf8204) #define SAR_CPU_FREQ_OFFS 18 @@ -191,7 +191,7 @@ #define CFG_SYS_TCLK 200000000 /* 200MHz */ #elif defined(CONFIG_ARMADA_XP) /* SAR values for Armada XP */ -#define CONFIG_SAR_REG (MVEBU_REGISTER(0x18230)) +#define CFG_SAR_REG (MVEBU_REGISTER(0x18230)) #define CFG_SAR2_REG (MVEBU_REGISTER(0x18234)) #define SAR_CPU_FREQ_OFFS 21 From patchwork Sun Dec 4 15:13:43 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:47 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 112/149] global: Migrate CONFIG_SCIF_A to CFG Date: Sun, 4 Dec 2022 10:13:43 -0500 Message-Id: <20221204151420.56851-22-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SCIF_A to CFG_SCIF_A Signed-off-by: Tom Rini --- drivers/serial/serial_sh.c | 2 +- drivers/serial/serial_sh.h | 8 ++++---- include/configs/stout.h | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index e6c23cedff11..4671217b59a0 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -274,7 +274,7 @@ U_BOOT_DRIVER(serial_sh) = { # error "Default SCIF doesn't set....." #endif -#if defined(CONFIG_SCIF_A) +#if defined(CFG_SCIF_A) #define SCIF_BASE_PORT PORT_SCIFA #elif defined(CONFIG_SCI) #define SCIF_BASE_PORT PORT_SCI diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index 11deaa951168..e6ab6f1b9b76 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -92,7 +92,7 @@ struct uart_port { # define SCIF_ORER 0x0001 /* overrun error bit */ #elif defined(CONFIG_RCAR_GEN2) || defined(CONFIG_RCAR_GEN3) || \ defined(CONFIG_R7S72100) -# if defined(CONFIG_SCIF_A) +# if defined(CFG_SCIF_A) # define SCIF_ORER 0x0200 # else # define SCIF_ORER 0x0001 @@ -164,7 +164,7 @@ struct uart_port { # define SCIF2_TXROOM_MAX 16 #elif defined(CONFIG_RCAR_GEN2) # define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) -# if defined(CONFIG_SCIF_A) +# if defined(CFG_SCIF_A) # define SCIF_RFDC_MASK 0x007f # else # define SCIF_RFDC_MASK 0x001f @@ -380,7 +380,7 @@ SCIF_FNS(SCFDR, 0, 0, 0x1C, 16) SCIF_FNS(SCSPTR, 0, 0, 0x20, 16) SCIF_FNS(DL, 0, 0, 0x30, 16) SCIF_FNS(CKS, 0, 0, 0x34, 16) -#if defined(CONFIG_SCIF_A) +#if defined(CFG_SCIF_A) SCIF_FNS(SCLSR, 0, 0, 0x14, 16) #else SCIF_FNS(SCLSR, 0, 0, 0x24, 16) @@ -491,7 +491,7 @@ static inline int scbrr_calc(struct uart_port *port, int bps, int clk) #define SCBRR_VALUE(bps, clk) scbrr_calc(port, bps, clk) #elif defined(CONFIG_RCAR_GEN2) #define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */ - #if defined(CONFIG_SCIF_A) + #if defined(CFG_SCIF_A) #define SCBRR_VALUE(bps, clk) (clk / bps / 16 - 1) /* Internal Clock */ #else #define SCBRR_VALUE(bps, clk) (clk / bps / 32 - 1) /* Internal Clock */ diff --git a/include/configs/stout.h b/include/configs/stout.h index ee1abe691bfd..ea5828b950b1 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -23,7 +23,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* SCIF */ -#define CONFIG_SCIF_A +#define CFG_SCIF_A /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 From patchwork Sun Dec 4 15:13:44 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:49 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 113/149] global: Migrate CONFIG_SCSI_DEV_LIST to CFG Date: Sun, 4 Dec 2022 10:13:44 -0500 Message-Id: <20221204151420.56851-23-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SCSI_DEV_LIST to CFG_SCSI_DEV_LIST Signed-off-by: Tom Rini --- drivers/scsi/scsi.c | 4 ++-- include/configs/ls1021aiot.h | 2 +- include/configs/ls1028ardb.h | 2 +- include/configs/ls1043ardb.h | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c index 3e769b0843f0..a020a7da23a5 100644 --- a/drivers/scsi/scsi.c +++ b/drivers/scsi/scsi.c @@ -18,8 +18,8 @@ #include #if !defined(CONFIG_DM_SCSI) -# ifdef CONFIG_SCSI_DEV_LIST -# define SCSI_DEV_LIST CONFIG_SCSI_DEV_LIST +# ifdef CFG_SCSI_DEV_LIST +# define SCSI_DEV_LIST CFG_SCSI_DEV_LIST # else # ifdef CONFIG_SATA_ULI5288 diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 8b5fba51c6ff..53d9936f4e77 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -61,7 +61,7 @@ #ifndef PCI_DEVICE_ID_FREESCALE_AHCI #define PCI_DEVICE_ID_FREESCALE_AHCI 0x0440 #endif -#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_FREESCALE, \ +#define CFG_SCSI_DEV_LIST {PCI_VENDOR_ID_FREESCALE, \ PCI_DEVICE_ID_FREESCALE_AHCI} /* SPI */ diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index 8c53636beac3..ee4f885c5341 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -52,7 +52,7 @@ /* SATA */ #define SCSI_VEND_ID 0x1b4b #define SCSI_DEV_ID 0x9170 -#define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} +#define CFG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} /* Initial environment variables */ #ifndef SPL_NO_ENV diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index c8a6f0146aac..60362b6a4d07 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -203,7 +203,7 @@ #ifndef SPL_NO_SATA #define SCSI_VEND_ID 0x1b4b #define SCSI_DEV_ID 0x9170 -#define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} +#define CFG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} #endif #include From patchwork Sun Dec 4 15:13:45 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:50 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 114/149] global: Migrate CONFIG_SC_TIMER_CLK to CFG Date: Sun, 4 Dec 2022 10:13:45 -0500 Message-Id: <20221204151420.56851-24-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SC_TIMER_CLK to CFG_SC_TIMER_CLK Signed-off-by: Tom Rini --- arch/arm/mach-imx/syscounter.c | 2 +- include/configs/mx6_common.h | 2 +- include/configs/mx7_common.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c index df478a232637..129efac6fa69 100644 --- a/arch/arm/mach-imx/syscounter.c +++ b/arch/arm/mach-imx/syscounter.c @@ -65,7 +65,7 @@ int timer_init(void) struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR; unsigned long val, freq; - freq = CONFIG_SC_TIMER_CLK; + freq = CFG_SC_TIMER_CLK; asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); writel(freq, &sctr->cntfid0); diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index dd8cabc2e935..0b8233de8c42 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -9,7 +9,7 @@ #include #if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) -#define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ +#define CFG_SC_TIMER_CLK 8000000 /* 8Mhz */ #else #ifndef CONFIG_SYS_L2CACHE_OFF #define CFG_SYS_PL310_BASE L2_PL310_BASE diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 6e14b4fbf053..a542839ce1da 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -14,7 +14,7 @@ #include /* Timer settings */ -#define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ +#define CFG_SC_TIMER_CLK 8000000 /* 8Mhz */ /* Miscellaneous configurable options */ From patchwork Sun Dec 4 15:13:46 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:51 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 115/149] global: Migrate CONFIG_SET_DFU_ALT_BUF_LEN to CFG Date: Sun, 4 Dec 2022 10:13:46 -0500 Message-Id: <20221204151420.56851-25-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SET_DFU_ALT_BUF_LEN to CFG_SET_DFU_ALT_BUF_LEN Signed-off-by: Tom Rini --- board/samsung/common/misc.c | 2 +- include/configs/odroid.h | 2 +- include/configs/odroid_xu3.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c index 9c0ec29c937b..5ffa216e2e5d 100644 --- a/board/samsung/common/misc.c +++ b/board/samsung/common/misc.c @@ -41,7 +41,7 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_SET_DFU_ALT_INFO void set_dfu_alt_info(char *interface, char *devstr) { - size_t buf_size = CONFIG_SET_DFU_ALT_BUF_LEN; + size_t buf_size = CFG_SET_DFU_ALT_BUF_LEN; ALLOC_CACHE_ALIGN_BUFFER(char, buf, buf_size); char *alt_info = "Settings not found!"; char *status = "error!\n"; diff --git a/include/configs/odroid.h b/include/configs/odroid.h index 3ac13a65d63f..560a23c23efb 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -37,7 +37,7 @@ ""PARTS_BOOT" part 0 1;" \ ""PARTS_ROOT" part 0 2\0" \ -#define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K) +#define CFG_SET_DFU_ALT_BUF_LEN (SZ_1K) #define CFG_DFU_ALT_BOOT_EMMC \ "u-boot raw 0x3e 0x800 mmcpart 1;" \ diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 7304851d0f33..58b5ee6ea0a9 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -49,7 +49,7 @@ "params.bin raw 0x1880 0x20\0" /* Enable: board/samsung/common/misc.c to use set_dfu_alt_info() */ -#define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K) +#define CFG_SET_DFU_ALT_BUF_LEN (SZ_1K) /* Set soc_rev, soc_id, board_rev, board_name, fdtfile */ #define CFG_ODROID_REV_AIN 9 From patchwork Sun Dec 4 15:13:47 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:52 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 116/149] global: Migrate CONFIG_SH_ETHER_ALIGNE_SIZE to CFG Date: Sun, 4 Dec 2022 10:13:47 -0500 Message-Id: <20221204151420.56851-26-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SH_ETHER_ALIGNE_SIZE to CFG_SH_ETHER_ALIGNE_SIZE Signed-off-by: Tom Rini --- drivers/net/sh_eth.c | 4 ++-- drivers/net/sh_eth.h | 16 ++++++++-------- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- 11 files changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 0c584a23b97e..90e47d93aada 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -41,7 +41,7 @@ !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) #define flush_cache_wback(addr, len) \ flush_dcache_range((unsigned long)addr, \ - (unsigned long)(addr + ALIGN(len, CONFIG_SH_ETHER_ALIGNE_SIZE))) + (unsigned long)(addr + ALIGN(len, CFG_SH_ETHER_ALIGNE_SIZE))) #else #define flush_cache_wback(...) #endif @@ -49,7 +49,7 @@ #if defined(CONFIG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM) #define invalidate_cache(addr, len) \ { \ - unsigned long line_size = CONFIG_SH_ETHER_ALIGNE_SIZE; \ + unsigned long line_size = CFG_SH_ETHER_ALIGNE_SIZE; \ unsigned long start, end; \ \ start = (unsigned long)addr; \ diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 520f7f732574..1c07610e1ac7 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -29,8 +29,8 @@ #endif /* defined(CONFIG_SH) */ /* base padding size is 16 */ -#ifndef CONFIG_SH_ETHER_ALIGNE_SIZE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 16 +#ifndef CFG_SH_ETHER_ALIGNE_SIZE +#define CFG_SH_ETHER_ALIGNE_SIZE 16 #endif /* Number of supported ports */ @@ -47,7 +47,7 @@ /* The size of the tx descriptor is determined by how much padding is used. 4, 20, or 52 bytes of padding can be used */ -#define TX_DESC_PADDING (CONFIG_SH_ETHER_ALIGNE_SIZE - 12) +#define TX_DESC_PADDING (CFG_SH_ETHER_ALIGNE_SIZE - 12) /* Tx descriptor. We always use 3 bytes of padding */ struct tx_desc_s { @@ -62,9 +62,9 @@ struct tx_desc_s { /* The size of the rx descriptor is determined by how much padding is used. 4, 20, or 52 bytes of padding can be used */ -#define RX_DESC_PADDING (CONFIG_SH_ETHER_ALIGNE_SIZE - 12) +#define RX_DESC_PADDING (CFG_SH_ETHER_ALIGNE_SIZE - 12) /* aligned cache line size */ -#define RX_BUF_ALIGNE_SIZE (CONFIG_SH_ETHER_ALIGNE_SIZE > 32 ? 64 : 32) +#define RX_BUF_ALIGNE_SIZE (CFG_SH_ETHER_ALIGNE_SIZE > 32 ? 64 : 32) /* Rx descriptor. We always use 4 bytes of padding */ struct rx_desc_s { @@ -388,11 +388,11 @@ enum DMAC_M_BIT { #endif }; -#if CONFIG_SH_ETHER_ALIGNE_SIZE == 64 +#if CFG_SH_ETHER_ALIGNE_SIZE == 64 # define EMDR_DESC EDMR_DL1 -#elif CONFIG_SH_ETHER_ALIGNE_SIZE == 32 +#elif CFG_SH_ETHER_ALIGNE_SIZE == 32 # define EMDR_DESC EDMR_DL0 -#elif CONFIG_SH_ETHER_ALIGNE_SIZE == 16 /* Default */ +#elif CFG_SH_ETHER_ALIGNE_SIZE == 16 /* Default */ # define EMDR_DESC 0 #endif diff --git a/include/configs/alt.h b/include/configs/alt.h index 29f4d06b7f83..f06ceed47f0c 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -26,7 +26,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/condor.h b/include/configs/condor.h index 819184996e69..6d7c788163d3 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -19,7 +19,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ /* XTAL_CLK : 33.33MHz */ diff --git a/include/configs/gose.h b/include/configs/gose.h index 45f0ec6f6a0e..93157de470bd 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -25,7 +25,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index dd6b22de7bac..5b91e6ff039b 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -22,6 +22,6 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 #endif /* __GRPEACH_H */ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 61ff80d2c983..ff02a875013c 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -25,7 +25,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/lager.h b/include/configs/lager.h index 777d5b94d1cd..83e8705dfe76 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -26,7 +26,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/porter.h b/include/configs/porter.h index 202bd914d506..8f834f2c7eba 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -27,7 +27,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/silk.h b/include/configs/silk.h index 9114a0575828..80fce05b3999 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -27,7 +27,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/stout.h b/include/configs/stout.h index ea5828b950b1..d8f0fb185630 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -31,7 +31,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ From patchwork Sun Dec 4 15:13:48 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:53 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 117/149] global: Migrate CONFIG_SH_ETHER_CACHE_INVALIDATE to CFG Date: Sun, 4 Dec 2022 10:13:48 -0500 Message-Id: <20221204151420.56851-27-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SH_ETHER_CACHE_INVALIDATE to CFG_SH_ETHER_CACHE_INVALIDATE Signed-off-by: Tom Rini --- drivers/net/sh_eth.c | 2 +- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- 10 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 90e47d93aada..63b21969d5cc 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -46,7 +46,7 @@ #define flush_cache_wback(...) #endif -#if defined(CONFIG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM) +#if defined(CFG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM) #define invalidate_cache(addr, len) \ { \ unsigned long line_size = CFG_SH_ETHER_ALIGNE_SIZE; \ diff --git a/include/configs/alt.h b/include/configs/alt.h index f06ceed47f0c..7a29157ef440 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -25,7 +25,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/condor.h b/include/configs/condor.h index 6d7c788163d3..fa3edef9b300 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -18,7 +18,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/gose.h b/include/configs/gose.h index 93157de470bd..e54f4b24e048 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -24,7 +24,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 5b91e6ff039b..5ae17f70e909 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -21,7 +21,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 #endif /* __GRPEACH_H */ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index ff02a875013c..1d8aa6def88f 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -24,7 +24,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/lager.h b/include/configs/lager.h index 83e8705dfe76..bb8cc5fecb7a 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -25,7 +25,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/porter.h b/include/configs/porter.h index 8f834f2c7eba..143e9a4672f1 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -26,7 +26,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/silk.h b/include/configs/silk.h index 80fce05b3999..2d1e23c27451 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -26,7 +26,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/stout.h b/include/configs/stout.h index d8f0fb185630..9e05a7ae6f96 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -30,7 +30,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ From patchwork Sun Dec 4 15:13:49 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:54 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 118/149] global: Migrate CONFIG_SH_ETHER_CACHE_WRITEBACK to CFG Date: Sun, 4 Dec 2022 10:13:49 -0500 Message-Id: <20221204151420.56851-28-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SH_ETHER_CACHE_WRITEBACK to CFG_SH_ETHER_CACHE_WRITEBACK Signed-off-by: Tom Rini --- README | 2 +- drivers/net/sh_eth.c | 2 +- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- 11 files changed, 11 insertions(+), 11 deletions(-) diff --git a/README b/README index 2d3a48e88a59..5f688d70f32f 100644 --- a/README +++ b/README @@ -547,7 +547,7 @@ The following options need to be configured: CONFIG_SH_ETHER_PHY_ADDR Define the ETH PHY's address - CONFIG_SH_ETHER_CACHE_WRITEBACK + CFG_SH_ETHER_CACHE_WRITEBACK If this option is set, the driver enables cache flush. - TPM Support: diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 63b21969d5cc..0053733075ed 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -37,7 +37,7 @@ # error "Please define CONFIG_SH_ETHER_PHY_ADDR" #endif -#if defined(CONFIG_SH_ETHER_CACHE_WRITEBACK) && \ +#if defined(CFG_SH_ETHER_CACHE_WRITEBACK) && \ !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) #define flush_cache_wback(addr, len) \ flush_dcache_range((unsigned long)addr, \ diff --git a/include/configs/alt.h b/include/configs/alt.h index 7a29157ef440..2b7832527347 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -24,7 +24,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/condor.h b/include/configs/condor.h index fa3edef9b300..3f99cbf9dab9 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -17,7 +17,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/gose.h b/include/configs/gose.h index e54f4b24e048..45a537341b0e 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -23,7 +23,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 5ae17f70e909..3fde61407094 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -20,7 +20,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 1d8aa6def88f..b3b6f03e08d4 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -23,7 +23,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/lager.h b/include/configs/lager.h index bb8cc5fecb7a..16d15ccdd913 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -24,7 +24,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/porter.h b/include/configs/porter.h index 143e9a4672f1..f217141af8c0 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -25,7 +25,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/silk.h b/include/configs/silk.h index 2d1e23c27451..09c23d379e98 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -25,7 +25,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/stout.h b/include/configs/stout.h index 9e05a7ae6f96..dd44b3e6d00a 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -29,7 +29,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 From patchwork Sun Dec 4 15:13:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1711989 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:56 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 119/149] global: Migrate CONFIG_SH_ETHER_PHY_ADDR to CFG Date: Sun, 4 Dec 2022 10:13:50 -0500 Message-Id: <20221204151420.56851-29-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SH_ETHER_PHY_ADDR to CFG_SH_ETHER_PHY_ADDR Signed-off-by: Tom Rini --- README | 2 +- drivers/net/sh_eth.c | 6 +++--- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- 11 files changed, 13 insertions(+), 13 deletions(-) diff --git a/README b/README index 5f688d70f32f..217fbaf55757 100644 --- a/README +++ b/README @@ -544,7 +544,7 @@ The following options need to be configured: CONFIG_SH_ETHER_USE_PORT Define the number of ports to be used - CONFIG_SH_ETHER_PHY_ADDR + CFG_SH_ETHER_PHY_ADDR Define the ETH PHY's address CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 0053733075ed..3bf94cb2f7eb 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -33,8 +33,8 @@ #ifndef CONFIG_SH_ETHER_USE_PORT # error "Please define CONFIG_SH_ETHER_USE_PORT" #endif -#ifndef CONFIG_SH_ETHER_PHY_ADDR -# error "Please define CONFIG_SH_ETHER_PHY_ADDR" +#ifndef CFG_SH_ETHER_PHY_ADDR +# error "Please define CFG_SH_ETHER_PHY_ADDR" #endif #if defined(CFG_SH_ETHER_CACHE_WRITEBACK) && \ @@ -694,7 +694,7 @@ static int sh_ether_probe(struct udevice *udev) priv->bus = miiphy_get_dev_by_name(udev->name); eth->port = CONFIG_SH_ETHER_USE_PORT; - eth->port_info[eth->port].phy_addr = CONFIG_SH_ETHER_PHY_ADDR; + eth->port_info[eth->port].phy_addr = CFG_SH_ETHER_PHY_ADDR; eth->port_info[eth->port].iobase = (void __iomem *)(uintptr_t)(BASE_IO_ADDR + 0x800 * eth->port); diff --git a/include/configs/alt.h b/include/configs/alt.h index 2b7832527347..06ab5ce669b9 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -22,7 +22,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/condor.h b/include/configs/condor.h index 3f99cbf9dab9..43b88f127213 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -15,7 +15,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/gose.h b/include/configs/gose.h index 45a537341b0e..5184db41061f 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -21,7 +21,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 3fde61407094..8ba9b73672c8 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -18,7 +18,7 @@ /* Network interface */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0 +#define CFG_SH_ETHER_PHY_ADDR 0 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index b3b6f03e08d4..2910336def6c 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -21,7 +21,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/lager.h b/include/configs/lager.h index 16d15ccdd913..815239a73bd4 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -22,7 +22,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/porter.h b/include/configs/porter.h index f217141af8c0..f732aeb47b56 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -23,7 +23,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/silk.h b/include/configs/silk.h index 09c23d379e98..005eed154947 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -23,7 +23,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/stout.h b/include/configs/stout.h index dd44b3e6d00a..cf90e4d46457 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -27,7 +27,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE From patchwork Sun Dec 4 15:13:51 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:57 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 120/149] global: Migrate CONFIG_SH_ETHER_PHY_MODE to CFG Date: Sun, 4 Dec 2022 10:13:51 -0500 Message-Id: <20221204151420.56851-30-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SH_ETHER_PHY_MODE to CFG_SH_ETHER_PHY_MODE Signed-off-by: Tom Rini --- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) diff --git a/include/configs/alt.h b/include/configs/alt.h index 06ab5ce669b9..53c31562a5d0 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -23,7 +23,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/condor.h b/include/configs/condor.h index 43b88f127213..2c9817cf02c5 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -16,7 +16,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/gose.h b/include/configs/gose.h index 5184db41061f..ed7dd70dd964 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -22,7 +22,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 8ba9b73672c8..6a11aa61f0fb 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -19,7 +19,7 @@ /* Network interface */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 2910336def6c..31d0795f07fb 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -22,7 +22,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/lager.h b/include/configs/lager.h index 815239a73bd4..991fc9020ee0 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -23,7 +23,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/porter.h b/include/configs/porter.h index f732aeb47b56..1587c5c5397c 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -24,7 +24,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/silk.h b/include/configs/silk.h index 005eed154947..21100c46b1cb 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -24,7 +24,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/stout.h b/include/configs/stout.h index cf90e4d46457..51f4420ed6fa 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -28,7 +28,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 From patchwork Sun Dec 4 15:13:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.57 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:58 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 121/149] global: Migrate CONFIG_SH_ETHER_USE_PORT to CFG Date: Sun, 4 Dec 2022 10:13:52 -0500 Message-Id: <20221204151420.56851-31-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SH_ETHER_USE_PORT to CFG_SH_ETHER_USE_PORT Signed-off-by: Tom Rini --- README | 2 +- drivers/net/sh_eth.c | 6 +++--- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- 11 files changed, 13 insertions(+), 13 deletions(-) diff --git a/README b/README index 217fbaf55757..a9b225e45ecb 100644 --- a/README +++ b/README @@ -541,7 +541,7 @@ The following options need to be configured: CONFIG_SH_ETHER Support for Renesas on-chip Ethernet controller - CONFIG_SH_ETHER_USE_PORT + CFG_SH_ETHER_USE_PORT Define the number of ports to be used CFG_SH_ETHER_PHY_ADDR diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 3bf94cb2f7eb..8f162ca58fbb 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -30,8 +30,8 @@ #include "sh_eth.h" -#ifndef CONFIG_SH_ETHER_USE_PORT -# error "Please define CONFIG_SH_ETHER_USE_PORT" +#ifndef CFG_SH_ETHER_USE_PORT +# error "Please define CFG_SH_ETHER_USE_PORT" #endif #ifndef CFG_SH_ETHER_PHY_ADDR # error "Please define CFG_SH_ETHER_PHY_ADDR" @@ -693,7 +693,7 @@ static int sh_ether_probe(struct udevice *udev) priv->bus = miiphy_get_dev_by_name(udev->name); - eth->port = CONFIG_SH_ETHER_USE_PORT; + eth->port = CFG_SH_ETHER_USE_PORT; eth->port_info[eth->port].phy_addr = CFG_SH_ETHER_PHY_ADDR; eth->port_info[eth->port].iobase = (void __iomem *)(uintptr_t)(BASE_IO_ADDR + 0x800 * eth->port); diff --git a/include/configs/alt.h b/include/configs/alt.h index 53c31562a5d0..8f03762583e9 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -21,7 +21,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/condor.h b/include/configs/condor.h index 2c9817cf02c5..50c8d1733838 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -14,7 +14,7 @@ /* Environment compatibility */ /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/gose.h b/include/configs/gose.h index ed7dd70dd964..7ae0726518da 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -20,7 +20,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512u * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 6a11aa61f0fb..8de4a36e931a 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -17,7 +17,7 @@ #define CFG_SYS_SDRAM_SIZE (10 * 1024 * 1024) /* Network interface */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 31d0795f07fb..d47d70178ccd 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -20,7 +20,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/lager.h b/include/configs/lager.h index 991fc9020ee0..2577c7a7da67 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -21,7 +21,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/porter.h b/include/configs/porter.h index 1587c5c5397c..2cb430be8b0d 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -22,7 +22,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (1024u * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/silk.h b/include/configs/silk.h index 21100c46b1cb..7bed32d8553b 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -22,7 +22,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/stout.h b/include/configs/stout.h index 51f4420ed6fa..1278ba63f4f3 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -26,7 +26,7 @@ #define CFG_SCIF_A /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK From patchwork Sun Dec 4 15:13:53 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.14.59 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:14:59 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 122/149] global: Migrate CONFIG_SLIC to CFG Date: Sun, 4 Dec 2022 10:13:53 -0500 Message-Id: <20221204151420.56851-32-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SLIC to CFG_SLIC Signed-off-by: Tom Rini --- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +- include/configs/p1_p2_rdb_pc.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index df9f6ae47322..4d7d042eaf3b 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -187,7 +187,7 @@ void board_gpio_init(void) setbits_be32(&pgpio->gpdat, 0x00080000); #endif -#ifdef CONFIG_SLIC +#ifdef CFG_SLIC /* reset SLIC */ setbits_be32(&pgpio->gpdir, 0x00040000); setbits_be32(&pgpio->gpdat, 0x00040000); diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 832ad9c3ece0..be7680198299 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -13,7 +13,7 @@ #include #if defined(CONFIG_TARGET_P1020RDB_PC) -#define CONFIG_SLIC +#define CFG_SLIC #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0x5c #define __SW_BOOT_SPI 0x1c @@ -42,7 +42,7 @@ * 011101 800 800 400 667 PCIe-2 Core0 boot; Core1 hold-off */ #if defined(CONFIG_TARGET_P1020RDB_PD) -#define CONFIG_SLIC +#define CFG_SLIC #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0x64 #define __SW_BOOT_SPI 0x34 From patchwork Sun Dec 4 15:13:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1711996 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.00 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:00 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 123/149] global: Migrate CONFIG_SMP_PEN_ADDR to CFG Date: Sun, 4 Dec 2022 10:13:54 -0500 Message-Id: <20221204151420.56851-33-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SMP_PEN_ADDR to CFG_SMP_PEN_ADDR Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/nonsec_virt.S | 4 ++-- board/samsung/arndale/arndale.c | 4 ++-- include/configs/arndale.h | 2 +- include/configs/km/pg-wcom-ls102xa.h | 2 +- include/configs/ls1021aiot.h | 2 +- include/configs/ls1021aqds.h | 2 +- include/configs/ls1021atwr.h | 2 +- 7 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index b6d144f065d2..dcf9a7165f03 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -205,11 +205,11 @@ ENTRY(_nonsec_init) bx lr ENDPROC(_nonsec_init) -#ifdef CONFIG_SMP_PEN_ADDR +#ifdef CFG_SMP_PEN_ADDR /* void __weak smp_waitloop(unsigned previous_address); */ ENTRY(smp_waitloop) wfi - ldr r1, =CONFIG_SMP_PEN_ADDR @ load start address + ldr r1, =CFG_SMP_PEN_ADDR @ load start address ldr r1, [r1] #ifdef CONFIG_PEN_ADDR_BIG_ENDIAN rev r1, r1 diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c index a992dc684291..3ebf600e1d7c 100644 --- a/board/samsung/arndale/arndale.c +++ b/board/samsung/arndale/arndale.c @@ -112,10 +112,10 @@ int checkboard(void) } #endif -#ifdef CONFIG_SMP_PEN_ADDR +#ifdef CFG_SMP_PEN_ADDR void smp_set_core_boot_addr(unsigned long addr, int corenr) { - writel(addr, CONFIG_SMP_PEN_ADDR); + writel(addr, CFG_SMP_PEN_ADDR); /* make sure this write is really executed */ __asm__ volatile ("dsb\n"); diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 8acc525b11c9..b56effcd411e 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -16,7 +16,7 @@ /* Miscellaneous configurable options */ -#define CONFIG_SMP_PEN_ADDR 0x02020000 +#define CFG_SMP_PEN_ADDR 0x02020000 /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ #define CFG_ARM_GIC_BASE_ADDRESS 0x10480000 diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index a5dde8e441c9..d7ecd5ebe052 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -161,7 +161,7 @@ {1, {I2C_NULL_HOP} }, \ } -#define CONFIG_SMP_PEN_ADDR 0x01ee0200 +#define CFG_SMP_PEN_ADDR 0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 53d9936f4e77..83ab94ec444c 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -68,7 +68,7 @@ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" -#define CONFIG_SMP_PEN_ADDR 0x01ee0200 +#define CFG_SMP_PEN_ADDR 0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 78432e558117..e4e5522a2384 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -242,7 +242,7 @@ * MMC */ -#define CONFIG_SMP_PEN_ADDR 0x01ee0200 +#define CFG_SMP_PEN_ADDR 0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index a387eeab472a..eb8fb042723a 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -133,7 +133,7 @@ /* GPIO */ -#define CONFIG_SMP_PEN_ADDR 0x01ee0200 +#define CFG_SMP_PEN_ADDR 0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 From patchwork Sun Dec 4 15:13:55 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.01 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:01 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 124/149] global: Migrate CONFIG_STACKBASE to CFG Date: Sun, 4 Dec 2022 10:13:55 -0500 Message-Id: <20221204151420.56851-34-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_STACKBASE to CFG_STACKBASE Signed-off-by: Tom Rini --- include/configs/tegra-common.h | 2 +- include/configs/tegra114-common.h | 2 +- include/configs/tegra124-common.h | 2 +- include/configs/tegra20-common.h | 2 +- include/configs/tegra30-common.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 66cf7ae5847e..bde7ffce008f 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -45,7 +45,7 @@ #define CFG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ #ifndef CONFIG_ARM64 -#define CFG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE +#define CFG_SYS_INIT_RAM_ADDR CFG_STACKBASE #define CFG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN /* Defines for SPL */ diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index 87ec1f5a99d6..ab4fa5504c52 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -15,7 +15,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x83800000 /* 56MB */ +#define CFG_STACKBASE 0x83800000 /* 56MB */ /*----------------------------------------------------------------------- * Physical Memory Map diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 0485fea6ccb8..b413e2512128 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -17,7 +17,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x83800000 /* 56MB */ +#define CFG_STACKBASE 0x83800000 /* 56MB */ /*----------------------------------------------------------------------- * Physical Memory Map diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 617bfb2197cf..a313ac2041a9 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -16,7 +16,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x03800000 /* 56MB */ +#define CFG_STACKBASE 0x03800000 /* 56MB */ /*----------------------------------------------------------------------- * Physical Memory Map diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index 04fcf11ed82d..c57d2d157e33 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -16,7 +16,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x83800000 /* 56MB */ +#define CFG_STACKBASE 0x83800000 /* 56MB */ /* * Memory layout for where various images get loaded by boot scripts: From patchwork Sun Dec 4 15:13:56 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:03 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 125/149] global: Migrate CONFIG_STD_DEVICES_SETTINGS to CFG Date: Sun, 4 Dec 2022 10:13:56 -0500 Message-Id: <20221204151420.56851-35-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_STD_DEVICES_SETTINGS to CFG_STD_DEVICES_SETTINGS Signed-off-by: Tom Rini --- include/configs/bayleybay.h | 2 +- include/configs/cherryhill.h | 2 +- include/configs/chromebook_coral.h | 4 ++-- include/configs/chromebook_samus.h | 4 ++-- include/configs/conga-qeval20-qa3-e3845.h | 2 +- include/configs/coreboot.h | 2 +- include/configs/cougarcanyon2.h | 2 +- include/configs/crownbay.h | 2 +- include/configs/dfi-bt700.h | 2 +- include/configs/efi-x86_app.h | 2 +- include/configs/efi-x86_payload.h | 2 +- include/configs/galileo.h | 2 +- include/configs/minnowmax.h | 2 +- include/configs/qemu-x86.h | 2 +- include/configs/slimbootloader.h | 4 ++-- include/configs/som-db5800-som-6867.h | 2 +- include/configs/theadorable-x86-common.h | 2 +- include/configs/x86-chromebook.h | 2 +- include/configs/x86-common.h | 2 +- 19 files changed, 22 insertions(+), 22 deletions(-) diff --git a/include/configs/bayleybay.h b/include/configs/bayleybay.h index b347125f2fa0..b0df328cd84b 100644 --- a/include/configs/bayleybay.h +++ b/include/configs/bayleybay.h @@ -12,7 +12,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/cherryhill.h b/include/configs/cherryhill.h index 726c43d35ea0..d6ce70a96aea 100644 --- a/include/configs/cherryhill.h +++ b/include/configs/cherryhill.h @@ -8,7 +8,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" diff --git a/include/configs/chromebook_coral.h b/include/configs/chromebook_coral.h index d14c1d445b25..43fdc394416d 100644 --- a/include/configs/chromebook_coral.h +++ b/include/configs/chromebook_coral.h @@ -13,8 +13,8 @@ #include #include -#undef CONFIG_STD_DEVICES_SETTINGS -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ +#undef CFG_STD_DEVICES_SETTINGS +#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" diff --git a/include/configs/chromebook_samus.h b/include/configs/chromebook_samus.h index e29be3fda4ac..03a1033c5735 100644 --- a/include/configs/chromebook_samus.h +++ b/include/configs/chromebook_samus.h @@ -15,8 +15,8 @@ #include #include -#undef CONFIG_STD_DEVICES_SETTINGS -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ +#undef CFG_STD_DEVICES_SETTINGS +#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h index 6f431725269c..60617e6fec25 100644 --- a/include/configs/conga-qeval20-qa3-e3845.h +++ b/include/configs/conga-qeval20-qa3-e3845.h @@ -12,7 +12,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index f73004386fda..b4f49bf5289d 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -15,7 +15,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/cougarcanyon2.h b/include/configs/cougarcanyon2.h index b64c7df1b25f..31639e48da88 100644 --- a/include/configs/cougarcanyon2.h +++ b/include/configs/cougarcanyon2.h @@ -8,7 +8,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vga\0" \ "stderr=serial,vga\0" diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index ff74deb3d400..387bb8800e89 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -12,7 +12,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h index d10422b6c1c7..05389a435bee 100644 --- a/include/configs/dfi-bt700.h +++ b/include/configs/dfi-bt700.h @@ -16,7 +16,7 @@ /* Use BayTrail internal HS UART which is memory-mapped */ #endif -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" diff --git a/include/configs/efi-x86_app.h b/include/configs/efi-x86_app.h index 17a785140262..843ed8b9d1db 100644 --- a/include/configs/efi-x86_app.h +++ b/include/configs/efi-x86_app.h @@ -8,7 +8,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=vidconsole\0" \ "stderr=vidconsole\0" diff --git a/include/configs/efi-x86_payload.h b/include/configs/efi-x86_payload.h index f50c2ce4dd07..c72b067c367d 100644 --- a/include/configs/efi-x86_payload.h +++ b/include/configs/efi-x86_payload.h @@ -12,7 +12,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/galileo.h b/include/configs/galileo.h index 472f236b9b6e..0380ac287be2 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -14,7 +14,7 @@ /* ns16550 UART is memory-mapped in Quark SoC */ -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 6c15c72efda5..4a12c2f72c62 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -12,7 +12,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" \ "usb_pgood_delay=40\0" diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index 5cd13887084c..33263a46a407 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -22,7 +22,7 @@ #include #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/slimbootloader.h b/include/configs/slimbootloader.h index 748a423b0833..20b99a1021df 100644 --- a/include/configs/slimbootloader.h +++ b/include/configs/slimbootloader.h @@ -8,7 +8,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS \ +#define CFG_STD_DEVICES_SETTINGS \ "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial\0" \ "stderr=serial\0" @@ -18,7 +18,7 @@ */ #undef CFG_EXTRA_ENV_SETTINGS #define CFG_EXTRA_ENV_SETTINGS \ - CONFIG_STD_DEVICES_SETTINGS \ + CFG_STD_DEVICES_SETTINGS \ "netdev=eth0\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=0x4000000\0" \ diff --git a/include/configs/som-db5800-som-6867.h b/include/configs/som-db5800-som-6867.h index f09709213673..b2e7aa1514c0 100644 --- a/include/configs/som-db5800-som-6867.h +++ b/include/configs/som-db5800-som-6867.h @@ -12,7 +12,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/theadorable-x86-common.h b/include/configs/theadorable-x86-common.h index 746995179f9c..b23b8783076b 100644 --- a/include/configs/theadorable-x86-common.h +++ b/include/configs/theadorable-x86-common.h @@ -11,7 +11,7 @@ #ifndef __THEADORABLE_X86_COMMON_H #define __THEADORABLE_X86_COMMON_H -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 9df3bfd527f6..41fb499ae4f7 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -12,7 +12,7 @@ #define VIDEO_IO_OFFSET 0 -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index f421ec580344..c1c5a09a35c7 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -44,7 +44,7 @@ #define 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.03 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:04 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 126/149] global: Migrate CONFIG_SYS_I2C_DIRECT_BUS to CFG Date: Sun, 4 Dec 2022 10:13:57 -0500 Message-Id: <20221204151420.56851-36-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_SYS_I2C_DIRECT_BUS to CFG_SYS_I2C_DIRECT_BUS Signed-off-by: Tom Rini --- README | 4 ++-- cmd/i2c.c | 4 ++-- drivers/i2c/i2c_core.c | 10 +++++----- include/i2c.h | 8 ++++---- 4 files changed, 13 insertions(+), 13 deletions(-) diff --git a/README b/README index a9b225e45ecb..fe571f7ef0a6 100644 --- a/README +++ b/README @@ -843,7 +843,7 @@ The following options need to be configured: CFG_SYS_NUM_I2C_BUSES Hold the number of i2c buses you want to use. - CONFIG_SYS_I2C_DIRECT_BUS + CFG_SYS_I2C_DIRECT_BUS define this, if you don't use i2c muxes on your hardware. if CFG_SYS_I2C_MAX_HOPS is not defined or == 0 you can omit this define. @@ -855,7 +855,7 @@ The following options need to be configured: CFG_SYS_I2C_BUSES hold a list of buses you want to use, only used if - CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example + CFG_SYS_I2C_DIRECT_BUS is not defined, for example a board with CFG_SYS_I2C_MAX_HOPS = 1 and CFG_SYS_NUM_I2C_BUSES = 9: diff --git a/cmd/i2c.c b/cmd/i2c.c index f204061cf09f..dd803ee22719 100644 --- a/cmd/i2c.c +++ b/cmd/i2c.c @@ -1699,7 +1699,7 @@ static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc, for (i = 0; i < CFG_SYS_NUM_I2C_BUSES; i++) { printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); -#ifndef CONFIG_SYS_I2C_DIRECT_BUS +#ifndef CFG_SYS_I2C_DIRECT_BUS int j; for (j = 0; j < CFG_SYS_I2C_MAX_HOPS; j++) { @@ -1735,7 +1735,7 @@ static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc, return -1; } printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); -#ifndef CONFIG_SYS_I2C_DIRECT_BUS +#ifndef CFG_SYS_I2C_DIRECT_BUS int j; for (j = 0; j < CFG_SYS_I2C_MAX_HOPS; j++) { if (i2c_bus[i].next_hop[j].chip == 0) diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c index 7f65db23205a..fe0cd75d94a1 100644 --- a/drivers/i2c/i2c_core.c +++ b/drivers/i2c/i2c_core.c @@ -33,14 +33,14 @@ struct i2c_adapter *i2c_get_adapter(int index) return i2c_adap_p; } -#if !defined(CONFIG_SYS_I2C_DIRECT_BUS) +#if !defined(CFG_SYS_I2C_DIRECT_BUS) struct i2c_bus_hose i2c_bus[CFG_SYS_NUM_I2C_BUSES] = CFG_SYS_I2C_BUSES; #endif DECLARE_GLOBAL_DATA_PTR; -#ifndef CONFIG_SYS_I2C_DIRECT_BUS +#ifndef CFG_SYS_I2C_DIRECT_BUS /* * i2c_mux_set() * ------------- @@ -237,7 +237,7 @@ int i2c_set_bus_num(unsigned int bus) if ((bus == I2C_BUS) && (I2C_ADAP->init_done > 0)) return 0; -#ifndef CONFIG_SYS_I2C_DIRECT_BUS +#ifndef CFG_SYS_I2C_DIRECT_BUS if (bus >= CFG_SYS_NUM_I2C_BUSES) return -1; #endif @@ -249,7 +249,7 @@ int i2c_set_bus_num(unsigned int bus) return -2; } -#ifndef CONFIG_SYS_I2C_DIRECT_BUS +#ifndef CFG_SYS_I2C_DIRECT_BUS i2c_mux_disconnect_all(); #endif @@ -257,7 +257,7 @@ int i2c_set_bus_num(unsigned int bus) if (I2C_ADAP->init_done == 0) i2c_init_bus(bus, I2C_ADAP->speed, I2C_ADAP->slaveaddr); -#ifndef CONFIG_SYS_I2C_DIRECT_BUS +#ifndef CFG_SYS_I2C_DIRECT_BUS i2c_mux_set_all(); #endif return 0; diff --git a/include/i2c.h b/include/i2c.h index 3811b26c08e0..ef3820eaba7c 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -635,12 +635,12 @@ void i2c_early_init_f(void); #if !defined(CFG_SYS_I2C_MAX_HOPS) /* no muxes used bus = i2c adapters */ -#define CONFIG_SYS_I2C_DIRECT_BUS 1 +#define CFG_SYS_I2C_DIRECT_BUS 1 #define CFG_SYS_I2C_MAX_HOPS 0 #define CFG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) #else /* we use i2c muxes */ -#undef CONFIG_SYS_I2C_DIRECT_BUS +#undef CFG_SYS_I2C_DIRECT_BUS #endif /* define the I2C bus number for RTC and DTT if not already done */ @@ -691,7 +691,7 @@ struct i2c_adapter { struct i2c_adapter *i2c_get_adapter(int index); -#ifndef CONFIG_SYS_I2C_DIRECT_BUS +#ifndef CFG_SYS_I2C_DIRECT_BUS struct i2c_mux { int id; char name[16]; @@ -720,7 +720,7 @@ extern struct i2c_bus_hose i2c_bus[]; #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) -#ifndef CONFIG_SYS_I2C_DIRECT_BUS +#ifndef CFG_SYS_I2C_DIRECT_BUS #define I2C_MUX_PCA9540_ID 1 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} #define I2C_MUX_PCA9542_ID 2 From patchwork Sun Dec 4 15:13:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1712000 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.05 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:06 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 127/149] global: Migrate CONFIG_TEGRA_BOARD_STRING to CFG Date: Sun, 4 Dec 2022 10:13:58 -0500 Message-Id: <20221204151420.56851-37-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_TEGRA_BOARD_STRING to CFG_TEGRA_BOARD_STRING Signed-off-by: Tom Rini --- arch/arm/mach-tegra/board2.c | 2 +- include/configs/beaver.h | 2 +- include/configs/cardhu.h | 2 +- include/configs/cei-tk1-som.h | 2 +- include/configs/dalmore.h | 2 +- include/configs/harmony.h | 2 +- include/configs/jetson-tk1.h | 2 +- include/configs/medcom-wide.h | 2 +- include/configs/nyan-big.h | 2 +- include/configs/p2371-0000.h | 2 +- include/configs/p2371-2180.h | 2 +- include/configs/p2571.h | 2 +- include/configs/p2771-0000.h | 2 +- include/configs/p3450-0000.h | 2 +- include/configs/paz00.h | 2 +- include/configs/plutux.h | 2 +- include/configs/seaboard.h | 2 +- include/configs/tec-ng.h | 2 +- include/configs/tec.h | 2 +- include/configs/trimslice.h | 2 +- include/configs/venice2.h | 2 +- include/configs/ventana.h | 2 +- 22 files changed, 22 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index 54bbd8a776e9..c7a45f4ff82a 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -89,7 +89,7 @@ int checkboard(void) { int board_id = tegra_board_id(); - printf("Board: %s", CONFIG_TEGRA_BOARD_STRING); + printf("Board: %s", CFG_TEGRA_BOARD_STRING); if (board_id != -1) printf(", ID: %d\n", board_id); printf("\n"); diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 7e0e47796073..e622b7127e36 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -11,7 +11,7 @@ #include "tegra30-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Beaver" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Beaver" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 64d713a19691..82729eb95cf6 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -11,7 +11,7 @@ #include "tegra30-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Cardhu" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Cardhu" #define BOARD_EXTRA_ENV_SETTINGS \ "board_name=cardhu-a04\0" \ diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index e49eb602081d..fbd38b77fe55 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -16,7 +16,7 @@ #include "tegra124-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "CEI tk1-som" +#define CFG_TEGRA_BOARD_STRING "CEI tk1-som" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index c9009e396237..095554157fae 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -11,7 +11,7 @@ #include "tegra114-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Dalmore" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Dalmore" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/harmony.h b/include/configs/harmony.h index a1a66bfb64e0..cae7acdb70b2 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -11,7 +11,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Harmony" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Harmony" /* Board-specific serial config */ diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index aa9e1d811a50..9858f8ff2b5d 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -12,7 +12,7 @@ #include "tegra124-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index efac0febdf81..8dbe741278a6 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -12,7 +12,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Medcom-Wide" +#define CFG_TEGRA_BOARD_STRING "Avionic Design Medcom-Wide" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index e885526e625f..c04d402deb0c 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -12,7 +12,7 @@ #include "tegra124-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Google/NVIDIA Nyan-big" +#define CFG_TEGRA_BOARD_STRING "Google/NVIDIA Nyan-big" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/p2371-0000.h b/include/configs/p2371-0000.h index f426889e1c41..a29d7135d0bf 100644 --- a/include/configs/p2371-0000.h +++ b/include/configs/p2371-0000.h @@ -12,7 +12,7 @@ #include "tegra210-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-0000" +#define CFG_TEGRA_BOARD_STRING "NVIDIA P2371-0000" /* Board-specific serial config */ diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index 24adf4e13f05..0b077aba6592 100644 --- a/include/configs/p2371-2180.h +++ b/include/configs/p2371-2180.h @@ -12,7 +12,7 @@ #include "tegra210-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-2180" +#define CFG_TEGRA_BOARD_STRING "NVIDIA P2371-2180" /* Board-specific serial config */ diff --git a/include/configs/p2571.h b/include/configs/p2571.h index 8a1e7d9b9680..5155aa7b1dd2 100644 --- a/include/configs/p2571.h +++ b/include/configs/p2571.h @@ -12,7 +12,7 @@ #include "tegra210-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2571" +#define CFG_TEGRA_BOARD_STRING "NVIDIA P2571" /* Board-specific serial config */ diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h index 84cdd5719623..e409cc3896d7 100644 --- a/include/configs/p2771-0000.h +++ b/include/configs/p2771-0000.h @@ -11,7 +11,7 @@ #include "tegra186-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2771-0000" +#define CFG_TEGRA_BOARD_STRING "NVIDIA P2771-0000" /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h index 078d35dde2c9..e60f42eaa728 100644 --- a/include/configs/p3450-0000.h +++ b/include/configs/p3450-0000.h @@ -11,7 +11,7 @@ #include "tegra210-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000" +#define CFG_TEGRA_BOARD_STRING "NVIDIA P3450-0000" /* Board-specific serial config */ diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 898167009f6a..950b3217642b 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -13,7 +13,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Compal Paz00" +#define CFG_TEGRA_BOARD_STRING "Compal Paz00" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 1d8ac618c0b2..30bfce9f503c 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -12,7 +12,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Plutux" +#define CFG_TEGRA_BOARD_STRING "Avionic Design Plutux" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index e5d672746b12..8e98620422d8 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -12,7 +12,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Seaboard" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index ae879abe3f86..5e49abb49faf 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -10,7 +10,7 @@ #include "tegra30-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten™ NG Evaluation Carrier" +#define CFG_TEGRA_BOARD_STRING "Avionic Design Tamonten™ NG Evaluation Carrier" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/tec.h b/include/configs/tec.h index e8a9df756d52..05dd7c96f619 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -12,7 +12,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier" +#define CFG_TEGRA_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index b5bf99122019..7d1ff2afd147 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -11,7 +11,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Compulab Trimslice" +#define CFG_TEGRA_BOARD_STRING "Compulab Trimslice" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/venice2.h b/include/configs/venice2.h index 970893ca17bb..353b5ea67c13 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -12,7 +12,7 @@ #include "tegra124-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Venice2" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Venice2" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/ventana.h b/include/configs/ventana.h index e7b7b911d9b6..1d9c60ca7c67 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -11,7 +11,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Ventana" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Ventana" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE From patchwork Sun Dec 4 15:13:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1711998 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.07 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:07 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 128/149] global: Migrate CONFIG_TESTPIN_MASK to CFG Date: Sun, 4 Dec 2022 10:13:59 -0500 Message-Id: <20221204151420.56851-38-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_TESTPIN_MASK to CFG_TESTPIN_MASK Signed-off-by: Tom Rini --- board/keymile/km83xx/km83xx.c | 2 +- include/configs/kmcoge5ne.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index 88afc76bbbf6..73e3709bbba2 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -217,7 +217,7 @@ int post_hotkeys_pressed(void) struct km_bec_fpga *base = (struct km_bec_fpga *)CFG_SYS_KMBEC_FPGA_BASE; int testpin_reg = in_8(&base->CONFIG_TESTPIN_REG); - testpin = (testpin_reg & CONFIG_TESTPIN_MASK) != 0; + testpin = (testpin_reg & CFG_TESTPIN_MASK) != 0; debug("post_hotkeys_pressed: %d\n", !testpin); return testpin; } diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index b6386bdbcb7e..0bd789b26b06 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -36,6 +36,6 @@ #define CFG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */ #define CPM_POST_WORD_ADDR CONFIG_SYS_MEMTEST_END #define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */ -#define CONFIG_TESTPIN_MASK 0x20 /* for kmcoge5ne */ +#define CFG_TESTPIN_MASK 0x20 /* for kmcoge5ne */ #endif /* CONFIG */ From patchwork Sun Dec 4 15:14:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1712005 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.08 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:09 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 129/149] global: Migrate CONFIG_TESTPIN_REG to CFG Date: Sun, 4 Dec 2022 10:14:00 -0500 Message-Id: <20221204151420.56851-39-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_TESTPIN_REG to CFG_TESTPIN_REG Signed-off-by: Tom Rini --- board/keymile/km83xx/km83xx.c | 2 +- include/configs/kmcoge5ne.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index 73e3709bbba2..9ec1dbc6f97b 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -216,7 +216,7 @@ int post_hotkeys_pressed(void) int testpin = 0; struct km_bec_fpga *base = (struct km_bec_fpga *)CFG_SYS_KMBEC_FPGA_BASE; - int testpin_reg = in_8(&base->CONFIG_TESTPIN_REG); + int testpin_reg = in_8(&base->CFG_TESTPIN_REG); testpin = (testpin_reg & CFG_TESTPIN_MASK) != 0; debug("post_hotkeys_pressed: %d\n", !testpin); return testpin; diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index 0bd789b26b06..f67e81f2b3e3 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -35,7 +35,7 @@ #define CFG_POST (CFG_SYS_POST_MEMORY|CFG_SYS_POST_MEM_REGIONS) #define CFG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */ #define CPM_POST_WORD_ADDR CONFIG_SYS_MEMTEST_END -#define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */ +#define CFG_TESTPIN_REG gprt3 /* for kmcoge5ne */ #define CFG_TESTPIN_MASK 0x20 /* for kmcoge5ne */ #endif /* CONFIG */ From patchwork Sun Dec 4 15:14:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1711999 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.09 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:10 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 130/149] global: Migrate CONFIG_TSEC_TBICR_SETTINGS to CFG Date: Sun, 4 Dec 2022 10:14:01 -0500 Message-Id: <20221204151420.56851-40-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_TSEC_TBICR_SETTINGS to CFG_TSEC_TBICR_SETTINGS Signed-off-by: Tom Rini --- drivers/net/tsec.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index f465409d8c8e..8833e3098d52 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -29,14 +29,14 @@ ) /* By default force the TBI PHY into 1000Mbps full duplex when in SGMII mode */ -#ifndef CONFIG_TSEC_TBICR_SETTINGS -#define CONFIG_TSEC_TBICR_SETTINGS ( \ +#ifndef CFG_TSEC_TBICR_SETTINGS +#define CFG_TSEC_TBICR_SETTINGS ( \ TBICR_PHY_RESET \ | TBICR_ANEG_ENABLE \ | TBICR_FULL_DUPLEX \ | TBICR_SPEED1_SET \ ) -#endif /* CONFIG_TSEC_TBICR_SETTINGS */ +#endif /* CFG_TSEC_TBICR_SETTINGS */ /* Configure the TBI for SGMII operation */ static void tsec_configure_serdes(struct tsec_private *priv) @@ -50,7 +50,7 @@ static void tsec_configure_serdes(struct tsec_private *priv) tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa), 0, TBI_TBICON, TBICON_CLK_SELECT); tsec_local_mdio_write(priv->phyregs_sgmii, in_be32(&priv->regs->tbipa), - 0, TBI_CR, CONFIG_TSEC_TBICR_SETTINGS); + 0, TBI_CR, CFG_TSEC_TBICR_SETTINGS); } /* the 'way' for ethernet-CRC-32. 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.10 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:11 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 131/149] global: Migrate CONFIG_USART_BASE to CFG Date: Sun, 4 Dec 2022 10:14:02 -0500 Message-Id: <20221204151420.56851-41-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_USART_BASE to CFG_USART_BASE Signed-off-by: Tom Rini --- drivers/serial/atmel_usart.c | 10 +++++----- include/configs/corvus.h | 2 +- include/configs/sam9x60_curiosity.h | 2 +- include/configs/sam9x60ek.h | 2 +- include/configs/smartweb.h | 2 +- include/configs/taurus.h | 2 +- include/configs/vinco.h | 2 +- 7 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c index 90ccdf6b2945..56655427b06b 100644 --- a/drivers/serial/atmel_usart.c +++ b/drivers/serial/atmel_usart.c @@ -72,13 +72,13 @@ static void atmel_serial_activate(atmel_usart3_t *usart) static void atmel_serial_setbrg(void) { - atmel_serial_setbrg_internal((atmel_usart3_t *)CONFIG_USART_BASE, + atmel_serial_setbrg_internal((atmel_usart3_t *)CFG_USART_BASE, CONFIG_USART_ID, gd->baudrate); } static int atmel_serial_init(void) { - atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; + atmel_usart3_t *usart = (atmel_usart3_t *)CFG_USART_BASE; atmel_serial_init_internal(usart); serial_setbrg(); @@ -89,7 +89,7 @@ static int atmel_serial_init(void) static void atmel_serial_putc(char c) { - atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; + atmel_usart3_t *usart = (atmel_usart3_t *)CFG_USART_BASE; if (c == '\n') serial_putc('\r'); @@ -100,7 +100,7 @@ static void atmel_serial_putc(char c) static int atmel_serial_getc(void) { - atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; + atmel_usart3_t *usart = (atmel_usart3_t *)CFG_USART_BASE; while (!(readl(&usart->csr) & USART3_BIT(RXRDY))) schedule(); @@ -109,7 +109,7 @@ static int atmel_serial_getc(void) static int atmel_serial_tstc(void) { - atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; + atmel_usart3_t *usart = (atmel_usart3_t *)CFG_USART_BASE; return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0; } diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 8a61086ecc15..c9eb75d93088 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -28,7 +28,7 @@ #define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ /* serial console */ -#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CFG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS /* SDRAM */ diff --git a/include/configs/sam9x60_curiosity.h b/include/configs/sam9x60_curiosity.h index f44ce909b918..204020d5ee74 100644 --- a/include/configs/sam9x60_curiosity.h +++ b/include/configs/sam9x60_curiosity.h @@ -13,7 +13,7 @@ #define CFG_SYS_AT91_SLOW_CLOCK 32768 #define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ -#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CFG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID 0 /* ignored in arm */ /* SDRAM */ diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index 27b39ebf4174..800b98ff98af 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -14,7 +14,7 @@ #define CFG_SYS_AT91_SLOW_CLOCK 32768 #define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ -#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CFG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID 0 /* ignored in arm */ /* diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 762f61470b15..f9a5aa9e32d0 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -61,7 +61,7 @@ #define CFG_SYS_NAND_READY_PIN AT91_PIN_PC13 /* serial console */ -#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CFG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS /* DFU class support */ diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 855218a8901e..88870d6fdf69 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -34,7 +34,7 @@ /* Misc CPU related */ -#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CFG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS /* diff --git a/include/configs/vinco.h b/include/configs/vinco.h index 0698ae1d1c6e..3b4032301f6e 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -17,7 +17,7 @@ /* The value in the common file is too far away for the VInCo platform */ /* serial console */ -#define CONFIG_USART_BASE 0xfc00c000 +#define CFG_USART_BASE 0xfc00c000 #define CONFIG_USART_ID 30 /* Timer */ From patchwork Sun Dec 4 15:14:03 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.11 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:12 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 132/149] global: Migrate CONFIG_USART_ID to CFG Date: Sun, 4 Dec 2022 10:14:03 -0500 Message-Id: <20221204151420.56851-42-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_USART_ID to CFG_USART_ID Signed-off-by: Tom Rini --- drivers/serial/atmel_usart.c | 2 +- include/configs/corvus.h | 2 +- include/configs/sam9x60_curiosity.h | 2 +- include/configs/sam9x60ek.h | 2 +- include/configs/smartweb.h | 2 +- include/configs/taurus.h | 2 +- include/configs/vinco.h | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c index 56655427b06b..9d97bc865445 100644 --- a/drivers/serial/atmel_usart.c +++ b/drivers/serial/atmel_usart.c @@ -73,7 +73,7 @@ static void atmel_serial_activate(atmel_usart3_t *usart) static void atmel_serial_setbrg(void) { atmel_serial_setbrg_internal((atmel_usart3_t *)CFG_USART_BASE, - CONFIG_USART_ID, gd->baudrate); + CFG_USART_ID, gd->baudrate); } static int atmel_serial_init(void) diff --git a/include/configs/corvus.h b/include/configs/corvus.h index c9eb75d93088..f2675e0ec864 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -29,7 +29,7 @@ /* serial console */ #define CFG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS +#define CFG_USART_ID ATMEL_ID_SYS /* SDRAM */ #define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS6 diff --git a/include/configs/sam9x60_curiosity.h b/include/configs/sam9x60_curiosity.h index 204020d5ee74..e79f80f17f61 100644 --- a/include/configs/sam9x60_curiosity.h +++ b/include/configs/sam9x60_curiosity.h @@ -14,7 +14,7 @@ #define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ #define CFG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID 0 /* ignored in arm */ +#define CFG_USART_ID 0 /* ignored in arm */ /* SDRAM */ #define CFG_SYS_SDRAM_BASE 0x20000000 diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index 800b98ff98af..2c761821efb1 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -15,7 +15,7 @@ #define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ #define CFG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID 0 /* ignored in arm */ +#define CFG_USART_ID 0 /* ignored in arm */ /* * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index f9a5aa9e32d0..75a1670e3317 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -62,7 +62,7 @@ /* serial console */ #define CFG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS +#define CFG_USART_ID ATMEL_ID_SYS /* DFU class support */ #define DFU_MANIFEST_POLL_TIMEOUT 25000 diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 88870d6fdf69..174b848e2595 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -35,7 +35,7 @@ /* Misc CPU related */ #define CFG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS +#define CFG_USART_ID ATMEL_ID_SYS /* * SDRAM: 1 bank, min 32, max 128 MB diff --git a/include/configs/vinco.h b/include/configs/vinco.h index 3b4032301f6e..68c56df5435e 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -18,7 +18,7 @@ /* serial console */ #define CFG_USART_BASE 0xfc00c000 -#define CONFIG_USART_ID 30 +#define CFG_USART_ID 30 /* Timer */ #define CFG_SYS_TIMER_COUNTER 0xfc06863c From patchwork Sun Dec 4 15:14:04 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.13 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:13 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 133/149] global: Migrate CONFIG_USB_ISP1301_I2C_ADDR to CFG Date: Sun, 4 Dec 2022 10:14:04 -0500 Message-Id: <20221204151420.56851-43-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_USB_ISP1301_I2C_ADDR to CFG_USB_ISP1301_I2C_ADDR Signed-off-by: Tom Rini --- drivers/usb/host/ohci-lpc32xx.c | 2 +- include/configs/devkit3250.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/host/ohci-lpc32xx.c b/drivers/usb/host/ohci-lpc32xx.c index 3be0b311a36e..a04b2961b961 100644 --- a/drivers/usb/host/ohci-lpc32xx.c +++ b/drivers/usb/host/ohci-lpc32xx.c @@ -69,7 +69,7 @@ struct otg_regs { #define OTG1_DM_PULLDOWN (1 << 3) #define OTG1_VBUS_DRV (1 << 5) -#define ISP1301_I2C_ADDR CONFIG_USB_ISP1301_I2C_ADDR +#define ISP1301_I2C_ADDR CFG_USB_ISP1301_I2C_ADDR #define ISP1301_I2C_MODE_CONTROL_1_SET 0x04 #define ISP1301_I2C_MODE_CONTROL_1_CLR 0x05 diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 9cfee381d4ac..d85aeaafe519 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -53,7 +53,7 @@ /* * USB */ -#define CONFIG_USB_ISP1301_I2C_ADDR 0x2d +#define CFG_USB_ISP1301_I2C_ADDR 0x2d /* * U-Boot General Configurations From patchwork Sun Dec 4 15:14:05 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.14 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:14 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 134/149] global: Migrate CONFIG_VSC7385_IMAGE et al to CFG Date: Sun, 4 Dec 2022 10:14:05 -0500 Message-Id: <20221204151420.56851-44-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform simple renames of: CONFIG_VSC7385_IMAGE to CFG_VSC7385_IMAGE CONFIG_VSC7385_IMAGE_SIZE to CFG_VSC7385_IMAGE_SIZE Signed-off-by: Tom Rini --- board/freescale/mpc837xerdb/mpc837xerdb.c | 6 +++--- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +- include/configs/MPC837XERDB.h | 4 ++-- include/configs/p1_p2_rdb_pc.h | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c index 8b1bfe0a9f91..97884a397964 100644 --- a/board/freescale/mpc837xerdb/mpc837xerdb.c +++ b/board/freescale/mpc837xerdb/mpc837xerdb.c @@ -206,9 +206,9 @@ int misc_init_r(void) { int rc = 0; -#ifdef CONFIG_VSC7385_IMAGE - if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE, - CONFIG_VSC7385_IMAGE_SIZE)) { +#ifdef CFG_VSC7385_IMAGE + if (vsc7385_upload_firmware((void *) CFG_VSC7385_IMAGE, + CFG_VSC7385_IMAGE_SIZE)) { puts("Failure uploading VSC7385 microcode.\n"); rc = 1; } diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index 4d7d042eaf3b..602b7f0156ba 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -355,7 +355,7 @@ int board_early_init_r(void) vscfw_addr = hextoul(tmp, NULL); printf("uploading VSC7385 microcode from %x\n", vscfw_addr); if (vsc7385_upload_firmware((void *)vscfw_addr, - CONFIG_VSC7385_IMAGE_SIZE)) + CFG_VSC7385_IMAGE_SIZE)) puts("Failure uploading VSC7385 microcode.\n"); } else { puts("No address specified for VSC7385 microcode.\n"); diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 07c989d98906..70b1c399241e 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -42,8 +42,8 @@ #ifdef CONFIG_VSC7385_ENET /* The flash address and size of the VSC7385 firmware image */ -#define CONFIG_VSC7385_IMAGE 0xFE7FE000 -#define CONFIG_VSC7385_IMAGE_SIZE 8192 +#define CFG_VSC7385_IMAGE 0xFE7FE000 +#define CFG_VSC7385_IMAGE_SIZE 8192 #endif diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index be7680198299..f5bd09134499 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -270,7 +270,7 @@ #endif /* The size of the VSC7385 firmware image */ -#define CONFIG_VSC7385_IMAGE_SIZE 8192 +#define CFG_VSC7385_IMAGE_SIZE 8192 #endif #ifndef __VSCFW_ADDR From patchwork Sun Dec 4 15:14:06 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.16 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:17 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 136/149] global: Migrate CONFIG_X86_MRC_ADDR to CFG Date: Sun, 4 Dec 2022 10:14:07 -0500 Message-Id: <20221204151420.56851-46-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_X86_MRC_ADDR to CFG_X86_MRC_ADDR Signed-off-by: Tom Rini --- arch/x86/cpu/intel_common/mrc.c | 2 +- arch/x86/dts/u-boot.dtsi | 2 +- include/configs/x86-chromebook.h | 2 +- tools/binman/binman.rst | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c index a4918fbad61a..69405d740b47 100644 --- a/arch/x86/cpu/intel_common/mrc.c +++ b/arch/x86/cpu/intel_common/mrc.c @@ -200,7 +200,7 @@ static int sdram_initialise(struct udevice *dev, struct udevice *me_dev, debug("PEI data at %p:\n", pei_data); - data = (char *)CONFIG_X86_MRC_ADDR; + data = (char *)CFG_X86_MRC_ADDR; if (data) { int rv; ulong start; diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi index 24e692f988d8..454efc17614e 100644 --- a/arch/x86/dts/u-boot.dtsi +++ b/arch/x86/dts/u-boot.dtsi @@ -86,7 +86,7 @@ #endif #ifdef CONFIG_HAVE_MRC intel-mrc { - offset = ; + offset = ; }; #endif #ifdef CONFIG_FSP_VERSION1 diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 41fb499ae4f7..059e3a0d8a2c 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -6,7 +6,7 @@ #ifndef _X86_CHROMEBOOK_H #define _X86_CHROMEBOOK_H -#define CONFIG_X86_MRC_ADDR 0xfffa0000 +#define CFG_X86_MRC_ADDR 0xfffa0000 #define CONFIG_X86_REFCODE_ADDR 0xffea0000 #define CONFIG_X86_REFCODE_RUN_ADDR 0 diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst index e7b231e07120..69e4b00239c1 100644 --- a/tools/binman/binman.rst +++ b/tools/binman/binman.rst @@ -298,7 +298,7 @@ C preprocessor:: #ifdef CONFIG_HAVE_MRC intel-mrc { - offset = ; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.17 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:18 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 137/149] global: Migrate CONFIG_X86_REFCODE_ADDR to CFG Date: Sun, 4 Dec 2022 10:14:08 -0500 Message-Id: <20221204151420.56851-47-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_X86_REFCODE_ADDR to CFG_X86_REFCODE_ADDR Signed-off-by: Tom Rini --- arch/x86/cpu/broadwell/refcode.c | 2 +- arch/x86/dts/u-boot.dtsi | 2 +- include/configs/x86-chromebook.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/cpu/broadwell/refcode.c b/arch/x86/cpu/broadwell/refcode.c index 94c2e05346a6..3b7ec2b74e8e 100644 --- a/arch/x86/cpu/broadwell/refcode.c +++ b/arch/x86/cpu/broadwell/refcode.c @@ -78,7 +78,7 @@ static int cpu_run_reference_code(void) int ret, dummy; int size; - hdr = (struct rmodule_header *)CONFIG_X86_REFCODE_ADDR; + hdr = (struct rmodule_header *)CFG_X86_REFCODE_ADDR; debug("Extracting code from rmodule at %p\n", hdr); if (hdr->magic != RMODULE_MAGIC) { debug("Invalid rmodule magic\n"); diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi index 454efc17614e..e0de33180910 100644 --- a/arch/x86/dts/u-boot.dtsi +++ b/arch/x86/dts/u-boot.dtsi @@ -149,7 +149,7 @@ #endif #ifdef CONFIG_HAVE_REFCODE intel-refcode { - offset = ; + offset = ; }; #endif #ifdef CONFIG_TPL diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 059e3a0d8a2c..8bbbe51ecb57 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -7,7 +7,7 @@ #define _X86_CHROMEBOOK_H #define CFG_X86_MRC_ADDR 0xfffa0000 -#define CONFIG_X86_REFCODE_ADDR 0xffea0000 +#define CFG_X86_REFCODE_ADDR 0xffea0000 #define CONFIG_X86_REFCODE_RUN_ADDR 0 #define VIDEO_IO_OFFSET 0 From patchwork Sun Dec 4 15:14:09 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.19 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:19 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 138/149] global: Migrate CONFIG_X86_REFCODE_RUN_ADDR to CFG Date: Sun, 4 Dec 2022 10:14:09 -0500 Message-Id: <20221204151420.56851-48-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Perform a simple rename of CONFIG_X86_REFCODE_RUN_ADDR to CFG_X86_REFCODE_RUN_ADDR Signed-off-by: Tom Rini --- arch/x86/cpu/broadwell/refcode.c | 4 ++-- include/configs/x86-chromebook.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/cpu/broadwell/refcode.c b/arch/x86/cpu/broadwell/refcode.c index 3b7ec2b74e8e..df2df7972e98 100644 --- a/arch/x86/cpu/broadwell/refcode.c +++ b/arch/x86/cpu/broadwell/refcode.c @@ -99,7 +99,7 @@ static int cpu_run_reference_code(void) pei_data->saved_data = (void *)&dummy; src = (char *)hdr + hdr->payload_begin_offset; - dest = (char *)CONFIG_X86_REFCODE_RUN_ADDR; + dest = (char *)CFG_X86_REFCODE_RUN_ADDR; size = hdr->payload_end_offset - hdr->payload_begin_offset; debug("Copying refcode from %p to %p, size %x\n", src, dest, size); @@ -112,7 +112,7 @@ static int cpu_run_reference_code(void) func = (asmlinkage int (*)(void *))dest; debug("Running reference code at %p\n", func); #ifdef DEBUG - print_buffer(CONFIG_X86_REFCODE_RUN_ADDR, (void *)func, 1, 0x40, 0); + print_buffer(CFG_X86_REFCODE_RUN_ADDR, (void *)func, 1, 0x40, 0); #endif ret = func(pei_data); if (ret != 0) { diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 8bbbe51ecb57..98abb00927ad 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -8,7 +8,7 @@ #define CFG_X86_MRC_ADDR 0xfffa0000 #define CFG_X86_REFCODE_ADDR 0xffea0000 -#define CONFIG_X86_REFCODE_RUN_ADDR 0 +#define CFG_X86_REFCODE_RUN_ADDR 0 #define VIDEO_IO_OFFSET 0 From patchwork Sun Dec 4 15:14:10 2022 Content-Type: text/plain; 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Signed-off-by: Tom Rini --- board/purism/librem5/spl.c | 8 +++++--- include/configs/librem5.h | 4 ---- 2 files changed, 5 insertions(+), 7 deletions(-) diff --git a/board/purism/librem5/spl.c b/board/purism/librem5/spl.c index 1bfd948806f2..1a203b459990 100644 --- a/board/purism/librem5/spl.c +++ b/board/purism/librem5/spl.c @@ -322,6 +322,8 @@ void disable_charger_bq25895(void) } #define I2C_PMIC 0 +#define POWER_BD71837_I2C_BUS 0 +#define POWER_BD71837_I2C_ADDR 0x4B int power_bd71837_init(unsigned char bus) { @@ -336,7 +338,7 @@ int power_bd71837_init(unsigned char bus) p->name = name; p->interface = I2C_PMIC; p->number_of_regs = BD718XX_MAX_REGISTER; - p->hw.i2c.addr = CONFIG_POWER_BD71837_I2C_ADDR; + p->hw.i2c.addr = POWER_BD71837_I2C_ADDR; p->hw.i2c.tx_num = 1; p->bus = bus; @@ -357,10 +359,10 @@ int power_init_board(void) /* * Init PMIC */ - rv = power_bd71837_init(CONFIG_POWER_BD71837_I2C_BUS); + rv = power_bd71837_init(POWER_BD71837_I2C_BUS); if (rv) { log_err("%s: power_bd71837_init(%d) error %d\n", __func__, - CONFIG_POWER_BD71837_I2C_BUS, rv); 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.21 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:22 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 140/149] configs: Remove unused or redundant CONFIG symbols Date: Sun, 4 Dec 2022 10:14:11 -0500 Message-Id: <20221204151420.56851-50-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean A number of CONFIG symbols have crept in that are never referenced in code, so drop them here. Further, we have two symbols being enabled in headers while already enabled correctly in Kconfig, so these lines can also be removed. Signed-off-by: Tom Rini --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + arch/arm/include/asm/arch-fsl-layerscape/config.h | 1 - arch/arm/mach-mvebu/include/mach/config.h | 3 --- include/configs/cgtqmx8.h | 1 - include/configs/imx8mp_rsb3720.h | 9 --------- include/configs/imx8mq_cm.h | 1 - include/configs/imx8mq_evk.h | 1 - include/configs/imx8mq_phanbell.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/kontron_pitx_imx8m.h | 1 - include/configs/librem5.h | 6 ------ include/configs/pico-imx8mq.h | 1 - 13 files changed, 1 insertion(+), 27 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 2862257e1f2c..9656c52e955f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -29,6 +29,7 @@ config ARCH_LS1028A select ESBC_HDR_LS if CHAIN_OF_TRUST select FSL_LAYERSCAPE select FSL_LSCH3 + select FSL_TZASC_400 select GICV3 select NXP_LSCH3_2 select SYS_FSL_HAS_CCI400 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 12758c8dd1ca..516c9eab0478 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -160,7 +160,6 @@ #elif defined(CONFIG_ARCH_LS1028A) #define CFG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 } -#define CONFIG_FSL_TZASC_400 /* TZ Protection Controller Definitions */ #define TZPC_BASE 0x02200000 diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index 96a08104ff46..610274754837 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -27,7 +27,4 @@ #define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE -/* Needed for SPI NOR booting in SPL */ -#define CONFIG_DM_SEQ_ALIAS 1 - #endif /* __MVEBU_CONFIG_H */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 91454df19720..98d4d8cf4bd9 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -12,7 +12,6 @@ #include #ifdef CONFIG_SPL_BUILD -#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CFG_MALLOC_F_ADDR 0x00120000 #endif diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 495ca313db28..d4ab6a6207d6 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -28,12 +28,6 @@ * GD_FLG_FULL_MALLOC_INIT \ * set \ */ - - -#if defined(CONFIG_NAND_BOOT) -#define CONFIG_SPL_NAND_MXS -#endif - #endif /* ENET Config */ @@ -158,9 +152,6 @@ #define FSL_FSPI_FLASH_NUM 1 #define FSPI0_BASE_ADDR 0x30bb0000 #define FSPI0_AMBA_BASE 0x0 -#define CONFIG_FSPI_QUAD_SUPPORT - -#define CONFIG_SYS_FSL_FSPI_AHB #endif #ifdef CONFIG_NAND_MXS diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 828bd6723727..7cf482d6de15 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -11,7 +11,6 @@ #include #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x182000 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index d2de2900c063..d2e1649400a7 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -12,7 +12,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x182000 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index bfde15e6240f..b66fc18fa5e8 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -11,7 +11,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x182000 diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index a25efbb16bdb..4d5abe2d073b 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -11,7 +11,6 @@ #include #ifdef CONFIG_SPL_BUILD -#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CFG_MALLOC_F_ADDR 0x00120000 #endif diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 4f55ae49403d..93999509948a 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -11,7 +11,6 @@ #include #ifdef CONFIG_SPL_BUILD -#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CFG_MALLOC_F_ADDR 0x00120000 #endif diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index e3a021c987c6..5cf6b5a6dd46 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -13,7 +13,6 @@ 0x40, 0xd4, 0x5c, 0xca, 0x13, 0x99) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x182000 diff --git a/include/configs/librem5.h b/include/configs/librem5.h index e17190ce9c5d..ce0a340ba26e 100644 --- a/include/configs/librem5.h +++ b/include/configs/librem5.h @@ -15,12 +15,6 @@ #include #include -#ifdef CONFIG_SPL_BUILD - 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Signed-off-by: Tom Rini --- arch/arm/Kconfig | 4 ++++ arch/arm/include/asm/iproc-common/configs.h | 3 --- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 42576e503a4a..d7318cad8f63 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -599,6 +599,9 @@ config ARM64_SUPPORT_AARCH32 help This ARM64 system supports AArch32 execution state. +config IPROC + bool + config S5P def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX @@ -704,6 +707,7 @@ config TARGET_BCMCYGNUS bool "Support bcmcygnus" select CPU_V7A select GPIO_EXTRA_HEADER + select IPROC imply BCM_SF2_ETH imply BCM_SF2_ETH_GMAC imply CMD_HASH diff --git a/arch/arm/include/asm/iproc-common/configs.h b/arch/arm/include/asm/iproc-common/configs.h index c63c27dac7e1..ce831bc13a7e 100644 --- a/arch/arm/include/asm/iproc-common/configs.h +++ b/arch/arm/include/asm/iproc-common/configs.h @@ -8,9 +8,6 @@ #include -/* Architecture, CPU, chip, etc */ -#define CONFIG_IPROC - /* Memory Info */ #define CFG_SYS_SDRAM_BASE 0x61000000 From patchwork Sun Dec 4 15:14:13 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.23 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:24 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 142/149] kbuild: Remove uncmd_spl logic Date: Sun, 4 Dec 2022 10:14:13 -0500 Message-Id: <20221204151420.56851-52-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean At this point in the conversion there should be no need to have logic to disable some symbol during the SPL build as all symbols should have an SPL counterpart. The main real changes done here are that we now must make proper use of CONFIG_IS_ENABLED(DM_SERIAL) rather than many of the odd tricks we developed prior to CONFIG_IS_ENABLED() being available. Signed-off-by: Tom Rini --- board/freescale/common/i2c_common.c | 2 +- board/freescale/common/i2c_common.h | 2 +- drivers/misc/gsc.c | 2 +- drivers/serial/Makefile | 17 +---------------- drivers/serial/atmel_usart.c | 8 +++----- drivers/serial/serial-uclass.c | 6 +++--- drivers/serial/serial_mtk.c | 3 +-- drivers/serial/serial_pl01x.c | 11 +++-------- drivers/serial/serial_pl01x_internal.h | 2 +- include/config_uncmd_spl.h | 21 --------------------- include/configs/kmcent2.h | 2 +- include/configs/mv-common.h | 2 +- include/configs/sunxi-common.h | 2 +- include/configs/ti_omap4_common.h | 2 +- include/configs/x530.h | 2 +- include/ns16550.h | 10 +++++----- scripts/Makefile.autoconf | 1 - scripts/Makefile.build | 1 - scripts/Makefile.uncmd_spl | 14 -------------- 19 files changed, 25 insertions(+), 85 deletions(-) delete mode 100644 include/config_uncmd_spl.h delete mode 100644 scripts/Makefile.uncmd_spl diff --git a/board/freescale/common/i2c_common.c b/board/freescale/common/i2c_common.c index 0f09ed7d34f6..119ed3c6171b 100644 --- a/board/freescale/common/i2c_common.c +++ b/board/freescale/common/i2c_common.c @@ -9,7 +9,7 @@ #include #include "i2c_common.h" -#ifdef CONFIG_DM_I2C +#if CONFIG_IS_ENABLED(DM_I2C) /* If DM is in use, retrieve the chip for the specified bus number */ int fsl_i2c_get_device(int address, int bus, DEVICE_HANDLE_T *dev) diff --git a/board/freescale/common/i2c_common.h b/board/freescale/common/i2c_common.h index 840ad6618314..77a7b6aedd7b 100644 --- a/board/freescale/common/i2c_common.h +++ b/board/freescale/common/i2c_common.h @@ -9,7 +9,7 @@ #define __NXP_I2C_COMMON_H__ /* Common functionality shared by the I2C drivers for VID and the mux. */ -#ifdef CONFIG_DM_I2C +#if CONFIG_IS_ENABLED(DM_I2C) #define DEVICE_HANDLE_T struct udevice * #define I2C_READ(dev, register, data, length) \ diff --git a/drivers/misc/gsc.c b/drivers/misc/gsc.c index ec24ca807b07..65c9c2c6ce37 100644 --- a/drivers/misc/gsc.c +++ b/drivers/misc/gsc.c @@ -77,7 +77,7 @@ enum { GSC_SC_RST_CAUSE_MAX = 10, }; -#if (IS_ENABLED(CONFIG_DM_I2C)) +#if CONFIG_IS_ENABLED(DM_I2C) struct gsc_priv { int gscver; diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 33fa56822114..37d3f82dbd87 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -3,30 +3,15 @@ # (C) Copyright 2006-2009 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -ifdef CONFIG_SPL_BUILD - -ifeq ($(CONFIG_$(SPL_TPL_)BUILD)$(CONFIG_$(SPL_TPL_)DM_SERIAL),yy) -obj-y += serial-uclass.o -else -obj-y += serial.o -endif - -else - -ifdef CONFIG_DM_SERIAL +ifeq ($(CONFIG_$(SPL_TPL_)DM_SERIAL),y) obj-y += serial-uclass.o else obj-y += serial.o endif -endif - -ifdef CONFIG_DM_SERIAL obj-$(CONFIG_PL01X_SERIAL) += serial_pl01x.o -else obj-$(CONFIG_PL011_SERIAL) += serial_pl01x.o obj-$(CONFIG_$(SPL_)SYS_NS16550_SERIAL) += serial_ns16550.o -endif obj-$(CONFIG_ALTERA_UART) += altera_uart.o obj-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c index 9d97bc865445..9853f49c94ff 100644 --- a/drivers/serial/atmel_usart.c +++ b/drivers/serial/atmel_usart.c @@ -18,7 +18,7 @@ #include #include -#ifdef CONFIG_DM_SERIAL +#if CONFIG_IS_ENABLED(DM_SERIAL) #include #endif #include @@ -28,7 +28,7 @@ DECLARE_GLOBAL_DATA_PTR; -#ifndef CONFIG_DM_SERIAL +#if !CONFIG_IS_ENABLED(DM_SERIAL) static void atmel_serial_setbrg_internal(atmel_usart3_t *usart, int id, int baudrate) { @@ -133,9 +133,7 @@ __weak struct serial_device *default_serial_console(void) { return &atmel_serial_drv; } -#endif - -#ifdef CONFIG_DM_SERIAL +#else enum serial_clk_type { CLK_TYPE_NORMAL = 0, CLK_TYPE_DBGU, diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index c02106747a08..7240d763d12e 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -407,7 +407,7 @@ void serial_stdio_init(void) { } -#if defined(CONFIG_DM_STDIO) +#if CONFIG_IS_ENABLED(DM_STDIO) #if CONFIG_IS_ENABLED(SERIAL_PRESENT) static void serial_stub_putc(struct stdio_dev *sdev, const char ch) @@ -505,7 +505,7 @@ U_BOOT_ENV_CALLBACK(baudrate, on_baudrate); static int serial_post_probe(struct udevice *dev) { struct dm_serial_ops *ops = serial_get_ops(dev); -#ifdef CONFIG_DM_STDIO +#if CONFIG_IS_ENABLED(DM_STDIO) struct serial_dev_priv *upriv = dev_get_uclass_priv(dev); struct stdio_dev sdev; #endif @@ -540,7 +540,7 @@ static int serial_post_probe(struct udevice *dev) return ret; } -#ifdef CONFIG_DM_STDIO +#if CONFIG_IS_ENABLED(DM_STDIO) if (!(gd->flags & GD_FLG_RELOC)) return 0; memset(&sdev, '\0', sizeof(sdev)); diff --git a/drivers/serial/serial_mtk.c b/drivers/serial/serial_mtk.c index 6fb4cb65c29f..ded7346a13f5 100644 --- a/drivers/serial/serial_mtk.c +++ b/drivers/serial/serial_mtk.c @@ -173,8 +173,7 @@ static int _mtk_serial_pending(struct mtk_serial_priv *priv, bool input) return (readl(&priv->regs->lsr) & UART_LSR_THRE) ? 0 : 1; } -#if defined(CONFIG_DM_SERIAL) && \ - (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_DM)) +#if CONFIG_IS_ENABLED(DM_SERIAL) static int mtk_serial_setbrg(struct udevice *dev, int baudrate) { struct mtk_serial_priv *priv = dev_get_priv(dev); diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c index 7449e9b90430..f5468353e101 100644 --- a/drivers/serial/serial_pl01x.c +++ b/drivers/serial/serial_pl01x.c @@ -27,8 +27,7 @@ DECLARE_GLOBAL_DATA_PTR; -#ifndef CONFIG_DM_SERIAL - +#if !CONFIG_IS_ENABLED(DM_SERIAL) static volatile unsigned char *const port[] = CFG_PL01x_PORTS; static enum pl01x_type pl01x_type __section(".data"); static struct pl01x_regs *base_regs __section(".data"); @@ -186,7 +185,7 @@ static int pl01x_generic_setbrg(struct pl01x_regs *regs, enum pl01x_type type, return 0; } -#ifndef CONFIG_DM_SERIAL +#if !CONFIG_IS_ENABLED(DM_SERIAL) static void pl01x_serial_init_baud(int baudrate) { int clock = 0; @@ -273,11 +272,7 @@ __weak struct serial_device *default_serial_console(void) { return &pl01x_serial_drv; } - -#endif /* nCONFIG_DM_SERIAL */ - -#ifdef CONFIG_DM_SERIAL - +#else int pl01x_serial_setbrg(struct udevice *dev, int baudrate) { struct pl01x_serial_plat *plat = dev_get_plat(dev); diff --git a/drivers/serial/serial_pl01x_internal.h b/drivers/serial/serial_pl01x_internal.h index dfd95a0b77c7..71c52bb53125 100644 --- a/drivers/serial/serial_pl01x_internal.h +++ b/drivers/serial/serial_pl01x_internal.h @@ -38,7 +38,7 @@ struct pl01x_regs { u32 pl011_cr; /* 0x30 Control register */ }; -#ifdef CONFIG_DM_SERIAL +#if CONFIG_IS_ENABLED(DM_SERIAL) int pl01x_serial_of_to_plat(struct udevice *dev); int pl01x_serial_probe(struct udevice *dev); diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h deleted file mode 100644 index a59b9bbafbdf..000000000000 --- a/include/config_uncmd_spl.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2012 - * Ilya Yanok, ilya.yanok@gmail.com - */ - -#ifndef __CONFIG_UNCMD_SPL_H__ -#define __CONFIG_UNCMD_SPL_H__ - -#ifdef CONFIG_SPL_BUILD -/* SPL needs only BOOTP + TFTP so undefine other stuff to save space */ - -#ifndef CONFIG_SPL_DM -#undef CONFIG_DM_SERIAL -#undef CONFIG_DM_I2C -#endif - -#undef CONFIG_DM_STDIO - -#endif /* CONFIG_SPL_BUILD */ -#endif /* __CONFIG_UNCMD_SPL_H__ */ diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 9bb8cd19033e..c356920c7876 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -325,7 +325,7 @@ * shorted - index 1 * Retain non-DM serial port for debug purposes. */ -#if !defined(CONFIG_DM_SERIAL) +#if !CONFIG_IS_ENABLED(DM_SERIAL) #define CFG_SYS_NS16550_CLK (get_bus_freq(0) / 2) #define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR + 0x11C500) #endif diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index fa275d61d185..3dfcb138b490 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -33,7 +33,7 @@ * NS16550 Configuration */ #define CFG_SYS_NS16550_CLK CFG_SYS_TCLK -#if !defined(CONFIG_DM_SERIAL) +#if !CONFIG_IS_ENABLED(DM_SERIAL) #define CFG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE #endif diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index eae107fe5ec6..8032abe76921 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -23,7 +23,7 @@ #else #define CFG_SYS_NS16550_CLK 24000000 #endif -#ifndef CONFIG_DM_SERIAL +#if !CONFIG_IS_ENABLED(DM_SERIAL) # define CFG_SYS_NS16550_COM1 SUNXI_UART0_BASE # define CFG_SYS_NS16550_COM2 SUNXI_UART1_BASE # define CFG_SYS_NS16550_COM3 SUNXI_UART2_BASE diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 49f4263e16ba..9e312ac16d1a 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -28,7 +28,7 @@ * Hardware drivers */ #define CFG_SYS_NS16550_CLK 48000000 -#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL) +#if !CONFIG_IS_ENABLED(DM_SERIAL) #define CFG_SYS_NS16550_COM3 UART3_BASE #endif diff --git a/include/configs/x530.h b/include/configs/x530.h index 01c1b58b2359..c3ffbbfd1f8f 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -14,7 +14,7 @@ * NS16550 Configuration */ #define CFG_SYS_NS16550_CLK CFG_SYS_TCLK -#if !defined(CONFIG_DM_SERIAL) +#if !CONFIG_IS_ENABLED(DM_SERIAL) #define CFG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE #endif diff --git a/include/ns16550.h b/include/ns16550.h index 0ee5c4d6de75..f45fc8cecc56 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -26,7 +26,7 @@ #include -#if defined(CONFIG_DM_SERIAL) && !defined(CONFIG_SYS_NS16550_REG_SIZE) +#if CONFIG_IS_ENABLED(DM_SERIAL) && !defined(CONFIG_SYS_NS16550_REG_SIZE) /* * For driver model we always use one byte per register, and sort out the * differences in the driver @@ -37,10 +37,10 @@ #ifdef CONFIG_NS16550_DYNAMIC #define UART_REG(x) unsigned char x #else -#if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) -#error "Please define NS16550 registers size." -#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_DM_SERIAL) +#if defined(CONFIG_SYS_NS16550_MEM32) && !CONFIG_IS_ENABLED(DM_SERIAL) #define UART_REG(x) u32 x +#elif !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) +#error "Please define NS16550 registers size." #elif (CONFIG_SYS_NS16550_REG_SIZE > 0) #define UART_REG(x) \ unsigned char prepad_##x[CONFIG_SYS_NS16550_REG_SIZE - 1]; \ @@ -113,7 +113,7 @@ struct ns16550 { UART_REG(scr); /* 10*/ UART_REG(ssr); /* 11*/ #endif -#ifdef CONFIG_DM_SERIAL +#if CONFIG_IS_ENABLED(DM_SERIAL) struct ns16550_plat *plat; #endif }; diff --git a/scripts/Makefile.autoconf b/scripts/Makefile.autoconf index f5f5e4a4d540..0ade91642ae3 100644 --- a/scripts/Makefile.autoconf +++ b/scripts/Makefile.autoconf @@ -113,7 +113,6 @@ vpl/include/autoconf.mk: vpl/u-boot.cfg define filechk_config_h (echo "/* Automatically generated - do not edit */"; \ echo \#define CFG_BOARDDIR board/$(if $(VENDOR),$(VENDOR)/)$(BOARD);\ - echo \#include \; \ echo \#include \; \ echo \#include \; \ echo \#include \; \ diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 3b8c9d8c3190..97dd4a64f6ef 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -48,7 +48,6 @@ subdir-ccflags-y := # Modified for U-Boot -include include/config/auto.conf -include $(prefix)/include/autoconf.mk -include scripts/Makefile.uncmd_spl include scripts/Kbuild.include diff --git a/scripts/Makefile.uncmd_spl b/scripts/Makefile.uncmd_spl deleted file mode 100644 index 6ea097d36dd5..000000000000 --- a/scripts/Makefile.uncmd_spl +++ /dev/null @@ -1,14 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# Makefile version of include/config_uncmd_spl.h -# TODO: Invent a better way - -ifdef CONFIG_SPL_BUILD - -ifndef CONFIG_SPL_DM -CONFIG_DM_SERIAL= -CONFIG_DM_I2C= -CONFIG_DM_SPI= -CONFIG_DM_SPI_FLASH= -endif - -endif From patchwork Sun Dec 4 15:14:14 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.25 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:25 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 143/149] checkpatch.pl: Update CONFIG logic in U-Boot section Date: Sun, 4 Dec 2022 10:14:14 -0500 Message-Id: <20221204151420.56851-53-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Now that all CONFIG symbols are in Kconfig, checkpatch.pl should check for and error on any case of define/undef CONFIG_*. Signed-off-by: Tom Rini --- scripts/checkpatch.pl | 8 ++++---- tools/patman/test_checkpatch.py | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index fe13e265a3fe..ccfcbb3e1255 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -2630,10 +2630,10 @@ sub u_boot_line { "strl$1 is preferred over strn$1 because it always produces a nul-terminated string\n" . $herecurr); } - # use defconfig to manage CONFIG_CMD options - if ($line =~ /\+\s*#\s*(define|undef)\s+(CONFIG_CMD\w*)\b/) { - ERROR("DEFINE_CONFIG_CMD", - "All commands are managed by Kconfig\n" . $herecurr); + # use Kconfig for all CONFIG symbols + if ($line =~ /\+\s*#\s*(define|undef)\s+(CONFIG_\w*)\b/) { + ERROR("DEFINE_CONFIG_SYM", + "All CONFIG symbols are managed by Kconfig\n" . $herecurr); } # Don't put common.h and dm.h in header files diff --git a/tools/patman/test_checkpatch.py b/tools/patman/test_checkpatch.py index 8960cd505f82..4c2ab6e590ed 100644 --- a/tools/patman/test_checkpatch.py +++ b/tools/patman/test_checkpatch.py @@ -396,7 +396,7 @@ index 0000000..2234c87 """Test for enabling/disabling commands using preprocesor""" pm = PatchMaker() pm.add_line('common/main.c', '#undef CONFIG_CMD_WHICH') - self.check_single_message(pm, 'DEFINE_CONFIG_CMD', 'error') + self.check_single_message(pm, 'DEFINE_CONFIG_SYM', 'error') def test_barred_include_in_hdr(self): """Test for using a barred include in a header file""" From patchwork Sun Dec 4 15:14:15 2022 Content-Type: text/plain; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.26 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:27 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 144/149] CI: Replace unmigrated symbol test with non-Kconfig introduction test Date: Sun, 4 Dec 2022 10:14:15 -0500 Message-Id: <20221204151420.56851-54-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Now that all symbols have been migrated to Kconfig, or are part of the CFG namespace we do not need a complex check for unmigrated CONFIG symbols. Any instance of #define (or #undef) or a CONFIG value is wrong, so cause CI to fail. This test is not as strict as possible yet as we have more symbols that were not previously caught to deal with. Signed-off-by: Tom Rini --- .azure-pipelines.yml | 31 ++++++------------------------- .gitlab-ci.yml | 28 +++++----------------------- 2 files changed, 11 insertions(+), 48 deletions(-) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index add8847225f0..e102f6bf2af8 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -53,37 +53,18 @@ stages: -j$(sysctl -n hw.logicalcpu) displayName: 'Perform tools-only build' - - job: check_for_migrated_symbols_in_board_header - displayName: 'Check for migrated symbols in board header' + - job: check_for_new_CONFIG_symbols_outside_Kconfig + displayName: 'Check for new CONFIG symbols outside Kconfig' pool: vmImage: $(ubuntu_vm) container: image: $(ci_runner_image) options: $(container_option) steps: - - script: | - KSYMLST=`mktemp` - KUSEDLST=`mktemp` - RET=0 - cat `find . -name "Kconfig*"` | \ - sed -n -e 's/^\s*config *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \ - -e 's/^\s*menuconfig *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \ - | sort -u > $KSYMLST - for CFG in `find include/configs -name "*.h"`; do - (grep '#define[[:blank:]]CONFIG_' $CFG | \ - sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' ; \ - grep '#undef[[:blank:]]CONFIG_' $CFG | \ - sed -n 's/#undef.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p') | \ - sort -u > ${KUSEDLST} || true - NUM=`comm -123 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} | \ - cut -d , -f 3` - if [[ $NUM -ne 0 ]]; then - echo "Unmigrated symbols found in $CFG:" - comm -12 ${KSYMLST} ${KUSEDLST} - RET=1 - fi - done - exit $RET + # If grep succeeds and finds a match the test fails as we should + # have no matches. + - script: git grep -E '^#[[:blank:]]*(define|undef)[[:blank:]]*CONFIG_' \ + include/configs `find arch -name config.h` && exit 1 || exit 0 - job: cppcheck displayName: 'Static code analysis with cppcheck' diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 91d5e0c4a8c8..f84d08a729e1 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -124,31 +124,13 @@ build all other platforms: exit $ret; fi; -check for migrated symbols in board header: +check for new CONFIG symbols outside Kconfig: stage: testsuites script: - - KSYMLST=`mktemp`; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.27 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:28 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 145/149] kbuild: Remove checking for adhoc CONFIG symbols Date: Sun, 4 Dec 2022 10:14:16 -0500 Message-Id: <20221204151420.56851-55-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean At this point all listed adhoc CONFIG symbols have been migrated to Kconfig or removed from the tree or renamed to CFG (or similar). We also now have CI tests that will error on any new introductions, and checkpatch.pl also looks. We can now remove these hooks and related scripts. Signed-off-by: Tom Rini --- Makefile | 8 -- scripts/build-whitelist.sh | 45 ------ scripts/check-config.sh | 63 --------- scripts/config_whitelist.txt | 261 ----------------------------------- tools/moveconfig.py | 32 +---- 5 files changed, 2 insertions(+), 407 deletions(-) delete mode 100755 scripts/build-whitelist.sh delete mode 100755 scripts/check-config.sh diff --git a/Makefile b/Makefile index eba39194e331..da2fd0faa050 100644 --- a/Makefile +++ b/Makefile @@ -1073,10 +1073,6 @@ cmd_lzma = lzma -c -z -k -9 $< > $@ cfg: u-boot.cfg -quiet_cmd_cfgcheck = CFGCHK $2 -cmd_cfgcheck = $(srctree)/scripts/check-config.sh $2 \ - $(srctree)/scripts/config_whitelist.txt $(srctree) - quiet_cmd_ofcheck = OFCHK $2 cmd_ofcheck = $(srctree)/scripts/check-of.sh $2 \ $(srctree)/scripts/of_allowlist.txt @@ -1144,10 +1140,6 @@ endif $(call deprecated,CONFIG_TIMER,Timer drivers,v2023.01,$(if $(strip $(CFG_SYS_TIMER_RATE)$(CFG_SYS_TIMER_COUNTER)),x)) $(call deprecated,CONFIG_DM_SERIAL,Serial drivers,v2023.04,$(CONFIG_SERIAL)) $(call deprecated,CONFIG_DM_SCSI,SCSI drivers,v2023.04,$(CONFIG_SCSI)) - @# Check that this build does not use CONFIG options that we do not - @# know about unless they are in Kconfig. All the existing CONFIG - @# options are whitelisted, so new ones should not be added. - $(call cmd,cfgcheck,u-boot.cfg) @# Check that this build does not override OF_HAS_PRIOR_STAGE by @# disabling OF_BOARD. $(call cmd,ofcheck,$(KCONFIG_CONFIG)) diff --git a/scripts/build-whitelist.sh b/scripts/build-whitelist.sh deleted file mode 100755 index 37630c0271cd..000000000000 --- a/scripts/build-whitelist.sh +++ /dev/null @@ -1,45 +0,0 @@ -#!/bin/sh -# Copyright (c) 2016 Google, Inc -# Written by Simon Glass -# - -# This script creates the configuration whitelist file. This file contains -# all the config options which are allowed to be used outside Kconfig. -# Please do not add things to the whitelist. Instead, add your new option -# to Kconfig. -# -export LC_ALL=C LC_COLLATE=C - -# Looks for the rest of the CONFIG options, but exclude those in Kconfig and -# defconfig files. -# -git grep CONFIG_ | \ - egrep -vi "(Kconfig:|defconfig:|README|\.py|\.pl:)" \ - | tr ' \t' '\n\n' \ - | sed -n 's/^\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' \ - |sort |uniq >scripts/config_whitelist.txt.tmp1; - -# Finally, we need a list of the valid Kconfig options to exclude these from -# the whitelist. -cat `find . -name "Kconfig*"` |sed -n \ - -e 's/^\s*config *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \ - -e 's/^\s*menuconfig *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \ - |sort |uniq >scripts/config_whitelist.txt.tmp2 - -# Use only the options that are present in the first file but not the second. -comm -23 scripts/config_whitelist.txt.tmp1 scripts/config_whitelist.txt.tmp2 \ - |sort |uniq >scripts/config_whitelist.txt.tmp3 - -# If scripts/config_whitelist.txt already exists, take the intersection of the -# current list and the new one. We do not want to increase whitelist options. -if [ -r scripts/config_whitelist.txt ]; then - comm -12 scripts/config_whitelist.txt.tmp3 scripts/config_whitelist.txt \ - > scripts/config_whitelist.txt.tmp4 - mv scripts/config_whitelist.txt.tmp4 scripts/config_whitelist.txt -else - mv scripts/config_whitelist.txt.tmp3 scripts/config_whitelist.txt -fi - -rm scripts/config_whitelist.txt.tmp* - -unset LC_ALL LC_COLLATE diff --git a/scripts/check-config.sh b/scripts/check-config.sh deleted file mode 100755 index cc1c9a54d951..000000000000 --- a/scripts/check-config.sh +++ /dev/null @@ -1,63 +0,0 @@ -#!/bin/sh -# Copyright (c) 2016 Google, Inc -# Written by Simon Glass -# -# Check that the u-boot.cfg file provided does not introduce any new -# ad-hoc CONFIG options -# -# Use scripts/build-whitelist.sh to generate the list of current ad-hoc -# CONFIG options (those which are not in Kconfig). - -# Usage -# check-config.sh -# -# For example: -# scripts/check-config.sh b/chromebook_link/u-boot.cfg kconfig_whitelist.txt . - -set -e -set -u - -PROG_NAME="${0##*/}" - -usage() { - echo "$PROG_NAME " - exit 1 -} - -[ $# -ge 3 ] || usage - -path="$1" -whitelist="$2" -srctree="$3" - -# Temporary files -configs="${path}.configs" -suspects="${path}.suspects" -ok="${path}.ok" -new_adhoc="${path}.adhoc" - -export LC_ALL=C -export LC_COLLATE=C - -cat ${path} |sed -nr 's/^#define (CONFIG_[A-Za-z0-9_]*).*/\1/p' |sort |uniq \ - >${configs} - -comm -23 ${configs} ${whitelist} > ${suspects} - -cat `find ${srctree} -name "Kconfig*"` |sed -nr \ - -e 's/^[[:blank:]]*config *([A-Za-z0-9_]*).*$/CONFIG_\1/p' \ - -e 's/^[[:blank:]]*menuconfig ([A-Za-z0-9_]*).*$/CONFIG_\1/p' \ - |sort |uniq > ${ok} -comm -23 ${suspects} ${ok} >${new_adhoc} -if [ -s ${new_adhoc} ]; then - echo >&2 "Error: You must add new CONFIG options using Kconfig" - echo >&2 "The following new ad-hoc CONFIG options were detected:" - cat >&2 ${new_adhoc} - echo >&2 - echo >&2 "Please add these via Kconfig instead. Find a suitable Kconfig" - echo >&2 "file and add a 'config' or 'menuconfig' option." - # Don't delete the temporary files in case they are useful - exit 1 -else - rm ${suspects} ${ok} ${new_adhoc} -fi diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 36fd8688d5c5..e69de29bb2d1 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1,261 +0,0 @@ -CONFIG_ARM_GIC_BASE_ADDRESS -CONFIG_BOARDDIR -CONFIG_DFU_ALT -CONFIG_DFU_ALT_BOOT_EMMC -CONFIG_DFU_ALT_BOOT_SD -CONFIG_DFU_ALT_SYSTEM -CONFIG_DFU_ENV_SETTINGS -CONFIG_DM9000_BASE -CONFIG_DM9000_BYTE_SWAPPED -CONFIG_DM9000_NO_SROM -CONFIG_DM9000_USE_16BIT -CONFIG_DW_WDT_CLOCK_KHZ -CONFIG_ENV_FLAGS_LIST_STATIC -CONFIG_ENV_IS_EMBEDDED -CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS -CONFIG_ENV_SETTINGS_NAND_V1 -CONFIG_ENV_SETTINGS_NAND_V2 -CONFIG_ENV_SETTINGS_V1 -CONFIG_ENV_SETTINGS_V2 -CONFIG_ENV_SROM_BANK -CONFIG_ENV_TOTAL_SIZE -CONFIG_ET1100_BASE -CONFIG_ETHBASE -CONFIG_EXTRA_ENV_SETTINGS -CONFIG_FB_ADDR -CONFIG_FDTADDR -CONFIG_FDTFILE -CONFIG_FEC_ENET_DEV -CONFIG_FEC_FIXED_SPEED -CONFIG_FEC_MXC_PHYADDR -CONFIG_FLASH_BR_PRELIM -CONFIG_FLASH_OR_PRELIM -CONFIG_FLASH_SECTOR_SIZE -CONFIG_FLASH_SHOW_PROGRESS -CONFIG_FLASH_SPANSION_S29WS_N -CONFIG_FLASH_VERIFY -CONFIG_FM_PLAT_CLK_DIV -CONFIG_FSL_CPLD -CONFIG_FSL_ESDHC_PIN_MUX -CONFIG_FSL_FM_10GEC_REGULAR_NOTATION -CONFIG_FSL_ISBC_KEY_EXT -CONFIG_FSL_PMIC_BITLEN -CONFIG_FSL_PMIC_BUS -CONFIG_FSL_PMIC_CLK -CONFIG_FSL_PMIC_CS -CONFIG_FSL_PMIC_MODE -CONFIG_FSL_SDHC_V2_3 -CONFIG_FSL_SERDES1 -CONFIG_FSL_SERDES2 -CONFIG_FTRTC010_EXTCLK -CONFIG_FTRTC010_PCLK -CONFIG_GATEWAYIP -CONFIG_GMII -CONFIG_G_DNL_THOR_PRODUCT_NUM -CONFIG_G_DNL_THOR_VENDOR_NUM -CONFIG_G_DNL_UMS_PRODUCT_NUM -CONFIG_G_DNL_UMS_VENDOR_NUM -CONFIG_HDMI_ENCODER_I2C_ADDR -CONFIG_HOSTNAME -CONFIG_HSMMC2_8BIT -CONFIG_HW_ENV_SETTINGS -CONFIG_I2C_ENV_EEPROM_BUS -CONFIG_I2C_MULTI_BUS -CONFIG_I2C_MVTWSI -CONFIG_I2C_MVTWSI_BASE0 -CONFIG_I2C_MVTWSI_BASE1 -CONFIG_I2C_RTC_ADDR -CONFIG_ICS307_REFCLK_HZ -CONFIG_IMX6_PWM_PER_CLK -CONFIG_IPADDR -CONFIG_IRAM_BASE -CONFIG_IRAM_END -CONFIG_IRAM_SIZE -CONFIG_IRAM_TOP -CONFIG_KM_DEF_ARCH -CONFIG_KM_DEF_BOOT_ARGS_CPU -CONFIG_KM_DEF_ENV -CONFIG_KM_DEF_ENV_BOOTARGS -CONFIG_KM_DEF_ENV_BOOTPARAMS -CONFIG_KM_DEF_ENV_BOOTTARGETS -CONFIG_KM_DEF_ENV_CONSTANTS -CONFIG_KM_DEF_ENV_CPU -CONFIG_KM_DEF_ENV_FLASH_BOOT -CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI -CONFIG_KM_ECC_MODE -CONFIG_KM_NEW_ENV -CONFIG_KM_UBI_LINUX_MTD -CONFIG_KM_UBI_PARTITION_NAME_APP -CONFIG_KM_UBI_PARTITION_NAME_BOOT -CONFIG_KM_UBI_PART_BOOT_OPTS -CONFIG_KM_UIMAGE_NAME -CONFIG_KSNET_CPSW_NUM_PORTS -CONFIG_KSNET_MAC_ID_BASE -CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE -CONFIG_KSNET_NETCP_BASE -CONFIG_KSNET_NETCP_V1_0 -CONFIG_KSNET_NETCP_V1_5 -CONFIG_KSNET_SERDES_LANES_PER_SGMII -CONFIG_KSNET_SERDES_SGMII2_BASE -CONFIG_KSNET_SERDES_SGMII_BASE -CONFIG_L1_INIT_RAM -CONFIG_L2_CACHE -CONFIG_LEGACY_BOOTCMD_ENV -CONFIG_LOWPOWER_ADDR -CONFIG_LOWPOWER_FLAG -CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY -CONFIG_LPC32XX_NAND_MLC_NAND_TA -CONFIG_LPC32XX_NAND_MLC_RD_HIGH -CONFIG_LPC32XX_NAND_MLC_RD_LOW -CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY -CONFIG_LPC32XX_NAND_MLC_WR_HIGH -CONFIG_LPC32XX_NAND_MLC_WR_LOW -CONFIG_LPC32XX_NAND_SLC_RDR_CLKS -CONFIG_LPC32XX_NAND_SLC_RHOLD -CONFIG_LPC32XX_NAND_SLC_RSETUP -CONFIG_LPC32XX_NAND_SLC_RWIDTH -CONFIG_LPC32XX_NAND_SLC_WDR_CLKS -CONFIG_LPC32XX_NAND_SLC_WHOLD -CONFIG_LPC32XX_NAND_SLC_WSETUP -CONFIG_LPC32XX_NAND_SLC_WWIDTH -CONFIG_MACB_SEARCH_PHY -CONFIG_MALLOC_F_ADDR -CONFIG_MALTA -CONFIG_MAX_DSP_CPUS -CONFIG_MAX_MEM_MAPPED -CONFIG_MAX_RAM_BANK_SIZE -CONFIG_MEMSIZE_IN_BYTES -CONFIG_MEM_INIT_VALUE -CONFIG_MFG_ENV_SETTINGS -CONFIG_MII_DEFAULT_TSEC -CONFIG_MIU_2BIT_21_7_INTERLEAVED -CONFIG_MIU_2BIT_INTERLEAVED -CONFIG_MMC_DEFAULT_DEV -CONFIG_MMC_SUNXI_SLOT -CONFIG_MONITOR_IS_IN_RAM -CONFIG_MTD_NAND_VERIFY_WRITE -CONFIG_MVGBE_PORTS -CONFIG_MXC_GPT_HCLK -CONFIG_MXC_NAND_HWECC -CONFIG_MXC_NAND_IP_REGS_BASE -CONFIG_MXC_NAND_REGS_BASE -CONFIG_MXC_UART_BASE -CONFIG_MXC_USB_FLAGS -CONFIG_MXC_USB_PORT -CONFIG_MXC_USB_PORTSC -CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC -CONFIG_NAND_CS_INIT -CONFIG_NETDEV -CONFIG_NETMASK -CONFIG_NORBOOT -CONFIG_NUM_DSP_CPUS -CONFIG_ODROID_REV_AIN -CONFIG_OTHBOOTARGS -CONFIG_OVERWRITE_ETHADDR_ONCE -CONFIG_PCIE_IMX_PERST_GPIO -CONFIG_PCIE_IMX_POWER_GPIO -CONFIG_PEN_ADDR_BIG_ENDIAN -CONFIG_PHY_BASE_ADR -CONFIG_PHY_ET1011C_TX_CLK_FIX -CONFIG_PHY_ID -CONFIG_PHY_INTERFACE_MODE -CONFIG_PHY_IRAM_BASE -CONFIG_PL011_CLOCK -CONFIG_PL01x_PORTS -CONFIG_PME_PLAT_CLK_DIV -CONFIG_POSTBOOTMENU -CONFIG_POWER_LTC3676_I2C_ADDR -CONFIG_POWER_PFUZE100_I2C_ADDR -CONFIG_POWER_PFUZE3000_I2C_ADDR -CONFIG_PPC_SPINTABLE_COMPATIBLE -CONFIG_PRAM -CONFIG_PSRAM_SCFG -CONFIG_QBMAN_CLK_DIV -CONFIG_RAMBOOT_SPIFLASH -CONFIG_RAMBOOT_TEXT_BASE -CONFIG_RAMDISK_ADDR -CONFIG_RD_LVL -CONFIG_RESET_VECTOR_ADDRESS -CONFIG_ROCKCHIP_SDHCI_MAX_FREQ -CONFIG_ROOTPATH -CONFIG_SANDBOX_ARCH -CONFIG_SANDBOX_SPI_MAX_BUS -CONFIG_SANDBOX_SPI_MAX_CS -CONFIG_SAR2_REG -CONFIG_SAR_REG -CONFIG_SCIF_A -CONFIG_SCSI_DEV_LIST -CONFIG_SC_TIMER_CLK -CONFIG_SERIAL_BOOT -CONFIG_SERVERIP -CONFIG_SETUP_INITRD_TAG -CONFIG_SET_DFU_ALT_BUF_LEN -CONFIG_SH_ETHER_ALIGNE_SIZE -CONFIG_SH_ETHER_CACHE_INVALIDATE -CONFIG_SH_ETHER_CACHE_WRITEBACK -CONFIG_SH_ETHER_PHY_ADDR -CONFIG_SH_ETHER_PHY_MODE -CONFIG_SH_ETHER_USE_PORT -CONFIG_SH_QSPI_BASE -CONFIG_SLIC -CONFIG_SMDK5420 -CONFIG_SMP_PEN_ADDR -CONFIG_SOCRATES -CONFIG_SPI_ADDR -CONFIG_SPI_BOOTING -CONFIG_SPI_FLASH_QUAD -CONFIG_SPI_FLASH_SIZE -CONFIG_SPI_HALF_DUPLEX -CONFIG_SPI_N25Q256A_RESET -CONFIG_STACKBASE -CONFIG_STANDALONE_LOAD_ADDR -CONFIG_STD_DEVICES_SETTINGS -CONFIG_SYS_BAUDRATE_TABLE -CONFIG_TEGRA_BOARD_STRING -CONFIG_TEGRA_ENABLE_UARTA -CONFIG_TEGRA_ENABLE_UARTD -CONFIG_TEGRA_SLINK_CTRLS -CONFIG_TEGRA_SPI -CONFIG_TEGRA_UARTA_GPU -CONFIG_TEGRA_UARTA_SDIO1 -CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 -CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 -CONFIG_TESTPIN_MASK -CONFIG_TESTPIN_REG -CONFIG_THOR_RESET_OFF -CONFIG_TPM_TIS_BASE_ADDRESS -CONFIG_TSEC1 -CONFIG_TSEC1_NAME -CONFIG_TSEC2 -CONFIG_TSEC2_NAME -CONFIG_TSEC3 -CONFIG_TSEC3_NAME -CONFIG_TSEC4 -CONFIG_TSEC4_NAME -CONFIG_TSECV2 -CONFIG_TSECV2_1 -CONFIG_TSEC_TBICR_SETTINGS -CONFIG_UBIFS_VOLUME -CONFIG_UBI_PART -CONFIG_UBOOTPATH -CONFIG_UBOOT_SECTOR_COUNT -CONFIG_UBOOT_SECTOR_START -CONFIG_UEC_ETH -CONFIG_USART_BASE -CONFIG_USART_ID -CONFIG_USBD_HS -CONFIG_USB_BOOTING -CONFIG_USB_EXT2_BOOT -CONFIG_USB_FAT_BOOT -CONFIG_USB_ISP1301_I2C_ADDR -CONFIG_U_BOOT_HDR_SIZE -CONFIG_VAR_SIZE_SPL -CONFIG_VERY_BIG_RAM -CONFIG_VSC7385_IMAGE -CONFIG_VSC7385_IMAGE_SIZE -CONFIG_WATCHDOG_PRESC -CONFIG_WATCHDOG_RC -CONFIG_X86EMU_RAW_IO -CONFIG_X86_MRC_ADDR -CONFIG_X86_REFCODE_ADDR -CONFIG_X86_REFCODE_RUN_ADDR diff --git a/tools/moveconfig.py b/tools/moveconfig.py index 09617a07f91b..8f084a6070ac 100755 --- a/tools/moveconfig.py +++ b/tools/moveconfig.py @@ -443,22 +443,6 @@ def cleanup_headers(configs, args): cleanup_one_header(header_path, patterns, args) cleanup_empty_blocks(header_path, args) -def cleanup_whitelist(configs, args): - """Delete config whitelist entries - - Args: - configs: A list of CONFIGs to remove. - args (Namespace): program arguments - """ - if not confirm(args, 'Clean up whitelist entries?'): - return - - lines = read_file(os.path.join('scripts', 'config_whitelist.txt')) - - lines = [x for x in lines if x.strip() not in configs] - - write_file(os.path.join('scripts', 'config_whitelist.txt'), lines) - def find_matching(patterns, line): for pat in patterns: if pat.search(line): @@ -1558,14 +1542,10 @@ def do_find_config(config_list): """ all_configs, all_defconfigs, config_db, defconfig_db = read_database() - # Get the whitelist - adhoc_configs = set(read_file('scripts/config_whitelist.txt')) - # Start with all defconfigs out = all_defconfigs # Work through each config in turn - adhoc = [] for item in config_list: # Get the real config name and whether we want this config or not cfg = item @@ -1574,10 +1554,6 @@ def do_find_config(config_list): want = False cfg = cfg[1:] - if cfg in adhoc_configs: - adhoc.append(cfg) - continue - # Search everything that is still in the running. If it has a config # that we want, or doesn't have one that we don't, add it into the # running for the next stage @@ -1588,11 +1564,8 @@ def do_find_config(config_list): has_cfg = defconfig_matches(config_db[defc], re_match) if has_cfg == want: out.add(defc) - if adhoc: - print(f"Error: Not in Kconfig: %s" % ' '.join(adhoc)) - else: - print(f'{len(out)} matches') - print(' '.join(item.split('_defconfig')[0] for item in out)) + print(f'{len(out)} matches') + print(' '.join(item.split('_defconfig')[0] for item in out)) def prefix_config(cfg): @@ -1739,7 +1712,6 @@ doc/develop/moveconfig.rst for documentation.''' if configs: cleanup_headers(configs, args) - cleanup_whitelist(configs, args) cleanup_readme(configs, args) if args.commit: From patchwork Sun Dec 4 15:14:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1712017 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=konsulko.com header.i=@konsulko.com header.a=rsa-sha256 header.s=google header.b=Y7adxdoi; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4NQ9hL3YWCz23mf for ; Mon, 5 Dec 2022 02:34:10 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C52B0856D9; Sun, 4 Dec 2022 16:16:53 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=konsulko.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=konsulko.com header.i=@konsulko.com header.b="Y7adxdoi"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 647888563F; Sun, 4 Dec 2022 16:15:36 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [IPv6:2a00:1450:4864:20::631]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 07C3B8563C for ; Sun, 4 Dec 2022 16:15:31 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=konsulko.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=trini@konsulko.com Received: by mail-ej1-x631.google.com with SMTP id fc4so15359047ejc.12 for ; Sun, 04 Dec 2022 07:15:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=konsulko.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=W2qgS7sEjL/PaEKtMUt854O2Ook1AWt+Qd1UHmldWyc=; b=Y7adxdoiikF7GHQKPtMoERleIYarJOw4sHbeq3bi3qKxYT2Uo1UyfsDDmm6S9crcZP d/MeQ4EaMTexyJd4fArBnqkL1l/YrhSGFSznvEi7YqPIbc9IDqTNOE4lnfGS6jqPXWfk UgU0fzz5/YUKBX8lqsGAFImgSFruQKL309K+Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=W2qgS7sEjL/PaEKtMUt854O2Ook1AWt+Qd1UHmldWyc=; b=A9rNoCBMabjZq7v+ffJnzClbNtz8Dn7o2kAaLFvJ0yPpXCBhhpPY+SThyMNOyi8wcu Un5EoRhsYSI7yV095Az8XcNmfbqRX723nNkjSM+vscAYwvYfaau46PGIj5KrVm8sJ2B+ RTO/Rn7uiIVRzZnYiIM3KnSfRzcmjhKRVbohGwo1BZiTqpRfkZmIDggXgNfrFHUqIj6l Cor4xs5qLiYJus6yXlzcbsurmDRHHWPd5GOBq/aw77RJbZApgSSdskqWaFBTAyvwl7iR 6I91Nr9Zhpf8xQhM8AhijfnLl55u908GyGHquujh6i/Ww0gbvN9y6co2xHbWKxTegrIW omcw== X-Gm-Message-State: ANoB5pmmIphB/oqupzPYWZP53mKsIh5OMLjERt7plwEeydtpK3lrrPme uXTmJeieti4Dq/Is9KRKZy5s7tbQTFTVqf1c X-Google-Smtp-Source: AA0mqf7lwDxZAKIcT7H4rmX6T/AwOfiI+M3SVb1hI+S+1H/hnHO+72nLYcsTgujb6PMjHTveD1sFmw== X-Received: by 2002:a17:906:e2c5:b0:7b7:90e0:f63b with SMTP id gr5-20020a170906e2c500b007b790e0f63bmr51310628ejb.749.1670166929964; Sun, 04 Dec 2022 07:15:29 -0800 (PST) Received: from bill-the-cat.lan (2603-6081-7b00-6400-61c7-2644-b62d-0af3.res6.spectrum.com. [2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.28 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:29 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 146/149] post: Move CONFIG_SYS_POST to CFG_SYS_POST Date: Sun, 4 Dec 2022 10:14:17 -0500 Message-Id: <20221204151420.56851-56-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Migrate the rest of the CONFIG_SYS_POST macros over to CFG_SYS_POST namespace. Signed-off-by: Tom Rini --- doc/README.POST | 12 +-- drivers/serial/serial-uclass.c | 2 +- drivers/serial/serial.c | 2 +- include/post.h | 50 ++++++------ include/serial.h | 4 +- post/cpu/mpc83xx/ecc.c | 8 +- post/drivers/flash.c | 14 ++-- post/drivers/i2c.c | 20 ++--- post/drivers/rtc.c | 4 +- post/lib_powerpc/andi.c | 2 +- post/lib_powerpc/asm.S | 2 +- post/lib_powerpc/b.c | 2 +- post/lib_powerpc/cmp.c | 2 +- post/lib_powerpc/cmpi.c | 2 +- post/lib_powerpc/complex.c | 2 +- post/lib_powerpc/cpu.c | 4 +- post/lib_powerpc/cr.c | 2 +- post/lib_powerpc/fpu/20001122-1.c | 4 +- post/lib_powerpc/fpu/20010114-2.c | 4 +- post/lib_powerpc/fpu/20010226-1.c | 4 +- post/lib_powerpc/fpu/980619-1.c | 4 +- post/lib_powerpc/fpu/acc1.c | 4 +- post/lib_powerpc/fpu/compare-fp-1.c | 4 +- post/lib_powerpc/fpu/fpu.c | 4 +- post/lib_powerpc/fpu/mul-subnormal-single-1.c | 4 +- post/lib_powerpc/load.c | 2 +- post/lib_powerpc/multi.c | 2 +- post/lib_powerpc/rlwimi.c | 2 +- post/lib_powerpc/rlwinm.c | 2 +- post/lib_powerpc/rlwnm.c | 2 +- post/lib_powerpc/srawi.c | 2 +- post/lib_powerpc/store.c | 2 +- post/lib_powerpc/string.c | 2 +- post/lib_powerpc/three.c | 2 +- post/lib_powerpc/threei.c | 2 +- post/lib_powerpc/threex.c | 2 +- post/lib_powerpc/two.c | 2 +- post/lib_powerpc/twox.c | 2 +- post/post.c | 6 +- post/tests.c | 78 +++++++++---------- 40 files changed, 138 insertions(+), 138 deletions(-) diff --git a/doc/README.POST b/doc/README.POST index 5d92f3fe6e91..1366f95c6623 100644 --- a/doc/README.POST +++ b/doc/README.POST @@ -649,15 +649,15 @@ not need any modifications for porting them to another board/CPU. For verifying the I2C bus, a full I2C bus scanning will be performed using the i2c_probe() routine. If a board defines -CONFIG_SYS_POST_I2C_ADDRS the I2C test will pass if all devices -listed in CONFIG_SYS_POST_I2C_ADDRS are found, and no additional -devices are detected. If CONFIG_SYS_POST_I2C_ADDRS is not defined +CFG_SYS_POST_I2C_ADDRS the I2C test will pass if all devices +listed in CFG_SYS_POST_I2C_ADDRS are found, and no additional +devices are detected. If CFG_SYS_POST_I2C_ADDRS is not defined the test will pass if any I2C device is found. -The CONFIG_SYS_POST_I2C_IGNORES define can be used to list I2C +The CFG_SYS_POST_I2C_IGNORES define can be used to list I2C devices which may or may not be present when using -CONFIG_SYS_POST_I2C_ADDRS. The I2C POST test will pass regardless -if the devices in CONFIG_SYS_POST_I2C_IGNORES are found or not. +CFG_SYS_POST_I2C_ADDRS. The I2C POST test will pass regardless +if the devices in CFG_SYS_POST_I2C_IGNORES are found or not. This is useful in cases when I2C devices are optional (eg on a daughtercard that may or may not be present) or not critical to board operation. diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index 7240d763d12e..77d3f373721f 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -526,7 +526,7 @@ static int serial_post_probe(struct udevice *dev) ops->getconfig += gd->reloc_off; if (ops->setconfig) ops->setconfig += gd->reloc_off; -#if CFG_POST & CONFIG_SYS_POST_UART +#if CFG_POST & CFG_SYS_POST_UART if (ops->loop) ops->loop += gd->reloc_off; #endif diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 369a8e38e3e2..9a380d7c5e7e 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -458,7 +458,7 @@ void default_serial_puts(const char *s) dev->putc(*s++); } -#if CFG_POST & CONFIG_SYS_POST_UART +#if CFG_POST & CFG_SYS_POST_UART static const int bauds[] = CFG_SYS_BAUDRATE_TABLE; /** diff --git a/include/post.h b/include/post.h index e68d5c89020c..411206950648 100644 --- a/include/post.h +++ b/include/post.h @@ -17,8 +17,8 @@ #if defined(CONFIG_POST) #ifndef CFG_POST_EXTERNAL_WORD_FUNCS -#ifdef CONFIG_SYS_POST_WORD_ADDR -#define _POST_WORD_ADDR CONFIG_SYS_POST_WORD_ADDR +#ifdef CFG_SYS_POST_WORD_ADDR +#define _POST_WORD_ADDR CFG_SYS_POST_WORD_ADDR #else #if defined(CONFIG_ARCH_MPC8360) @@ -34,7 +34,7 @@ #ifndef _POST_WORD_ADDR #error "_POST_WORD_ADDR currently not implemented for this platform!" #endif -#endif /* CONFIG_SYS_POST_WORD_ADDR */ +#endif /* CFG_SYS_POST_WORD_ADDR */ static inline ulong post_word_load (void) { @@ -140,29 +140,29 @@ extern int memory_post_test(int flags); #endif /* __GNUC__ */ #endif /* __ASSEMBLY__ */ -#define CONFIG_SYS_POST_RTC 0x00000001 -#define CONFIG_SYS_POST_WATCHDOG 0x00000002 +#define CFG_SYS_POST_RTC 0x00000001 +#define CFG_SYS_POST_WATCHDOG 0x00000002 #define CFG_SYS_POST_MEMORY 0x00000004 -#define CONFIG_SYS_POST_CPU 0x00000008 -#define CONFIG_SYS_POST_I2C 0x00000010 -#define CONFIG_SYS_POST_CACHE 0x00000020 -#define CONFIG_SYS_POST_UART 0x00000040 -#define CONFIG_SYS_POST_ETHER 0x00000080 -#define CONFIG_SYS_POST_USB 0x00000200 -#define CONFIG_SYS_POST_SPR 0x00000400 -#define CONFIG_SYS_POST_SYSMON 0x00000800 -#define CONFIG_SYS_POST_DSP 0x00001000 -#define CONFIG_SYS_POST_OCM 0x00002000 -#define CONFIG_SYS_POST_FPU 0x00004000 -#define CONFIG_SYS_POST_ECC 0x00008000 -#define CONFIG_SYS_POST_BSPEC1 0x00010000 -#define CONFIG_SYS_POST_BSPEC2 0x00020000 -#define CONFIG_SYS_POST_BSPEC3 0x00040000 -#define CONFIG_SYS_POST_BSPEC4 0x00080000 -#define CONFIG_SYS_POST_BSPEC5 0x00100000 -#define CONFIG_SYS_POST_CODEC 0x00200000 -#define CONFIG_SYS_POST_COPROC 0x00400000 -#define CONFIG_SYS_POST_FLASH 0x00800000 +#define CFG_SYS_POST_CPU 0x00000008 +#define CFG_SYS_POST_I2C 0x00000010 +#define CFG_SYS_POST_CACHE 0x00000020 +#define CFG_SYS_POST_UART 0x00000040 +#define CFG_SYS_POST_ETHER 0x00000080 +#define CFG_SYS_POST_USB 0x00000200 +#define CFG_SYS_POST_SPR 0x00000400 +#define CFG_SYS_POST_SYSMON 0x00000800 +#define CFG_SYS_POST_DSP 0x00001000 +#define CFG_SYS_POST_OCM 0x00002000 +#define CFG_SYS_POST_FPU 0x00004000 +#define CFG_SYS_POST_ECC 0x00008000 +#define CFG_SYS_POST_BSPEC1 0x00010000 +#define CFG_SYS_POST_BSPEC2 0x00020000 +#define CFG_SYS_POST_BSPEC3 0x00040000 +#define CFG_SYS_POST_BSPEC4 0x00080000 +#define CFG_SYS_POST_BSPEC5 0x00100000 +#define CFG_SYS_POST_CODEC 0x00200000 +#define CFG_SYS_POST_COPROC 0x00400000 +#define CFG_SYS_POST_FLASH 0x00800000 #define CFG_SYS_POST_MEM_REGIONS 0x01000000 #endif /* CONFIG_POST */ diff --git a/include/serial.h b/include/serial.h index f4d7dc58a9e1..42bdf3759c00 100644 --- a/include/serial.h +++ b/include/serial.h @@ -14,7 +14,7 @@ struct serial_device { int (*tstc)(void); void (*putc)(const char c); void (*puts)(const char *s); -#if CFG_POST & CONFIG_SYS_POST_UART +#if CFG_POST & CFG_SYS_POST_UART void (*loop)(int); #endif struct serial_device *next; @@ -242,7 +242,7 @@ struct dm_serial_ops { * @return 0 if OK, -ve on error */ int (*clear)(struct udevice *dev); -#if CFG_POST & CONFIG_SYS_POST_UART +#if CFG_POST & CFG_SYS_POST_UART /** * loop() - Control serial device loopback mode * diff --git a/post/cpu/mpc83xx/ecc.c b/post/cpu/mpc83xx/ecc.c index 45263e6b44ca..68da8ff41716 100644 --- a/post/cpu/mpc83xx/ecc.c +++ b/post/cpu/mpc83xx/ecc.c @@ -17,7 +17,7 @@ #include #include -#if CFG_POST & CONFIG_SYS_POST_ECC +#if CFG_POST & CFG_SYS_POST_ECC /* * We use the RAW I/O accessors where possible in order to * achieve performance goal, since the test's execution time @@ -51,7 +51,7 @@ int ecc_post_test(int flags) int errbit; u32 pattern[2], writeback[2], retval[2]; ddr83xx_t *ddr = &((immap_t *)CONFIG_SYS_IMMR)->ddr; - volatile u64 *addr = (u64 *)CONFIG_SYS_POST_ECC_START_ADDR; + volatile u64 *addr = (u64 *)CFG_SYS_POST_ECC_START_ADDR; /* The pattern is written into memory to generate error */ pattern[0] = 0xfedcba98UL; @@ -70,8 +70,8 @@ int ecc_post_test(int flags) int_state = disable_interrupts(); icache_enable(); - for (addr = (u64*)CONFIG_SYS_POST_ECC_START_ADDR, errbit=0; - addr < (u64*)CONFIG_SYS_POST_ECC_STOP_ADDR; addr++, errbit++ ) { + for (addr = (u64*)CFG_SYS_POST_ECC_START_ADDR, errbit=0; + addr < (u64*)CFG_SYS_POST_ECC_STOP_ADDR; addr++, errbit++ ) { schedule(); diff --git a/post/drivers/flash.c b/post/drivers/flash.c index e157d3691100..a1fcf1f135d9 100644 --- a/post/drivers/flash.c +++ b/post/drivers/flash.c @@ -6,7 +6,7 @@ * Licensed under the GPL-2 or later. */ -#if CFG_POST & CONFIG_SYS_POST_FLASH +#if CFG_POST & CFG_SYS_POST_FLASH #include #include #include @@ -23,10 +23,10 @@ * - better seed pattern than 0x00..0xff */ -#ifndef CONFIG_SYS_POST_FLASH_NUM -# define CONFIG_SYS_POST_FLASH_NUM 0 +#ifndef CFG_SYS_POST_FLASH_NUM +# define CFG_SYS_POST_FLASH_NUM 0 #endif -#if CONFIG_SYS_POST_FLASH_START >= CONFIG_SYS_POST_FLASH_END +#if CFG_SYS_POST_FLASH_START >= CFG_SYS_POST_FLASH_END # error "invalid flash block start/end" #endif @@ -59,9 +59,9 @@ int flash_post_test(int flags) len = 0; src = NULL; - info = &flash_info[CONFIG_SYS_POST_FLASH_NUM]; - n_start = CONFIG_SYS_POST_FLASH_START; - n_end = CONFIG_SYS_POST_FLASH_END; + info = &flash_info[CFG_SYS_POST_FLASH_NUM]; + n_start = CFG_SYS_POST_FLASH_START; + n_end = CFG_SYS_POST_FLASH_END; for (n = n_start; n < n_end; ++n) { ulong s_start, s_len, s_off; diff --git a/post/drivers/i2c.c b/post/drivers/i2c.c index 057454ffd8f5..557d6329a4f0 100644 --- a/post/drivers/i2c.c +++ b/post/drivers/i2c.c @@ -9,14 +9,14 @@ * * For verifying the I2C bus, a full I2C bus scanning is performed. * - * #ifdef CONFIG_SYS_POST_I2C_ADDRS + * #ifdef CFG_SYS_POST_I2C_ADDRS * The test is considered as passed if all the devices and only the devices * in the list are found. - * #ifdef CONFIG_SYS_POST_I2C_IGNORES - * Ignore devices listed in CONFIG_SYS_POST_I2C_IGNORES. These devices + * #ifdef CFG_SYS_POST_I2C_IGNORES + * Ignore devices listed in CFG_SYS_POST_I2C_IGNORES. These devices * are optional or not vital to board functionality. * #endif - * #else [ ! CONFIG_SYS_POST_I2C_ADDRS ] + * #else [ ! CFG_SYS_POST_I2C_ADDRS ] * The test is considered as passed if any I2C device is found. * #endif */ @@ -26,12 +26,12 @@ #include #include -#if CFG_POST & CONFIG_SYS_POST_I2C +#if CFG_POST & CFG_SYS_POST_I2C static int i2c_ignore_device(unsigned int chip) { -#ifdef CONFIG_SYS_POST_I2C_IGNORES - const unsigned char i2c_ignore_list[] = CONFIG_SYS_POST_I2C_IGNORES; +#ifdef CFG_SYS_POST_I2C_IGNORES + const unsigned char i2c_ignore_list[] = CFG_SYS_POST_I2C_IGNORES; int i; for (i = 0; i < sizeof(i2c_ignore_list); i++) @@ -45,7 +45,7 @@ static int i2c_ignore_device(unsigned int chip) int i2c_post_test (int flags) { unsigned int i; -#ifndef CONFIG_SYS_POST_I2C_ADDRS +#ifndef CFG_SYS_POST_I2C_ADDRS /* Start at address 1, address 0 is the general call address */ for (i = 1; i < 128; i++) { if (i2c_ignore_device(i)) @@ -59,7 +59,7 @@ int i2c_post_test (int flags) #else unsigned int ret = 0; int j; - unsigned char i2c_addr_list[] = CONFIG_SYS_POST_I2C_ADDRS; + unsigned char i2c_addr_list[] = CFG_SYS_POST_I2C_ADDRS; /* Start at address 1, address 0 is the general call address */ for (i = 1; i < 128; i++) { @@ -94,4 +94,4 @@ int i2c_post_test (int flags) #endif } -#endif /* CFG_POST & CONFIG_SYS_POST_I2C */ +#endif /* CFG_POST & CFG_SYS_POST_I2C */ diff --git a/post/drivers/rtc.c b/post/drivers/rtc.c index cfed56b680cd..cc7a49847ccd 100644 --- a/post/drivers/rtc.c +++ b/post/drivers/rtc.c @@ -26,7 +26,7 @@ #include #include -#if CFG_POST & CONFIG_SYS_POST_RTC +#if CFG_POST & CFG_SYS_POST_RTC static int rtc_post_skip (ulong * diff) { @@ -189,4 +189,4 @@ int rtc_post_test (int flags) return 0; } -#endif /* CFG_POST & CONFIG_SYS_POST_RTC */ +#endif /* CFG_POST & CFG_SYS_POST_RTC */ diff --git a/post/lib_powerpc/andi.c b/post/lib_powerpc/andi.c index d69d61396bcb..4f3021668800 100644 --- a/post/lib_powerpc/andi.c +++ b/post/lib_powerpc/andi.c @@ -19,7 +19,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op); extern ulong cpu_post_makecr (long v); diff --git a/post/lib_powerpc/asm.S b/post/lib_powerpc/asm.S index 13302d796898..93c78563936c 100644 --- a/post/lib_powerpc/asm.S +++ b/post/lib_powerpc/asm.S @@ -10,7 +10,7 @@ #include #include -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU /* void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2); */ .global cpu_post_exec_02 diff --git a/post/lib_powerpc/b.c b/post/lib_powerpc/b.c index eb9371fa6b20..0ec032dcb152 100644 --- a/post/lib_powerpc/b.c +++ b/post/lib_powerpc/b.c @@ -24,7 +24,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1); extern void cpu_post_exec_31 (ulong *code, ulong *ctr, ulong *lr, ulong *jump, diff --git a/post/lib_powerpc/cmp.c b/post/lib_powerpc/cmp.c index e4d0931fc9a4..57f2b9694c33 100644 --- a/post/lib_powerpc/cmp.c +++ b/post/lib_powerpc/cmp.c @@ -23,7 +23,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2); diff --git a/post/lib_powerpc/cmpi.c b/post/lib_powerpc/cmpi.c index 983892d00635..6e2bd636d74d 100644 --- a/post/lib_powerpc/cmpi.c +++ b/post/lib_powerpc/cmpi.c @@ -23,7 +23,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1); diff --git a/post/lib_powerpc/complex.c b/post/lib_powerpc/complex.c index d2ec21b0cbea..751bce673785 100644 --- a/post/lib_powerpc/complex.c +++ b/post/lib_powerpc/complex.c @@ -18,7 +18,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern int cpu_post_complex_1_asm (int a1, int a2, int a3, int a4, int n); extern int cpu_post_complex_2_asm (int x, int n); diff --git a/post/lib_powerpc/cpu.c b/post/lib_powerpc/cpu.c index 77c25381729b..98a8c6392c3a 100644 --- a/post/lib_powerpc/cpu.c +++ b/post/lib_powerpc/cpu.c @@ -20,7 +20,7 @@ #include #include -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern int cpu_post_test_cmp (void); extern int cpu_post_test_cmpi (void); @@ -118,4 +118,4 @@ int cpu_post_test (int flags) return ret; } -#endif /* CFG_POST & CONFIG_SYS_POST_CPU */ +#endif /* CFG_POST & CFG_SYS_POST_CPU */ diff --git a/post/lib_powerpc/cr.c b/post/lib_powerpc/cr.c index 077fb0f2da3a..3c7b61138467 100644 --- a/post/lib_powerpc/cr.c +++ b/post/lib_powerpc/cr.c @@ -33,7 +33,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1); extern void cpu_post_exec_21x (ulong *code, ulong *op1, ulong *op2, ulong op3); diff --git a/post/lib_powerpc/fpu/20001122-1.c b/post/lib_powerpc/fpu/20001122-1.c index eddd3f915eed..9c1c886fc4f7 100644 --- a/post/lib_powerpc/fpu/20001122-1.c +++ b/post/lib_powerpc/fpu/20001122-1.c @@ -13,7 +13,7 @@ GNU_FPOST_ATTR -#if CFG_POST & CONFIG_SYS_POST_FPU +#if CFG_POST & CFG_SYS_POST_FPU int fpu_post_test_math1 (void) { @@ -40,4 +40,4 @@ int fpu_post_test_math1 (void) return 0; } -#endif /* CFG_POST & CONFIG_SYS_POST_FPU */ +#endif /* CFG_POST & CFG_SYS_POST_FPU */ diff --git a/post/lib_powerpc/fpu/20010114-2.c b/post/lib_powerpc/fpu/20010114-2.c index 9e3e54661f99..01bac5003836 100644 --- a/post/lib_powerpc/fpu/20010114-2.c +++ b/post/lib_powerpc/fpu/20010114-2.c @@ -13,7 +13,7 @@ GNU_FPOST_ATTR -#if CFG_POST & CONFIG_SYS_POST_FPU +#if CFG_POST & CFG_SYS_POST_FPU static float rintf (float x) { @@ -45,4 +45,4 @@ int fpu_post_test_math2 (void) return 0; } -#endif /* CFG_POST & CONFIG_SYS_POST_FPU */ +#endif /* CFG_POST & CFG_SYS_POST_FPU */ diff --git a/post/lib_powerpc/fpu/20010226-1.c b/post/lib_powerpc/fpu/20010226-1.c index 5bb386090035..cc4aa0dca645 100644 --- a/post/lib_powerpc/fpu/20010226-1.c +++ b/post/lib_powerpc/fpu/20010226-1.c @@ -13,7 +13,7 @@ GNU_FPOST_ATTR -#if CFG_POST & CONFIG_SYS_POST_FPU +#if CFG_POST & CFG_SYS_POST_FPU int fpu_post_test_math3 (void) { @@ -33,4 +33,4 @@ int fpu_post_test_math3 (void) return 0; } -#endif /* CFG_POST & CONFIG_SYS_POST_FPU */ +#endif /* CFG_POST & CFG_SYS_POST_FPU */ diff --git a/post/lib_powerpc/fpu/980619-1.c b/post/lib_powerpc/fpu/980619-1.c index 415cd50c85d2..111a2013fb58 100644 --- a/post/lib_powerpc/fpu/980619-1.c +++ b/post/lib_powerpc/fpu/980619-1.c @@ -13,7 +13,7 @@ GNU_FPOST_ATTR -#if CFG_POST & CONFIG_SYS_POST_FPU +#if CFG_POST & CFG_SYS_POST_FPU int fpu_post_test_math4 (void) { @@ -39,4 +39,4 @@ int fpu_post_test_math4 (void) return 0; } -#endif /* CFG_POST & CONFIG_SYS_POST_FPU */ +#endif /* CFG_POST & CFG_SYS_POST_FPU */ diff --git a/post/lib_powerpc/fpu/acc1.c b/post/lib_powerpc/fpu/acc1.c index 4cf3b7cef757..63cc3eeafc30 100644 --- a/post/lib_powerpc/fpu/acc1.c +++ b/post/lib_powerpc/fpu/acc1.c @@ -13,7 +13,7 @@ GNU_FPOST_ATTR -#if CFG_POST & CONFIG_SYS_POST_FPU +#if CFG_POST & CFG_SYS_POST_FPU static double func (const double *array) { @@ -36,4 +36,4 @@ int fpu_post_test_math5 (void) return 0; } -#endif /* CFG_POST & CONFIG_SYS_POST_FPU */ +#endif /* CFG_POST & CFG_SYS_POST_FPU */ diff --git a/post/lib_powerpc/fpu/compare-fp-1.c b/post/lib_powerpc/fpu/compare-fp-1.c index 029600fd2b74..4b4589664f12 100644 --- a/post/lib_powerpc/fpu/compare-fp-1.c +++ b/post/lib_powerpc/fpu/compare-fp-1.c @@ -15,7 +15,7 @@ GNU_FPOST_ATTR -#if CFG_POST & CONFIG_SYS_POST_FPU +#if CFG_POST & CFG_SYS_POST_FPU static int failed; @@ -204,4 +204,4 @@ int fpu_post_test_math6 (void) return 0; } -#endif /* CFG_POST & CONFIG_SYS_POST_FPU */ +#endif /* CFG_POST & CFG_SYS_POST_FPU */ diff --git a/post/lib_powerpc/fpu/fpu.c b/post/lib_powerpc/fpu/fpu.c index 8993b36e801d..59109f71e36a 100644 --- a/post/lib_powerpc/fpu/fpu.c +++ b/post/lib_powerpc/fpu/fpu.c @@ -21,7 +21,7 @@ GNU_FPOST_ATTR -#if CFG_POST & CONFIG_SYS_POST_FPU +#if CFG_POST & CFG_SYS_POST_FPU #include @@ -71,4 +71,4 @@ int fpu_post_test (int flags) return ret; } -#endif /* CFG_POST & CONFIG_SYS_POST_FPU */ +#endif /* CFG_POST & CFG_SYS_POST_FPU */ diff --git a/post/lib_powerpc/fpu/mul-subnormal-single-1.c b/post/lib_powerpc/fpu/mul-subnormal-single-1.c index 87b882c6b22f..891aa95685fe 100644 --- a/post/lib_powerpc/fpu/mul-subnormal-single-1.c +++ b/post/lib_powerpc/fpu/mul-subnormal-single-1.c @@ -15,7 +15,7 @@ GNU_FPOST_ATTR -#if CFG_POST & CONFIG_SYS_POST_FPU +#if CFG_POST & CFG_SYS_POST_FPU union uf { @@ -82,4 +82,4 @@ int fpu_post_test_math7 (void) return 0; } -#endif /* CFG_POST & CONFIG_SYS_POST_FPU */ +#endif /* CFG_POST & CFG_SYS_POST_FPU */ diff --git a/post/lib_powerpc/load.c b/post/lib_powerpc/load.c index ece0b2756e00..e4ac6bf186f9 100644 --- a/post/lib_powerpc/load.c +++ b/post/lib_powerpc/load.c @@ -28,7 +28,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_22w (ulong *code, ulong *op1, ulong op2, ulong *op3); extern void cpu_post_exec_21w (ulong *code, ulong *op1, ulong *op2); diff --git a/post/lib_powerpc/multi.c b/post/lib_powerpc/multi.c index 0e9ee88eb5d5..4df45790ab65 100644 --- a/post/lib_powerpc/multi.c +++ b/post/lib_powerpc/multi.c @@ -21,7 +21,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_02(ulong *code, ulong op1, ulong op2); diff --git a/post/lib_powerpc/rlwimi.c b/post/lib_powerpc/rlwimi.c index d24a3f665c7c..da2191322570 100644 --- a/post/lib_powerpc/rlwimi.c +++ b/post/lib_powerpc/rlwimi.c @@ -19,7 +19,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1, ulong op2); diff --git a/post/lib_powerpc/rlwinm.c b/post/lib_powerpc/rlwinm.c index 9f4a3edb3ea7..b0b976f98af4 100644 --- a/post/lib_powerpc/rlwinm.c +++ b/post/lib_powerpc/rlwinm.c @@ -19,7 +19,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1); extern ulong cpu_post_makecr (long v); diff --git a/post/lib_powerpc/rlwnm.c b/post/lib_powerpc/rlwnm.c index 224e6bdd45e9..22cd4568fc88 100644 --- a/post/lib_powerpc/rlwnm.c +++ b/post/lib_powerpc/rlwnm.c @@ -19,7 +19,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1, ulong op2); diff --git a/post/lib_powerpc/srawi.c b/post/lib_powerpc/srawi.c index 713d4f2276b3..a103df75eb1a 100644 --- a/post/lib_powerpc/srawi.c +++ b/post/lib_powerpc/srawi.c @@ -19,7 +19,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op); extern ulong cpu_post_makecr (long v); diff --git a/post/lib_powerpc/store.c b/post/lib_powerpc/store.c index 2dbcccf098a5..71a4b6aba431 100644 --- a/post/lib_powerpc/store.c +++ b/post/lib_powerpc/store.c @@ -28,7 +28,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_12w (ulong *code, ulong *op1, ulong op2, ulong op3); extern void cpu_post_exec_11w (ulong *code, ulong *op1, ulong op2); diff --git a/post/lib_powerpc/string.c b/post/lib_powerpc/string.c index 9b54847632a3..21e02bcb2664 100644 --- a/post/lib_powerpc/string.c +++ b/post/lib_powerpc/string.c @@ -20,7 +20,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2); extern void cpu_post_exec_04 (ulong *code, ulong op1, ulong op2, ulong op3, diff --git a/post/lib_powerpc/three.c b/post/lib_powerpc/three.c index 55f0ff8a8825..68339b05ef27 100644 --- a/post/lib_powerpc/three.c +++ b/post/lib_powerpc/three.c @@ -22,7 +22,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1, ulong op2); diff --git a/post/lib_powerpc/threei.c b/post/lib_powerpc/threei.c index ec52d238e699..885dd8cb095e 100644 --- a/post/lib_powerpc/threei.c +++ b/post/lib_powerpc/threei.c @@ -21,7 +21,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op); extern ulong cpu_post_makecr (long v); diff --git a/post/lib_powerpc/threex.c b/post/lib_powerpc/threex.c index 6f5f0b8eb760..62ac713ecff7 100644 --- a/post/lib_powerpc/threex.c +++ b/post/lib_powerpc/threex.c @@ -22,7 +22,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1, ulong op2); diff --git a/post/lib_powerpc/two.c b/post/lib_powerpc/two.c index b44dd4e20845..7985669ba6eb 100644 --- a/post/lib_powerpc/two.c +++ b/post/lib_powerpc/two.c @@ -22,7 +22,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1); extern ulong cpu_post_makecr (long v); diff --git a/post/lib_powerpc/twox.c b/post/lib_powerpc/twox.c index 320cc0a64e7c..33d1a1d8d91d 100644 --- a/post/lib_powerpc/twox.c +++ b/post/lib_powerpc/twox.c @@ -22,7 +22,7 @@ #include #include "cpu_asm.h" -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU extern void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1); extern ulong cpu_post_makecr (long v); diff --git a/post/post.c b/post/post.c index 9964b4108041..4db862c0dbb8 100644 --- a/post/post.c +++ b/post/post.c @@ -16,7 +16,7 @@ #include #include -#ifdef CONFIG_SYS_POST_HOTKEYS_GPIO +#ifdef CFG_SYS_POST_HOTKEYS_GPIO #include #endif @@ -55,9 +55,9 @@ int post_init_f(void) */ __weak int post_hotkeys_pressed(void) { -#ifdef CONFIG_SYS_POST_HOTKEYS_GPIO +#ifdef CFG_SYS_POST_HOTKEYS_GPIO int ret; - unsigned gpio = CONFIG_SYS_POST_HOTKEYS_GPIO; + unsigned gpio = CFG_SYS_POST_HOTKEYS_GPIO; ret = gpio_request(gpio, "hotkeys"); if (ret) { diff --git a/post/tests.c b/post/tests.c index d61ea74d512e..8cea428fcdc7 100644 --- a/post/tests.c +++ b/post/tests.c @@ -45,7 +45,7 @@ extern void sysmon_reloc (void); struct post_test post_list[] = { -#if CFG_POST & CONFIG_SYS_POST_OCM +#if CFG_POST & CFG_SYS_POST_OCM { "OCM test", "ocm", @@ -54,10 +54,10 @@ struct post_test post_list[] = &ocm_post_test, NULL, NULL, - CONFIG_SYS_POST_OCM + CFG_SYS_POST_OCM }, #endif -#if CFG_POST & CONFIG_SYS_POST_CACHE +#if CFG_POST & CFG_SYS_POST_CACHE { "Cache test", "cache", @@ -66,10 +66,10 @@ struct post_test post_list[] = &cache_post_test, NULL, NULL, - CONFIG_SYS_POST_CACHE + CFG_SYS_POST_CACHE }, #endif -#if CFG_POST & CONFIG_SYS_POST_WATCHDOG +#if CFG_POST & CFG_SYS_POST_WATCHDOG #if defined(CFG_POST_WATCHDOG) CFG_POST_WATCHDOG, #else @@ -81,11 +81,11 @@ struct post_test post_list[] = &watchdog_post_test, NULL, NULL, - CONFIG_SYS_POST_WATCHDOG + CFG_SYS_POST_WATCHDOG }, #endif #endif -#if CFG_POST & CONFIG_SYS_POST_I2C +#if CFG_POST & CFG_SYS_POST_I2C { "I2C test", "i2c", @@ -94,10 +94,10 @@ struct post_test post_list[] = &i2c_post_test, NULL, NULL, - CONFIG_SYS_POST_I2C + CFG_SYS_POST_I2C }, #endif -#if CFG_POST & CONFIG_SYS_POST_RTC +#if CFG_POST & CFG_SYS_POST_RTC { "RTC test", "rtc", @@ -106,7 +106,7 @@ struct post_test post_list[] = &rtc_post_test, NULL, NULL, - CONFIG_SYS_POST_RTC + CFG_SYS_POST_RTC }, #endif #if CFG_POST & CFG_SYS_POST_MEMORY @@ -121,7 +121,7 @@ struct post_test post_list[] = CFG_SYS_POST_MEMORY }, #endif -#if CFG_POST & CONFIG_SYS_POST_CPU +#if CFG_POST & CFG_SYS_POST_CPU { "CPU test", "cpu", @@ -131,10 +131,10 @@ struct post_test post_list[] = &cpu_post_test, NULL, NULL, - CONFIG_SYS_POST_CPU + CFG_SYS_POST_CPU }, #endif -#if CFG_POST & CONFIG_SYS_POST_FPU +#if CFG_POST & CFG_SYS_POST_FPU { "FPU test", "fpu", @@ -144,10 +144,10 @@ struct post_test post_list[] = &fpu_post_test, NULL, NULL, - CONFIG_SYS_POST_FPU + CFG_SYS_POST_FPU }, #endif -#if CFG_POST & CONFIG_SYS_POST_UART +#if CFG_POST & CFG_SYS_POST_UART #if defined(CFG_POST_UART) CFG_POST_UART, #else @@ -159,11 +159,11 @@ struct post_test post_list[] = &uart_post_test, NULL, NULL, - CONFIG_SYS_POST_UART + CFG_SYS_POST_UART }, #endif /* CFG_POST_UART */ #endif -#if CFG_POST & CONFIG_SYS_POST_ETHER +#if CFG_POST & CFG_SYS_POST_ETHER { "ETHERNET test", "ethernet", @@ -172,10 +172,10 @@ struct post_test post_list[] = ðer_post_test, NULL, NULL, - CONFIG_SYS_POST_ETHER + CFG_SYS_POST_ETHER }, #endif -#if CFG_POST & CONFIG_SYS_POST_USB +#if CFG_POST & CFG_SYS_POST_USB { "USB test", "usb", @@ -184,10 +184,10 @@ struct post_test post_list[] = &usb_post_test, NULL, NULL, - CONFIG_SYS_POST_USB + CFG_SYS_POST_USB }, #endif -#if CFG_POST & CONFIG_SYS_POST_SPR +#if CFG_POST & CFG_SYS_POST_SPR { "SPR test", "spr", @@ -196,10 +196,10 @@ struct post_test post_list[] = &spr_post_test, NULL, NULL, - CONFIG_SYS_POST_SPR + CFG_SYS_POST_SPR }, #endif -#if CFG_POST & CONFIG_SYS_POST_SYSMON +#if CFG_POST & CFG_SYS_POST_SYSMON { "SYSMON test", "sysmon", @@ -208,10 +208,10 @@ struct post_test post_list[] = &sysmon_post_test, &sysmon_init_f, &sysmon_reloc, - CONFIG_SYS_POST_SYSMON + CFG_SYS_POST_SYSMON }, #endif -#if CFG_POST & CONFIG_SYS_POST_DSP +#if CFG_POST & CFG_SYS_POST_DSP { "DSP test", "dsp", @@ -220,10 +220,10 @@ struct post_test post_list[] = &dsp_post_test, NULL, NULL, - CONFIG_SYS_POST_DSP + CFG_SYS_POST_DSP }, #endif -#if CFG_POST & CONFIG_SYS_POST_CODEC +#if CFG_POST & CFG_SYS_POST_CODEC { "CODEC test", "codec", @@ -232,10 +232,10 @@ struct post_test post_list[] = &codec_post_test, NULL, NULL, - CONFIG_SYS_POST_CODEC + CFG_SYS_POST_CODEC }, #endif -#if CFG_POST & CONFIG_SYS_POST_ECC +#if CFG_POST & CFG_SYS_POST_ECC { "ECC test", "ecc", @@ -244,25 +244,25 @@ struct post_test post_list[] = &ecc_post_test, NULL, NULL, - CONFIG_SYS_POST_ECC + CFG_SYS_POST_ECC }, #endif -#if CFG_POST & CONFIG_SYS_POST_BSPEC1 +#if CFG_POST & CFG_SYS_POST_BSPEC1 CFG_POST_BSPEC1, #endif -#if CFG_POST & CONFIG_SYS_POST_BSPEC2 +#if CFG_POST & CFG_SYS_POST_BSPEC2 CFG_POST_BSPEC2, #endif -#if CFG_POST & CONFIG_SYS_POST_BSPEC3 +#if CFG_POST & CFG_SYS_POST_BSPEC3 CFG_POST_BSPEC3, #endif -#if CFG_POST & CONFIG_SYS_POST_BSPEC4 +#if CFG_POST & CFG_SYS_POST_BSPEC4 CFG_POST_BSPEC4, #endif -#if CFG_POST & CONFIG_SYS_POST_BSPEC5 +#if CFG_POST & CFG_SYS_POST_BSPEC5 CFG_POST_BSPEC5, #endif -#if CFG_POST & CONFIG_SYS_POST_COPROC +#if CFG_POST & CFG_SYS_POST_COPROC { "Coprocessors communication test", "coproc_com", @@ -271,10 +271,10 @@ struct post_test post_list[] = &coprocessor_post_test, NULL, NULL, - CONFIG_SYS_POST_COPROC + CFG_SYS_POST_COPROC }, #endif -#if CFG_POST & CONFIG_SYS_POST_FLASH +#if CFG_POST & CFG_SYS_POST_FLASH { "Parallel NOR flash test", "flash", @@ -283,7 +283,7 @@ struct post_test post_list[] = &flash_post_test, NULL, NULL, - CONFIG_SYS_POST_FLASH + CFG_SYS_POST_FLASH }, #endif #if CFG_POST & CFG_SYS_POST_MEM_REGIONS From patchwork Sun Dec 4 15:14:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1712014 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; 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Signed-off-by: Tom Rini --- drivers/pci/pci-rcar-gen3.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c index 49029238d350..1252ef74c581 100644 --- a/drivers/pci/pci-rcar-gen3.c +++ b/drivers/pci/pci-rcar-gen3.c @@ -27,7 +27,7 @@ #define PCIECAR 0x000010 #define PCIECCTLR 0x000018 -#define CONFIG_SEND_ENABLE BIT(31) +#define SEND_ENABLE BIT(31) #define TYPE0 (0 << 8) #define TYPE1 BIT(8) #define PCIECDR 0x000020 @@ -170,9 +170,9 @@ static int rcar_pcie_config_access(const struct udevice *udev, /* Enable the configuration access */ if (!PCI_BUS(bdf)) - writel(CONFIG_SEND_ENABLE | TYPE0, priv->regs + PCIECCTLR); + writel(SEND_ENABLE | TYPE0, priv->regs + PCIECCTLR); else - writel(CONFIG_SEND_ENABLE | TYPE1, priv->regs + PCIECCTLR); + writel(SEND_ENABLE | TYPE1, priv->regs + PCIECCTLR); /* Check for errors */ if (readl(priv->regs + PCIEERRFR) & UNSUPPORTED_REQUEST) From patchwork Sun Dec 4 15:14:19 2022 Content-Type: text/plain; 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Signed-off-by: Tom Rini --- drivers/spi/cf_spi.c | 12 ++++++------ drivers/spi/sandbox_spi.c | 4 ---- 2 files changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/spi/cf_spi.c b/drivers/spi/cf_spi.c index ea23357090fe..1a841b5dcefc 100644 --- a/drivers/spi/cf_spi.c +++ b/drivers/spi/cf_spi.c @@ -32,11 +32,11 @@ struct coldfire_spi_priv { DECLARE_GLOBAL_DATA_PTR; -#ifndef CONFIG_SPI_IDLE_VAL +#ifndef SPI_IDLE_VAL #if defined(CONFIG_SPI_MMC) -#define CONFIG_SPI_IDLE_VAL 0xFFFF +#define SPI_IDLE_VAL 0xFFFF #else -#define CONFIG_SPI_IDLE_VAL 0x0 +#define SPI_IDLE_VAL 0x0 #endif #endif @@ -184,7 +184,7 @@ static int coldfire_spi_xfer(struct udevice *dev, unsigned int bitlen, } if (din) { - cfspi_tx(cfspi, ctrl, CONFIG_SPI_IDLE_VAL); + cfspi_tx(cfspi, ctrl, SPI_IDLE_VAL); if (cfspi->charbit == 16) *spi_rd16++ = cfspi_rx(cfspi); else @@ -208,7 +208,7 @@ static int coldfire_spi_xfer(struct udevice *dev, unsigned int bitlen, } if (din) { - cfspi_tx(cfspi, ctrl, CONFIG_SPI_IDLE_VAL); + cfspi_tx(cfspi, ctrl, SPI_IDLE_VAL); if (cfspi->charbit == 16) *spi_rd16 = cfspi_rx(cfspi); else @@ -216,7 +216,7 @@ static int coldfire_spi_xfer(struct udevice *dev, unsigned int bitlen, } } else { /* dummy read */ - cfspi_tx(cfspi, ctrl, CONFIG_SPI_IDLE_VAL); + cfspi_tx(cfspi, ctrl, SPI_IDLE_VAL); cfspi_rx(cfspi); } diff --git a/drivers/spi/sandbox_spi.c b/drivers/spi/sandbox_spi.c index 0564d8b55e70..f844597d04cf 100644 --- a/drivers/spi/sandbox_spi.c +++ b/drivers/spi/sandbox_spi.c @@ -24,10 +24,6 @@ #include #include -#ifndef CONFIG_SPI_IDLE_VAL -# define CONFIG_SPI_IDLE_VAL 0xFF -#endif - /** * struct sandbox_spi_priv - Sandbox SPI private data * From patchwork Sun Dec 4 15:14:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 1712019 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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[2603:6081:7b00:6400:61c7:2644:b62d:af3]) by smtp.gmail.com with ESMTPSA id b21-20020aa7c915000000b00461816beef9sm5174405edt.14.2022.12.04.07.15.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 07:15:32 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PATCH 149/149] common/spl/spl_ram: Remove unused default Date: Sun, 4 Dec 2022 10:14:20 -0500 Message-Id: <20221204151420.56851-59-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221204151420.56851-1-trini@konsulko.com> References: <20221202214251.3027264-41-trini@konsulko.com> <20221204151420.56851-1-trini@konsulko.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean We ask for CONFIG_SPL_LOAD_FIT_ADDRESS in Kconfig, so we cannot define it in C as a fall-back. However, this option previously was buried under "if ... endif" Kconfig logic. Rework a number of config options to now have more robust dependency lines so that we can ask this address when needed. With that done, we can remove the fallback in spl_ram.c. Signed-off-by: Tom Rini --- boot/Kconfig | 29 +++++++++++++++-------------- common/spl/spl_ram.c | 4 ---- 2 files changed, 15 insertions(+), 18 deletions(-) diff --git a/boot/Kconfig b/boot/Kconfig index 668270cc6605..65613a01491d 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -36,10 +36,9 @@ config TIMESTAMP loaded that does not, the message 'Wrong FIT format: no timestamp' is shown. -if FIT - config FIT_EXTERNAL_OFFSET hex "FIT external data offset" + depends on FIT default 0x0 help This specifies a data offset in fit image. @@ -50,6 +49,7 @@ config FIT_EXTERNAL_OFFSET config FIT_FULL_CHECK bool "Do a full check of the FIT before using it" + depends on FIT default y help Enable this do a full check of the FIT to make sure it is valid. This @@ -59,7 +59,7 @@ config FIT_FULL_CHECK config FIT_SIGNATURE bool "Enable signature verification of FIT uImages" - depends on DM + depends on DM && FIT select HASH imply RSA imply RSA_VERIFY @@ -97,7 +97,7 @@ config FIT_RSASSA_PSS config FIT_CIPHER bool "Enable ciphering data in a FIT uImages" - depends on DM + depends on DM && FIT select AES help Enable the feature of data ciphering/unciphering in the tool mkimage @@ -105,6 +105,7 @@ config FIT_CIPHER config FIT_VERBOSE bool "Show verbose messages when FIT images fail" + depends on FIT help Generally a system will have valid FIT images so debug messages are a waste of code space. If you are debugging your images then @@ -113,6 +114,7 @@ config FIT_VERBOSE config FIT_BEST_MATCH bool "Select the best match for the kernel device tree" + depends on FIT help When no configuration is explicitly selected, default to the one whose fdt's compatibility field best matches that of @@ -122,6 +124,7 @@ config FIT_BEST_MATCH config FIT_IMAGE_POST_PROCESS bool "Enable post-processing of FIT artifacts after loading by U-Boot" + depends on FIT depends on TI_SECURE_DEVICE || SOCFPGA_SECURE_VAB_AUTH default y if TI_SECURE_DEVICE help @@ -137,15 +140,14 @@ config FIT_IMAGE_POST_PROCESS config FIT_PRINT bool "Support FIT printing" + depends on FIT default y help Support printing the content of the fitImage in a verbose manner. -if SPL - config SPL_FIT bool "Support Flattened Image Tree within SPL" - depends on SPL + depends on SPL && FIT select SPL_HASH select SPL_OF_LIBFDT @@ -157,13 +159,13 @@ config SPL_FIT_PRINT config SPL_FIT_FULL_CHECK bool "Do a full check of the FIT before using it" + depends on SPL_FIT help Enable this do a full check of the FIT to make sure it is valid. This helps to protect against carefully crafted FITs which take advantage of bugs or omissions in the code. This includes a bad structure, multiple root nodes and the like. - config SPL_FIT_SIGNATURE bool "Enable signature verification of FIT firmware within SPL" depends on SPL_DM @@ -196,6 +198,7 @@ config SPL_FIT_RSASSA_PSS config SPL_LOAD_FIT bool "Enable SPL loading U-Boot as a FIT (basic fitImage features)" + depends on SPL && FIT select SPL_FIT help Normally with the SPL framework a legacy image is generated as part @@ -217,7 +220,7 @@ config SPL_LOAD_FIT config SPL_LOAD_FIT_ADDRESS hex "load address of fit image" - depends on SPL_LOAD_FIT + depends on SPL_LOAD_FIT || SPL_RAM_SUPPORT || TPL_RAM_SUPPORT default 0x0 help Specify the load address of the fit image that will be loaded @@ -243,6 +246,7 @@ config SPL_LOAD_FIT_APPLY_OVERLAY_BUF_SZ config SPL_LOAD_FIT_FULL bool "Enable SPL loading U-Boot as a FIT (full fitImage features)" + depends on FIT select SPL_FIT help Normally with the SPL framework a legacy image is generated as part @@ -277,7 +281,8 @@ config SPL_FIT_SOURCE config USE_SPL_FIT_GENERATOR bool "Use a script to generate the .its script" - default y if SPL_FIT && (!ARCH_SUNXI && !RISCV) + depends on SPL_FIT + default y if !ARCH_SUNXI && !RISCV config SPL_FIT_GENERATOR string ".its file generator script for U-Boot FIT image" @@ -290,8 +295,6 @@ config SPL_FIT_GENERATOR passed a list of supported device tree file stub names to include in the generated image. -endif # SPL - if VPL config VPL_FIT @@ -342,8 +345,6 @@ config VPL_FIT_SIGNATURE_MAX_SIZE endif # VPL -endif # FIT - config PXE_UTILS bool select MENU diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c index 2b1ac191523a..5753bd228f77 100644 --- a/common/spl/spl_ram.c +++ b/common/spl/spl_ram.c @@ -17,10 +17,6 @@ #include #include -#ifndef CONFIG_SPL_LOAD_FIT_ADDRESS -# define CONFIG_SPL_LOAD_FIT_ADDRESS 0 -#endif - static ulong spl_ram_load_read(struct spl_load_info *load, ulong sector, ulong count, void *buf) {