From patchwork Thu Oct 13 12:36:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aldy Hernandez X-Patchwork-Id: 1689537 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=Zcesjres; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4Mp8Fz1Xxmz23k1 for ; Thu, 13 Oct 2022 23:38:45 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id CC9F03853830 for ; Thu, 13 Oct 2022 12:38:38 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CC9F03853830 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1665664718; bh=UWiOVBxPywOOv4Zu14K+olS29JEOc0p3kyiVgD6E79c=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=ZcesjreskEpQdz4xmHFe0tGWvnFecWlsKSY97bspsAJBShy6o8FKaxjX1X0ZRyf9K njnxrlX55ocqHLoVRBRLHXLu5uMty+Gn01niipkPzXPXsOiUbimb3iBOZdIYwd6ANk lDIeiEi+iPPpQKW0W90ay+l5gIYmbzxFGJkS+biA= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by sourceware.org (Postfix) with ESMTPS id C32763858C55 for ; Thu, 13 Oct 2022 12:36:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org C32763858C55 Received: from mimecast-mx02.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-93-UhAJznAHOY6zRcNF50oLpA-1; Thu, 13 Oct 2022 08:36:55 -0400 X-MC-Unique: UhAJznAHOY6zRcNF50oLpA-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.rdu2.redhat.com [10.11.54.1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 1BA871C06EC2 for ; Thu, 13 Oct 2022 12:36:55 +0000 (UTC) Received: from abulafia.quesejoda.com (unknown [10.39.192.80]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A857240E2900; Thu, 13 Oct 2022 12:36:54 +0000 (UTC) Received: from abulafia.quesejoda.com (localhost [127.0.0.1]) by abulafia.quesejoda.com (8.17.1/8.17.1) with ESMTPS id 29DCaqSe474540 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Thu, 13 Oct 2022 14:36:52 +0200 Received: (from aldyh@localhost) by abulafia.quesejoda.com (8.17.1/8.17.1/Submit) id 29DCaqBJ474539; Thu, 13 Oct 2022 14:36:52 +0200 To: Jakub Jelinek Subject: [PATCH] [PR24021] Implement PLUS_EXPR range-op entry for floats. Date: Thu, 13 Oct 2022 14:36:49 +0200 Message-Id: <20221013123649.474497-1-aldyh@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Aldy Hernandez via Gcc-patches From: Aldy Hernandez Reply-To: Aldy Hernandez Cc: GCC patches Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" [Jakub, this is a cleaned up version of what we iterated on earlier this summer. It contains additional smarts to propagate NAN signs on entry. I'd like a nod before committing.] This is the range-op entry for floating point PLUS_EXPR. It's the most intricate range entry we have so far, because we need to keep track of rounding and target FP formats. This will be the last FP entry I commit, mostly to avoid disturbing the tree any further, and also because what we have so far is enough for a solid VRP. So far we track NANs and signs correctly. We also handle relationals (symbolics and numeric), both ordered and unordered, ABS_EXPR and NEGATE_EXPR which are used to fold __builtin_isinf, and __builtin_sign (__builtin_copysign is coming up). All in all, I think this provide more than enough for basic VRP on floats, as well as provide a basis to flesh out the rest if there's interest. My goal with this entry is to provide a template for additional binary operators, as they tend to follow a similar pattern: handle NANs, do the arithmetic while keeping track of rounding, and adjust for NAN. I may abstract the general parts as we do for irange's fold_range and wi_fold. Oh yeah... and I'd like to finally close this PR ;-). How does this look? PR tree-optimization/24021 gcc/ChangeLog: * range-op-float.cc (update_nan_sign): New. (propagate_nans): New. (frange_nextafter): New. (frange_arithmetic): New. (class foperator_plus): New. (floating_op_table::floating_op_table): Add PLUS_EXPR entry. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/vrp-float-plus.c: New test. --- gcc/range-op-float.cc | 171 ++++++++++++++++++ .../gcc.dg/tree-ssa/vrp-float-plus.c | 21 +++ 2 files changed, 192 insertions(+) create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/vrp-float-plus.c diff --git a/gcc/range-op-float.cc b/gcc/range-op-float.cc index 23e0f5ef4e2..a967c4da393 100644 --- a/gcc/range-op-float.cc +++ b/gcc/range-op-float.cc @@ -200,6 +200,124 @@ frelop_early_resolve (irange &r, tree type, && relop_early_resolve (r, type, op1, op2, rel, my_rel)); } +// If R contains a NAN of unknown sign, update the NAN's signbit +// depending on two operands. + +inline void +update_nan_sign (frange &r, const frange &op1, const frange &op2) +{ + if (!r.maybe_isnan ()) + return; + + bool op1_nan = op1.maybe_isnan (); + bool op2_nan = op2.maybe_isnan (); + bool sign1, sign2; + + gcc_checking_assert (!r.nan_signbit_p (sign1)); + if (op1_nan && op2_nan) + { + if (op1.nan_signbit_p (sign1) && op2.nan_signbit_p (sign2)) + r.update_nan (sign1 | sign2); + } + else if (op1_nan) + { + if (op1.nan_signbit_p (sign1)) + r.update_nan (sign1); + } + else if (op2_nan) + { + if (op2.nan_signbit_p (sign2)) + r.update_nan (sign2); + } +} + +// If either operand is a NAN, set R to the combination of both NANs +// signwise and return TRUE. + +inline bool +propagate_nans (frange &r, const frange &op1, const frange &op2) +{ + if (op1.known_isnan () || op2.known_isnan ()) + { + r.set_nan (op1.type ()); + update_nan_sign (r, op1, op2); + return true; + } + return false; +} + +// Set VALUE to its next real value, or INF if the operation overflows. + +inline void +frange_nextafter (enum machine_mode mode, + REAL_VALUE_TYPE &value, + const REAL_VALUE_TYPE &inf) +{ + const real_format *fmt = REAL_MODE_FORMAT (mode); + REAL_VALUE_TYPE tmp; + bool overflow = real_nextafter (&tmp, fmt, &value, &inf); + if (overflow) + value = inf; + else + value = tmp; +} + +// Like real_arithmetic, but round the result to INF if the operation +// produced inexact results. +// +// ?? There is still one problematic case, i387. With +// -fexcess-precision=standard we perform most SF/DFmode arithmetic in +// XFmode (long_double_type_node), so that case is OK. But without +// -mfpmath=sse, all the SF/DFmode computations are in XFmode +// precision (64-bit mantissa) and only occassionally rounded to +// SF/DFmode (when storing into memory from the 387 stack). Maybe +// this is ok as well though it is just occassionally more precise. ?? + +static void +frange_arithmetic (enum tree_code code, tree type, + REAL_VALUE_TYPE &result, + const REAL_VALUE_TYPE &op1, + const REAL_VALUE_TYPE &op2, + const REAL_VALUE_TYPE &inf) +{ + REAL_VALUE_TYPE value; + enum machine_mode mode = TYPE_MODE (type); + bool mode_composite = MODE_COMPOSITE_P (mode); + + bool inexact = real_arithmetic (&value, code, &op1, &op2); + real_convert (&result, mode, &value); + + // If real_convert above has rounded an inexact value to towards + // inf, we can keep the result as is, otherwise we'll adjust by 1 ulp + // later (real_nextafter). + bool rounding = (flag_rounding_math + && (real_isneg (&inf) + ? real_less (&result, &value) + : !real_less (&value, &result))); + + // Be extra careful if there may be discrepancies between the + // compile and runtime results. + if ((rounding || mode_composite) + && (inexact || !real_identical (&result, &value))) + { + if (mode_composite) + { + bool denormal = (result.sig[SIGSZ-1] & SIG_MSB) == 0; + if (denormal) + { + REAL_VALUE_TYPE tmp; + real_convert (&tmp, DFmode, &value); + frange_nextafter (DFmode, tmp, inf); + real_convert (&result, mode, &tmp); + } + else + frange_nextafter (mode, result, inf); + } + else + frange_nextafter (mode, result, inf); + } +} + // Crop R to [-INF, MAX] where MAX is the maximum representable number // for TYPE. @@ -1620,6 +1738,58 @@ foperator_unordered_equal::op1_range (frange &r, tree type, return true; } +class foperator_plus : public range_operator_float +{ + using range_operator_float::fold_range; + +public: + bool fold_range (frange &r, tree type, + const frange &lh, + const frange &rh, + relation_kind rel = VREL_VARYING) const final override; +} fop_plus; + +bool +foperator_plus::fold_range (frange &r, tree type, + const frange &op1, const frange &op2, + relation_kind) const +{ + if (empty_range_varying (r, type, op1, op2)) + return true; + if (propagate_nans (r, op1, op2)) + return true; + + REAL_VALUE_TYPE lb, ub; + frange_arithmetic (PLUS_EXPR, type, lb, + op1.lower_bound (), op2.lower_bound (), dconstninf); + frange_arithmetic (PLUS_EXPR, type, ub, + op1.upper_bound (), op2.upper_bound (), dconstinf); + + // Handle possible NANs by saturating to the appropriate INF if only + // one end is a NAN. If both ends are a NAN, just return a NAN. + bool lb_nan = real_isnan (&lb); + bool ub_nan = real_isnan (&ub); + if (lb_nan && ub_nan) + { + r.set_nan (type); + return true; + } + if (lb_nan) + lb = dconstninf; + else if (ub_nan) + ub = dconstinf; + + // The setter sets NAN by default for HONOR_NANS. + r.set (type, lb, ub); + + if (lb_nan || ub_nan) + update_nan_sign (r, op1, op2); + else if (!op1.maybe_isnan () && !op2.maybe_isnan ()) + r.clear_nan (); + + return true; +} + // Instantiate a range_op_table for floating point operations. static floating_op_table global_floating_table; @@ -1652,6 +1822,7 @@ floating_op_table::floating_op_table () set (ABS_EXPR, fop_abs); set (NEGATE_EXPR, fop_negate); + set (PLUS_EXPR, fop_plus); } // Return a pointer to the range_operator_float instance, if there is diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vrp-float-plus.c b/gcc/testsuite/gcc.dg/tree-ssa/vrp-float-plus.c new file mode 100644 index 00000000000..3739ea4e810 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/vrp-float-plus.c @@ -0,0 +1,21 @@ +// { dg-do compile } +// { dg-options "-O2 -fno-tree-fre -fno-tree-dominator-opts -fno-thread-jumps -fdump-tree-vrp2" } + +double BG_SplineLength () +{ + double lastPoint; + double i; + + for (i = 0.01;i<=1;i+=0.1f) + if (!(i != 0.0)) + { + lastPoint = i; + } + else + { + lastPoint = 2; + } + return lastPoint; +} + +// { dg-final { scan-tree-dump-times "return 2\\.0e" 1 "vrp2" } }