From patchwork Tue Sep 20 16:04:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 1680133 X-Patchwork-Delegate: patrick.delaunay73@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=foss.st.com header.i=@foss.st.com header.a=rsa-sha256 header.s=selector1 header.b=34V9TR0y; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MX5wW5FY4z1yp7 for ; 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Tue, 20 Sep 2022 18:04:40 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id DA6C7100034; Tue, 20 Sep 2022 18:04:39 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id D6493245530; Tue, 20 Sep 2022 18:04:39 +0200 (CEST) Received: from localhost (10.75.127.119) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Tue, 20 Sep 2022 18:04:39 +0200 From: Patrice Chotard To: CC: Patrice CHOTARD , Patrick DELAUNAY , U-Boot STM32 , Vikas Manocha Subject: [PATCH v2 1/7] configs: stm32f746-disco: Fix SPL boot Date: Tue, 20 Sep 2022 18:04:30 +0200 Message-ID: <20220920160436.117811-2-patrice.chotard@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220920160436.117811-1-patrice.chotard@foss.st.com> References: <20220920160436.117811-1-patrice.chotard@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.119] X-ClientProxiedBy: GPXDAG2NODE5.st.com (10.75.127.69) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-20_06,2022-09-20_02,2022-06-22_01 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")' replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR. As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it increases SPL size over the initial 0x8000 limit. Increase the SPL size to 0x9000 to fix SPL boot. Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future. Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")' Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- (no changes since v1) configs/stm32f746-disco_spl_defconfig | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index e7b1acc433..5e8a8aaf3c 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y -CONFIG_SYS_TEXT_BASE=0x08008000 +CONFIG_SYS_TEXT_BASE=0x08009000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_SPL_GPIO=y @@ -13,10 +13,11 @@ CONFIG_SPL_TEXT_BASE=0x8000000 CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_SIZE_LIMIT=0x9000 CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y CONFIG_SPL=y -CONFIG_SYS_LOAD_ADDR=0x8008000 +CONFIG_SYS_LOAD_ADDR=0x8009000 CONFIG_BUILD_TARGET="u-boot-with-spl.bin" CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -29,7 +30,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_PAD_TO=0x9000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y From patchwork Tue Sep 20 16:04:31 2022 Content-Type: text/plain; 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Tue, 20 Sep 2022 18:04:41 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 98102100038; Tue, 20 Sep 2022 18:04:40 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 9456E245530; Tue, 20 Sep 2022 18:04:40 +0200 (CEST) Received: from localhost (10.75.127.47) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Tue, 20 Sep 2022 18:04:40 +0200 From: Patrice Chotard To: CC: Patrice CHOTARD , Patrick DELAUNAY , U-Boot STM32 , Vikas Manocha Subject: [PATCH v2 2/7] configs: stm32f769-disco: Fix SPL boot Date: Tue, 20 Sep 2022 18:04:31 +0200 Message-ID: <20220920160436.117811-3-patrice.chotard@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220920160436.117811-1-patrice.chotard@foss.st.com> References: <20220920160436.117811-1-patrice.chotard@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-20_06,2022-09-20_02,2022-06-22_01 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")' replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR. As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it increases SPL size over the initial 0x8000 limit. Increase the SPL size to 0x9000 to fix SPL boot. Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future. Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")' Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- (no changes since v1) configs/stm32f769-disco_spl_defconfig | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index 19d2c24abb..b56d88f9f6 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y -CONFIG_SYS_TEXT_BASE=0x08008000 +CONFIG_SYS_TEXT_BASE=0x08009000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_SPL_GPIO=y @@ -13,10 +13,11 @@ CONFIG_SPL_TEXT_BASE=0x8000000 CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_SIZE_LIMIT=0x9000 CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y CONFIG_SPL=y -CONFIG_SYS_LOAD_ADDR=0x8008000 +CONFIG_SYS_LOAD_ADDR=0x8009000 CONFIG_BUILD_TARGET="u-boot-with-spl.bin" CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -28,7 +29,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set -CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_PAD_TO=0x9000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y From patchwork Tue Sep 20 16:04:32 2022 Content-Type: text/plain; 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Tue, 20 Sep 2022 18:04:41 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 36D1E10002A; Tue, 20 Sep 2022 18:04:41 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 32364245530; Tue, 20 Sep 2022 18:04:41 +0200 (CEST) Received: from localhost (10.75.127.45) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Tue, 20 Sep 2022 18:04:40 +0200 From: Patrice Chotard To: CC: Patrice CHOTARD , Patrick DELAUNAY , U-Boot STM32 , Vikas Manocha Subject: [PATCH v2 3/7] configs: stm32746g-eval: Fix SPL boot Date: Tue, 20 Sep 2022 18:04:32 +0200 Message-ID: <20220920160436.117811-4-patrice.chotard@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220920160436.117811-1-patrice.chotard@foss.st.com> References: <20220920160436.117811-1-patrice.chotard@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-20_06,2022-09-20_02,2022-06-22_01 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")' replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR. As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it increases SPL size over the initial 0x8000 limit. Increase the SPL size to 0x9000 to fix SPL boot. Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future. Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")' Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- (no changes since v1) configs/stm32746g-eval_spl_defconfig | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index a3b7146454..d8d55c2d3c 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y -CONFIG_SYS_TEXT_BASE=0x08008000 +CONFIG_SYS_TEXT_BASE=0x08009000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_SPL_GPIO=y @@ -13,10 +13,11 @@ CONFIG_SPL_TEXT_BASE=0x8000000 CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_SIZE_LIMIT=0x9000 CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y CONFIG_SPL=y -CONFIG_SYS_LOAD_ADDR=0x8008000 +CONFIG_SYS_LOAD_ADDR=0x8009000 CONFIG_BUILD_TARGET="u-boot-with-spl.bin" CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -29,7 +30,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_PAD_TO=0x9000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y From patchwork Tue Sep 20 16:04:33 2022 Content-Type: text/plain; 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Tue, 20 Sep 2022 18:04:42 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C89CB100038; Tue, 20 Sep 2022 18:04:41 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id C4DA1245530; Tue, 20 Sep 2022 18:04:41 +0200 (CEST) Received: from localhost (10.75.127.45) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Tue, 20 Sep 2022 18:04:41 +0200 From: Patrice Chotard To: CC: Patrice CHOTARD , Patrick DELAUNAY , U-Boot STM32 , Vikas Manocha Subject: [PATCH v2 4/7] configs: stm32f746-disco: Fix CONFIG_SYS_SPL_ARGS_ADDR Date: Tue, 20 Sep 2022 18:04:33 +0200 Message-ID: <20220920160436.117811-5-patrice.chotard@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220920160436.117811-1-patrice.chotard@foss.st.com> References: <20220920160436.117811-1-patrice.chotard@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-20_06,2022-09-20_02,2022-06-22_01 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean STM32F746 embeds 1 MB of internal flash [0x08000000-0x080fffff], fix CONFIG_SYS_SPL_ARGS_ADDR accordingly It solves hard fault when jumping from SPL to U-Boot. Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- (no changes since v1) configs/stm32f746-disco_spl_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index 5e8a8aaf3c..d4a65bde24 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -36,7 +36,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_XIP_SUPPORT=y -CONFIG_SYS_SPL_ARGS_ADDR=0x81c0000 +CONFIG_SYS_SPL_ARGS_ADDR=0x80c0000 CONFIG_SPL_DM_RESET=y CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y From patchwork Tue Sep 20 16:04:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 1680137 X-Patchwork-Delegate: patrick.delaunay73@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Tue, 20 Sep 2022 18:05:42 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 69FCC10002A; Tue, 20 Sep 2022 18:05:42 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 64E04245534; Tue, 20 Sep 2022 18:05:42 +0200 (CEST) Received: from localhost (10.75.127.46) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Tue, 20 Sep 2022 18:05:42 +0200 From: Patrice Chotard To: CC: Patrice CHOTARD , Patrick DELAUNAY , U-Boot STM32 , Vikas Manocha Subject: [PATCH v2 5/7] configs: stm32746g-eval: Fix CONFIG_SYS_SPL_ARGS_ADDR Date: Tue, 20 Sep 2022 18:04:34 +0200 Message-ID: <20220920160436.117811-6-patrice.chotard@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220920160436.117811-1-patrice.chotard@foss.st.com> References: <20220920160436.117811-1-patrice.chotard@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.46] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-20_06,2022-09-20_02,2022-06-22_01 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean STM32F746 embeds 1 MB of internal flash [0x08000000-0x080fffff], fix CONFIG_SYS_SPL_ARGS_ADDR accordingly It solves hard fault when jumping from SPL to U-Boot. Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- (no changes since v1) configs/stm32746g-eval_spl_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index d8d55c2d3c..28f522b15e 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -36,7 +36,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_XIP_SUPPORT=y -CONFIG_SYS_SPL_ARGS_ADDR=0x81c0000 +CONFIG_SYS_SPL_ARGS_ADDR=0x80c0000 CONFIG_SPL_DM_RESET=y CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y From patchwork Tue Sep 20 16:04:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrice CHOTARD X-Patchwork-Id: 1680139 X-Patchwork-Delegate: patrick.delaunay73@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; 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Tue, 20 Sep 2022 18:05:43 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 0EE6D100034; Tue, 20 Sep 2022 18:05:43 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 0AF22245534; Tue, 20 Sep 2022 18:05:43 +0200 (CEST) Received: from localhost (10.75.127.117) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Tue, 20 Sep 2022 18:05:42 +0200 From: Patrice Chotard To: CC: Patrice CHOTARD , Patrick DELAUNAY , U-Boot STM32 , Vikas Manocha Subject: [PATCH v2 6/7] config: stm32f769-disco: Fix internal flash size Date: Tue, 20 Sep 2022 18:04:35 +0200 Message-ID: <20220920160436.117811-7-patrice.chotard@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220920160436.117811-1-patrice.chotard@foss.st.com> References: <20220920160436.117811-1-patrice.chotard@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.117] X-ClientProxiedBy: GPXDAG2NODE4.st.com (10.75.127.68) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-20_06,2022-09-20_02,2022-06-22_01 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean arch-stm32f7/stm32.h file is shared between STM32F746 and STM32F769 MCUs. But STM32F769 embeds 2MB of internal flash instead of 1MB for STM32F746. The flash layout is quite similar between the 2 SoCs : STM32F746 STM32F769 4 * 32KB sectors 4 * 32KB sectors 1 * 128KB sector 1 * 128KB sector 3 * 256KB sectors 7 * 256KB sectors Update sect_sz_kb[] structure and SYS_MAX_FLASH_SECT accordingly. Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- Changes in v2: - Remove SYS_UBOOT_FLAG from stm32f746-disco.h arch/arm/include/asm/arch-stm32f7/stm32.h | 6 +++--- configs/stm32f769-disco_defconfig | 2 +- configs/stm32f769-disco_spl_defconfig | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h b/arch/arm/include/asm/arch-stm32f7/stm32.h index 3451e74a3d..57db839e8d 100644 --- a/arch/arm/include/asm/arch-stm32f7/stm32.h +++ b/arch/arm/include/asm/arch-stm32f7/stm32.h @@ -10,9 +10,9 @@ #include static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = { - [0 ... 3] = 32 * 1024, - [4] = 128 * 1024, - [5 ... 7] = 256 * 1024 + [0 ... 3] = 32 * 1024, + [4] = 128 * 1024, + [5 ... CONFIG_SYS_MAX_FLASH_SECT - 1] = 256 * 1024 }; #endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 423af7446a..5b5307ca1d 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -41,7 +41,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_STM32_FLASH=y -CONFIG_SYS_MAX_FLASH_SECT=8 +CONFIG_SYS_MAX_FLASH_SECT=12 CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index b56d88f9f6..b5d54b48ec 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -63,7 +63,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_STM32_FLASH=y -CONFIG_SYS_MAX_FLASH_SECT=8 +CONFIG_SYS_MAX_FLASH_SECT=12 CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y From patchwork Tue Sep 20 16:04:36 2022 Content-Type: text/plain; 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Tue, 20 Sep 2022 18:05:44 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9C30C10002A; Tue, 20 Sep 2022 18:05:43 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 98620245534; Tue, 20 Sep 2022 18:05:43 +0200 (CEST) Received: from localhost (10.75.127.44) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Tue, 20 Sep 2022 18:05:43 +0200 From: Patrice Chotard To: CC: Patrice CHOTARD , Patrick DELAUNAY , U-Boot STM32 , Vikas Manocha Subject: [PATCH v2 7/7] configs: stm32f746-disco: Remove CONFIG_SYS_UBOOT_START flag Date: Tue, 20 Sep 2022 18:04:36 +0200 Message-ID: <20220920160436.117811-8-patrice.chotard@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220920160436.117811-1-patrice.chotard@foss.st.com> References: <20220920160436.117811-1-patrice.chotard@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-20_06,2022-09-20_02,2022-06-22_01 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean By pressing "c" key during SPL execution, we force U-boot execution instead of a kernel XIP image. This fixes a hard fault when booting stm32f746-disco in SPL with "c" key pressed during SPL execution. U-Boot SPL 2022.10-rc5-00009-g40d02baa91 (Sep 20 2022 - 17:21:21 +0200) Trying to boot from XIP Hard fault pc : 080083fc lr : 08000d1b xPSR : 21000000 r12 : 2004f108 r3 : 080083fd r2 : 00000028 r1 : 2004f0c8 r0 : 2004f0e4 Resetting CPU ... This is due to SYS_UBOOT_START flag set to 0x080083FD which is not correct. If unset, SYS_UBOOT_START is set by default to CONFIG_SYS_TEXT_BASE which match with our requirement. Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- (no changes since v1) include/configs/stm32f746-disco.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 64c1bc7d43..b0ec226114 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -34,7 +34,6 @@ BOOTENV #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_UBOOT_START 0x080083FD #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \ CONFIG_SPL_PAD_TO)