From patchwork Mon Sep 5 14:34:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kai-Heng Feng X-Patchwork-Id: 1674311 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=G51nKLBU; dkim-atps=neutral Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MLrdf6D65z1yht for ; Tue, 6 Sep 2022 00:35:01 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1oVDBZ-0003pR-BT; Mon, 05 Sep 2022 14:34:49 +0000 Received: from smtp-relay-canonical-1.internal ([10.131.114.174] helo=smtp-relay-canonical-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1oVDBX-0003p5-8H for kernel-team@lists.ubuntu.com; Mon, 05 Sep 2022 14:34:47 +0000 Received: from HP-EliteBook-840-G7.. (1-171-245-2.dynamic-ip.hinet.net [1.171.245.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id B53FD415A2 for ; Mon, 5 Sep 2022 14:34:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1662388486; bh=SLsg7QVhhKlWeogtLS+LA/N0cVEYqxJfKYX3xl8c8+c=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=G51nKLBU2JBB9f86IAgzMewyY99Ebm5WykmyrN9LPelqxsiE+C6BfNnHq3Ld6nsxZ s0xODNlITh+nFIvv/d5y7KeER+46pJfWWqLWB1zBZ6Bs8+KPBMqmgXaDGBfuR44V7F NKjybgAgbCU5D3kVLsChDgIpaZwmvV5jRY6DVqmpFQ0m/AJRuN0Q+i2Q6WZFw1CEsr zN4t5+Tz8vM3ktA2F0LfHHfHsyxuIsegnZKMp31Ti3PfFMbnQbsDu6NWG4R9rpia/O WqvjbEvWdrI4IPFDyox1MKpnPhRpl122Y6JCRdJcZA3CPN1odyy8iP7Qa+mu6tjRlV Anss9oxvvZhgg== From: Kai-Heng Feng To: kernel-team@lists.ubuntu.com Subject: [OEM-5.14] [PATCH 01/12] Revert "UBUNTU: SAUCE: drm/i915/display/psr: Fix flicker on TGL + AUO panel" Date: Mon, 5 Sep 2022 22:34:27 +0800 Message-Id: <20220905143438.1610667-2-kai.heng.feng@canonical.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220905143438.1610667-1-kai.heng.feng@canonical.com> References: <20220905143438.1610667-1-kai.heng.feng@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" BugLink: https://bugs.launchpad.net/bugs/1983297 This reverts commit 403f3441bfc269405f04feac7c23daee6c74d0de. Signed-off-by: Kai-Heng Feng --- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_dp.h | 2 -- drivers/gpu/drm/i915/display/intel_psr.c | 11 ----------- 3 files changed, 1 insertion(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 73cf4d01daa95..bc3c057544666 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4034,7 +4034,7 @@ bool intel_digital_port_connected(struct intel_encoder *encoder) return is_connected; } -struct edid * +static struct edid * intel_dp_get_edid(struct intel_dp *intel_dp) { struct intel_connector *intel_connector = intel_dp->attached_connector; diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 0746dc7f7ac4b..2121aaa9b8db0 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -107,8 +107,6 @@ void intel_read_dp_sdp(struct intel_encoder *encoder, unsigned int type); bool intel_digital_port_connected(struct intel_encoder *encoder); -struct edid *intel_dp_get_edid(struct intel_dp *intel_dp); - static inline unsigned int intel_dp_unused_lane_mask(int lane_count) { return ~((1 << lane_count) - 1) & 0xf; diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 4558c393bd61a..29a514fbfa4de 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -759,19 +759,8 @@ static bool intel_psr2_sel_fetch_config_valid(struct intel_dp *intel_dp, struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); struct intel_plane_state *plane_state; struct intel_plane *plane; - struct edid *edid; int i; - edid = intel_dp_get_edid(intel_dp); - - if (edid->mfg_id[0] == 0x06 && edid->mfg_id[1] == 0xaf && - edid->prod_code[0] == 0x8c && edid->prod_code[1] == 0xcd && - IS_TIGERLAKE(dev_priv)) { - drm_info_once(&dev_priv->drm, - "PSR2 sel fetch enabled for TGL + AUO panel\n"); - return crtc_state->enable_psr2_sel_fetch = true; - } - if (!dev_priv->params.enable_psr2_sel_fetch && intel_dp->psr.debug != I915_PSR_DEBUG_ENABLE_SEL_FETCH) { drm_dbg_kms(&dev_priv->drm, From patchwork Mon Sep 5 14:34:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kai-Heng Feng X-Patchwork-Id: 1674312 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=IH3iqHp6; dkim-atps=neutral Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MLrdg0Lpjz1ynx for ; Tue, 6 Sep 2022 00:35:01 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1oVDBa-0003ph-Hp; Mon, 05 Sep 2022 14:34:50 +0000 Received: from smtp-relay-canonical-1.internal ([10.131.114.174] helo=smtp-relay-canonical-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1oVDBZ-0003pE-8W for kernel-team@lists.ubuntu.com; Mon, 05 Sep 2022 14:34:49 +0000 Received: from HP-EliteBook-840-G7.. (1-171-245-2.dynamic-ip.hinet.net [1.171.245.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id C10A6415A2 for ; Mon, 5 Sep 2022 14:34:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1662388488; bh=Ni7PBjgikNbmPB7Z8WcqS556V0QwFVjcNSYlITPTtT0=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=IH3iqHp6lLOsoO6rQSoRW2t+aZU09yzKb9yU+f5F8Y8eWEtzxTIB3cnnk9ToLlim7 I2eItjaK7cpKSLLCIcpT+3AmSBN0JkM397EZWpiSmhfyHqm3bxlMBWW0AOuKlvDzwm HD0uMpr/rUsfX8ExXNqsMI+nQ2Q4bLIpu5iBzuuLMoFAAYUHZ1h7tXrg7Bh5U6VtPS 6C3movvfzIyIrXMe4X3d7W5jyZVD/4q6BgTznoe9khWPJB5lOUtalZEGnfR9+y5HmK 5CttaTsdk7aDJq9+AXGXq5HkYPI7URovDsAkB0UVhzMh/ioFpgAdemR1DGYCEnZS6e T8so0hIVlp4JQ== From: Kai-Heng Feng To: kernel-team@lists.ubuntu.com Subject: [OEM-5.14] [PATCH 02/12] drm/i915/display: Fix sel fetch plane offset calculation Date: Mon, 5 Sep 2022 22:34:28 +0800 Message-Id: <20220905143438.1610667-3-kai.heng.feng@canonical.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220905143438.1610667-1-kai.heng.feng@canonical.com> References: <20220905143438.1610667-1-kai.heng.feng@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: José Roberto de Souza BugLink: https://bugs.launchpad.net/bugs/1983297 skl_calc_main_surface_offset() is used to calculate an aligned plane surface address considering the inner framebuffer x and y offset. It can not be used by selective fetch functions becase there is no PLANE_SEL_FETCH_SURF. So the PLANE_SEL_FETCH_OFFSET.y should only be PLANE_OFFSET.y + damaged_area_within_plane.y1. This fixes glitches seen in fbcon caused by typing something in the terminal. BSpec: 55229 Reviewed-by: Gwan-gyeong Mun Cc: Gwan-gyeong Mun Cc: Ville Syrjälä Signed-off-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210815014346.373945-1-jose.souza@intel.com (cherry picked from commit 7b24b79bf5f9492a63a09d5752af3c155f45f793) Signed-off-by: Kai-Heng Feng --- drivers/gpu/drm/i915/display/intel_psr.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 29a514fbfa4de..f141d3d6e8217 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1485,8 +1485,8 @@ void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane, struct drm_i915_private *dev_priv = to_i915(plane->base.dev); enum pipe pipe = plane->pipe; const struct drm_rect *clip; - u32 val, offset; - int ret, x, y; + u32 val; + int x, y; if (!crtc_state->enable_psr2_sel_fetch) return; @@ -1506,10 +1506,6 @@ void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane, /* TODO: consider auxiliary surfaces */ x = plane_state->uapi.src.x1 >> 16; y = (plane_state->uapi.src.y1 >> 16) + clip->y1; - ret = skl_calc_main_surface_offset(plane_state, &x, &y, &offset); - if (ret) - drm_warn_once(&dev_priv->drm, "skl_calc_main_surface_offset() returned %i\n", - ret); val = y << 16 | x; intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_OFFSET(pipe, plane->id), val); From patchwork Mon Sep 5 14:34:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kai-Heng Feng X-Patchwork-Id: 1674310 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=Mv0J+stm; dkim-atps=neutral Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MLrdf61NRz1yhd for ; Tue, 6 Sep 2022 00:35:01 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1oVDBc-0003qv-NR; Mon, 05 Sep 2022 14:34:52 +0000 Received: from smtp-relay-canonical-1.internal ([10.131.114.174] helo=smtp-relay-canonical-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1oVDBb-0003px-0j for kernel-team@lists.ubuntu.com; Mon, 05 Sep 2022 14:34:51 +0000 Received: from HP-EliteBook-840-G7.. (1-171-245-2.dynamic-ip.hinet.net [1.171.245.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id 68B99415A2 for ; Mon, 5 Sep 2022 14:34:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1662388490; bh=TweYtA9wwO5xZ9kCvdo2t5AUx/AblNyTFvpdpZl8Tmc=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=Mv0J+stmLPewyKZzLwrAaOyFW5QSNCbcV4PRAHU3TMlWw05RFlGeVyBvkv78XScMY PBlBEuWFh1Er9o9OOnwfnqtf734iXnmvF2n4GhO+CTQYkmCSzQP8GiCkBjYXdCu2Y5 flsKU3DKpoLiv1f4zWqOo4ShUoJztGLwu+XE3u+TD031NBesYtbzpsjw7CPuIFP0Rf DLQ2+7IWR5XvERGSb6WMpkYFHRMTggtJVQOhrksOi8p+ORPDkS0xgP86IwGgNfsZEJ WRRjezLbSSbn+Ol2Bii7Knsq5uvhlJMc3VhHiGcI3L3EWDmMA61dH9L993oucOcPbA VTX3wbrf7NslQ== From: Kai-Heng Feng To: kernel-team@lists.ubuntu.com Subject: [OEM-5.14] [PATCH 03/12] drm/i915: Nuke ORIGIN_GTT Date: Mon, 5 Sep 2022 22:34:29 +0800 Message-Id: <20220905143438.1610667-4-kai.heng.feng@canonical.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220905143438.1610667-1-kai.heng.feng@canonical.com> References: <20220905143438.1610667-1-kai.heng.feng@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: José Roberto de Souza BugLink: https://bugs.launchpad.net/bugs/1983297 There is no users of it, so no need to keep handling for it. Reviewed-by: Gwan-gyeong Mun Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210815014346.373945-2-jose.souza@intel.com (cherry picked from commit bbaafe536c840d962870d33572d3d5f9051550f3) Signed-off-by: Kai-Heng Feng --- drivers/gpu/drm/i915/display/intel_fbc.c | 10 +--------- drivers/gpu/drm/i915/display/intel_frontbuffer.h | 3 +-- 2 files changed, 2 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 79a747b4413bb..d1c2f7c44954f 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -1136,7 +1136,7 @@ void intel_fbc_invalidate(struct drm_i915_private *dev_priv, if (!HAS_FBC(dev_priv)) return; - if (origin == ORIGIN_GTT || origin == ORIGIN_FLIP) + if (origin == ORIGIN_FLIP) return; mutex_lock(&fbc->lock); @@ -1157,14 +1157,6 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv, if (!HAS_FBC(dev_priv)) return; - /* - * GTT tracking does not nuke the entire cfb - * so don't clear busy_bits set for some other - * reason. - */ - if (origin == ORIGIN_GTT) - return; - mutex_lock(&fbc->lock); fbc->busy_bits &= ~frontbuffer_bits; diff --git a/drivers/gpu/drm/i915/display/intel_frontbuffer.h b/drivers/gpu/drm/i915/display/intel_frontbuffer.h index 6d41f53944250..4b977c1e4d52b 100644 --- a/drivers/gpu/drm/i915/display/intel_frontbuffer.h +++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.h @@ -33,8 +33,7 @@ struct drm_i915_private; enum fb_op_origin { - ORIGIN_GTT, - ORIGIN_CPU, + ORIGIN_CPU = 0, ORIGIN_CS, ORIGIN_FLIP, ORIGIN_DIRTYFB, From patchwork Mon Sep 5 14:34:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kai-Heng Feng X-Patchwork-Id: 1674313 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=wPZgmHz3; dkim-atps=neutral Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MLrdh4xFvz1yhr for ; Tue, 6 Sep 2022 00:35:04 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1oVDBe-0003sA-Tm; Mon, 05 Sep 2022 14:34:54 +0000 Received: from smtp-relay-canonical-1.internal ([10.131.114.174] helo=smtp-relay-canonical-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1oVDBc-0003qk-FP for kernel-team@lists.ubuntu.com; Mon, 05 Sep 2022 14:34:52 +0000 Received: from HP-EliteBook-840-G7.. (1-171-245-2.dynamic-ip.hinet.net [1.171.245.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id 63DBE415A2 for ; Mon, 5 Sep 2022 14:34:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1662388492; bh=GBOotbNLvv3o80EGME2aGMfieok/qyJtvg+7kN+92xI=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=wPZgmHz3Y0XMJ/hOQymyZNMOf3Bdjn2HXdgYnvQWd1mAQOr64l/Ub9SEWv2s3FA1E OhwQmSafsAJXQqw030vOAJEMQMiEGzum/ITcDZSotH1CCxmldCssHgVyNPNwJdSCDZ aQHKKfEm3tvu5J8xjONrihYBOM0hGcnkF4zZE11Ypqy5JUW1WpFC79tS39/nBRtLiH tQUzRBYSTDTS5sIHQPePOktKH15fhGPxjQBCVRa8AUqW6NyfhVj5oiKJHpocff7vKu 1HjCnVu7wc3SbD/pq0y6SgCPfE8QAZ8V2AFqzabzsrJ5yO69zusEi61sfcigFrh5gQ Uv3B24tgeAhsg== From: Kai-Heng Feng To: kernel-team@lists.ubuntu.com Subject: [OEM-5.14] [PATCH 04/12] drm/i915/display: Drop PSR support from HSW and BDW Date: Mon, 5 Sep 2022 22:34:30 +0800 Message-Id: <20220905143438.1610667-5-kai.heng.feng@canonical.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220905143438.1610667-1-kai.heng.feng@canonical.com> References: <20220905143438.1610667-1-kai.heng.feng@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: José Roberto de Souza BugLink: https://bugs.launchpad.net/bugs/1983297 At this point is sure that HSW and BDW will never have PSR enabled by default, so here dropping it from device info and cleaning up code. v2: - enable psr support for display 9 Reviewed-by: Rodrigo Vivi Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210827174253.51122-1-jose.souza@intel.com (cherry picked from commit ad26451a790209318c25a8a5ab9a36fc47dc7bba) Signed-off-by: Kai-Heng Feng --- drivers/gpu/drm/i915/display/intel_psr.c | 97 ++++-------------------- drivers/gpu/drm/i915/i915_drv.h | 2 - drivers/gpu/drm/i915/i915_irq.c | 16 ---- drivers/gpu/drm/i915/i915_pci.c | 4 +- drivers/gpu/drm/i915/i915_reg.h | 21 ++--- 5 files changed, 20 insertions(+), 120 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index f141d3d6e8217..7f8e864c4dfa1 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -363,41 +363,6 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp) } } -static void hsw_psr_setup_aux(struct intel_dp *intel_dp) -{ - struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - u32 aux_clock_divider, aux_ctl; - int i; - static const u8 aux_msg[] = { - [0] = DP_AUX_NATIVE_WRITE << 4, - [1] = DP_SET_POWER >> 8, - [2] = DP_SET_POWER & 0xff, - [3] = 1 - 1, - [4] = DP_SET_POWER_D0, - }; - u32 psr_aux_mask = EDP_PSR_AUX_CTL_TIME_OUT_MASK | - EDP_PSR_AUX_CTL_MESSAGE_SIZE_MASK | - EDP_PSR_AUX_CTL_PRECHARGE_2US_MASK | - EDP_PSR_AUX_CTL_BIT_CLOCK_2X_MASK; - - BUILD_BUG_ON(sizeof(aux_msg) > 20); - for (i = 0; i < sizeof(aux_msg); i += 4) - intel_de_write(dev_priv, - EDP_PSR_AUX_DATA(intel_dp->psr.transcoder, i >> 2), - intel_dp_pack_aux(&aux_msg[i], sizeof(aux_msg) - i)); - - aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, 0); - - /* Start with bits set for DDI_AUX_CTL register */ - aux_ctl = intel_dp->get_aux_send_ctl(intel_dp, sizeof(aux_msg), - aux_clock_divider); - - /* Select only valid bits for SRD_AUX_CTL */ - aux_ctl &= psr_aux_mask; - intel_de_write(dev_priv, EDP_PSR_AUX_CTL(intel_dp->psr.transcoder), - aux_ctl); -} - static void intel_psr_enable_sink(struct intel_dp *intel_dp) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); @@ -621,9 +586,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp) static bool transcoder_has_psr2(struct drm_i915_private *dev_priv, enum transcoder trans) { - if (DISPLAY_VER(dev_priv) < 9) - return false; - else if (DISPLAY_VER(dev_priv) >= 12) + if (DISPLAY_VER(dev_priv) >= 12) return trans == TRANSCODER_A; else return trans == TRANSCODER_EDP; @@ -1117,12 +1080,6 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp) enum transcoder cpu_transcoder = intel_dp->psr.transcoder; u32 mask; - /* Only HSW and BDW have PSR AUX registers that need to be setup. SKL+ - * use hardcoded values PSR AUX transactions - */ - if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) - hsw_psr_setup_aux(intel_dp); - if (intel_dp->psr.psr2_enabled && DISPLAY_VER(dev_priv) == 9) { i915_reg_t reg = CHICKEN_TRANS(cpu_transcoder); u32 chicken = intel_de_read(dev_priv, reg); @@ -1458,23 +1415,16 @@ static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - if (DISPLAY_VER(dev_priv) >= 9) - /* - * Display WA #0884: skl+ - * This documented WA for bxt can be safely applied - * broadly so we can force HW tracking to exit PSR - * instead of disabling and re-enabling. - * Workaround tells us to write 0 to CUR_SURFLIVE_A, - * but it makes more sense write to the current active - * pipe. - */ - intel_de_write(dev_priv, CURSURFLIVE(intel_dp->psr.pipe), 0); - else - /* - * A write to CURSURFLIVE do not cause HW tracking to exit PSR - * on older gens so doing the manual exit instead. - */ - intel_psr_exit(intel_dp); + /* + * Display WA #0884: skl+ + * This documented WA for bxt can be safely applied + * broadly so we can force HW tracking to exit PSR + * instead of disabling and re-enabling. + * Workaround tells us to write 0 to CUR_SURFLIVE_A, + * but it makes more sense write to the current active + * pipe. + */ + intel_de_write(dev_priv, CURSURFLIVE(intel_dp->psr.pipe), 0); } void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane, @@ -1741,7 +1691,6 @@ void intel_psr_update(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) { - struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); struct intel_psr *psr = &intel_dp->psr; bool enable, psr2_enable; @@ -1758,15 +1707,6 @@ void intel_psr_update(struct intel_dp *intel_dp, /* Force a PSR exit when enabling CRC to avoid CRC timeouts */ if (crtc_state->crc_enabled && psr->enabled) psr_force_hw_tracking_exit(intel_dp); - else if (DISPLAY_VER(dev_priv) < 9 && psr->enabled) { - /* - * Activate PSR again after a force exit when enabling - * CRC in older gens - */ - if (!intel_dp->psr.active && - !intel_dp->psr.busy_frontbuffer_bits) - schedule_work(&intel_dp->psr.work); - } goto unlock; } @@ -2179,23 +2119,12 @@ void intel_psr_init(struct intel_dp *intel_dp) intel_dp->psr.source_support = true; - if (IS_HASWELL(dev_priv)) - /* - * HSW don't have PSR registers on the same space as transcoder - * so set this to a value that when subtract to the register - * in transcoder space results in the right offset for HSW - */ - dev_priv->hsw_psr_mmio_adjust = _SRD_CTL_EDP - _HSW_EDP_PSR_BASE; - if (dev_priv->params.enable_psr == -1) - if (DISPLAY_VER(dev_priv) < 9 || !dev_priv->vbt.psr.enable) + if (!dev_priv->vbt.psr.enable) dev_priv->params.enable_psr = 0; /* Set link_standby x link_off defaults */ - if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) - /* HSW and BDW require workarounds that we don't implement. */ - intel_dp->psr.link_standby = false; - else if (DISPLAY_VER(dev_priv) < 12) + if (DISPLAY_VER(dev_priv) < 12) /* For new platforms up to TGL let's respect VBT back again */ intel_dp->psr.link_standby = dev_priv->vbt.psr.full_link; diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 27cf100d8e28e..b8d3dab283f4d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -826,8 +826,6 @@ struct drm_i915_private { */ u32 gpio_mmio_base; - u32 hsw_psr_mmio_adjust; - /* MMIO base address for MIPI regs */ u32 mipi_mmio_base; diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index c3816f5c69001..19515831a8cbf 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -2093,22 +2093,6 @@ static void ivb_display_irq_handler(struct drm_i915_private *dev_priv, if (de_iir & DE_ERR_INT_IVB) ivb_err_int_handler(dev_priv); - if (de_iir & DE_EDP_PSR_INT_HSW) { - struct intel_encoder *encoder; - - for_each_intel_encoder_with_psr(&dev_priv->drm, encoder) { - struct intel_dp *intel_dp = enc_to_intel_dp(encoder); - - u32 psr_iir = intel_uncore_read(&dev_priv->uncore, - EDP_PSR_IIR); - - intel_psr_irq_handler(intel_dp, psr_iir); - intel_uncore_write(&dev_priv->uncore, - EDP_PSR_IIR, psr_iir); - break; - } - } - if (de_iir & DE_AUX_CHANNEL_A_IVB) dp_aux_irq_handler(dev_priv); diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 692e7385d8187..bbfe5a17af541 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -542,8 +542,6 @@ static const struct intel_device_info vlv_info = { BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \ .display.has_ddi = 1, \ .display.has_fpga_dbg = 1, \ - .display.has_psr = 1, \ - .display.has_psr_hw_tracking = 1, \ .display.has_dp_mst = 1, \ .has_rc6p = 0 /* RC6p removed-by HSW */, \ HSW_PIPE_OFFSETS, \ @@ -647,6 +645,8 @@ static const struct intel_device_info chv_info = { .has_gt_uc = 1, \ .display.has_hdcp = 1, \ .display.has_ipc = 1, \ + .display.has_psr = 1, \ + .display.has_psr_hw_tracking = 1, \ .dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \ .dbuf.slice_mask = BIT(DBUF_S1) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 255801a4cb0f4..1fad640ceb357 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4489,11 +4489,9 @@ enum { * HSW PSR registers are relative to DDIA(_DDI_BUF_CTL_A + 0x800) with just one * instance of it */ -#define _HSW_EDP_PSR_BASE 0x64800 #define _SRD_CTL_A 0x60800 #define _SRD_CTL_EDP 0x6f800 -#define _PSR_ADJ(tran, reg) (_TRANS2(tran, reg) - dev_priv->hsw_psr_mmio_adjust) -#define EDP_PSR_CTL(tran) _MMIO(_PSR_ADJ(tran, _SRD_CTL_A)) +#define EDP_PSR_CTL(tran) _MMIO(_TRANS2(tran, _SRD_CTL_A)) #define EDP_PSR_ENABLE (1 << 31) #define BDW_PSR_SINGLE_FRAME (1 << 30) #define EDP_PSR_RESTORE_PSR_ACTIVE_CTX_MASK (1 << 29) /* SW can't modify */ @@ -4537,22 +4535,13 @@ enum { #define EDP_PSR_POST_EXIT(trans) (0x2 << _EDP_PSR_TRANS_SHIFT(trans)) #define EDP_PSR_PRE_ENTRY(trans) (0x1 << _EDP_PSR_TRANS_SHIFT(trans)) -#define _SRD_AUX_CTL_A 0x60810 -#define _SRD_AUX_CTL_EDP 0x6f810 -#define EDP_PSR_AUX_CTL(tran) _MMIO(_PSR_ADJ(tran, _SRD_AUX_CTL_A)) -#define EDP_PSR_AUX_CTL_TIME_OUT_MASK (3 << 26) -#define EDP_PSR_AUX_CTL_MESSAGE_SIZE_MASK (0x1f << 20) -#define EDP_PSR_AUX_CTL_PRECHARGE_2US_MASK (0xf << 16) -#define EDP_PSR_AUX_CTL_ERROR_INTERRUPT (1 << 11) -#define EDP_PSR_AUX_CTL_BIT_CLOCK_2X_MASK (0x7ff) - #define _SRD_AUX_DATA_A 0x60814 #define _SRD_AUX_DATA_EDP 0x6f814 -#define EDP_PSR_AUX_DATA(tran, i) _MMIO(_PSR_ADJ(tran, _SRD_AUX_DATA_A) + (i) + 4) /* 5 registers */ +#define EDP_PSR_AUX_DATA(tran, i) _MMIO(_TRANS2(tran, _SRD_AUX_DATA_A) + (i) + 4) /* 5 registers */ #define _SRD_STATUS_A 0x60840 #define _SRD_STATUS_EDP 0x6f840 -#define EDP_PSR_STATUS(tran) _MMIO(_PSR_ADJ(tran, _SRD_STATUS_A)) +#define EDP_PSR_STATUS(tran) _MMIO(_TRANS2(tran, _SRD_STATUS_A)) #define EDP_PSR_STATUS_STATE_MASK (7 << 29) #define EDP_PSR_STATUS_STATE_SHIFT 29 #define EDP_PSR_STATUS_STATE_IDLE (0 << 29) @@ -4579,13 +4568,13 @@ enum { #define _SRD_PERF_CNT_A 0x60844 #define _SRD_PERF_CNT_EDP 0x6f844 -#define EDP_PSR_PERF_CNT(tran) _MMIO(_PSR_ADJ(tran, _SRD_PERF_CNT_A)) +#define EDP_PSR_PERF_CNT(tran) _MMIO(_TRANS2(tran, _SRD_PERF_CNT_A)) #define EDP_PSR_PERF_CNT_MASK 0xffffff /* PSR_MASK on SKL+ */ #define _SRD_DEBUG_A 0x60860 #define _SRD_DEBUG_EDP 0x6f860 -#define EDP_PSR_DEBUG(tran) _MMIO(_PSR_ADJ(tran, _SRD_DEBUG_A)) +#define EDP_PSR_DEBUG(tran) _MMIO(_TRANS2(tran, _SRD_DEBUG_A)) #define EDP_PSR_DEBUG_MASK_MAX_SLEEP (1 << 28) #define EDP_PSR_DEBUG_MASK_LPSP (1 << 27) #define EDP_PSR_DEBUG_MASK_MEMUP (1 << 26) From patchwork Mon Sep 5 14:34:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kai-Heng Feng X-Patchwork-Id: 1674314 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=QY7Ertst; dkim-atps=neutral Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MLrdj5cXbz1yhd for ; Tue, 6 Sep 2022 00:35:05 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1oVDBg-0003t8-AC; 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(1-171-245-2.dynamic-ip.hinet.net [1.171.245.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id DE320415A2 for ; Mon, 5 Sep 2022 14:34:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1662388493; bh=9x14TMZh91MmTDUReISUaHwAfP2acPAqCNMEOF1NIfo=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=QY7Ertst2mpwi2oYwdfzn6l2nqg/Eq0aYZZsJPHtmSZ0Xo4gF3DrWIOWFRBqgUo6+ rVp+wc5RGXEl8iezgq7a61ilKAw0MsKKdELTsmcRG8eoXPSBbIYw4xswfAWKdCJgrZ P+nZ90jfahSKZ34IpBPW9/LwI36ifFsCYAuL+l6x1MIcRQDhb0TT9UYKcqAHDmAEZ0 QTjSKUnvt6I66kC4eykineXAqeATWdj7B1xUSbvvvsDunOfnyQKUOnJMd6n/stCUDA jpISIlG15vgjBssn3UG253nFMkAaBfGsbYpuP84vUAK7eAB4JBiM0O88xBKNzL0ia4 xhH+bA/StGVSQ== From: Kai-Heng Feng To: kernel-team@lists.ubuntu.com Subject: [OEM-5.14] [PATCH 05/12] drm/i915/display/psr: Handle plane and pipe restrictions at every page flip Date: Mon, 5 Sep 2022 22:34:31 +0800 Message-Id: <20220905143438.1610667-6-kai.heng.feng@canonical.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220905143438.1610667-1-kai.heng.feng@canonical.com> References: <20220905143438.1610667-1-kai.heng.feng@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: José Roberto de Souza BugLink: https://bugs.launchpad.net/bugs/1983297 PSR2 selective is not supported over rotated and scaled planes. We had the rotation check in intel_psr2_sel_fetch_config_valid() but that code path is only execute when a modeset is needed and those plane parameters can change without a modeset. Pipe selective fetch restrictions are also needed, it could be added in intel_psr_compute_config() but pippe scaling is computed after it is executed, so leaving as is for now. There is no much loss in this approach as it would cause selective fetch to not enabled as for alderlake-P and newer will cause it to switch to PSR1 that will have the same power-savings as do full pipe fetch. Also need to check those restricions in the second for_each_oldnew_intel_plane_in_state() loop because the state could only have a plane that is not affected by those restricitons but the damaged area intersect with planes that has those restrictions, so a full pipe fetch is required. v2: - also handling pipe restrictions BSpec: 55229 Reviewed-by: Gwan-gyeong Mun # v1 Cc: Ville Syrjälä Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210930001409.254817-1-jose.souza@intel.com (backported from commit ac220f5f754b1d2f4a69428f515c3f1b10d1fad0) [khfeng: textual dependency on refactoring codes] Signed-off-by: Kai-Heng Feng --- drivers/gpu/drm/i915/display/intel_psr.c | 65 +++++++++++++++++------- 1 file changed, 46 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 7f8e864c4dfa1..37210c840304e 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -718,11 +718,7 @@ tgl_dc3co_exitline_compute_config(struct intel_dp *intel_dp, static bool intel_psr2_sel_fetch_config_valid(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state) { - struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state); struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - struct intel_plane_state *plane_state; - struct intel_plane *plane; - int i; if (!dev_priv->params.enable_psr2_sel_fetch && intel_dp->psr.debug != I915_PSR_DEBUG_ENABLE_SEL_FETCH) { @@ -737,14 +733,6 @@ static bool intel_psr2_sel_fetch_config_valid(struct intel_dp *intel_dp, return false; } - for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - if (plane_state->uapi.rotation != DRM_MODE_ROTATE_0) { - drm_dbg_kms(&dev_priv->drm, - "PSR2 sel fetch not enabled, plane rotated\n"); - return false; - } - } - /* Wa_14010254185 Wa_14010103792 */ if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B1)) { drm_dbg_kms(&dev_priv->drm, @@ -1541,6 +1529,41 @@ static void intel_psr2_sel_fetch_pipe_alignment(const struct intel_crtc_state *c drm_warn(&dev_priv->drm, "Missing PSR2 sel fetch alignment with DSC\n"); } +/* + * TODO: Not clear how to handle planes with negative position, + * also planes are not updated if they have a negative X + * position so for now doing a full update in this cases + * + * Plane scaling and rotation is not supported by selective fetch and both + * properties can change without a modeset, so need to be check at every + * atomic commmit. + */ +static bool psr2_sel_fetch_plane_state_supported(const struct intel_plane_state *plane_state) +{ + if (plane_state->uapi.dst.y1 < 0 || + plane_state->uapi.dst.x1 < 0 || + plane_state->scaler_id >= 0 || + plane_state->uapi.rotation != DRM_MODE_ROTATE_0) + return false; + + return true; +} + +/* + * Check for pipe properties that is not supported by selective fetch. + * + * TODO: pipe scaling causes a modeset but skl_update_scaler_crtc() is executed + * after intel_psr_compute_config(), so for now keeping PSR2 selective fetch + * enabled and going to the full update path. + */ +static bool psr2_sel_fetch_pipe_state_supported(const struct intel_crtc_state *crtc_state) +{ + if (crtc_state->scaler_state.scaler_id >= 0) + return false; + + return true; +} + int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, struct intel_crtc *crtc) { @@ -1554,6 +1577,11 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, if (!crtc_state->enable_psr2_sel_fetch) return 0; + if (!psr2_sel_fetch_pipe_state_supported(crtc_state)) { + full_update = true; + goto skip_sel_fetch_set_loop; + } + ret = drm_atomic_add_affected_planes(&state->base, &crtc->base); if (ret) return ret; @@ -1577,13 +1605,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, !old_plane_state->uapi.visible) continue; - /* - * TODO: Not clear how to handle planes with negative position, - * also planes are not updated if they have a negative X - * position so for now doing a full update in this cases - */ - if (new_plane_state->uapi.dst.y1 < 0 || - new_plane_state->uapi.dst.x1 < 0) { + if (!psr2_sel_fetch_plane_state_supported(new_plane_state)) { full_update = true; break; } @@ -1667,6 +1689,11 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, if (!drm_rect_intersect(&inter, &new_plane_state->uapi.dst)) continue; + if (!psr2_sel_fetch_plane_state_supported(new_plane_state)) { + full_update = true; + break; + } + sel_fetch_area = &new_plane_state->psr2_sel_fetch_area; sel_fetch_area->y1 = inter.y1 - new_plane_state->uapi.dst.y1; sel_fetch_area->y2 = inter.y2 - new_plane_state->uapi.dst.y1; From patchwork Mon Sep 5 14:34:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kai-Heng Feng X-Patchwork-Id: 1674316 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=QWTRMoGZ; dkim-atps=neutral Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MLrdn2CN5z1yhk for ; Tue, 6 Sep 2022 00:35:09 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1oVDBj-0003xI-JY; Mon, 05 Sep 2022 14:34:59 +0000 Received: from smtp-relay-canonical-1.internal ([10.131.114.174] helo=smtp-relay-canonical-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1oVDBf-0003sj-Oq for kernel-team@lists.ubuntu.com; Mon, 05 Sep 2022 14:34:55 +0000 Received: from HP-EliteBook-840-G7.. (1-171-245-2.dynamic-ip.hinet.net [1.171.245.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id 53D9C41C47 for ; Mon, 5 Sep 2022 14:34:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1662388495; bh=V2B8RlykHzx6ZzXZPdCAnFUrzHoZXw2YQa26hgR+4oQ=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=QWTRMoGZ64bAVugapEcHzoGXssKkl+XSKfBa2YiHhTJD5TlIc3rqD7qWL8vHAS5dA UPT0cCA5adlDxwAKFSm/yxLQ/nfbzFxxDLs5sJ9QMJHlxMhHkcUVHnPr9H8OwnJqI7 wPhgHeRWr7maKWthS1REvUk9D5yV6TKyC9PwG96A0tmABKy3Rq6vjJMKAw/KbaZOPX Tk3nltSU1AfkLY6wLTMCqFZevqwVpmkkfy3ZAzXc7YETeNl4+30mftd7MBAfqVVKVq 2dBzI0CmwA5+lKarQrqfFJ68cSPfYt0JGQujXWpqC8oQo6LMFO5Vs0NY2bOrSGFgFX 93XdiBs2qNSug== From: Kai-Heng Feng To: kernel-team@lists.ubuntu.com Subject: [OEM-5.14] [PATCH 06/12] drm/i915/display/psr: Do full fetch when handling multi-planar formats Date: Mon, 5 Sep 2022 22:34:32 +0800 Message-Id: <20220905143438.1610667-7-kai.heng.feng@canonical.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220905143438.1610667-1-kai.heng.feng@canonical.com> References: <20220905143438.1610667-1-kai.heng.feng@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Gwan-gyeong Mun BugLink: https://bugs.launchpad.net/bugs/1983297 We are still missing the PSR2 selective fetch handling of multi-planar formats but until proper handle is added we can workaround it by doing full frames fetch when state has such formats. Cc: Ville Syrjälä Signed-off-by: Gwan-gyeong Mun Reviewed-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20210930001409.254817-2-jose.souza@intel.com Signed-off-by: José Roberto de Souza (cherry picked from commit 1f61f0655b95d5b89589390e6f83c4a61d9b1e8d) Signed-off-by: Kai-Heng Feng --- drivers/gpu/drm/i915/display/intel_psr.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 37210c840304e..bf746b6423e20 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1534,6 +1534,9 @@ static void intel_psr2_sel_fetch_pipe_alignment(const struct intel_crtc_state *c * also planes are not updated if they have a negative X * position so for now doing a full update in this cases * + * TODO: We are missing multi-planar formats handling, until it is + * implemented it will send full frame updates. + * * Plane scaling and rotation is not supported by selective fetch and both * properties can change without a modeset, so need to be check at every * atomic commmit. @@ -1543,6 +1546,7 @@ static bool psr2_sel_fetch_plane_state_supported(const struct intel_plane_state if (plane_state->uapi.dst.y1 < 0 || plane_state->uapi.dst.x1 < 0 || plane_state->scaler_id >= 0 || + plane_state->hw.fb->format->num_planes > 1 || plane_state->uapi.rotation != DRM_MODE_ROTATE_0) return false; From patchwork Mon Sep 5 14:34:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kai-Heng Feng X-Patchwork-Id: 1674315 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=LNmLX8pa; dkim-atps=neutral Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MLrdn1n0wz1yhd for ; Tue, 6 Sep 2022 00:35:09 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1oVDBj-0003wa-6H; Mon, 05 Sep 2022 14:34:59 +0000 Received: from smtp-relay-canonical-1.internal ([10.131.114.174] helo=smtp-relay-canonical-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1oVDBg-0003tm-Vy for kernel-team@lists.ubuntu.com; Mon, 05 Sep 2022 14:34:56 +0000 Received: from HP-EliteBook-840-G7.. (1-171-245-2.dynamic-ip.hinet.net [1.171.245.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id 00AD5415A2 for ; Mon, 5 Sep 2022 14:34:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1662388496; bh=pERax7d38HdchbPFrwkQJEhXKO5r5ux1hjPATnbaqFg=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=LNmLX8pavdfOAM4jYp1kXk6wiRgQkPrZjM+e3Hrv7vtG0tmX1z+jFIWttcDO8bDxa t72rwTusJXy79SKNV3ZT0KAg7a2sZoYfGBgmdZwaFmqCTAPYT+1AJ6M6bw1Pv/DUGJ FM8G5zjZGGPtAk8cLITIUpCFPybBLSDYVDgkBiU9spklmlxsragwLZ7PWp4bOWrTSU O+q48/Mc8KVdA82tnXs81T1v6RvfBQB9aykisfijaJJaxuxYMw0aR/fJTrydZ+0gTf N8sdKeOB7zksgJ+Eu5zbuUbh9IWdVcgpN+xsDzSaZMnZ4W116qC0Dh3Sk5skApcKfJ UetFhrFs0d/NQ== From: Kai-Heng Feng To: kernel-team@lists.ubuntu.com Subject: [OEM-5.14] [PATCH 07/12] drm/i915/display: Drop unnecessary frontbuffer flushes Date: Mon, 5 Sep 2022 22:34:33 +0800 Message-Id: <20220905143438.1610667-8-kai.heng.feng@canonical.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220905143438.1610667-1-kai.heng.feng@canonical.com> References: <20220905143438.1610667-1-kai.heng.feng@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: José Roberto de Souza BugLink: https://bugs.launchpad.net/bugs/1983297 This unnecessary flushes are hurting power-savings are it causes features like PSR, FBC and DRRS to disable it self to handle frontbuffer rendering, below some explanation of why each removed call is not necessary. The flush in intel_prepare_plane_fb() is not required as framebuffer will be flipped and power-saving features do the proper flip handling in hardware. intel_find_initial_plane_obj() flush is not required because it is only executed during driver load and at this point the power-saving features are not even enabled. And the last one intelfb_create(), is also not required as at this point the fbdev was just allocated, userspace will draw on it what will trigger frontbuffer invalidates and flushes later on. Cc: Ville Syrjälä Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza Reviewed-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20210930001409.254817-3-jose.souza@intel.com (backported from commit 5da579cff38d64d024c1b99bafa3347c0d5fc107) Signed-off-by: Kai-Heng Feng --- drivers/gpu/drm/i915/display/intel_display.c | 3 --- drivers/gpu/drm/i915/display/intel_fbdev.c | 2 -- 2 files changed, 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 4c4a9030cee99..6d426c3313d42 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2020,8 +2020,6 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc, intel_plane_copy_uapi_to_hw_state(intel_state, intel_state, intel_crtc); - intel_frontbuffer_flush(to_intel_frontbuffer(fb), ORIGIN_DIRTYFB); - atomic_or(to_intel_plane(primary)->frontbuffer_bit, &to_intel_frontbuffer(fb)->bits); } @@ -11161,7 +11159,6 @@ intel_prepare_plane_fb(struct drm_plane *_plane, return ret; i915_gem_object_wait_priority(obj, 0, &attr); - i915_gem_object_flush_frontbuffer(obj, ORIGIN_DIRTYFB); if (!new_plane_state->uapi.fence) { /* implicit fencing */ struct dma_fence *fence; diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c index 4af40229f5ec3..366ce244f3eb8 100644 --- a/drivers/gpu/drm/i915/display/intel_fbdev.c +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c @@ -229,8 +229,6 @@ static int intelfb_create(struct drm_fb_helper *helper, goto out_unlock; } - intel_frontbuffer_flush(to_frontbuffer(ifbdev), ORIGIN_DIRTYFB); - info = drm_fb_helper_alloc_fbi(helper); if (IS_ERR(info)) { drm_err(&dev_priv->drm, "Failed to allocate fb_info\n"); From patchwork Mon Sep 5 14:34:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kai-Heng Feng X-Patchwork-Id: 1674317 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=XsT8LiQC; dkim-atps=neutral Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MLrdv1yP3z1yhd for ; Tue, 6 Sep 2022 00:35:15 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1oVDBo-00042U-F8; Mon, 05 Sep 2022 14:35:04 +0000 Received: from smtp-relay-canonical-1.internal ([10.131.114.174] helo=smtp-relay-canonical-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1oVDBk-0003w9-6q for kernel-team@lists.ubuntu.com; Mon, 05 Sep 2022 14:35:00 +0000 Received: from HP-EliteBook-840-G7.. (1-171-245-2.dynamic-ip.hinet.net [1.171.245.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id 656FB415A2 for ; Mon, 5 Sep 2022 14:34:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1662388498; bh=l+So04jwfHeJH5pPu2ap1+k1vwd27eYKqJlI94dX4wk=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=XsT8LiQCzILfxpqK8qz2HvYMY5UhKI4yP1Vpytm9lHGl1S/VzXzZeVsQxzzeYj3ab YFALThzWjxGN02lKDpmU/41eOWlHwYWgcNnHtxxhkqVsBba25hJVSODi1FElLwAwKC dnwSavbl6HpstVAqqTd7jYdejGoHJ19bwvo4lD6hRvBKrEVcRw78a+8S6l4Oae3i2j R8jsTQbR9RT8kkBO0yB+INbAjWg9TTbui4XrVA9MkZ22OEuAvxmLHyRqnBtffn/1Gb D7ok2rmpictGVhft5vDiUQrWdhL4iGa7K0KT0OlRwZQ+XNqqzTy+m2WZcmKzlQh4vu cpE26mrGunXmg== From: Kai-Heng Feng To: kernel-team@lists.ubuntu.com Subject: [OEM-5.14] [PATCH 08/12] drm/i915/display: Handle frontbuffer rendering when PSR2 selective fetch is enabled Date: Mon, 5 Sep 2022 22:34:34 +0800 Message-Id: <20220905143438.1610667-9-kai.heng.feng@canonical.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220905143438.1610667-1-kai.heng.feng@canonical.com> References: <20220905143438.1610667-1-kai.heng.feng@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: José Roberto de Souza BugLink: https://bugs.launchpad.net/bugs/1983297 When PSR2 selective fetch is enabled writes to CURSURFLIVE alone do not causes the panel to be updated when doing frontbuffer rendering. From what I was able to figure from experiments the writes to CURSURFLIVE takes PSR2 from deep sleep but panel is not updated because PSR2_MAN_TRK_CTL has no start and end region set. As we don't have the dirt area from current flush and invalidate API and even if we did userspace could do several draws to frontbuffer and we would need a way to append all the damaged areas of all the draws that need to be part of next frame. So here only programing PSR2_MAN_TRK_CTL to do a single full frame fetch. It is a safe approach as if scanout is in the visible area the single full frame will only be visible for hardware in the next frame because of the double buffering, and if scanout is in vblank area it will be draw in the current frame. No need to disable PSR and wait a few miliseconds to enable it again. Cc: Gwan-gyeong Mun Cc: Ville Syrjälä Signed-off-by: José Roberto de Souza Reviewed-by: Gwan-gyeong Mun Link: https://patchwork.freedesktop.org/patch/msgid/20210930001409.254817-4-jose.souza@intel.com (cherry picked from commit 34ac6b651f39e63da8d0ae0edd2db32fbb1bc02c) Signed-off-by: Kai-Heng Feng --- drivers/gpu/drm/i915/display/intel_psr.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index bf746b6423e20..c91d05dfd5d03 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1399,10 +1399,22 @@ void intel_psr_resume(struct intel_dp *intel_dp) mutex_unlock(&psr->lock); } +static inline u32 man_trk_ctl_single_full_frame_bit_get(struct drm_i915_private *dev_priv) +{ + return IS_ALDERLAKE_P(dev_priv) ? + ADLP_PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME : + PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME; +} + static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + if (intel_dp->psr.psr2_sel_fetch_enabled) + intel_de_rmw(dev_priv, + PSR2_MAN_TRK_CTL(intel_dp->psr.transcoder), 0, + man_trk_ctl_single_full_frame_bit_get(dev_priv)); + /* * Display WA #0884: skl+ * This documented WA for bxt can be safely applied @@ -1411,6 +1423,10 @@ static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp) * Workaround tells us to write 0 to CUR_SURFLIVE_A, * but it makes more sense write to the current active * pipe. + * + * This workaround do not exist for platforms with display 10 or newer + * but testing proved that it works for up display 13, for newer + * than that testing will be needed. */ intel_de_write(dev_priv, CURSURFLIVE(intel_dp->psr.pipe), 0); } From patchwork Mon Sep 5 14:34:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kai-Heng Feng X-Patchwork-Id: 1674318 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=b6ciff7s; dkim-atps=neutral Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MLrdy38p5z1yhd for ; Tue, 6 Sep 2022 00:35:18 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1oVDBs-0004A3-LD; Mon, 05 Sep 2022 14:35:08 +0000 Received: from smtp-relay-canonical-1.internal ([10.131.114.174] helo=smtp-relay-canonical-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1oVDBl-0003yV-05 for kernel-team@lists.ubuntu.com; Mon, 05 Sep 2022 14:35:01 +0000 Received: from HP-EliteBook-840-G7.. (1-171-245-2.dynamic-ip.hinet.net [1.171.245.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id 0A2E941C47 for ; Mon, 5 Sep 2022 14:34:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1662388499; bh=epmL09kZdR1GAG3pc6q9S6AeS6RJzdZZdFXFW0TtQSQ=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=b6ciff7sRKHhGw2+R3DWHl65I2+YD1EdVb998qJLl3ueY8y/y5c3bRal4zUbjujyK OxJQssnRxCcSu9ZLBlV1qicOf2YcYb1uTB49TKjRYdFAN3njDfssqsjVAiKoi91V50 k+j1PB59J2xZ8v5cqnXfLc2cwpE5E4jseqQZ3eUvAqGCj2JSmfgTeqzS0dYRgw0ghE nQU/onAwYLHKq8KgErMycEB6+x4nGrTRcwfjasHACFjZ8NRCIiwiUM2xKs1hedvoFb yq+cvs9WB3tv7uL6LpSwI+Adx1psV6elVtqPfSD+wp2TCUUAaV0nMPQ1sttzmw8LnA U5tuJgnEPkHRQ== From: Kai-Heng Feng To: kernel-team@lists.ubuntu.com Subject: [OEM-5.14] [PATCH 09/12] drm/i915/display: Fix glitches when moving cursor with PSR2 selective fetch enabled Date: Mon, 5 Sep 2022 22:34:35 +0800 Message-Id: <20220905143438.1610667-10-kai.heng.feng@canonical.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220905143438.1610667-1-kai.heng.feng@canonical.com> References: <20220905143438.1610667-1-kai.heng.feng@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: José Roberto de Souza BugLink: https://bugs.launchpad.net/bugs/1983297 Legacy cursor APIs are handled by intel_legacy_cursor_update(), that calls drm_atomic_helper_update_plane() when going through the slow/atomic path to update cursor, what was the case for PSR2 selective fetch. drm_atomic_helper_update_plane() sets drm_atomic_state->legacy_cursor_update to true when updating the cursor plane, to allow several cursor updates to happen within the same frame, as userspace does that. If drivers waited for a vblank increment at the end of every cursor movement that would cause a visible lag in the cursor. But this optimization do not properly work with PSR2 selective fetch dirt area calculation, for example if within a single frame the cursor had 3 moves the final dirt area programmed to PSR2_MAN_TRK_CTL would be based in the second movement as old state and third movement as new state, not updating the area where cursor was in the first state. So here switching back to the fast path approach in intel_legacy_cursor_update() and handling cursor movements as frontbuffer rendering(psr_force_hw_tracking_exit()), that is not the most optimal for power-savings but is the solution that we have until mailbox style updates is implemented. Also removing the cursor workaround as not it is properly undestand the issue and is know that it will never cover all the cases. Cc: Ville Syrjälä Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza Acked-by: Ville Syrjälä Reviewed-by: Gwan-gyeong Mun Link: https://patchwork.freedesktop.org/patch/msgid/20210930001409.254817-5-jose.souza@intel.com (backported from commit ef39826c12b409010b8fb29fc47e2586cd2635ee) Signed-off-by: Kai-Heng Feng --- drivers/gpu/drm/i915/display/intel_cursor.c | 2 +- drivers/gpu/drm/i915/display/intel_fbc.c | 4 +-- .../gpu/drm/i915/display/intel_frontbuffer.h | 1 + drivers/gpu/drm/i915/display/intel_psr.c | 34 ++++++++----------- 4 files changed, 19 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c index 44bcdb452167c..22fc11e369d1e 100644 --- a/drivers/gpu/drm/i915/display/intel_cursor.c +++ b/drivers/gpu/drm/i915/display/intel_cursor.c @@ -692,7 +692,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane, goto out_free; intel_frontbuffer_flush(to_intel_frontbuffer(new_plane_state->hw.fb), - ORIGIN_FLIP); + ORIGIN_CURSOR_UPDATE); intel_frontbuffer_track(to_intel_frontbuffer(old_plane_state->hw.fb), to_intel_frontbuffer(new_plane_state->hw.fb), plane->frontbuffer_bit); diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index d1c2f7c44954f..448381331d51a 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -1136,7 +1136,7 @@ void intel_fbc_invalidate(struct drm_i915_private *dev_priv, if (!HAS_FBC(dev_priv)) return; - if (origin == ORIGIN_FLIP) + if (origin == ORIGIN_FLIP || origin == ORIGIN_CURSOR_UPDATE) return; mutex_lock(&fbc->lock); @@ -1161,7 +1161,7 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv, fbc->busy_bits &= ~frontbuffer_bits; - if (origin == ORIGIN_FLIP) + if (origin == ORIGIN_FLIP || origin == ORIGIN_CURSOR_UPDATE) goto out; if (!fbc->busy_bits && fbc->crtc && diff --git a/drivers/gpu/drm/i915/display/intel_frontbuffer.h b/drivers/gpu/drm/i915/display/intel_frontbuffer.h index 4b977c1e4d52b..a88441edc8f94 100644 --- a/drivers/gpu/drm/i915/display/intel_frontbuffer.h +++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.h @@ -37,6 +37,7 @@ enum fb_op_origin { ORIGIN_CS, ORIGIN_FLIP, ORIGIN_DIRTYFB, + ORIGIN_CURSOR_UPDATE, }; struct intel_frontbuffer { diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index c91d05dfd5d03..3393eee06d64b 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2045,20 +2045,16 @@ void intel_psr_invalidate(struct drm_i915_private *dev_priv, /* * When we will be completely rely on PSR2 S/W tracking in future, * intel_psr_flush() will invalidate and flush the PSR for ORIGIN_FLIP - * event also therefore tgl_dc3co_flush() require to be changed + * event also therefore tgl_dc3co_flush_locked() require to be changed * accordingly in future. */ static void -tgl_dc3co_flush(struct intel_dp *intel_dp, unsigned int frontbuffer_bits, - enum fb_op_origin origin) +tgl_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits, + enum fb_op_origin origin) { - mutex_lock(&intel_dp->psr.lock); - - if (!intel_dp->psr.dc3co_exitline) - goto unlock; - - if (!intel_dp->psr.psr2_enabled || !intel_dp->psr.active) - goto unlock; + if (!intel_dp->psr.dc3co_exitline || !intel_dp->psr.psr2_enabled || + !intel_dp->psr.active) + return; /* * At every frontbuffer flush flip event modified delay of delayed work, @@ -2066,14 +2062,11 @@ tgl_dc3co_flush(struct intel_dp *intel_dp, unsigned int frontbuffer_bits, */ if (!(frontbuffer_bits & INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe))) - goto unlock; + return; tgl_psr2_enable_dc3co(intel_dp); mod_delayed_work(system_wq, &intel_dp->psr.dc3co_work, intel_dp->psr.dc3co_exit_delay); - -unlock: - mutex_unlock(&intel_dp->psr.lock); } /** @@ -2098,11 +2091,6 @@ void intel_psr_flush(struct drm_i915_private *dev_priv, unsigned int pipe_frontbuffer_bits = frontbuffer_bits; struct intel_dp *intel_dp = enc_to_intel_dp(encoder); - if (origin == ORIGIN_FLIP) { - tgl_dc3co_flush(intel_dp, frontbuffer_bits, origin); - continue; - } - mutex_lock(&intel_dp->psr.lock); if (!intel_dp->psr.enabled) { mutex_unlock(&intel_dp->psr.lock); @@ -2123,6 +2111,14 @@ void intel_psr_flush(struct drm_i915_private *dev_priv, continue; } + if (origin == ORIGIN_FLIP || + (origin == ORIGIN_CURSOR_UPDATE && + !intel_dp->psr.psr2_sel_fetch_enabled)) { + tgl_dc3co_flush_locked(intel_dp, frontbuffer_bits, origin); + mutex_unlock(&intel_dp->psr.lock); + continue; + } + /* By definition flush = invalidate + flush */ if (pipe_frontbuffer_bits) psr_force_hw_tracking_exit(intel_dp); From patchwork Mon Sep 5 14:34:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kai-Heng Feng X-Patchwork-Id: 1674319 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=O3Zz5aUT; dkim-atps=neutral Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MLrf217Mlz1yhd for ; Tue, 6 Sep 2022 00:35:22 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1oVDBw-0004G5-2s; Mon, 05 Sep 2022 14:35:12 +0000 Received: from smtp-relay-canonical-1.internal ([10.131.114.174] helo=smtp-relay-canonical-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1oVDBr-00042M-Ki for kernel-team@lists.ubuntu.com; Mon, 05 Sep 2022 14:35:07 +0000 Received: from HP-EliteBook-840-G7.. (1-171-245-2.dynamic-ip.hinet.net [1.171.245.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id DB30E415A2 for ; Mon, 5 Sep 2022 14:35:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1662388501; bh=ESfnthUIfPsIXCTIkRET/ULudFkKTMmuVVeCtlQCEPg=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=O3Zz5aUTD0WRRAp2eRTjah87LNSlbeTbdhaBjuaKMF50C/b7Cglu7c+emLHYGQjoO yhwRpfKZ3FSpzVnZ6Uz8V9aeIfegEjxfq2/zDjjuv82pzwHQuRZehW7S7pb2JX8Uv1 0D343tcQYGD011JYXny/0Ivv8FwETnUbf5Vd3afvuBKLtixwg8tjpMnKtGrFHHcPAD 3b3x0zmqElCQFrObENk81x+wDqnPccm2+qp0/g+uhkJeGKJIrzPc+Zf1C+xbLqkArS G4FJFZ7QRVLMTN7KqJV7iIWQPtIr0By2zOXzCTcCWytKTmI/3B8it3ZoH8YPmhv9D1 wduO7ZaUiAIHQ== From: Kai-Heng Feng To: kernel-team@lists.ubuntu.com Subject: [OEM-5.14] [PATCH 10/12] drm/i915/display/adlp: Optimize PSR2 power-savings in corner cases Date: Mon, 5 Sep 2022 22:34:36 +0800 Message-Id: <20220905143438.1610667-11-kai.heng.feng@canonical.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220905143438.1610667-1-kai.heng.feng@canonical.com> References: <20220905143438.1610667-1-kai.heng.feng@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: José Roberto de Souza BugLink: https://bugs.launchpad.net/bugs/1983297 The Wa_14014971508 is required to fix scanout when a feature that i915 do not support is enabled and this feature is not planned to be enabled for adlp. Keeping this workaround enabled can badly hurt power-savings when a full frame fetch is required(see psr2_sel_fetch_plane_state_supported() and psr2_sel_fetch_pipe_state_supported()). Here a example that could badly hurt power-savings, userspace does a page flip to a rotated plane, so CONTINUOS_FULL_FRAME set. But then for a whole 30 seconds nothing in the screen requires updates but because CONTINUOS_FULL_FRAME is set, it will not go into DC5/DC6. Reverting Wa_14014971508 fixes that, as only a single frame will be sent and then display can go to DC5/DC6 for those 30 seconds of idleness. BSpec: 54369 Cc: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza Reviewed-by: Gwan-gyeong Mun Link: https://patchwork.freedesktop.org/patch/msgid/20210930001409.254817-6-jose.souza@intel.com (backported from commit 1163649a047995c77527023f192d00ae1971965b) Signed-off-by: Kai-Heng Feng --- drivers/gpu/drm/i915/display/intel_psr.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 3393eee06d64b..219f9b5790209 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1490,11 +1490,11 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state, u32 val = PSR2_MAN_TRK_CTL_ENABLE; if (full_update) { - if (IS_ALDERLAKE_P(dev_priv)) - val |= ADLP_PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME; - else - val |= PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME; - + /* + * Not applying Wa_14014971508:adlp as we do not support the + * feature that requires this workaround. + */ + val |= man_trk_ctl_single_full_frame_bit_get(dev_priv); goto exit; } From patchwork Mon Sep 5 14:34:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kai-Heng Feng X-Patchwork-Id: 1674320 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=CAXek674; dkim-atps=neutral Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MLrf308hyz1yhd for ; Tue, 6 Sep 2022 00:35:23 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1oVDBx-0004JN-LQ; Mon, 05 Sep 2022 14:35:13 +0000 Received: from smtp-relay-canonical-1.internal ([10.131.114.174] helo=smtp-relay-canonical-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1oVDBt-0004BA-Bu for kernel-team@lists.ubuntu.com; Mon, 05 Sep 2022 14:35:09 +0000 Received: from HP-EliteBook-840-G7.. (1-171-245-2.dynamic-ip.hinet.net [1.171.245.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id 3DB0141C47 for ; Mon, 5 Sep 2022 14:35:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1662388504; bh=Z0F60frZ24KFdvf0tu3r5EbbeET5nSUcmwFrDQuK6Qo=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=CAXek674Sm64NkEAJQeMijyyflhPPf2tuhD01wDIy7k/ACC3Erp/MWUatoRvp1ugC g1YWTVbE/9b8GplFuMIUCNZuwdijtG4nuwEPVASfRRAwClJA+WS/S1zlINtlZbz/Ly jMl7iL/PNcNJyO0rey41AJgWQMZeq/V0YYEIG/vRRAbCzAwtlOQ8oFSqTufnoJUv21 Bjqhe+GSxGvT92mQPZnUw5GwTl11CMivW50P6PsKpuF6ZL3EGbYjaOWbUImAi9NaDu 4oxiLwv8YvHF/14ZS48jGdVNA6emXnISmybSHJ3ZR0pvXIc9/FL9FvV6WDbdug/VuD tWd/4a4psJR6A== From: Kai-Heng Feng To: kernel-team@lists.ubuntu.com Subject: [OEM-5.14] [PATCH 11/12] drm/i915/display/adlp: Allow PSR2 to be enabled Date: Mon, 5 Sep 2022 22:34:37 +0800 Message-Id: <20220905143438.1610667-12-kai.heng.feng@canonical.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220905143438.1610667-1-kai.heng.feng@canonical.com> References: <20220905143438.1610667-1-kai.heng.feng@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: José Roberto de Souza BugLink: https://bugs.launchpad.net/bugs/1983297 With all the recent fixes PSR2 is properly working in Alderlake-P but due to some issues that don't have software workarounds it will not be supported in display steppings older than B0. Even with this patch PSR2 will no be enabled by default in ADL-P, it still requires enable_psr2_sel_fetch to be set to true, what some of our tests does. Cc: Gwan-gyeong Mun Reviewed-by: Gwan-gyeong Mun Signed-off-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210930001409.254817-7-jose.souza@intel.com (cherry picked from commit de572e881b9d7f19da74981dd320699ea796e5a3) Signed-off-by: Kai-Heng Feng --- drivers/gpu/drm/i915/display/intel_psr.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 219f9b5790209..619bc6027aaac 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -827,12 +827,8 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, return false; } - /* - * We are missing the implementation of some workarounds to enabled PSR2 - * in Alderlake_P, until ready PSR2 should be kept disabled. - */ - if (IS_ALDERLAKE_P(dev_priv)) { - drm_dbg_kms(&dev_priv->drm, "PSR2 is missing the implementation of workarounds\n"); + if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0)) { + drm_dbg_kms(&dev_priv->drm, "PSR2 not completely functional in this stepping\n"); return false; } From patchwork Mon Sep 5 14:34:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kai-Heng Feng X-Patchwork-Id: 1674321 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=lxSsgxb+; dkim-atps=neutral Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4MLrf54SgLz1yhd for ; Tue, 6 Sep 2022 00:35:25 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1oVDC2-0004RA-IF; Mon, 05 Sep 2022 14:35:18 +0000 Received: from smtp-relay-canonical-1.internal ([10.131.114.174] helo=smtp-relay-canonical-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1oVDBv-0004DQ-Ki for kernel-team@lists.ubuntu.com; Mon, 05 Sep 2022 14:35:11 +0000 Received: from HP-EliteBook-840-G7.. (1-171-245-2.dynamic-ip.hinet.net [1.171.245.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-canonical-1.canonical.com (Postfix) with ESMTPSA id 610553F391 for ; Mon, 5 Sep 2022 14:35:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1662388510; bh=1nuaz1onQSdKG4F/XNCC9r+a8Lwx5Z/3dSORoBvXqo0=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=lxSsgxb+Dl4HIs8EFB1HpSmy7u76KLOBaNHp+P/adsyC9If/ZvHxDjWHjgou/jlzW SS/041/p+bwgC3P5FhfmrfKNMRjZzI0hFsOE8M6bmliTyVTiftydJMUNKCh22MVFKq dLrrGNWhTWysNogcbmuPgzkGVHYNgkCMv+gLAPOtq4sZtHp6F7sqE39UNv2pESpWLi UxoC6r8b1aiMhDfR4+m4ewFDkwgIbRzOa/3GfWvUK831FMV6vjdjY/BiLhsAEaRbWa n6TrHWc0jjZ807a7X1qS/lSvbULJbdV7rCySoJv9kKerhZJXaEd8e7K/TXxF3WWPqi 0+akGUJB6V5Lg== From: Kai-Heng Feng To: kernel-team@lists.ubuntu.com Subject: [OEM-5.14] [PATCH 12/12] UBUNTU: SAUCE: drm/i915/display/psr: Reinstate fix for TGL + AUO panel flicker Date: Mon, 5 Sep 2022 22:34:38 +0800 Message-Id: <20220905143438.1610667-13-kai.heng.feng@canonical.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220905143438.1610667-1-kai.heng.feng@canonical.com> References: <20220905143438.1610667-1-kai.heng.feng@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" BugLink: https://bugs.launchpad.net/bugs/1983297 Enabling PSR2 selective fetch regressed ADL + BOE panel [1], so it's more plausible to only enable the feature on TGL + specific AUO panel. However, commits from upstream stable make the quirk [2] stop working, so this time full fix for PSR2 selective fetch is backported. 5.17+ kernels don't have this issue, only Jammy 5.15 and OEM 5.14 need this quirk to be applied. [1] https://bugs.launchpad.net/bugs/1979626 [2] https://bugs.launchpad.net/bugs/1980087 Signed-off-by: Kai-Heng Feng --- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_dp.h | 2 ++ drivers/gpu/drm/i915/display/intel_psr.c | 11 +++++++++++ 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index bc3c057544666..73cf4d01daa95 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4034,7 +4034,7 @@ bool intel_digital_port_connected(struct intel_encoder *encoder) return is_connected; } -static struct edid * +struct edid * intel_dp_get_edid(struct intel_dp *intel_dp) { struct intel_connector *intel_connector = intel_dp->attached_connector; diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index 2121aaa9b8db0..0746dc7f7ac4b 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -107,6 +107,8 @@ void intel_read_dp_sdp(struct intel_encoder *encoder, unsigned int type); bool intel_digital_port_connected(struct intel_encoder *encoder); +struct edid *intel_dp_get_edid(struct intel_dp *intel_dp); + static inline unsigned int intel_dp_unused_lane_mask(int lane_count) { return ~((1 << lane_count) - 1) & 0xf; diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 619bc6027aaac..456fbf445ab93 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -719,6 +719,17 @@ static bool intel_psr2_sel_fetch_config_valid(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + struct edid *edid; + + edid = intel_dp_get_edid(intel_dp); + + if (edid->mfg_id[0] == 0x06 && edid->mfg_id[1] == 0xaf && + edid->prod_code[0] == 0x8c && edid->prod_code[1] == 0xcd && + IS_TIGERLAKE(dev_priv)) { + drm_info_once(&dev_priv->drm, + "PSR2 sel fetch enabled for TGL + AUO panel\n"); + return crtc_state->enable_psr2_sel_fetch = true; + } if (!dev_priv->params.enable_psr2_sel_fetch && intel_dp->psr.debug != I915_PSR_DEBUG_ENABLE_SEL_FETCH) {