From patchwork Fri Mar 2 19:21:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 880822 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="joPD4/RK"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3ztKLt5mrXz9s3L for ; Sat, 3 Mar 2018 06:37:10 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1428523AbeCBTVo (ORCPT ); Fri, 2 Mar 2018 14:21:44 -0500 Received: from mail-wm0-f67.google.com ([74.125.82.67]:54549 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1427234AbeCBTVm (ORCPT ); Fri, 2 Mar 2018 14:21:42 -0500 Received: by mail-wm0-f67.google.com with SMTP id z81so5083186wmb.4 for ; Fri, 02 Mar 2018 11:21:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=irsbNReWVUsQogcKbsBZ+bTfUX89lJLEdK3AscHrdHY=; b=joPD4/RKzO2qxgAfEJEc3dScXPcdTvr2GEIt2uIHCA1Gv2sA4vGQZKwYhXkN7yfKQE RajxD6Ju788sylrysB9XFe9MHTFBgEUDBRM0218SczxTnHFGcBFoEp2KnfzCM78JyVTa uVDkbUDe0tcKVEfgQHeC4oiEq3HBW22qOIGBoNPDE/IZxwxDkFPv6iB0qusXqHYHyMnT 3DAyKvHelU8D4qEfxVJ/XKm0PpUdzlAtyoVnZ9mBhM05+sWV8vil3SUp1far1i1NHgxM dMbSMP0AzbTfUOLZqWPKFapRKNaC9Z3h+QdSxO2BsJUg8DctuS5lX7JAOhs+w8yvBa+u IrfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:in-reply-to:references; bh=irsbNReWVUsQogcKbsBZ+bTfUX89lJLEdK3AscHrdHY=; b=qOo2gHLRpjPEUwa9WR+q+7LFUBwnXgh4usSBvYc21bWesyObiwe8H+h8WO3L5MeM4T qseFWtH0EKTtYpI/hHS4LEOwy9GvOooqeuaIc8IG4WAhNWxgOQQU+BNNC4OlA4o5Gmkl RS00FlDfv72wwyXveyM7C7QJGJGmBhgG4IiVCKA1Yct1Ud9Ue2xuIEDBK1xdVmJ5ye4g E+osHKXoJE2E+P0LXx5uVnQdanchccPpbCLoEem8AWWoZoE9hWojfKvXHx3Jm6V/Qb4X 7DxXKt/GXl5qp/YCVRCoJlnc/VsMvFgyGOT7IliAPAcF5BcY4k0fJJBJYZw4srfvFXSI zHKw== X-Gm-Message-State: AElRT7FENPMe+GGxnihlfzyOds1Xi/mBvi6W4z4ikJ3VbbLcHgqayNPW uoL/ydbSjLoq8/gR1/ja/m3fJ1uT X-Google-Smtp-Source: AG47ELtileVNRvPunuAONbb0RSl/diMbokII7wYsylSKRARbm7fuVEmVdNJjmddBv3YbMlwC8NTGow== X-Received: by 10.28.97.7 with SMTP id v7mr2241964wmb.154.1520018500706; Fri, 02 Mar 2018 11:21:40 -0800 (PST) Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) by smtp.gmail.com with ESMTPSA id c78sm2107835wmd.45.2018.03.02.11.21.39 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 02 Mar 2018 11:21:40 -0800 (PST) From: Michal Simek To: devicetree@vger.kernel.org Cc: monstr@monstr.eu, Steffen Trumtrar , linux-kernel@vger.kernel.org, Peter Crosthwaite , Rob Herring , Rob Herring , Mark Rutland , Josh Cartwright , Russell King , linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/5] arm: zynq: Add Xilinx cc108 board Date: Fri, 2 Mar 2018 20:21:33 +0100 Message-Id: X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The board contains 7z010 with 512MB memory, ethernet, qspi, uart, usbs and sd. But board is not supporting booting from sd card. Signed-off-by: Michal Simek Reviewed-by: Rob Herring --- Changes in v3: None Changes in v2: - Record compatible string to xilinx.txt Documentation/devicetree/bindings/arm/xilinx.txt | 5 ++ arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/zynq-cc108.dts | 75 ++++++++++++++++++++++++ 3 files changed, 81 insertions(+) create mode 100644 arch/arm/boot/dts/zynq-cc108.dts diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt b/Documentation/devicetree/bindings/arm/xilinx.txt index 549e70a022cb..425c74fcc560 100644 --- a/Documentation/devicetree/bindings/arm/xilinx.txt +++ b/Documentation/devicetree/bindings/arm/xilinx.txt @@ -6,6 +6,11 @@ shall have the following properties. Required root node properties: - compatible = "xlnx,zynq-7000"; +Additional compatible strings: + +- Xilinx internal board cc108 + "xlnx,zynq-cc108" + --------------------------------------------------------------- Xilinx Zynq UltraScale+ MPSoC Platforms Device Tree Bindings diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index ade7a38543dc..c6810e84d4d7 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1062,6 +1062,7 @@ dtb-$(CONFIG_ARCH_VT8500) += \ wm8750-apc8750.dtb \ wm8850-w70v2.dtb dtb-$(CONFIG_ARCH_ZYNQ) += \ + zynq-cc108.dtb \ zynq-microzed.dtb \ zynq-parallella.dtb \ zynq-zc702.dtb \ diff --git a/arch/arm/boot/dts/zynq-cc108.dts b/arch/arm/boot/dts/zynq-cc108.dts new file mode 100644 index 000000000000..1a0f631c1d8d --- /dev/null +++ b/arch/arm/boot/dts/zynq-cc108.dts @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx CC108 board DTS + * + * (C) Copyright 2007-2018 Xilinx, Inc. + * (C) Copyright 2007-2013 Michal Simek + * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd + * + * Michal SIMEK + */ +/dts-v1/; +/include/ "zynq-7000.dtsi" + +/ { + compatible = "xlnx,zynq-cc108", "xlnx,zynq-7000"; + model = "Xilinx Zynq"; + + aliases { + ethernet0 = &gem0; + serial0 = &uart0; + }; + + chosen { + bootargs = ""; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x20000000>; + }; + + usb_phy0: phy0 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; + + usb_phy1: phy1 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; +}; + +&gem0 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy>; + + ethernet_phy: ethernet-phy@1 { + reg = <1>; + device_type = "ethernet-phy"; + }; +}; + +&sdhci1 { + status = "okay"; + broken-cd ; + wp-inverted ; +}; + +&uart0 { + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; + usb-phy = <&usb_phy0>; +}; + +&usb1 { + status = "okay"; + dr_mode = "host"; + usb-phy = <&usb_phy1>; +}; From patchwork Fri Mar 2 19:21:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 880823 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id s21sm5965765wra.45.2018.03.02.11.21.41 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 02 Mar 2018 11:21:41 -0800 (PST) From: Michal Simek To: devicetree@vger.kernel.org Cc: monstr@monstr.eu, Steffen Trumtrar , linux-kernel@vger.kernel.org, Peter Crosthwaite , Rob Herring , Rob Herring , Mark Rutland , Josh Cartwright , Russell King , linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 2/5] arm: zynq: Add support for Xilinx zc770 xm010 dc1 board Date: Fri, 2 Mar 2018 20:21:34 +0100 Message-Id: <44eba6a11ccc653a07b8c44640cecb78e711a2be.1520018484.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org zc770 is based board which is extended by FMC/DC cards for SoC validation. FMCs/DCs are supposed to cover all SoC configurations. FMC/DC contains ethernet port, can, i2c, sd, qspi, spi, uart and usb. Signed-off-by: Michal Simek Reviewed-by: Rob Herring --- Changes in v3: - Fix partition for flash Changes in v2: - Record compatible string to xilinx.txt Documentation/devicetree/bindings/arm/xilinx.txt | 3 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/zynq-zc770-xm010.dts | 95 ++++++++++++++++++++++++ 3 files changed, 99 insertions(+) create mode 100644 arch/arm/boot/dts/zynq-zc770-xm010.dts diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt b/Documentation/devicetree/bindings/arm/xilinx.txt index 425c74fcc560..019e69037d42 100644 --- a/Documentation/devicetree/bindings/arm/xilinx.txt +++ b/Documentation/devicetree/bindings/arm/xilinx.txt @@ -11,6 +11,9 @@ Additional compatible strings: - Xilinx internal board cc108 "xlnx,zynq-cc108" +- Xilinx internal board zc770 with different FMC cards + "xlnx,zynq-zc770-xm010" + --------------------------------------------------------------- Xilinx Zynq UltraScale+ MPSoC Platforms Device Tree Bindings diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index c6810e84d4d7..be9ffae2a1ec 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1067,6 +1067,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-parallella.dtb \ zynq-zc702.dtb \ zynq-zc706.dtb \ + zynq-zc770-xm010.dtb \ zynq-zed.dtb \ zynq-zybo.dtb dtb-$(CONFIG_MACH_ARMADA_370) += \ diff --git a/arch/arm/boot/dts/zynq-zc770-xm010.dts b/arch/arm/boot/dts/zynq-zc770-xm010.dts new file mode 100644 index 000000000000..6884f1ad66b7 --- /dev/null +++ b/arch/arm/boot/dts/zynq-zc770-xm010.dts @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx ZC770 XM010 board DTS + * + * Copyright (C) 2013-2018 Xilinx, Inc. + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000"; + model = "Xilinx Zynq"; + + aliases { + ethernet0 = &gem0; + i2c0 = &i2c0; + serial0 = &uart1; + spi1 = &spi1; + }; + + chosen { + bootargs = ""; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + usb_phy0: phy0 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; +}; + +&can0 { + status = "okay"; +}; + +&gem0 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy>; + + ethernet_phy: ethernet-phy@7 { + reg = <7>; + device_type = "ethernet-phy"; + }; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + + eeprom: eeprom@52 { + compatible = "atmel,24c02"; + reg = <0x52>; + }; + +}; + +&sdhci0 { + status = "okay"; +}; + +&spi1 { + status = "okay"; + num-cs = <4>; + is-decoded-cs = <0>; + flash@0 { + compatible = "sst25wf080", "jedec,spi-nor"; + reg = <1>; + spi-max-frequency = <1000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "data"; + reg = <0x0 0x100000>; + }; + }; + }; +}; + +&uart1 { + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; + usb-phy = <&usb_phy0>; +}; From patchwork Fri Mar 2 19:21:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 880820 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="DmNmJEoA"; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id y145sm1665273wmd.43.2018.03.02.11.21.42 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 02 Mar 2018 11:21:43 -0800 (PST) From: Michal Simek To: devicetree@vger.kernel.org Cc: monstr@monstr.eu, Steffen Trumtrar , linux-kernel@vger.kernel.org, Peter Crosthwaite , Rob Herring , Rob Herring , Mark Rutland , Josh Cartwright , Russell King , linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 3/5] arm: zynq: Add support for Xilinx zc770 xm011 dc2 board Date: Fri, 2 Mar 2018 20:21:35 +0100 Message-Id: <1723ff499e33d7d6b2dd677d78c83bf4fe98d8e7.1520018484.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org zc770 is based board which is extended by FMC/DC cards for SoC validation. FMCs/DCs are supposed to cover all SoC configurations. FMC/DC contains can, i2c, nand uart, spi and usb. Signed-off-by: Michal Simek Reviewed-by: Rob Herring --- Changes in v3: None Changes in v2: - Record compatible string to xilinx.txt Documentation/devicetree/bindings/arm/xilinx.txt | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/zynq-zc770-xm011.dts | 64 ++++++++++++++++++++++++ 3 files changed, 66 insertions(+) create mode 100644 arch/arm/boot/dts/zynq-zc770-xm011.dts diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt b/Documentation/devicetree/bindings/arm/xilinx.txt index 019e69037d42..80139a7cfcdc 100644 --- a/Documentation/devicetree/bindings/arm/xilinx.txt +++ b/Documentation/devicetree/bindings/arm/xilinx.txt @@ -13,6 +13,7 @@ Additional compatible strings: - Xilinx internal board zc770 with different FMC cards "xlnx,zynq-zc770-xm010" + "xlnx,zynq-zc770-xm011" --------------------------------------------------------------- diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index be9ffae2a1ec..801a46a88e93 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1068,6 +1068,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-zc702.dtb \ zynq-zc706.dtb \ zynq-zc770-xm010.dtb \ + zynq-zc770-xm011.dtb \ zynq-zed.dtb \ zynq-zybo.dtb dtb-$(CONFIG_MACH_ARMADA_370) += \ diff --git a/arch/arm/boot/dts/zynq-zc770-xm011.dts b/arch/arm/boot/dts/zynq-zc770-xm011.dts new file mode 100644 index 000000000000..b78883cee96a --- /dev/null +++ b/arch/arm/boot/dts/zynq-zc770-xm011.dts @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx ZC770 XM013 board DTS + * + * Copyright (C) 2013-2018 Xilinx, Inc. + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + compatible = "xlnx,zynq-zc770-xm011", "xlnx,zynq-7000"; + model = "Xilinx Zynq"; + + aliases { + i2c0 = &i2c1; + serial0 = &uart1; + spi0 = &spi0; + }; + + chosen { + bootargs = ""; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + usb_phy1: phy1 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; +}; + +&can0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + + eeprom: eeprom@52 { + compatible = "atmel,24c02"; + reg = <0x52>; + }; +}; + +&spi0 { + status = "okay"; + num-cs = <4>; + is-decoded-cs = <0>; +}; + +&uart1 { + status = "okay"; +}; + +&usb1 { + status = "okay"; + dr_mode = "host"; + usb-phy = <&usb_phy1>; +}; From patchwork Fri Mar 2 19:21:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 880821 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id q11sm7970915wrb.74.2018.03.02.11.21.44 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 02 Mar 2018 11:21:44 -0800 (PST) From: Michal Simek To: devicetree@vger.kernel.org Cc: monstr@monstr.eu, Steffen Trumtrar , linux-kernel@vger.kernel.org, Peter Crosthwaite , Rob Herring , Rob Herring , Mark Rutland , Josh Cartwright , Russell King , linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 4/5] arm: zynq: Add support for Xilinx zc770 xm012 dc3 board Date: Fri, 2 Mar 2018 20:21:36 +0100 Message-Id: <5f7541dd383dea947a5d74230c58b52cedab4075.1520018484.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org zc770 is based board which is extended by FMC/DC cards for SoC validation. FMCs/DCs are supposed to cover all SoC configurations. FMC/DC contains can, 2x i2c, nor flash, spi and uart. Signed-off-by: Michal Simek Reviewed-by: Rob Herring --- Changes in v3: None Changes in v2: - Record compatible string to xilinx.txt Documentation/devicetree/bindings/arm/xilinx.txt | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/zynq-zc770-xm012.dts | 64 ++++++++++++++++++++++++ 3 files changed, 66 insertions(+) create mode 100644 arch/arm/boot/dts/zynq-zc770-xm012.dts diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt b/Documentation/devicetree/bindings/arm/xilinx.txt index 80139a7cfcdc..745c898f2f7f 100644 --- a/Documentation/devicetree/bindings/arm/xilinx.txt +++ b/Documentation/devicetree/bindings/arm/xilinx.txt @@ -14,6 +14,7 @@ Additional compatible strings: - Xilinx internal board zc770 with different FMC cards "xlnx,zynq-zc770-xm010" "xlnx,zynq-zc770-xm011" + "xlnx,zynq-zc770-xm012" --------------------------------------------------------------- diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 801a46a88e93..2c74b935ad1c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1069,6 +1069,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-zc706.dtb \ zynq-zc770-xm010.dtb \ zynq-zc770-xm011.dtb \ + zynq-zc770-xm012.dtb \ zynq-zed.dtb \ zynq-zybo.dtb dtb-$(CONFIG_MACH_ARMADA_370) += \ diff --git a/arch/arm/boot/dts/zynq-zc770-xm012.dts b/arch/arm/boot/dts/zynq-zc770-xm012.dts new file mode 100644 index 000000000000..c3169d63600d --- /dev/null +++ b/arch/arm/boot/dts/zynq-zc770-xm012.dts @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx ZC770 XM012 board DTS + * + * Copyright (C) 2013-2018 Xilinx, Inc. + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000"; + model = "Xilinx Zynq"; + + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + serial0 = &uart1; + spi0 = &spi1; + }; + + chosen { + bootargs = ""; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; +}; + +&can1 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + + eeprom0: eeprom@52 { + compatible = "atmel,24c02"; + reg = <0x52>; + }; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + + eeprom1: eeprom@52 { + compatible = "atmel,24c02"; + reg = <0x52>; + }; +}; + +&spi1 { + status = "okay"; + num-cs = <4>; + is-decoded-cs = <0>; +}; + +&uart1 { + status = "okay"; +}; From patchwork Fri Mar 2 19:21:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 880818 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id 47sm6615714wrb.48.2018.03.02.11.21.45 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 02 Mar 2018 11:21:46 -0800 (PST) From: Michal Simek To: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , Russell King , linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 5/5] arm: zynq: Add support for Xilinx zc770 xm013 dc4 board Date: Fri, 2 Mar 2018 20:21:37 +0100 Message-Id: <4e4589659d3d8f77cc8917dfa7bfe201d1d631ab.1520018484.git.michal.simek@xilinx.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org zc770 is based board which is extended by FMC/DC cards for SoC validation. FMCs/DCs are supposed to cover all SoC configurations. FMC/DC contains can, ethernet, i2c, qspi, spi and uart. Signed-off-by: Michal Simek Reviewed-by: Rob Herring --- Changes in v3: None Changes in v2: - use eeprom as node name instead of at25 - Record compatible string to xilinx.txt Documentation/devicetree/bindings/arm/xilinx.txt | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/zynq-zc770-xm013.dts | 78 ++++++++++++++++++++++++ 3 files changed, 80 insertions(+) create mode 100644 arch/arm/boot/dts/zynq-zc770-xm013.dts diff --git a/Documentation/devicetree/bindings/arm/xilinx.txt b/Documentation/devicetree/bindings/arm/xilinx.txt index 745c898f2f7f..63705a451251 100644 --- a/Documentation/devicetree/bindings/arm/xilinx.txt +++ b/Documentation/devicetree/bindings/arm/xilinx.txt @@ -15,6 +15,7 @@ Additional compatible strings: "xlnx,zynq-zc770-xm010" "xlnx,zynq-zc770-xm011" "xlnx,zynq-zc770-xm012" + "xlnx,zynq-zc770-xm013" --------------------------------------------------------------- diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 2c74b935ad1c..d5de3748a80a 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1070,6 +1070,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-zc770-xm010.dtb \ zynq-zc770-xm011.dtb \ zynq-zc770-xm012.dtb \ + zynq-zc770-xm013.dtb \ zynq-zed.dtb \ zynq-zybo.dtb dtb-$(CONFIG_MACH_ARMADA_370) += \ diff --git a/arch/arm/boot/dts/zynq-zc770-xm013.dts b/arch/arm/boot/dts/zynq-zc770-xm013.dts new file mode 100644 index 000000000000..8bb66859d774 --- /dev/null +++ b/arch/arm/boot/dts/zynq-zc770-xm013.dts @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx ZC770 XM013 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + */ +/dts-v1/; +#include "zynq-7000.dtsi" + +/ { + compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000"; + model = "Xilinx Zynq"; + + aliases { + ethernet0 = &gem1; + i2c0 = &i2c1; + serial0 = &uart0; + spi1 = &spi0; + }; + + chosen { + bootargs = ""; + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; +}; + +&can1 { + status = "okay"; +}; + +&gem1 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy>; + + ethernet_phy: ethernet-phy@7 { + reg = <7>; + device_type = "ethernet-phy"; + }; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + + si570: clock-generator@55 { + #clock-cells = <0>; + compatible = "silabs,si570"; + temperature-stability = <50>; + reg = <0x55>; + factory-fout = <156250000>; + clock-frequency = <148500000>; + }; +}; + +&spi0 { + status = "okay"; + num-cs = <4>; + is-decoded-cs = <0>; + eeprom: eeprom@0 { + at25,byte-len = <8192>; + at25,addr-mode = <2>; + at25,page-size = <32>; + + compatible = "atmel,at25"; + reg = <2>; + spi-max-frequency = <1000000>; + }; +}; + +&uart0 { + status = "okay"; +};