From patchwork Thu Aug 11 14:18:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matwey V. Kornilov" X-Patchwork-Id: 1665589 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=arHz9rQg; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4M3TSP3BW8z9sG0 for ; Fri, 12 Aug 2022 00:18:45 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id EDBC284957; Thu, 11 Aug 2022 16:18:41 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="arHz9rQg"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id C7C3D84960; Thu, 11 Aug 2022 16:18:40 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 27BD884950 for ; Thu, 11 Aug 2022 16:18:37 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=matwey.kornilov@gmail.com Received: by mail-lf1-x132.google.com with SMTP id f20so25704622lfc.10 for ; Thu, 11 Aug 2022 07:18:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=cP74vdjvjvU3jcA/e5XD4xhgIYqBDEOYk8ROjPfgdss=; b=arHz9rQg9+5fekgyGSkFhIDIhuW1giJI5Y/RDSniOEtOqFFEa/R8PG4ems2VdQqiG4 QMywQ7arZp4TMVnd8WuDq/3lU4wQrwrfVn+izD0GZIIUuqktANKNx6k8tPuobGZe4nL0 1fShjnzuWSiB0ihrGzb0dI1pJXzJhNaf8fuvzTFcT71tCAVKGMJENoLvBf7NXKcpMsAM 0cR4gwBqoVDUcBjnuVLiFNJHRaRFzVgK7kkqRIgLAKIVwref7o9AZIFeryRkm/codpB+ H5XjY3yeHkQdxKzIVbjnuSEPo4wugj357JKqm31HR+KgwSjUPWM+uOc2wJF3bujxnNc8 RD4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=cP74vdjvjvU3jcA/e5XD4xhgIYqBDEOYk8ROjPfgdss=; b=hAMRuANTMwHcGtfNlaWbspLnXOANB5dl84YGG4qSuBPRu0Fzyiba6wud3DALNpaz// mZGjo54tdnwcnzCtIK2Vpn2RAUlQuEsp7UXWCsWa8BO3ZK2hbjYUgZ3jaPxnHMNq/ke2 MIaYU9tKkPMwEkRpxUOfioEXhDgjN6ylxN5F+xIJgfcrt3pqjNP4rmDzcVO90Y7iwbef 9xzxIopWvcIWDrKICbQVww+T99pSmILD0DJxjuthmNI7zF+s58h66wo+dnrHXCmDR3op PFj2zqCGjXXRoqztqQn+h0/w3BCauUNz7iEyjqVToAf84SlFA72P1LiUKeSkEMGli6PG i8Uw== X-Gm-Message-State: ACgBeo3VV6dZNhZR2VxSn9+qwj5FE5Ef946wwwG3wWmcyuEPov/drRlt niOBC8yGHK7jgCFkJ4zv4XQ= X-Google-Smtp-Source: AA6agR4bVtyFxObfFUDlcd/+N2cCtChDxllMmHJEQqqofl5qq5swOcWawf3uhKlNuRRIQMPJ16b8Qw== X-Received: by 2002:a05:6512:3f27:b0:48d:a74e:45f1 with SMTP id y39-20020a0565123f2700b0048da74e45f1mr1548203lfa.537.1660227516191; Thu, 11 Aug 2022 07:18:36 -0700 (PDT) Received: from oak.local ([2001:470:28:561:f573:cf5f:8b04:af7a]) by smtp.gmail.com with ESMTPSA id a17-20020a056512375100b0048960b581e3sm725152lfs.8.2022.08.11.07.18.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Aug 2022 07:18:35 -0700 (PDT) From: "Matwey V. Kornilov" To: lusus@denx.de, parthiban@linumiz.com, sjg@chromium.org, patrick.delaunay@foss.st.com, sr@denx.de, kabel@kernel.org Cc: u-boot@lists.denx.de, "Matwey V. Kornilov" Subject: [PATCH v2] Restore pcm051_rev3_defconfig config Date: Thu, 11 Aug 2022 17:18:12 +0300 Message-Id: <20220811141812.10472-1-matwey.kornilov@gmail.com> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20220810142109.GF1146598@bill-the-cat> References: <20220810142109.GF1146598@bill-the-cat> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean pcm051_rev3_defconfig config (Phytec Wega board) has been dropped in 64efd11d ("arm: Remove pcm051 board") due to expired migration deadlines. Here, pcm051_rev3_defconfig support is reintroduced. Signed-off-by: Matwey V. Kornilov Reviewed-by: Tom Rini --- Changes since v1: - Do not add symbols to whitelist arch/arm/dts/am335x-wega-rdk-u-boot.dtsi | 12 +++++ board/phytec/phycore_am335x_r2/Kconfig | 2 +- board/phytec/phycore_am335x_r2/board.c | 26 +++++++++ configs/pcm051_rev3_defconfig | 69 ++++++++++++++++++++++++ 4 files changed, 108 insertions(+), 1 deletion(-) create mode 100644 configs/pcm051_rev3_defconfig diff --git a/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi b/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi index 28fd62e231..b3f21e7f52 100644 --- a/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi +++ b/arch/arm/dts/am335x-wega-rdk-u-boot.dtsi @@ -16,6 +16,18 @@ ocp { u-boot,dm-pre-reloc; + + l4_wkup@44c00000 { + u-boot,dm-pre-reloc; + + segment@200000 { + u-boot,dm-pre-reloc; + + target-module@9000 { + u-boot,dm-pre-reloc; + }; + }; + }; }; }; diff --git a/board/phytec/phycore_am335x_r2/Kconfig b/board/phytec/phycore_am335x_r2/Kconfig index 77055e043c..4183c2410e 100644 --- a/board/phytec/phycore_am335x_r2/Kconfig +++ b/board/phytec/phycore_am335x_r2/Kconfig @@ -1,4 +1,4 @@ -if TARGET_PHYCORE_AM335X_R2 +if TARGET_PCM051 || TARGET_PHYCORE_AM335X_R2 config SYS_BOARD default "phycore_am335x_r2" diff --git a/board/phytec/phycore_am335x_r2/board.c b/board/phytec/phycore_am335x_r2/board.c index 5ca9415204..d97ebd0151 100644 --- a/board/phytec/phycore_am335x_r2/board.c +++ b/board/phytec/phycore_am335x_r2/board.c @@ -31,7 +31,11 @@ DECLARE_GLOBAL_DATA_PTR; static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; /* DDR RAM defines */ +#if defined(CONFIG_TARGET_PCM051) +#define DDR_CLK_MHZ 303 /* DDR_DPLL_MULT value */ +#else #define DDR_CLK_MHZ 400 /* DDR_DPLL_MULT value */ +#endif #define OSC (V_OSCK / 1000000) const struct dpll_params dpll_ddr = { @@ -65,6 +69,7 @@ enum { PHYCORE_R2_MT41K128M16JT_256MB, PHYCORE_R2_MT41K256M16TW107IT_512MB, PHYCORE_R2_MT41K512M16HA125IT_1024MB, + PHYCORE_R13_MT41K256M16HA125E_256MB, }; struct am335x_sdram_timings { @@ -127,10 +132,30 @@ static struct am335x_sdram_timings physom_timings[] = { .datawrsratio0 = 0x82, }, }, + [PHYCORE_R13_MT41K256M16HA125E_256MB] = { + .ddr3_emif_reg_data = { + .sdram_config = MT41K256M16HA125E_EMIF_SDCFG, + .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF, + .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1, + .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2, + .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3, + .zq_config = MT41K256M16HA125E_ZQ_CFG, + .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY | PHY_EN_DYN_PWRDN, + }, + .ddr3_data = { + .datardsratio0 = MT41K256M16HA125E_RD_DQS, + .datawdsratio0 = MT41K256M16HA125E_WR_DQS, + .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE, + .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA, + }, + }, }; void sdram_init(void) { +#if defined(CONFIG_TARGET_PCM051) + int ram_type_index = PHYCORE_R13_MT41K256M16HA125E_256MB; +#else /* Configure memory to maximum supported size for detection */ int ram_type_index = PHYCORE_R2_MT41K512M16HA125IT_1024MB; @@ -157,6 +182,7 @@ void sdram_init(void) ram_type_index = PHYCORE_R2_MT41K128M16JT_256MB; break; } +#endif config_ddr(DDR_CLK_MHZ, &ioregs, &physom_timings[ram_type_index].ddr3_data, &ddr3_cmd_ctrl_data, diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig new file mode 100644 index 0000000000..624113d61a --- /dev/null +++ b/configs/pcm051_rev3_defconfig @@ -0,0 +1,69 @@ +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_OMAP2PLUS=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-wega-rdk" +CONFIG_AM33XX=y +CONFIG_TARGET_PCM051=y +CONFIG_SPL_MMC=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL=y +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 +CONFIG_OF_BOARD_SETUP=y +CONFIG_DEFAULT_FDT_FILE="am335x-wega-rdk.dtb" +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_I2C=y +# CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_SPL_POWER=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_CMD_SPL=y +CONFIG_CMD_ASKENV=y +CONFIG_CMD_EEPROM=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupt-controller interrupt-cells dma-names dmas " +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_VERSION_VARIABLE=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_REGMAP=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_CLK_TI_CTRL=y +CONFIG_DM_I2C=y +CONFIG_MISC=y +CONFIG_MMC_OMAP_HS=y +CONFIG_DM_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_SPEED=24000000 +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_SMSC=y +CONFIG_DM_ETH=y +CONFIG_MII=y +CONFIG_DRIVER_TI_CPSW=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_OMAP3_SPI=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_USB_MUSB_HOST=y +CONFIG_USB_MUSB_GADGET=y +CONFIG_USB_MUSB_TI=y +CONFIG_USB_GADGET=y +CONFIG_USB_ETHER=y