From patchwork Thu Mar 1 14:36:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hannes Schmelzer X-Patchwork-Id: 879896 X-Patchwork-Delegate: jh80.chung@samsung.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=oevsv.at Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zsZkw6mYWz9s1t for ; Fri, 2 Mar 2018 01:36:56 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 8D001C21FAD; Thu, 1 Mar 2018 14:36:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id F062CC21E5B; Thu, 1 Mar 2018 14:36:50 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 3CF2EC21E5B; Thu, 1 Mar 2018 14:36:49 +0000 (UTC) Received: from mail.schmelzer.or.at (mail.schmelzer.or.at [87.106.47.214]) by lists.denx.de (Postfix) with ESMTP id AD1CDC21CB1 for ; Thu, 1 Mar 2018 14:36:47 +0000 (UTC) Received: from localhost (s15287728.onlinehome-server.info [127.0.0.1]) by hamspirit.at (Postfix) with ESMTP id 7CA8C8F488B3; Thu, 1 Mar 2018 14:36:47 +0000 (UTC) Received: from mail.schmelzer.or.at ([127.0.0.1]) by localhost (s15287728.onlinehome-server.info [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id g+wKmQZ6w6cu; Thu, 1 Mar 2018 14:36:42 +0000 (UTC) Received: from scm-ws12.ad.schmelzer.or.at (194-118-144-148.adsl.highway.telekom.at [194.118.144.148]) by hamspirit.at (Postfix) with ESMTP id 003958F488B2; Thu, 1 Mar 2018 14:36:41 +0000 (UTC) From: Hannes Schmelzer To: u-boot@lists.denx.de Date: Thu, 1 Mar 2018 15:36:37 +0100 Message-Id: <1519914997-29887-1-git-send-email-oe5hpm@oevsv.at> X-Mailer: git-send-email 2.7.4 Cc: Hannes Schmelzer Subject: [U-Boot] [PATCH] mmc: sdhci: consider SDHCI_QUIRK_NO_HISPD_BIT in host_caps X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Some IP-core implementations of the SDHCI have different troubles on the silicon where they are placed. On ZYNQ platform for example Xilinx doesn't accept the hold timing of an eMMC chip which operates in High-Speed mode. Due to this fact the "SDHCI_QUIRK_NO_HISPD_BIT" quirk was born. This commit reflects this fact within the host-controller capabilities, so that the layer above (mmc-driver) can setup the card correctly. Otherwise the MMC card will be switched into high-speed mode and causes possible timing violation on the host-controller side. Signed-off-by: Hannes Schmelzer --- drivers/mmc/sdhci.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index d31793a..defe6db 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -602,6 +602,11 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, cfg->host_caps &= ~MMC_MODE_8BIT; } + if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) { + cfg->host_caps &= ~MMC_MODE_HS; + cfg->host_caps &= ~MMC_MODE_HS_52MHz; + } + if (host->host_caps) cfg->host_caps |= host->host_caps;