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Mon, 25 Jul 2022 05:11:53 +0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 26P5Bob616712150 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 25 Jul 2022 05:11:50 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A29E152050; Mon, 25 Jul 2022 05:11:50 +0000 (GMT) Received: from [9.200.45.50] (unknown [9.200.45.50]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id EEEBC5204F; Mon, 25 Jul 2022 05:11:48 +0000 (GMT) Message-ID: Date: Mon, 25 Jul 2022 13:11:47 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Content-Language: en-US To: gcc-patches Subject: [PATCH, rs6000] Add multiply-add expand pattern [PR103109] X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: FxOVGdFVIn4CrcPP8Bj7UVmvbEmYGDPV X-Proofpoint-GUID: AgEnheOwuZ73qfW56TnM0YBUAo4pgln7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-07-23_02,2022-07-21_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 spamscore=0 malwarescore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 phishscore=0 mlxscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2206140000 definitions=main-2207250022 X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: HAO CHEN GUI via Gcc-patches From: HAO CHEN GUI Reply-To: HAO CHEN GUI Cc: Peter Bergner , David , Segher Boessenkool Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi, This patch adds an expand and several insns for multiply-add with three 64bit operands. Bootstrapped and tested on powerpc64-linux BE and LE with no regressions. Is this okay for trunk? Any recommendations? Thanks a lot. ChangeLog 2022-07-22 Haochen Gui gcc/ PR target/103109 * config/rs6000/rs6000.md (maddditi4): New pattern for multiply-add. (madddi4_lowpart): New. (madddi4_lowpart_le): New. (madddi4_highpart): New. (madddi4_highpart_le): New. gcc/testsuite/ PR target/103109 * gcc.target/powerpc/pr103109.c: New. patch.diff diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index c55ee7e171a..4f3b56e103e 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -3226,6 +3226,97 @@ (define_insn "*maddld4" "maddld %0,%1,%2,%3" [(set_attr "type" "mul")]) +(define_expand "maddditi4" + [(set (match_operand:TI 0 "gpc_reg_operand") + (plus:TI + (mult:TI (any_extend:TI + (match_operand:DI 1 "gpc_reg_operand")) + (any_extend:TI + (match_operand:DI 2 "gpc_reg_operand"))) + (any_extend:TI + (match_operand:DI 3 "gpc_reg_operand"))))] + "TARGET_POWERPC64 && TARGET_MADDLD" +{ + rtx op0_lo = gen_rtx_SUBREG (DImode, operands[0], BYTES_BIG_ENDIAN ? 8 : 0); + rtx op0_hi = gen_rtx_SUBREG (DImode, operands[0], BYTES_BIG_ENDIAN ? 0 : 8); + + if (BYTES_BIG_ENDIAN) + { + emit_insn (gen_madddi4_lowpart (op0_lo, operands[1], operands[2], + operands[3])); + emit_insn (gen_madddi4_highpart (op0_hi, operands[1], operands[2], + operands[3])); + } + else + { + emit_insn (gen_madddi4_lowpart_le (op0_lo, operands[1], operands[2], + operands[3])); + emit_insn (gen_madddi4_highpart_le (op0_hi, operands[1], operands[2], + operands[3])); + } + DONE; +}) + +(define_insn "madddi4_lowpart" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r") + (subreg:DI + (plus:TI + (mult:TI (any_extend:TI + (match_operand:DI 1 "gpc_reg_operand" "r")) + (any_extend:TI + (match_operand:DI 2 "gpc_reg_operand" "r"))) + (any_extend:TI + (match_operand:DI 3 "gpc_reg_operand" "r"))) + 8))] + "TARGET_POWERPC64 && TARGET_MADDLD && BYTES_BIG_ENDIAN" + "maddld %0,%1,%2,%3" + [(set_attr "type" "mul")]) + +(define_insn "madddi4_lowpart_le" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r") + (subreg:DI + (plus:TI + (mult:TI (any_extend:TI + (match_operand:DI 1 "gpc_reg_operand" "r")) + (any_extend:TI + (match_operand:DI 2 "gpc_reg_operand" "r"))) + (any_extend:TI + (match_operand:DI 3 "gpc_reg_operand" "r"))) + 0))] + "TARGET_POWERPC64 && TARGET_MADDLD && !BYTES_BIG_ENDIAN" + "maddld %0,%1,%2,%3" + [(set_attr "type" "mul")]) + +(define_insn "madddi4_highpart" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r") + (subreg:DI + (plus:TI + (mult:TI (any_extend:TI + (match_operand:DI 1 "gpc_reg_operand" "r")) + (any_extend:TI + (match_operand:DI 2 "gpc_reg_operand" "r"))) + (any_extend:TI + (match_operand:DI 3 "gpc_reg_operand" "r"))) + 0))] + "TARGET_POWERPC64 && TARGET_MADDLD && BYTES_BIG_ENDIAN" + "maddhd %0,%1,%2,%3" + [(set_attr "type" "mul")]) + +(define_insn "madddi4_highpart_le" + [(set (match_operand:DI 0 "gpc_reg_operand" "=r") + (subreg:DI + (plus:TI + (mult:TI (any_extend:TI + (match_operand:DI 1 "gpc_reg_operand" "r")) + (any_extend:TI + (match_operand:DI 2 "gpc_reg_operand" "r"))) + (any_extend:TI + (match_operand:DI 3 "gpc_reg_operand" "r"))) + 8))] + "TARGET_POWERPC64 && TARGET_MADDLD && !BYTES_BIG_ENDIAN" + "maddhd %0,%1,%2,%3" + [(set_attr "type" "mul")]) + (define_insn "udiv3" [(set (match_operand:GPR 0 "gpc_reg_operand" "=r") (udiv:GPR (match_operand:GPR 1 "gpc_reg_operand" "r") diff --git a/gcc/testsuite/gcc.target/powerpc/pr103109.c b/gcc/testsuite/gcc.target/powerpc/pr103109.c new file mode 100644 index 00000000000..256e05d5677 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr103109.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { lp64 } } } */ +/* { dg-require-effective-target powerpc_p9modulo_ok } */ +/* { dg-options "-mdejagnu-cpu=power9 -O2" } */ +/* { dg-final { scan-assembler-times {\mmaddld\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mmaddhd\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mmaddhdu\M} 1 } } */ + +__int128 test (long a, long b, long c) +{ + return (__int128) a * (__int128) b + (__int128) c; +} + +unsigned __int128 testu (unsigned long a, unsigned long b, unsigned long c) +{ + return (unsigned __int128) a * (unsigned __int128) b + (unsigned __int128) c; +}