From patchwork Fri Jul 8 13:25:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1654143 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=fJTrcCd/; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LfZ3B53w0z9s07 for ; Fri, 8 Jul 2022 23:32:54 +1000 (AEST) Received: from localhost ([::1]:36568 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o9o6G-0003lA-Gs for incoming@patchwork.ozlabs.org; Fri, 08 Jul 2022 09:32:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35384) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o9nzB-0002xy-Qg; Fri, 08 Jul 2022 09:25:37 -0400 Received: from mail-ot1-x32d.google.com ([2607:f8b0:4864:20::32d]:40457) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o9nzA-00071B-4J; Fri, 08 Jul 2022 09:25:33 -0400 Received: by mail-ot1-x32d.google.com with SMTP id n12-20020a9d64cc000000b00616ebd87fc4so16202116otl.7; Fri, 08 Jul 2022 06:25:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HpotT2MgRmts3otazEbXXr3FaeYADH2GDXAvK2zJONY=; b=fJTrcCd/VjUzhhAUC9v7MwisCHShgTDfcatFWcmwwYfqk9BK2/6N0RRSAwYh+HYJX5 UiztcCRJjMd5GtXaqu+9H0MXu1Coa8Pw25oEDPGoKXG83W7hhj7zSdo/zdq57uXGhI/E WXvCkEyHEYryaLekR/Zb9r9lJyEqRZBg7VHNNch6Jji0nBoWbTA+oLk1m7loEO1/L5jS RYRDnL00veciXlE/lE3jbNP9B9/sJ2FJ+KzsJO4lAvDO4AkF53lRsb8tDP7ABPVSPNQt maCyPquIaGgC28HTZTL2SI7qWXI+zUq1fRhn9nDndwqedzHHT8mZpjAmmmqfRXlERn+4 u0CA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HpotT2MgRmts3otazEbXXr3FaeYADH2GDXAvK2zJONY=; b=eOZvRKCkTMszThOFgzNMDMUBWNbcLIhJ7N2AABTkEfod/QuRl9zQI3zsgcSN5fQiEw QlJgVjb9Nb26dussL5mC3sJGjWp/KTQTBQpgYHHVBEBJ/NdayRQg30KSIboc61Wgib/l ge+U5C1ism7ifRqjQq4YQVancWveYQZ4F8WbKfJMb4GpkAUSK+VxNSGZEKwcTSPyDDPM oqQPKMrLgwOU7Eb2RvJThqLj5wHo9YGC4OMSzqDh2rtjGTsf1YtKEj8ol++wd3y+5mWm WOgB2vq2F4smZwGM+CZ7Ldf4g68BncXRpAY0gXGye0ri9I1B8sqorrktuuymJvvOGLOi V32Q== X-Gm-Message-State: AJIora8DbrqmLkpFjMFvIAquLkoOthF5N7kLgrigwsPN0la6P+6Wzw/t sAbiERJNeyTny2ZYfecJDCh+bKOe0W0= X-Google-Smtp-Source: AGRyM1venwfq8h4uZgFdOGjP9k1CCGWu8pH/RQ+JVT7qssyR/jb8PdIhEGrKmUhKLMBqu4u53jtbXA== X-Received: by 2002:a9d:2602:0:b0:61c:30c1:fa03 with SMTP id a2-20020a9d2602000000b0061c30c1fa03mr576809otb.86.1657286729623; Fri, 08 Jul 2022 06:25:29 -0700 (PDT) Received: from balboa.ibmmodules.com (201-27-97-88.dsl.telesp.net.br. [201.27.97.88]) by smtp.gmail.com with ESMTPSA id f108-20020a9d03f5000000b0060c00c3fde5sm18435797otf.72.2022.07.08.06.25.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 06:25:29 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, clg@kaod.org, fbarrat@linux.ibm.com, Daniel Henrique Barboza Subject: [PATCH 01/10] ppc/pnv: add phb-id/chip-id PnvPHB3RootBus properties Date: Fri, 8 Jul 2022 10:25:13 -0300 Message-Id: <20220708132522.581382-2-danielhb413@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220708132522.581382-1-danielhb413@gmail.com> References: <20220708132522.581382-1-danielhb413@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::32d; envelope-from=danielhb413@gmail.com; helo=mail-ot1-x32d.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" We rely on the phb-id and chip-id, which are PHB properties, to assign chassis and slot to the root port. For default devices this is no big deal: the root port is being created under pnv_phb_realize() and the values are being passed on via the 'index' and 'chip-id' of the pnv_phb_attach_root_port() helper. If we want to implement user created root ports we have a problem. The user created root port will not be aware of which PHB it belongs to, unless we're willing to violate QOM best practices and access the PHB via dev->parent_bus->parent. What we can do is to access the root bus parent bus. Since we're already assigning the root port as QOM child of the bus, and the bus is initiated using PHB properties, let's add phb-id and chip-id as properties of the bus. This will allow us trivial access to them, for both user-created and default root ports, without doing anything too shady with QOM. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb3.c | 50 ++++++++++++++++++++++++++++++++++ include/hw/pci-host/pnv_phb3.h | 9 +++++- 2 files changed, 58 insertions(+), 1 deletion(-) diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 2966374008..b8e5b2423e 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -1006,6 +1006,11 @@ void pnv_phb3_bus_init(DeviceState *dev, PnvPHB3 *phb) &phb->pci_mmio, &phb->pci_io, 0, 4, TYPE_PNV_PHB3_ROOT_BUS); + object_property_set_int(OBJECT(pci->bus), "phb-id", phb->phb_id, + &error_abort); + object_property_set_int(OBJECT(pci->bus), "chip-id", phb->chip_id, + &error_abort); + pci_setup_iommu(pci->bus, pnv_phb3_dma_iommu, phb); } @@ -1105,10 +1110,55 @@ static const TypeInfo pnv_phb3_type_info = { .instance_init = pnv_phb3_instance_init, }; +static void pnv_phb3_root_bus_get_prop(Object *obj, Visitor *v, + const char *name, + void *opaque, Error **errp) +{ + PnvPHB3RootBus *bus = PNV_PHB3_ROOT_BUS(obj); + uint64_t value = 0; + + if (strcmp(name, "phb-id") == 0) { + value = bus->phb_id; + } else { + value = bus->chip_id; + } + + visit_type_size(v, name, &value, errp); +} + +static void pnv_phb3_root_bus_set_prop(Object *obj, Visitor *v, + const char *name, + void *opaque, Error **errp) + +{ + PnvPHB3RootBus *bus = PNV_PHB3_ROOT_BUS(obj); + uint64_t value; + + if (!visit_type_size(v, name, &value, errp)) { + return; + } + + if (strcmp(name, "phb-id") == 0) { + bus->phb_id = value; + } else { + bus->chip_id = value; + } +} + static void pnv_phb3_root_bus_class_init(ObjectClass *klass, void *data) { BusClass *k = BUS_CLASS(klass); + object_class_property_add(klass, "phb-id", "int", + pnv_phb3_root_bus_get_prop, + pnv_phb3_root_bus_set_prop, + NULL, NULL); + + object_class_property_add(klass, "chip-id", "int", + pnv_phb3_root_bus_get_prop, + pnv_phb3_root_bus_set_prop, + NULL, NULL); + /* * PHB3 has only a single root complex. Enforce the limit on the * parent bus diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h index bff69201d9..4854f6d2f6 100644 --- a/include/hw/pci-host/pnv_phb3.h +++ b/include/hw/pci-host/pnv_phb3.h @@ -104,9 +104,16 @@ struct PnvPBCQState { }; /* - * PHB3 PCIe Root port + * PHB3 PCIe Root Bus */ #define TYPE_PNV_PHB3_ROOT_BUS "pnv-phb3-root" +struct PnvPHB3RootBus { + PCIBus parent; + + uint32_t chip_id; + uint32_t phb_id; +}; +OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB3RootBus, PNV_PHB3_ROOT_BUS) /* * PHB3 PCIe Host Bridge for PowerNV machines (POWER8) From patchwork Fri Jul 8 13:25:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1654133 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=j9L6jviU; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LfYwR0DCYz9s07 for ; Fri, 8 Jul 2022 23:27:03 +1000 (AEST) Received: from localhost ([::1]:51784 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o9o0a-00032L-SK for incoming@patchwork.ozlabs.org; Fri, 08 Jul 2022 09:27:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35408) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o9nzE-0002y7-ED; Fri, 08 Jul 2022 09:25:37 -0400 Received: from mail-oa1-x2f.google.com ([2001:4860:4864:20::2f]:43603) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o9nzB-00071j-1u; Fri, 08 Jul 2022 09:25:34 -0400 Received: by mail-oa1-x2f.google.com with SMTP id 586e51a60fabf-fe023ab520so29197013fac.10; Fri, 08 Jul 2022 06:25:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yQl8V2bz3D3odLkebRtZgHTm6lOO/ewYUlY+Tm4ynBE=; b=j9L6jviUb8ANpLwYWwmoGLG6sM512XRfZKWad7tBdUjUBQ7MgSSb2xp+L8m/4pO4Ds gs9+sXyCtc2ik/CpRi2LFEvBGDJECGDT/9zvxVxRVxlhLLHElftBzkmK3HPp4b7j5nhV AUC3Qoe+w5dYFXjExdV4CqMV8yQLspjDBK+GfYtqsVNQ2p69+5d1xoazzZZfz1Q8WQtQ Ik8tcuLxuQimlTjf2Ua4f4KEOORAdF4z+m2eUybmAYYlNM+p7RD6XuLivxeU5nXlM+Sw vWkMztXx01mmvIcccgBXlw6fUOlrpAQWqiqo2DJKp2zup559Y5RW3WERzdgrTcPN170o 5ERQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yQl8V2bz3D3odLkebRtZgHTm6lOO/ewYUlY+Tm4ynBE=; b=xIXUPsI7ZxapQYyfi2pe3SFWRFm28Yj4iKTrtylVO1K3GPZKa9xVlcbJg7vGL4xl2G YYsM0qqG7fyHtkTelLygRaS9bAbmMhn6hxoOmXDD4KUsDwbWXF+djL0TiZOadOQKnEOU 9+GO73YYIoZWDkGzEyc96yw6XPdVFlCt58x7nGmjNz4dF4wMiRgQtljCqwvgmuui3Jub W4FKKPbzAaDEd2nqe/DZnZsd9m8v/uebk0EjjGiqsP84aHjD87482C3k+h7TWcVY1NhZ mOHiImrNVbeG4RmKqaQrXcUB3X7fg5BqUxb/EESn9Etvo+ABYpj5uei5sTV4w/lRy0sX FYKQ== X-Gm-Message-State: AJIora9h4FxOihbKG2XpWiAidl3w7ya4LZYgJq2rh1eJ4UUTBCqE8EKX d+Rrz7vsfHJD6Wj26uvE+u+q0Yw3nSM= X-Google-Smtp-Source: AGRyM1vesJrfe9pT9R8MkzRazHhoBiy3FpNFqv3znaVgkDfG2fIb+Z4xNihoLOZZiY6Wc0sraRJ/nw== X-Received: by 2002:a05:6870:960a:b0:10a:9ebc:70fc with SMTP id d10-20020a056870960a00b0010a9ebc70fcmr6227081oaq.205.1657286731465; Fri, 08 Jul 2022 06:25:31 -0700 (PDT) Received: from balboa.ibmmodules.com (201-27-97-88.dsl.telesp.net.br. [201.27.97.88]) by smtp.gmail.com with ESMTPSA id f108-20020a9d03f5000000b0060c00c3fde5sm18435797otf.72.2022.07.08.06.25.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 06:25:31 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, clg@kaod.org, fbarrat@linux.ibm.com, Daniel Henrique Barboza Subject: [PATCH 02/10] ppc/pnv: add phb-id/chip-id PnvPHB4RootBus properties Date: Fri, 8 Jul 2022 10:25:14 -0300 Message-Id: <20220708132522.581382-3-danielhb413@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220708132522.581382-1-danielhb413@gmail.com> References: <20220708132522.581382-1-danielhb413@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2001:4860:4864:20::2f; envelope-from=danielhb413@gmail.com; helo=mail-oa1-x2f.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The same rationale provided in the PHB3 bus case applies here. Note: we could have merged both buses in a single object, like we did with the root ports, and spare some boilerplate. The reason we opted to preserve both buses objects is twofold: - there's not user side advantage in doing so. Unifying the root ports presents a clear user QOL change when we enable user created devices back. The buses objects, aside from having a different QOM name, is transparent to the user; - we leave a door opened in case we want to increase the root port limit for phb4/5 later on without having to deal with phb3 code. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb4.c | 51 ++++++++++++++++++++++++++++++++++ include/hw/pci-host/pnv_phb4.h | 10 +++++++ 2 files changed, 61 insertions(+) diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index fefdd3ad89..b4f750bf6d 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -1567,6 +1567,12 @@ void pnv_phb4_bus_init(DeviceState *dev, PnvPHB4 *phb) pnv_phb4_set_irq, pnv_phb4_map_irq, phb, &phb->pci_mmio, &phb->pci_io, 0, 4, TYPE_PNV_PHB4_ROOT_BUS); + + object_property_set_int(OBJECT(pci->bus), "phb-id", phb->phb_id, + &error_abort); + object_property_set_int(OBJECT(pci->bus), "chip-id", phb->chip_id, + &error_abort); + pci_setup_iommu(pci->bus, pnv_phb4_dma_iommu, phb); pci->bus->flags |= PCI_BUS_EXTENDED_CONFIG_SPACE; } @@ -1724,10 +1730,55 @@ static const TypeInfo pnv_phb5_type_info = { .instance_size = sizeof(PnvPHB4), }; +static void pnv_phb4_root_bus_get_prop(Object *obj, Visitor *v, + const char *name, + void *opaque, Error **errp) +{ + PnvPHB4RootBus *bus = PNV_PHB4_ROOT_BUS(obj); + uint64_t value = 0; + + if (strcmp(name, "phb-id") == 0) { + value = bus->phb_id; + } else { + value = bus->chip_id; + } + + visit_type_size(v, name, &value, errp); +} + +static void pnv_phb4_root_bus_set_prop(Object *obj, Visitor *v, + const char *name, + void *opaque, Error **errp) + +{ + PnvPHB4RootBus *bus = PNV_PHB4_ROOT_BUS(obj); + uint64_t value; + + if (!visit_type_size(v, name, &value, errp)) { + return; + } + + if (strcmp(name, "phb-id") == 0) { + bus->phb_id = value; + } else { + bus->chip_id = value; + } +} + static void pnv_phb4_root_bus_class_init(ObjectClass *klass, void *data) { BusClass *k = BUS_CLASS(klass); + object_class_property_add(klass, "phb-id", "int", + pnv_phb4_root_bus_get_prop, + pnv_phb4_root_bus_set_prop, + NULL, NULL); + + object_class_property_add(klass, "chip-id", "int", + pnv_phb4_root_bus_get_prop, + pnv_phb4_root_bus_set_prop, + NULL, NULL); + /* * PHB4 has only a single root complex. Enforce the limit on the * parent bus diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index 20aa4819d3..50d4faa001 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -45,7 +45,17 @@ typedef struct PnvPhb4DMASpace { QLIST_ENTRY(PnvPhb4DMASpace) list; } PnvPhb4DMASpace; +/* + * PHB4 PCIe Root Bus + */ #define TYPE_PNV_PHB4_ROOT_BUS "pnv-phb4-root" +struct PnvPHB4RootBus { + PCIBus parent; + + uint32_t chip_id; + uint32_t phb_id; +}; +OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB4RootBus, PNV_PHB4_ROOT_BUS) /* * PHB4 PCIe Host Bridge for PowerNV machines (POWER9) From patchwork Fri Jul 8 13:25:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1654147 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=hbB5XF8Y; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LfZ6r6ZRsz9s07 for ; Fri, 8 Jul 2022 23:36:04 +1000 (AEST) Received: from localhost ([::1]:44020 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o9o9K-0000S0-Mm for incoming@patchwork.ozlabs.org; Fri, 08 Jul 2022 09:36:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35442) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o9nzG-0002yN-AE; Fri, 08 Jul 2022 09:25:38 -0400 Received: from mail-oi1-x22f.google.com ([2607:f8b0:4864:20::22f]:45932) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o9nzD-00073D-2S; Fri, 08 Jul 2022 09:25:37 -0400 Received: by mail-oi1-x22f.google.com with SMTP id u9so26943349oiv.12; Fri, 08 Jul 2022 06:25:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BC6maZTbunMiDyMBdBL7ckaU4p3TOyHAZSHoQ/w74LY=; b=hbB5XF8YpV6TtFo4jyKgz8dOcnqTUCWiTRC9uBF1+1GcGI+dtBNXTYkKOs5PEgFnCi I0d0CvvPWl1ePjbNvv4TE+4isXLbu7ADG6kzv5HUHLRsZChVItZCoFCU0rAg11BiHJwG 3its4FfhMI9Od5V3Jg7scxnmoWtHMf3clLTv+mXvWXfG4G9ZT1Ew6QPHlhhMQgEGGtMT mrwW44Fq9pLt4ybgzyuTkCW3Tgycm3QaGeKJWiUS3irCp9PRVoAbL1KDBXYly+pbA1P4 X0pYPPSR5I7jMlj7HtQEFPgjvC22fJb0rAzr2o83TMGMaP0tShAV9BE1jERJGu9OIFii 82Ow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BC6maZTbunMiDyMBdBL7ckaU4p3TOyHAZSHoQ/w74LY=; b=azjT6MN14YFdb/L97+uXQo/VfnZLDrv+nd1GAa2uODe9y/YemmdI4Lxya4LuVs70eV hThCl+lTg9ji7J4mucIWn/bnnTRcGKDYp8OGQeaxisWArVIBHbvOc2yH+Nu32UScnFbM 3ZjK2W0h7UyKsucBspzZkYkSbI2oGVNNyHTIJdLbhiuKueXNcTRjSYPDzGZAI8gFb2pQ Gv8XhUVOGcUAyPQyAjZckVWYgFF9hScW0rIjvbrAiiogFz9YtsLnAeG8RdAO6LY4qxdS 6MZgJADxarav2mHjGNF8wa/DA/x6UuvbVwgBzYZPemZ2Y0VEQMwx7wG9fhgSAYIpA4fu wjQQ== X-Gm-Message-State: AJIora9J8TOhaKFbSneA3Lo2+J6vkWwDX2KfPcLm/lppQTMi0P46yaPs IegsyD1H5GntaP7SlSOU34JK2RCPs7Y= X-Google-Smtp-Source: AGRyM1vT1YAp9iULBFMsZVdYmrj37CdtotU0sXzyXUZIju1iWKUrJa/OrPT2APfcp4dAGABlHko/JQ== X-Received: by 2002:a05:6808:1641:b0:335:4fe8:14d3 with SMTP id az1-20020a056808164100b003354fe814d3mr5651022oib.231.1657286733412; Fri, 08 Jul 2022 06:25:33 -0700 (PDT) Received: from balboa.ibmmodules.com (201-27-97-88.dsl.telesp.net.br. [201.27.97.88]) by smtp.gmail.com with ESMTPSA id f108-20020a9d03f5000000b0060c00c3fde5sm18435797otf.72.2022.07.08.06.25.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 06:25:33 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, clg@kaod.org, fbarrat@linux.ibm.com, Daniel Henrique Barboza Subject: [PATCH 03/10] ppc/pnv: set root port chassis and slot using Bus properties Date: Fri, 8 Jul 2022 10:25:15 -0300 Message-Id: <20220708132522.581382-4-danielhb413@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220708132522.581382-1-danielhb413@gmail.com> References: <20220708132522.581382-1-danielhb413@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::22f; envelope-from=danielhb413@gmail.com; helo=mail-oi1-x22f.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" For default root ports we have a way of accessing chassis and slot, before root_port_realize(), via pnv_phb_attach_root_port(). For the future user created root ports this won't be the case: we can't use this helper because we don't have access to the PHB phb-id/chip-id values. In earlier patches we've added phb-id and chip-id to pnv-phb-root-bus objects. We're now able to use the bus to retrieve them. The bus is reachable for both user created and default devices, so we're changing all the code paths. This also allow us to validate these changes with the existing default devices. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c index c47ed92462..826c0c144e 100644 --- a/hw/pci-host/pnv_phb.c +++ b/hw/pci-host/pnv_phb.c @@ -25,21 +25,19 @@ * QOM id. 'chip_id' is going to be used as PCIE chassis for the * root port. */ -static void pnv_phb_attach_root_port(PCIHostState *pci, int index, int chip_id) +static void pnv_phb_attach_root_port(PCIHostState *pci) { PCIDevice *root = pci_new(PCI_DEVFN(0, 0), TYPE_PNV_PHB_ROOT_PORT); - g_autofree char *default_id = g_strdup_printf("%s[%d]", - TYPE_PNV_PHB_ROOT_PORT, - index); const char *dev_id = DEVICE(root)->id; + g_autofree char *default_id = NULL; + int index; + + index = object_property_get_int(OBJECT(pci->bus), "phb-id", &error_fatal); + default_id = g_strdup_printf("%s[%d]", TYPE_PNV_PHB_ROOT_PORT, index); object_property_add_child(OBJECT(pci->bus), dev_id ? dev_id : default_id, OBJECT(root)); - /* Set unique chassis/slot values for the root port */ - qdev_prop_set_uint8(DEVICE(root), "chassis", chip_id); - qdev_prop_set_uint16(DEVICE(root), "slot", index); - pci_realize_and_unref(root, pci->bus, &error_fatal); } @@ -93,7 +91,7 @@ static void pnv_phb_realize(DeviceState *dev, Error **errp) pnv_phb4_bus_init(dev, PNV_PHB4(phb->backend)); } - pnv_phb_attach_root_port(pci, phb->phb_id, phb->chip_id); + pnv_phb_attach_root_port(pci); } static const char *pnv_phb_root_bus_path(PCIHostState *host_bridge, @@ -162,9 +160,18 @@ static void pnv_phb_root_port_realize(DeviceState *dev, Error **errp) { PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev); PnvPHBRootPort *phb_rp = PNV_PHB_ROOT_PORT(dev); + PCIBus *bus = PCI_BUS(qdev_get_parent_bus(dev)); PCIDevice *pci = PCI_DEVICE(dev); uint16_t device_id = 0; Error *local_err = NULL; + int chip_id, index; + + chip_id = object_property_get_int(OBJECT(bus), "chip-id", &error_fatal); + index = object_property_get_int(OBJECT(bus), "phb-id", &error_fatal); + + /* Set unique chassis/slot values for the root port */ + qdev_prop_set_uint8(dev, "chassis", chip_id); + qdev_prop_set_uint16(dev, "slot", index); rpc->parent_realize(dev, &local_err); if (local_err) { From patchwork Fri Jul 8 13:25:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1654134 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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[201.27.97.88]) by smtp.gmail.com with ESMTPSA id f108-20020a9d03f5000000b0060c00c3fde5sm18435797otf.72.2022.07.08.06.25.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 06:25:35 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, clg@kaod.org, fbarrat@linux.ibm.com, Daniel Henrique Barboza Subject: [PATCH 04/10] ppc/pnv: add helpers for pnv-phb user devices Date: Fri, 8 Jul 2022 10:25:16 -0300 Message-Id: <20220708132522.581382-5-danielhb413@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220708132522.581382-1-danielhb413@gmail.com> References: <20220708132522.581382-1-danielhb413@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2001:4860:4864:20::32; envelope-from=danielhb413@gmail.com; helo=mail-oa1-x32.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" pnv_parent_qom_fixup() and pnv_parent_bus_fixup() are versions of the helpers that were reverted by commit 9c10d86fee "ppc/pnv: Remove user-created PHB{3,4,5} devices". They are needed to amend the QOM and bus hierarchies of user created pnv-phbs, matching them with default pnv-phbs. A new helper pnv_phb_user_device_init() is created to handle user-created devices setup. We're going to call it inside pnv_phb_realize() in case we're realizing an user created device. This will centralize all user device realated in a single spot, leaving the realize functions of the phb3/phb4 backends untouched. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb.c | 69 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c index 826c0c144e..da779dc298 100644 --- a/hw/pci-host/pnv_phb.c +++ b/hw/pci-host/pnv_phb.c @@ -18,6 +18,37 @@ #include "hw/qdev-properties.h" #include "qom/object.h" + +/* + * Set the QOM parent of an object child. If the device state + * associated with the child has an id, use it as QOM id. Otherwise + * use object_typename[index] as QOM id. + */ +static void pnv_parent_qom_fixup(Object *parent, Object *child, int index) +{ + g_autofree char *default_id = + g_strdup_printf("%s[%d]", object_get_typename(child), index); + const char *dev_id = DEVICE(child)->id; + + if (child->parent == parent) { + return; + } + + object_ref(child); + object_unparent(child); + object_property_add_child(parent, dev_id ? dev_id : default_id, child); + object_unref(child); +} + +static void pnv_parent_bus_fixup(DeviceState *parent, DeviceState *child) +{ + BusState *parent_bus = qdev_get_parent_bus(parent); + + if (!qdev_set_parent_bus(child, parent_bus, &error_fatal)) { + return; + } +} + /* * Attach a root port device. * @@ -41,6 +72,36 @@ static void pnv_phb_attach_root_port(PCIHostState *pci) pci_realize_and_unref(root, pci->bus, &error_fatal); } +/* + * User created devices won't have the initial setup that default + * devices have. This setup consists of assigning a parent device + * (chip for PHB3, PEC for PHB4/5) that will be the QOM/bus parent + * of the PHB. + */ +static void pnv_phb_user_device_init(PnvPHB *phb) +{ + PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine()); + PnvChip *chip = pnv_get_chip(pnv, phb->chip_id); + Object *parent = NULL; + + if (!chip) { + error_setg(&error_fatal, "invalid chip id: %d", phb->chip_id); + return; + } + + /* + * Reparent user created devices to the chip to build + * correctly the device tree. pnv_xscom_dt() needs every + * PHB to be a child of the chip to build the DT correctly. + * + * TODO: for version 3 we're still parenting the PHB with the + * chip. We should parent with a (so far not implemented) + * PHB3 PEC device. + */ + pnv_parent_qom_fixup(parent, OBJECT(phb), phb->phb_id); + pnv_parent_bus_fixup(DEVICE(chip), DEVICE(phb)); +} + static void pnv_phb_realize(DeviceState *dev, Error **errp) { PnvPHB *phb = PNV_PHB(dev); @@ -74,6 +135,14 @@ static void pnv_phb_realize(DeviceState *dev, Error **errp) object_property_set_uint(phb->backend, "chip-id", phb->chip_id, errp); object_property_set_link(phb->backend, "phb-base", OBJECT(phb), errp); + /* + * Handle user created devices. User devices will not have a + * pointer to a chip (PHB3) and a PEC (PHB4/5). + */ + if (!phb->chip && !phb->pec) { + pnv_phb_user_device_init(phb); + } + if (phb->version == 3) { object_property_set_link(phb->backend, "chip", OBJECT(phb->chip), errp); From patchwork Fri Jul 8 13:25:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1654149 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=OuLogYSD; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LfZ9Y4n5cz9s07 for ; Fri, 8 Jul 2022 23:38:24 +1000 (AEST) Received: from localhost ([::1]:48296 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o9oBZ-0003ma-4i for incoming@patchwork.ozlabs.org; Fri, 08 Jul 2022 09:38:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35474) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o9nzI-0002zG-O9; Fri, 08 Jul 2022 09:25:42 -0400 Received: from mail-ot1-x32c.google.com ([2607:f8b0:4864:20::32c]:38622) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o9nzG-000715-Ej; Fri, 08 Jul 2022 09:25:40 -0400 Received: by mail-ot1-x32c.google.com with SMTP id cb12-20020a056830618c00b00616b871cef3so16196343otb.5; Fri, 08 Jul 2022 06:25:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=r0xJoGCzM8PSvF4db3gvvajKr+o1bn4SEDq0ERqtkXk=; b=OuLogYSD1ewl6N/dU2ssFgaoZIj1nbZgTtQIMkrA3vce0xzzNCM3aF+VCxJVyUBCXw tBfzJB6HXjN/BPsWmOBCJC+i2AB/FH+nkF52ZXaVw1EXV8Pnl/S6QNIp4HAgcImndPkA 9occdb/e197SCcVvTm9WmlvZuDiB5JNPa2KfRJGnOIyN5MXwLnMtlQS35MY113XBqr7J qnRvEmkyucQ4TMVLB8Fs0120L1CT/LYXETE11mf8Y594vs4h+TNtDq9jDiIH5TFCI0Vk uhsdRySqdbcmOsmRQ8UQmWP8WgvE13OYj6uHoDMnAMbh7nJmpvgV1bxN+X+VF7dAXJEr EoRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=r0xJoGCzM8PSvF4db3gvvajKr+o1bn4SEDq0ERqtkXk=; b=oAn5KgPUvgIO+IPzsC8Pv+RTFuOifNsv5exV6liz4GTNx7LlJZ96e2/aP0Jqu0xLRQ SFAQELPN7m8ydf3y1fJekzKc+IT5Zsp0SmAcbc55PsbtKOlOPnP78ZMHZuEed1vikBpk xo2UphbeOGZBJ/nwd3Z9ZfcDkScTke47l9Zs/cqUiGUPf23f/ikVvLntqQApgwK58wkD dusC3TGB4zVsnAPcxVrH5n+2xRgn8NjbPLVxz1FJcolYEn4i+2Q5/YlrW15WQ7mi1BVJ y6XEizlhmZl0AYvdEmyabWzd08bN/Md7YMgP4G5EXdNX51GQZIrHajZiRDKfNmknFMNC XQ5w== X-Gm-Message-State: AJIora/V20klt/BL8o3Bte53ngmPnWhAgfjnyR50UNhcAzGb89GPeUVm 5M4k+9rl2AuikFaLCyNoj5MvVtJNc94= X-Google-Smtp-Source: AGRyM1vpsJyguSm1/1VC3TfDEJ0GpPIZVS0DDkOOoa/hsgGGMnsqXFOt16WQ6uPsiXQmQknpAfQccQ== X-Received: by 2002:a05:6830:1f41:b0:61c:1f8e:edc0 with SMTP id u1-20020a0568301f4100b0061c1f8eedc0mr1532662oth.366.1657286737256; Fri, 08 Jul 2022 06:25:37 -0700 (PDT) Received: from balboa.ibmmodules.com (201-27-97-88.dsl.telesp.net.br. [201.27.97.88]) by smtp.gmail.com with ESMTPSA id f108-20020a9d03f5000000b0060c00c3fde5sm18435797otf.72.2022.07.08.06.25.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 06:25:37 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, clg@kaod.org, fbarrat@linux.ibm.com, Daniel Henrique Barboza Subject: [PATCH 05/10] ppc/pnv: turn chip8->phbs[] into a PnvPHB* array Date: Fri, 8 Jul 2022 10:25:17 -0300 Message-Id: <20220708132522.581382-6-danielhb413@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220708132522.581382-1-danielhb413@gmail.com> References: <20220708132522.581382-1-danielhb413@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::32c; envelope-from=danielhb413@gmail.com; helo=mail-ot1-x32c.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" When enabling user created PHBs (a change reverted by commit 9c10d86fee) we were handling PHBs created by default versus by the user in different manners. The only difference between these PHBs is that one will have a valid phb3->chip that is assigned during pnv_chip_power8_realize(), while the user created needs to search which chip it belongs to. Aside from that there shouldn't be any difference. Making the default PHBs behave in line with the user created ones will make it easier to re-introduce them later on. It will also make the code easier to follow since we are dealing with them in equal manner. The first step is to turn chip8->phbs[] into a PnvPHB3 pointer array. This will allow us to assign user created PHBs into it later on. The way we initilize the default case is now more in line with that would happen with the user created case: the object is created, parented by the chip because pnv_xscom_dt() relies on it, and then assigned to the array. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb.c | 11 +++++++++++ hw/ppc/pnv.c | 20 +++++++++++++++----- include/hw/ppc/pnv.h | 6 +++++- 3 files changed, 31 insertions(+), 6 deletions(-) diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c index da779dc298..077f391d59 100644 --- a/hw/pci-host/pnv_phb.c +++ b/hw/pci-host/pnv_phb.c @@ -89,6 +89,17 @@ static void pnv_phb_user_device_init(PnvPHB *phb) return; } + if (phb->version == 3) { + Pnv8Chip *chip8 = PNV8_CHIP(chip); + + phb->chip = chip; + + chip8->phbs[chip8->num_phbs] = phb; + chip8->num_phbs++; + + parent = OBJECT(phb->chip); + } + /* * Reparent user created devices to the chip to build * correctly the device tree. pnv_xscom_dt() needs every diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index d649ed6b1b..a94f269644 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -661,7 +661,7 @@ static void pnv_chip_power8_pic_print_info(PnvChip *chip, Monitor *mon) ics_pic_print_info(&chip8->psi.ics, mon); for (i = 0; i < chip8->num_phbs; i++) { - PnvPHB *phb = &chip8->phbs[i]; + PnvPHB *phb = chip8->phbs[i]; PnvPHB3 *phb3 = PNV_PHB3(phb->backend); pnv_phb3_msi_pic_print_info(&phb3->msis, mon); @@ -1158,7 +1158,17 @@ static void pnv_chip_power8_instance_init(Object *obj) chip8->num_phbs = pcc->num_phbs; for (i = 0; i < chip8->num_phbs; i++) { - object_initialize_child(obj, "phb[*]", &chip8->phbs[i], TYPE_PNV_PHB); + PnvPHB *phb = PNV_PHB(object_new(TYPE_PNV_PHB)); + + /* + * We need the chip to parent the PHB to allow the DT + * to build correctly (via pnv_xscom_dt()). + * + * TODO: the PHB should be parented by a PEC device that, at + * this moment, is not modelled powernv8/phb3. + */ + object_property_add_child(obj, "phb[*]", OBJECT(phb)); + chip8->phbs[i] = phb; } } @@ -1274,7 +1284,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) /* PHB controllers */ for (i = 0; i < chip8->num_phbs; i++) { - PnvPHB *phb = &chip8->phbs[i]; + PnvPHB *phb = chip8->phbs[i]; object_property_set_int(OBJECT(phb), "index", i, &error_fatal); object_property_set_int(OBJECT(phb), "chip-id", chip->chip_id, @@ -1942,7 +1952,7 @@ static ICSState *pnv_ics_get(XICSFabric *xi, int irq) } for (j = 0; j < chip8->num_phbs; j++) { - PnvPHB *phb = &chip8->phbs[j]; + PnvPHB *phb = chip8->phbs[j]; PnvPHB3 *phb3 = PNV_PHB3(phb->backend); if (ics_valid_irq(&phb3->lsis, irq)) { @@ -1981,7 +1991,7 @@ static void pnv_ics_resend(XICSFabric *xi) ics_resend(&chip8->psi.ics); for (j = 0; j < chip8->num_phbs; j++) { - PnvPHB *phb = &chip8->phbs[j]; + PnvPHB *phb = chip8->phbs[j]; PnvPHB3 *phb3 = PNV_PHB3(phb->backend); ics_resend(&phb3->lsis); diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 033d907287..aea6128e7f 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -81,7 +81,11 @@ struct Pnv8Chip { PnvHomer homer; #define PNV8_CHIP_PHB3_MAX 4 - PnvPHB phbs[PNV8_CHIP_PHB3_MAX]; + /* + * The array is used to allow quick access to the phbs by + * pnv_ics_get_child() and pnv_ics_resend_child(). + */ + PnvPHB *phbs[PNV8_CHIP_PHB3_MAX]; uint32_t num_phbs; XICSFabric *xics; From patchwork Fri Jul 8 13:25:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1654138 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=bbpNV0Xy; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LfZ0R0FvGz9s07 for ; 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[201.27.97.88]) by smtp.gmail.com with ESMTPSA id f108-20020a9d03f5000000b0060c00c3fde5sm18435797otf.72.2022.07.08.06.25.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 06:25:38 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, clg@kaod.org, fbarrat@linux.ibm.com, Daniel Henrique Barboza Subject: [PATCH 06/10] ppc/pnv: enable user created pnv-phb for powernv8 Date: Fri, 8 Jul 2022 10:25:18 -0300 Message-Id: <20220708132522.581382-7-danielhb413@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220708132522.581382-1-danielhb413@gmail.com> References: <20220708132522.581382-1-danielhb413@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2001:4860:4864:20::2e; envelope-from=danielhb413@gmail.com; helo=mail-oa1-x2e.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The bulk of the work was already done by previous patches. Use defaults_enabled() to determine whether we need to create the default devices or not. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb.c | 9 +++++++-- hw/ppc/pnv.c | 6 ++++++ 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c index 077f391d59..953c384bf6 100644 --- a/hw/pci-host/pnv_phb.c +++ b/hw/pci-host/pnv_phb.c @@ -17,6 +17,7 @@ #include "hw/ppc/pnv.h" #include "hw/qdev-properties.h" #include "qom/object.h" +#include "sysemu/sysemu.h" /* @@ -171,6 +172,10 @@ static void pnv_phb_realize(DeviceState *dev, Error **errp) pnv_phb4_bus_init(dev, PNV_PHB4(phb->backend)); } + if (phb->version == 3 && !defaults_enabled()) { + return; + } + pnv_phb_attach_root_port(pci); } @@ -206,7 +211,7 @@ static void pnv_phb_class_init(ObjectClass *klass, void *data) dc->realize = pnv_phb_realize; device_class_set_props(dc, pnv_phb_properties); set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); - dc->user_creatable = false; + dc->user_creatable = true; } static void pnv_phb_root_port_reset(DeviceState *dev) @@ -297,7 +302,7 @@ static void pnv_phb_root_port_class_init(ObjectClass *klass, void *data) device_class_set_parent_reset(dc, pnv_phb_root_port_reset, &rpc->parent_reset); dc->reset = &pnv_phb_root_port_reset; - dc->user_creatable = false; + dc->user_creatable = true; k->vendor_id = PCI_VENDOR_ID_IBM; /* device_id will be written during realize() */ diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index a94f269644..f5af40ce39 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1155,6 +1155,10 @@ static void pnv_chip_power8_instance_init(Object *obj) object_initialize_child(obj, "homer", &chip8->homer, TYPE_PNV8_HOMER); + if (!defaults_enabled()) { + return; + } + chip8->num_phbs = pcc->num_phbs; for (i = 0; i < chip8->num_phbs; i++) { @@ -2107,6 +2111,8 @@ static void pnv_machine_power8_class_init(ObjectClass *oc, void *data) pmc->compat = compat; pmc->compat_size = sizeof(compat); + + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PNV_PHB); } static void pnv_machine_power9_class_init(ObjectClass *oc, void *data) From patchwork Fri Jul 8 13:25:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1654139 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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[201.27.97.88]) by smtp.gmail.com with ESMTPSA id f108-20020a9d03f5000000b0060c00c3fde5sm18435797otf.72.2022.07.08.06.25.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 06:25:41 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, clg@kaod.org, fbarrat@linux.ibm.com, Daniel Henrique Barboza Subject: [PATCH 07/10] ppc/pnv: add PHB4 helpers for user created pnv-phb Date: Fri, 8 Jul 2022 10:25:19 -0300 Message-Id: <20220708132522.581382-8-danielhb413@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220708132522.581382-1-danielhb413@gmail.com> References: <20220708132522.581382-1-danielhb413@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::229; envelope-from=danielhb413@gmail.com; helo=mail-oi1-x229.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The PHB4 backend relies on a link with the corresponding PEC element. This is trivial to do during machine_init() time for default devices, but not so much for user created ones. pnv_phb4_get_pec() is a small variation of the function that was reverted by commit 9c10d86fee "ppc/pnv: Remove user-created PHB{3,4,5} devices". We'll use it to determine the appropriate PEC for a given user created pnv-phb that uses a PHB4 backend. This is done during realize() time, in pnv_phb_user_device_init(). Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c index 953c384bf6..9807d093f5 100644 --- a/hw/pci-host/pnv_phb.c +++ b/hw/pci-host/pnv_phb.c @@ -50,6 +50,34 @@ static void pnv_parent_bus_fixup(DeviceState *parent, DeviceState *child) } } +static PnvPhb4PecState *pnv_phb4_get_pec(PnvChip *chip, PnvPHB4 *phb, + Error **errp) +{ + Pnv9Chip *chip9 = PNV9_CHIP(chip); + int chip_id = phb->chip_id; + int index = phb->phb_id; + int i, j; + + for (i = 0; i < chip->num_pecs; i++) { + /* + * For each PEC, check the amount of phbs it supports + * and see if the given phb4 index matches an index. + */ + PnvPhb4PecState *pec = &chip9->pecs[i]; + + for (j = 0; j < pec->num_phbs; j++) { + if (index == pnv_phb4_pec_get_phb_id(pec, j)) { + return pec; + } + } + } + error_setg(errp, + "pnv-phb4 chip-id %d index %d didn't match any existing PEC", + chip_id, index); + + return NULL; +} + /* * Attach a root port device. * @@ -99,6 +127,17 @@ static void pnv_phb_user_device_init(PnvPHB *phb) chip8->num_phbs++; parent = OBJECT(phb->chip); + } else { + Error *local_err = NULL; + + phb->pec = pnv_phb4_get_pec(chip, PNV_PHB4(phb->backend), &local_err); + + if (local_err) { + error_propagate(&error_fatal, local_err); + return; + } + + parent = OBJECT(phb->pec); } /* From patchwork Fri Jul 8 13:25:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1654146 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=Yi8fJo6B; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LfZ5V6P4Wz9s07 for ; Fri, 8 Jul 2022 23:34:54 +1000 (AEST) Received: from localhost ([::1]:41170 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o9o8C-0006uU-Lk for incoming@patchwork.ozlabs.org; Fri, 08 Jul 2022 09:34:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35606) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o9nzO-00039I-QE; Fri, 08 Jul 2022 09:25:46 -0400 Received: from mail-oa1-x2f.google.com ([2001:4860:4864:20::2f]:43603) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o9nzM-00071j-4l; Fri, 08 Jul 2022 09:25:46 -0400 Received: by mail-oa1-x2f.google.com with SMTP id 586e51a60fabf-fe023ab520so29197704fac.10; Fri, 08 Jul 2022 06:25:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LILgjFOOuRkzWRbMsHSI0e73MhG07wdHnKtjGOst+WE=; b=Yi8fJo6B9RW6kP++SmrRtFeSjf3ROtzlPM3BjroSbonBpnjbKSWfyCGa6mKYIJjHbv Ghi5DgkcCsCKe0HoGY/lGpGvdJ6z0adVESqJOChRn1Eb4bzqDsyh8WiwWsy1J+yxmXD1 t2VcXbKeiWM2ny6REK6Dz+dbNvBS4AwX+adFr6pMBjQ22YtPCSeifk5vR0bmR2ocUdCz lX4kH6TfflioDMwHd96MGGgXLy4yo1o1smV+wFgW7LF7p0gjVS8/Oo9dF/tVPu1ozV5l At5qW0tuQ1wDRBQMrDX41ZlakCBdUuT2IMEMFRGprrCfEXGP3pst1UDy7oTCE6Brv8ee qReA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LILgjFOOuRkzWRbMsHSI0e73MhG07wdHnKtjGOst+WE=; b=LWfmgYcNotvqG/4bFw76+OaApErGReYgk4aXPgWTRXPnJiHNVUDVTJO24eY3K46UpF cLG7WWlBp9IpsEsowcXqB6LkKUBM82Bj1P/nPnwCLqbt1Ryj9Us/vOGKvRVm3epmr8VR gSgsfT6g8+Yl+PQ6qmGKdJ8QPWDduralTdtAYyviI7JcbSt/3B87V59EDfB20Ek1u9ZZ Sa/URmyEeupKuVGbYe2CwUCS8iTudXFSXF89HH/DvYCmxhrheTJ96bInZdMOgFery/rV rCPbr/u9fFmjBqcGa+wZ8pKNddbKAQpkcfWeHh1J+xj9d0FFPyIdeVuaDPPb942+EWdN Ewsg== X-Gm-Message-State: AJIora9s4jVrCJhwE12CGgG/aV7JJ5JHvD1XNXUzlTgHSEvzDA1hizjU GfKWPqFl3zOopiFPt0DnpT21zfQ3I/M= X-Google-Smtp-Source: AGRyM1tljiUqmg2w+xI/u0gzsDvzf5b0VQt3Z2uivC0qSZsH27BadBskf2DMcxeYbLlQ93qYiCdp3w== X-Received: by 2002:a05:6870:d90d:b0:108:6d45:ca16 with SMTP id gq13-20020a056870d90d00b001086d45ca16mr1859377oab.40.1657286743020; Fri, 08 Jul 2022 06:25:43 -0700 (PDT) Received: from balboa.ibmmodules.com (201-27-97-88.dsl.telesp.net.br. [201.27.97.88]) by smtp.gmail.com with ESMTPSA id f108-20020a9d03f5000000b0060c00c3fde5sm18435797otf.72.2022.07.08.06.25.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 06:25:42 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, clg@kaod.org, fbarrat@linux.ibm.com, Daniel Henrique Barboza Subject: [PATCH 08/10] ppc/pnv: enable user created pnv-phb powernv9 Date: Fri, 8 Jul 2022 10:25:20 -0300 Message-Id: <20220708132522.581382-9-danielhb413@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220708132522.581382-1-danielhb413@gmail.com> References: <20220708132522.581382-1-danielhb413@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2001:4860:4864:20::2f; envelope-from=danielhb413@gmail.com; helo=mail-oa1-x2f.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Enable pnv-phb user created devices for powernv9 now that we have everything in place. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb.c | 2 +- hw/pci-host/pnv_phb4_pec.c | 6 ++++-- hw/ppc/pnv.c | 2 ++ 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c index 9807d093f5..c241e90036 100644 --- a/hw/pci-host/pnv_phb.c +++ b/hw/pci-host/pnv_phb.c @@ -211,7 +211,7 @@ static void pnv_phb_realize(DeviceState *dev, Error **errp) pnv_phb4_bus_init(dev, PNV_PHB4(phb->backend)); } - if (phb->version == 3 && !defaults_enabled()) { + if (!defaults_enabled()) { return; } diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c index 8dc363d69c..9871f462cd 100644 --- a/hw/pci-host/pnv_phb4_pec.c +++ b/hw/pci-host/pnv_phb4_pec.c @@ -146,8 +146,10 @@ static void pnv_pec_realize(DeviceState *dev, Error **errp) pec->num_phbs = pecc->num_phbs[pec->index]; /* Create PHBs if running with defaults */ - for (i = 0; i < pec->num_phbs; i++) { - pnv_pec_default_phb_realize(pec, i, errp); + if (defaults_enabled()) { + for (i = 0; i < pec->num_phbs; i++) { + pnv_pec_default_phb_realize(pec, i, errp); + } } /* Initialize the XSCOM regions for the PEC registers */ diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index f5af40ce39..32040a52c8 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -2138,6 +2138,8 @@ static void pnv_machine_power9_class_init(ObjectClass *oc, void *data) pmc->compat = compat; pmc->compat_size = sizeof(compat); pmc->dt_power_mgt = pnv_dt_power_mgt; + + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PNV_PHB); } static void pnv_machine_power10_class_init(ObjectClass *oc, void *data) From patchwork Fri Jul 8 13:25:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1654150 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=poLaTrbr; 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[201.27.97.88]) by smtp.gmail.com with ESMTPSA id f108-20020a9d03f5000000b0060c00c3fde5sm18435797otf.72.2022.07.08.06.25.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 06:25:44 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, clg@kaod.org, fbarrat@linux.ibm.com, Daniel Henrique Barboza Subject: [PATCH 09/10] ppc/pnv: change pnv_phb4_get_pec() to also retrieve chip10->pecs Date: Fri, 8 Jul 2022 10:25:21 -0300 Message-Id: <20220708132522.581382-10-danielhb413@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220708132522.581382-1-danielhb413@gmail.com> References: <20220708132522.581382-1-danielhb413@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2001:4860:4864:20::34; envelope-from=danielhb413@gmail.com; helo=mail-oa1-x34.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The function assumes that we're always dealing with a PNV9_CHIP() object. This is not the case when the pnv-phb device belongs to a powernv10 machine. Change pnv_phb4_get_pec() to be able to work with PNV10_CHIP() if necessary. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c index c241e90036..a5f3a8d256 100644 --- a/hw/pci-host/pnv_phb.c +++ b/hw/pci-host/pnv_phb.c @@ -53,17 +53,30 @@ static void pnv_parent_bus_fixup(DeviceState *parent, DeviceState *child) static PnvPhb4PecState *pnv_phb4_get_pec(PnvChip *chip, PnvPHB4 *phb, Error **errp) { - Pnv9Chip *chip9 = PNV9_CHIP(chip); + PnvPHB *phb_base = phb->phb_base; + PnvPhb4PecState *pecs = NULL; int chip_id = phb->chip_id; int index = phb->phb_id; int i, j; + if (phb_base->version == 4) { + Pnv9Chip *chip9 = PNV9_CHIP(chip); + + pecs = chip9->pecs; + } else if (phb_base->version == 5) { + Pnv10Chip *chip10 = PNV10_CHIP(chip); + + pecs = chip10->pecs; + } else { + return NULL; + } + for (i = 0; i < chip->num_pecs; i++) { /* * For each PEC, check the amount of phbs it supports * and see if the given phb4 index matches an index. */ - PnvPhb4PecState *pec = &chip9->pecs[i]; + PnvPhb4PecState *pec = &pecs[i]; for (j = 0; j < pec->num_phbs; j++) { if (index == pnv_phb4_pec_get_phb_id(pec, j)) { From patchwork Fri Jul 8 13:25:22 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Henrique Barboza X-Patchwork-Id: 1654152 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=cHgwuYPI; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LfZMZ6cMmz9s07 for ; Fri, 8 Jul 2022 23:47:06 +1000 (AEST) Received: from localhost ([::1]:58086 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o9oK0-0002hH-QH for incoming@patchwork.ozlabs.org; Fri, 08 Jul 2022 09:47:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35642) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o9nzT-0003Dh-UC; Fri, 08 Jul 2022 09:25:53 -0400 Received: from mail-oa1-x2e.google.com ([2001:4860:4864:20::2e]:47018) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o9nzR-00075X-7W; Fri, 08 Jul 2022 09:25:51 -0400 Received: by mail-oa1-x2e.google.com with SMTP id 586e51a60fabf-1013ecaf7e0so29156791fac.13; Fri, 08 Jul 2022 06:25:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sDexHeGMq2oItEKHgJ+IRqrh4m3ya+HwYZSSXayG/mI=; b=cHgwuYPI/fh6HNGUG0Xi5EkwpnEXjRzS4ghpJoM1tZM4NDIwE/UjAhi44T0OG0KEiI EHSyp15LKdXvRGxKZa9BariSUdve7l1gplB7eV+6I64ADa6jt64TCztPj6cJNH71qcq7 v61fbkxWA8aukOjRTYJIMBQcLfJhuNs5n+S9iQFGIK/I3BfVYsnXxxyaNfB6LWcrZp5+ BLWnGL7pe4HghZeb2qB6qX61cPnfOySZ73y3setn6TG0Hk9NMKz3kbXcm2gG6YCuEk6r oMX2bCzUkqpbTx19+s7kcE1wTM+tSrNDcIKXPwTeUEKLrCG20qhm1cISBWBwOSuMY3y0 yFMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sDexHeGMq2oItEKHgJ+IRqrh4m3ya+HwYZSSXayG/mI=; b=ZtTzEvuoOUMAcnVhWqTVBszaVBe52HLmS4ZsFJjrh6FvOOAi/HYYnO4MqSMr255Hcf JUFKQfTQbdNs8GOCzA/dQ67RhovhZXya+y91oh4rH/zd5woGaWksbddXe7KBEoBOTWr5 iMDJMdYuRi9zDoSJQN8gcVHMwpczNWVkEPYVqWywC/kjzcDwYCqg3+M9IPEwgX4B0Xzu jBmWqgXiJHp0FJJNa3aROaAW91ku3Lk0YDJj/AP+DSip1VUC2XdYrgDELYUCwsjKhohs XN/GV1+rZK4VgP2qcdnu3OWqoecjk5736sXZOnSonuTLZSL3/NQ/6zz4t3chYUaOWQ/Z YSRA== X-Gm-Message-State: AJIora857j4x9PmvSAdQfahgjGFfsnEhJJ2wwovFHnNjtowxB3eZKihG m3SmeE88JdQbUSU1WAONDgLNMmSGDlQ= X-Google-Smtp-Source: AGRyM1uNCPbYjdHlPHRTQHugoZaHQuvhyvwIjxXcZj1sDvakynPzLWL/BPCnYFXT7+4nAykAbvGffw== X-Received: by 2002:a05:6870:5254:b0:10b:eaba:ef3c with SMTP id o20-20020a056870525400b0010beabaef3cmr5922120oai.263.1657286746763; Fri, 08 Jul 2022 06:25:46 -0700 (PDT) Received: from balboa.ibmmodules.com (201-27-97-88.dsl.telesp.net.br. [201.27.97.88]) by smtp.gmail.com with ESMTPSA id f108-20020a9d03f5000000b0060c00c3fde5sm18435797otf.72.2022.07.08.06.25.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 06:25:46 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, clg@kaod.org, fbarrat@linux.ibm.com, Daniel Henrique Barboza Subject: [PATCH 10/10] ppc/pnv: user creatable pnv-phb for powernv10 Date: Fri, 8 Jul 2022 10:25:22 -0300 Message-Id: <20220708132522.581382-11-danielhb413@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220708132522.581382-1-danielhb413@gmail.com> References: <20220708132522.581382-1-danielhb413@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2001:4860:4864:20::2e; envelope-from=danielhb413@gmail.com; helo=mail-oa1-x2e.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Given that powernv9 and powernv10 uses the same pnv-phb backend, the logic to allow user created pnv-phbs for powernv10 is already in place. Let's flip the switch. Signed-off-by: Daniel Henrique Barboza --- hw/ppc/pnv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 32040a52c8..b9c1bbaa84 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -2163,6 +2163,8 @@ static void pnv_machine_power10_class_init(ObjectClass *oc, void *data) pmc->dt_power_mgt = pnv_dt_power_mgt; xfc->match_nvt = pnv10_xive_match_nvt; + + machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PNV_PHB); } static bool pnv_machine_get_hb(Object *obj, Error **errp)