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([122.255.60.245]) by smtp.gmail.com with ESMTPSA id d18-20020a170903231200b0016bf7981d0bsm508454plh.86.2022.07.05.04.00.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 04:00:04 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Song Gao , Thomas Huth Subject: [PULL 1/6] hw/rtc/ls7a_rtc: Drop unused inline functions Date: Tue, 5 Jul 2022 16:29:51 +0530 Message-Id: <20220705105957.1144514-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220705105957.1144514-1-richard.henderson@linaro.org> References: <20220705105957.1144514-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Remove toy_val_to_time_mon and toy_val_to_time_year as unused, to avoid a build failure with clang. Remove all of the other inline markers too so that this does not creep back in. Reviewed-by: Song Gao Reviewed-by: Thomas Huth Signed-off-by: Richard Henderson --- hw/rtc/ls7a_rtc.c | 27 ++++++--------------------- 1 file changed, 6 insertions(+), 21 deletions(-) diff --git a/hw/rtc/ls7a_rtc.c b/hw/rtc/ls7a_rtc.c index e8b75701e4..1f9e38a735 100644 --- a/hw/rtc/ls7a_rtc.c +++ b/hw/rtc/ls7a_rtc.c @@ -86,46 +86,31 @@ struct LS7ARtcState { }; /* switch nanoseconds time to rtc ticks */ -static inline uint64_t ls7a_rtc_ticks(void) +static uint64_t ls7a_rtc_ticks(void) { return qemu_clock_get_ns(rtc_clock) * LS7A_RTC_FREQ / NANOSECONDS_PER_SECOND; } /* switch rtc ticks to nanoseconds */ -static inline uint64_t ticks_to_ns(uint64_t ticks) +static uint64_t ticks_to_ns(uint64_t ticks) { return ticks * NANOSECONDS_PER_SECOND / LS7A_RTC_FREQ; } -static inline bool toy_enabled(LS7ARtcState *s) +static bool toy_enabled(LS7ARtcState *s) { return FIELD_EX32(s->cntrctl, RTC_CTRL, TOYEN) && FIELD_EX32(s->cntrctl, RTC_CTRL, EO); } -static inline bool rtc_enabled(LS7ARtcState *s) +static bool rtc_enabled(LS7ARtcState *s) { return FIELD_EX32(s->cntrctl, RTC_CTRL, RTCEN) && FIELD_EX32(s->cntrctl, RTC_CTRL, EO); } -/* parse toy value to struct tm */ -static inline void toy_val_to_time_mon(uint64_t toy_val, struct tm *tm) -{ - tm->tm_sec = FIELD_EX32(toy_val, TOY, SEC); - tm->tm_min = FIELD_EX32(toy_val, TOY, MIN); - tm->tm_hour = FIELD_EX32(toy_val, TOY, HOUR); - tm->tm_mday = FIELD_EX32(toy_val, TOY, DAY); - tm->tm_mon = FIELD_EX32(toy_val, TOY, MON) - 1; -} - -static inline void toy_val_to_time_year(uint64_t toy_year, struct tm *tm) -{ - tm->tm_year = toy_year; -} - /* parse struct tm to toy value */ -static inline uint64_t toy_time_to_val_mon(struct tm *tm) +static uint64_t toy_time_to_val_mon(const struct tm *tm) { uint64_t val = 0; @@ -137,7 +122,7 @@ static inline uint64_t toy_time_to_val_mon(struct tm *tm) return val; } -static inline void toymatch_val_to_time(LS7ARtcState *s, uint64_t val, struct tm *tm) +static void toymatch_val_to_time(LS7ARtcState *s, uint64_t val, struct tm *tm) { qemu_get_timedate(tm, s->offset_toy); tm->tm_sec = FIELD_EX32(val, TOY_MATCH, SEC); From patchwork Tue Jul 5 10:59:53 2022 Content-Type: text/plain; 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([122.255.60.245]) by smtp.gmail.com with ESMTPSA id d18-20020a170903231200b0016bf7981d0bsm508454plh.86.2022.07.05.04.00.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 04:00:08 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Song Gao Subject: [PULL 2/6] target/loongarch: Clean up tlb when cpu reset Date: Tue, 5 Jul 2022 16:29:53 +0530 Message-Id: <20220705105957.1144514-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220705105957.1144514-1-richard.henderson@linaro.org> References: <20220705105957.1144514-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Song Gao We should make sure that tlb is clean when cpu reset. Signed-off-by: Song Gao Message-Id: <20220705070950.2364243-1-gaosong@loongson.cn> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- target/loongarch/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index d2d4667a34..e21715592a 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -479,6 +479,7 @@ static void loongarch_cpu_reset(DeviceState *dev) #ifndef CONFIG_USER_ONLY env->pc = 0x1c000000; + memset(env->tlb, 0, sizeof(env->tlb)); #endif restore_fp_status(env); From patchwork Tue Jul 5 10:59:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1652457 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=KmtB3jfz; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Lcg5Q66P1z9s1l for ; Tue, 5 Jul 2022 21:13:13 +1000 (AEST) Received: from localhost ([::1]:54790 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o8gUQ-0003Vq-1d for incoming@patchwork.ozlabs.org; Tue, 05 Jul 2022 07:13:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40308) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o8gI0-0006wC-3n for qemu-devel@nongnu.org; Tue, 05 Jul 2022 07:00:26 -0400 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]:37728) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o8gHt-0000hU-B7 for qemu-devel@nongnu.org; Tue, 05 Jul 2022 07:00:17 -0400 Received: by mail-pl1-x633.google.com with SMTP id k14so10696698plh.4 for ; Tue, 05 Jul 2022 04:00:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Ky07ThqARHiFkhWeIFBW8AVKAgEQoX250iifcE1+G+E=; b=KmtB3jfzz+e1Wg51/pnc8hIK7nGZDNyHlF7SF6Xyjwe3WHxEg0PE1psm6Uca243pLX mrPEyuRnSQ/uEacyX7/0nIhewkth3BQZgoptzfwoFZ/zZL+EMoIRPS/71xVZQUnPQjU9 OBOcC8wo2wnk1E+HZS5KALz4mIetaCAXLvtHMCf8heoFvrqtRwkf2tI+ozERf72Qs+dZ WNAVXvuLGGW4Ew/fmozyTlFmVIdL9RO8KgQTYZeGxAqNNpPoBh9jZSbLxkYPM+a3DI5N Ga8bx79bWKbffHSI0v86qrRyv0imKKZBuyrb1+p7iHnsBEU3hHRwmtnjNgOrki/+rkCX M03Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Ky07ThqARHiFkhWeIFBW8AVKAgEQoX250iifcE1+G+E=; b=PlqV1qd9xV30rxe6qHhxa4yTy8eQwJKZAfHYLCN2osrz9cftbQ/C2FiNuoqmXYHN9H Ss1ylGTJj6lhW1IKgkC7DzCtZ+DrpMV1QLdxhwCIU0sfC4006Nqav3d43WPnY8tnLyY9 SAS5PZfmY2uAaLFSbmwJ/xlDe9tsUwWABjgK48IKLq2qreY9mU4mwcwyss62BFtRk2nG MqknzRc6kyoX74qVIrjaZL0zHvqsVB8cf+yFLcX1AuX84gyzPKJOV/rs7pdRHY6syF/R eRG4kFtlGURMILK6nCocOKWZr7mSvaVzSI7prKar5NueqTU+pBP5kDt6ziPu9Z0O/64g MODQ== X-Gm-Message-State: AJIora8WVtJEf5cdKeiNp0Q2g/ETauak7UjCHucchO33wVs5wJGzFiNA lKy9PPp86UmgR8U2kV9IV7AolGHnd/lllzx4 X-Google-Smtp-Source: AGRyM1vdVrE6wWXJkw7QAoqcSmFDDoO5q1NhrAVCbjaae0l2L40gpCR+DQrJx2V903RPhQ77ozDh5g== X-Received: by 2002:a17:902:d2c4:b0:16a:5c48:8312 with SMTP id n4-20020a170902d2c400b0016a5c488312mr41318856plc.45.1657018811905; Tue, 05 Jul 2022 04:00:11 -0700 (PDT) Received: from stoup.. ([122.255.60.245]) by smtp.gmail.com with ESMTPSA id d18-20020a170903231200b0016bf7981d0bsm508454plh.86.2022.07.05.04.00.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 04:00:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Song Gao Subject: [PULL 3/6] scripts/qemu-binfmt-conf: Add LoongArch to qemu_get_family() Date: Tue, 5 Jul 2022 16:29:54 +0530 Message-Id: <20220705105957.1144514-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220705105957.1144514-1-richard.henderson@linaro.org> References: <20220705105957.1144514-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Song Gao qemu_get_family() needs to add LoongArch support. Signed-off-by: Song Gao Message-Id: <20220705065943.2353930-1-gaosong@loongson.cn> Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson --- scripts/qemu-binfmt-conf.sh | 3 +++ 1 file changed, 3 insertions(+) diff --git a/scripts/qemu-binfmt-conf.sh b/scripts/qemu-binfmt-conf.sh index 1f4e2cd19d..6ef9f118d9 100755 --- a/scripts/qemu-binfmt-conf.sh +++ b/scripts/qemu-binfmt-conf.sh @@ -171,6 +171,9 @@ qemu_get_family() { riscv*) echo "riscv" ;; + loongarch*) + echo "loongarch" + ;; *) echo "$cpu" ;; From patchwork Tue Jul 5 10:59:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1652461 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=EQU3B7Lx; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LcgFh2h10z9s1l for ; Tue, 5 Jul 2022 21:20:22 +1000 (AEST) Received: from localhost ([::1]:36964 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o8gbL-0002I5-Pi for incoming@patchwork.ozlabs.org; Tue, 05 Jul 2022 07:20:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40320) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o8gI1-0006wD-3Y for qemu-devel@nongnu.org; Tue, 05 Jul 2022 07:00:26 -0400 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]:41800) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o8gHv-0000i1-Oj for qemu-devel@nongnu.org; Tue, 05 Jul 2022 07:00:20 -0400 Received: by mail-pl1-x629.google.com with SMTP id j12so3900026plj.8 for ; Tue, 05 Jul 2022 04:00:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=y9T0Dgh+y//OTwBqoQX1MWiwDSflPGnZ8HYkylQu7wI=; b=EQU3B7LxNZnUFF7ESH7A/1GhSlgrkBgDNDuRfCBJXoM+VAUv18YshTvRl8ZAAuDBMl HcLjUy8aLVpiB9e3TuqkjEoo9VqX2R/Kaz31Ucw/I56rEk6TqqMJvCZyiOvyFGN3sIeF coCxsORuLHRAwlDpZMzSF59JRpeF6GttLcBOAgL/5UrvV/zBgc+5A69Pdz3JA6mY7LQe W+BQww2Ieup1b4er5VkIFN3jtktnyYb6m/0uTgPPdaYZTWpPTT/5/kb9fEirRpU9IPcH XdNSKApqRV4wPVI5LmXS8XbU8WRucojlbThLeEQ3mcC/1Z40kLajdeNvln84lDJ9VS96 ounQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=y9T0Dgh+y//OTwBqoQX1MWiwDSflPGnZ8HYkylQu7wI=; b=TRq77//GX/YM7Gp2wYyTfm26c7IICvXEGcGWADXxt7gq5JgOnV3TTIVNrZiJY9vPAg xhcaSD285KNSJo7m6r9EjXQIzeVs+cIQqtLGEaQE3I3j95OLHcaOrZ1/ASYW8tOHm7Sv 6T98nnuGawIdOkpWub52UQur0BP+h4m8atcOF47coIBOf8nF92ei3JbvT4Bd+7rYZmOk FgyMafEZLtP1JVwcrcoEcdKeN2M0h0J5EzXcMeV5bjHJHYPbUhOyhA69zG8iakpJKRJe 4UJYsAyQ+Gs89hyJVhQrmIx2cB/yDHSfRQtOQ/UUZUH8Q2FqjefieICPgsh2PTvRZcad T2xg== X-Gm-Message-State: AJIora/jRYfXkQGpzgLZekt9W7Qqer4gbQeW/3x8SAec3Rx9hPtgxRPB s5Oh0HN9s5AW+x01JDb9OqKNCXTrPauVUPb0 X-Google-Smtp-Source: AGRyM1vk+l+yrTSt3CNPYZs13Y+pRUqgbaL9l9oZ4x6hYFYcnAjLyUjVCs/8lhRDaJJe4SVxbGmMnw== X-Received: by 2002:a17:902:f543:b0:16a:54c6:78c0 with SMTP id h3-20020a170902f54300b0016a54c678c0mr39498075plf.22.1657018814491; Tue, 05 Jul 2022 04:00:14 -0700 (PDT) Received: from stoup.. ([122.255.60.245]) by smtp.gmail.com with ESMTPSA id d18-20020a170903231200b0016bf7981d0bsm508454plh.86.2022.07.05.04.00.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 04:00:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Song Gao , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PULL 4/6] tcg/tci: Remove CONFIG_DEBUG_TCG_INTERPRETER Date: Tue, 5 Jul 2022 16:29:55 +0530 Message-Id: <20220705105957.1144514-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220705105957.1144514-1-richard.henderson@linaro.org> References: <20220705105957.1144514-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" There is nothing in this environment variable that cannot be done better with -d flags. There is nothing special about TCI that warrants this hack. Moreover, it does not compile -- remove it. Reported-by: Song Gao Reviewed-by: Song Gao Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- tcg/tci/tcg-target.h | 5 ----- tcg/tci/tcg-target.c.inc | 7 ------- 2 files changed, 12 deletions(-) diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 033e613f24..ceb36c4f7a 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -53,11 +53,6 @@ # error Unknown pointer size for tci target #endif -#ifdef CONFIG_DEBUG_TCG -/* Enable debug output. */ -#define CONFIG_DEBUG_TCG_INTERPRETER -#endif - /* Optional instructions. */ #define TCG_TARGET_HAS_bswap16_i32 1 diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 98337c567a..f3d7441e06 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -823,13 +823,6 @@ static void tcg_out_nop_fill(tcg_insn_unit *p, int count) static void tcg_target_init(TCGContext *s) { -#if defined(CONFIG_DEBUG_TCG_INTERPRETER) - const char *envval = getenv("DEBUG_TCG"); - if (envval) { - qemu_set_log(strtol(envval, NULL, 0)); - } -#endif - /* The current code uses uint8_t for tcg operations. */ tcg_debug_assert(tcg_op_defs_max <= UINT8_MAX); From patchwork Tue Jul 5 10:59:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1652460 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=QbM+VBO/; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LcgBD58Xjz9s1l for ; Tue, 5 Jul 2022 21:17:24 +1000 (AEST) Received: from localhost ([::1]:60642 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1o8gYT-0007Xi-JX for incoming@patchwork.ozlabs.org; Tue, 05 Jul 2022 07:17:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40342) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1o8gI5-0006wF-Us for qemu-devel@nongnu.org; Tue, 05 Jul 2022 07:00:26 -0400 Received: from mail-pj1-x1034.google.com ([2607:f8b0:4864:20::1034]:38657) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1o8gHz-0000iF-SI for qemu-devel@nongnu.org; Tue, 05 Jul 2022 07:00:24 -0400 Received: by mail-pj1-x1034.google.com with SMTP id 89-20020a17090a09e200b001ef7638e536so8160466pjo.3 for ; Tue, 05 Jul 2022 04:00:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AohpMsSvo2wFsE5mlCbRYktMX9SmmQeeRLqLmCJ9PEc=; b=QbM+VBO/4m9rXFV9gTIQvNTzkO0Kcfq0sbNYO2SQVX3LGgd4orATukT7fW0kFO5wNa GvQCqf9bu37Z0fotiIo1lpJdlr2b43K/HRkLir9/XCQD9SNHQQ9HQr3NlcpwTyLGNhq1 QdPuO0/d9KR7QZkf0dnAEkkuY+vG0Q5durlQOnbGERfQLmukNgWvlYJuVuava+W3gCJ4 g7NmqG0j4L5gvcv2DroJrsnCrVaPLZy0+eUJVQpfuaFerZMypU20apLu4LqJJ39E2eg5 WeOtrKf99cqPvggxadZsbCb1rdgJahttPHIuN07UvCxM1nyU9oDGyC3vZUjlR7DhF7n1 QlCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AohpMsSvo2wFsE5mlCbRYktMX9SmmQeeRLqLmCJ9PEc=; b=dwFP+wW4sOKxt2U++HE1diG9WEhTq39FleKvbUFt2vH//KSOBAmdZCfmH7W8+fwOHs vVZM/OPLvB8nE6p5alnZZaSP8eKtkZqp4HD0nMoGtS8iaZgu3bVxArFd8bKDBZfp9w3g ecRNlA1iba4Qd4eeTkUIkOY9i6/yrMPx4KRjbO8Wk2sqHLMLRQISN9CugQk8JmFZbrMg e6+nLKNIVGz5huBMAiDoA2Ih1xhu3phyv0Jr2l4/Mhf+GLkht4S+o9MwvpCtLGsvgIqC SP2kMK18/0O6DjR4yifey7YUNQz+kJ6/f+yzn8RNiWEBc9qfEGtTU55pp0bwTyD+kWPV oJFw== X-Gm-Message-State: AJIora97h5UOh4nHybRLnaZ8XUKAIPWB7EYJnRxymZSA3q53n7TCwcrc C+rayg9FjDoj8v9UtSA7nQ0SyOQu9wBpBE9l X-Google-Smtp-Source: AGRyM1tAolWC62S5SOh4pOmn4V2QGGkQ2gTYUJKEVg/tBfLsZrulvwILGwKW033CSXRhzxkdAjMBwA== X-Received: by 2002:a17:902:7893:b0:16a:6d44:2556 with SMTP id q19-20020a170902789300b0016a6d442556mr39564318pll.166.1657018816798; Tue, 05 Jul 2022 04:00:16 -0700 (PDT) Received: from stoup.. ([122.255.60.245]) by smtp.gmail.com with ESMTPSA id d18-20020a170903231200b0016bf7981d0bsm508454plh.86.2022.07.05.04.00.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 04:00:16 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Xiaojuan Yang Subject: [PULL 5/6] hw/intc/loongarch_ipi: Fix ipi device access of 64bits Date: Tue, 5 Jul 2022 16:29:56 +0530 Message-Id: <20220705105957.1144514-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220705105957.1144514-1-richard.henderson@linaro.org> References: <20220705105957.1144514-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Xiaojuan Yang In general loongarch ipi device, 32bit registers is emulated, however for anysend/mailsend device only 64bit register access is supported. So separate the ipi memory region into two regions, including 32 bits and 64 bits. Signed-off-by: Xiaojuan Yang Message-Id: <20220705064901.2353349-2-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson --- include/hw/intc/loongarch_ipi.h | 7 +++--- hw/intc/loongarch_ipi.c | 38 +++++++++++++++++++++++++++------ hw/loongarch/loongson3.c | 5 ++++- 3 files changed, 39 insertions(+), 11 deletions(-) diff --git a/include/hw/intc/loongarch_ipi.h b/include/hw/intc/loongarch_ipi.h index 996ed7ea93..0ee48fca55 100644 --- a/include/hw/intc/loongarch_ipi.h +++ b/include/hw/intc/loongarch_ipi.h @@ -24,8 +24,9 @@ #define IOCSR_MAIL_SEND 0x48 #define IOCSR_ANY_SEND 0x158 -/* IPI system memory address */ -#define IPI_SYSTEM_MEM 0x1fe01000 +#define MAIL_SEND_ADDR (SMP_IPI_MAILBOX + IOCSR_MAIL_SEND) +#define MAIL_SEND_OFFSET 0 +#define ANY_SEND_OFFSET (IOCSR_ANY_SEND - IOCSR_MAIL_SEND) #define MAX_IPI_CORE_NUM 4 #define MAX_IPI_MBX_NUM 4 @@ -46,7 +47,7 @@ typedef struct IPICore { struct LoongArchIPI { SysBusDevice parent_obj; MemoryRegion ipi_iocsr_mem[MAX_IPI_CORE_NUM]; - MemoryRegion ipi_system_mem[MAX_IPI_CORE_NUM]; + MemoryRegion ipi64_iocsr_mem[MAX_IPI_CORE_NUM]; }; #endif diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c index 66bee93675..b8b1b9cd53 100644 --- a/hw/intc/loongarch_ipi.c +++ b/hw/intc/loongarch_ipi.c @@ -150,12 +150,6 @@ static void loongarch_ipi_writel(void *opaque, hwaddr addr, uint64_t val, case IOCSR_IPI_SEND: ipi_send(val); break; - case IOCSR_MAIL_SEND: - mail_send(val); - break; - case IOCSR_ANY_SEND: - any_send(val); - break; default: qemu_log_mask(LOG_UNIMP, "invalid write: %x", (uint32_t)addr); break; @@ -172,6 +166,32 @@ static const MemoryRegionOps loongarch_ipi_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; +/* mail send and any send only support writeq */ +static void loongarch_ipi_writeq(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + addr &= 0xfff; + switch (addr) { + case MAIL_SEND_OFFSET: + mail_send(val); + break; + case ANY_SEND_OFFSET: + any_send(val); + break; + default: + break; + } +} + +static const MemoryRegionOps loongarch_ipi64_ops = { + .write = loongarch_ipi_writeq, + .impl.min_access_size = 8, + .impl.max_access_size = 8, + .valid.min_access_size = 8, + .valid.max_access_size = 8, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + static void loongarch_ipi_init(Object *obj) { int cpu; @@ -187,8 +207,12 @@ static void loongarch_ipi_init(Object *obj) lams = LOONGARCH_MACHINE(machine); for (cpu = 0; cpu < MAX_IPI_CORE_NUM; cpu++) { memory_region_init_io(&s->ipi_iocsr_mem[cpu], obj, &loongarch_ipi_ops, - &lams->ipi_core[cpu], "loongarch_ipi_iocsr", 0x100); + &lams->ipi_core[cpu], "loongarch_ipi_iocsr", 0x48); sysbus_init_mmio(sbd, &s->ipi_iocsr_mem[cpu]); + + memory_region_init_io(&s->ipi64_iocsr_mem[cpu], obj, &loongarch_ipi64_ops, + &lams->ipi_core[cpu], "loongarch_ipi64_iocsr", 0x118); + sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem[cpu]); qdev_init_gpio_out(DEVICE(obj), &lams->ipi_core[cpu].irq, 1); } } diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c index 403dd91e11..15fddfc4f5 100644 --- a/hw/loongarch/loongson3.c +++ b/hw/loongarch/loongson3.c @@ -230,7 +230,10 @@ static void loongarch_irq_init(LoongArchMachineState *lams) /* IPI iocsr memory region */ memory_region_add_subregion(&env->system_iocsr, SMP_IPI_MAILBOX, sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), - cpu)); + cpu * 2)); + memory_region_add_subregion(&env->system_iocsr, MAIL_SEND_ADDR, + sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), + cpu * 2 + 1)); /* extioi iocsr memory region */ memory_region_add_subregion(&env->system_iocsr, APIC_BASE, sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi), From patchwork Tue Jul 5 10:59:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 1652463 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256 header.s=google header.b=L4pE2MJ4; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4LcgKT5hPfz9s1l for ; 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([122.255.60.245]) by smtp.gmail.com with ESMTPSA id d18-20020a170903231200b0016bf7981d0bsm508454plh.86.2022.07.05.04.00.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 04:00:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Xiaojuan Yang Subject: [PULL 6/6] hw/intc/loongarch_ipi: Fix mail send and any send function Date: Tue, 5 Jul 2022 16:29:57 +0530 Message-Id: <20220705105957.1144514-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220705105957.1144514-1-richard.henderson@linaro.org> References: <20220705105957.1144514-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Xiaojuan Yang By the document of ipi mailsend device, byte is written only when the mask bit is 0. The original code discards mask bit and overwrite the data always, this patch fixes the issue. Signed-off-by: Xiaojuan Yang Message-Id: <20220705064901.2353349-3-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson --- hw/intc/loongarch_ipi.c | 54 +++++++++++++++++++++++------------------ 1 file changed, 31 insertions(+), 23 deletions(-) diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c index b8b1b9cd53..4f3c58f872 100644 --- a/hw/intc/loongarch_ipi.c +++ b/hw/intc/loongarch_ipi.c @@ -50,35 +50,45 @@ static uint64_t loongarch_ipi_readl(void *opaque, hwaddr addr, unsigned size) return ret; } -static int get_ipi_data(target_ulong val) +static void send_ipi_data(CPULoongArchState *env, target_ulong val, target_ulong addr) { - int i, mask, data; + int i, mask = 0, data = 0; - data = val >> 32; - mask = (val >> 27) & 0xf; - - for (i = 0; i < 4; i++) { - if ((mask >> i) & 1) { - data &= ~(0xff << (i * 8)); + /* + * bit 27-30 is mask for byte writing, + * if the mask is 0, we need not to do anything. + */ + if ((val >> 27) & 0xf) { + data = address_space_ldl(&env->address_space_iocsr, addr, + MEMTXATTRS_UNSPECIFIED, NULL); + for (i = 0; i < 4; i++) { + /* get mask for byte writing */ + if (val & (0x1 << (27 + i))) { + mask |= 0xff << (i * 8); + } } } - return data; + + data &= mask; + data |= (val >> 32) & ~mask; + address_space_stl(&env->address_space_iocsr, addr, + data, MEMTXATTRS_UNSPECIFIED, NULL); } static void ipi_send(uint64_t val) { int cpuid, data; CPULoongArchState *env; + CPUState *cs; + LoongArchCPU *cpu; cpuid = (val >> 16) & 0x3ff; /* IPI status vector */ data = 1 << (val & 0x1f); - qemu_mutex_lock_iothread(); - CPUState *cs = qemu_get_cpu(cpuid); - LoongArchCPU *cpu = LOONGARCH_CPU(cs); + cs = qemu_get_cpu(cpuid); + cpu = LOONGARCH_CPU(cs); env = &cpu->env; loongarch_cpu_set_irq(cpu, IRQ_IPI, 1); - qemu_mutex_unlock_iothread(); address_space_stl(&env->address_space_iocsr, 0x1008, data, MEMTXATTRS_UNSPECIFIED, NULL); @@ -86,23 +96,23 @@ static void ipi_send(uint64_t val) static void mail_send(uint64_t val) { - int cpuid, data; + int cpuid; hwaddr addr; CPULoongArchState *env; + CPUState *cs; + LoongArchCPU *cpu; cpuid = (val >> 16) & 0x3ff; addr = 0x1020 + (val & 0x1c); - CPUState *cs = qemu_get_cpu(cpuid); - LoongArchCPU *cpu = LOONGARCH_CPU(cs); + cs = qemu_get_cpu(cpuid); + cpu = LOONGARCH_CPU(cs); env = &cpu->env; - data = get_ipi_data(val); - address_space_stl(&env->address_space_iocsr, addr, - data, MEMTXATTRS_UNSPECIFIED, NULL); + send_ipi_data(env, val, addr); } static void any_send(uint64_t val) { - int cpuid, data; + int cpuid; hwaddr addr; CPULoongArchState *env; @@ -111,9 +121,7 @@ static void any_send(uint64_t val) CPUState *cs = qemu_get_cpu(cpuid); LoongArchCPU *cpu = LOONGARCH_CPU(cs); env = &cpu->env; - data = get_ipi_data(val); - address_space_stl(&env->address_space_iocsr, addr, - data, MEMTXATTRS_UNSPECIFIED, NULL); + send_ipi_data(env, val, addr); } static void loongarch_ipi_writel(void *opaque, hwaddr addr, uint64_t val,