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Fri, 13 May 2022 17:07:16 +0000 (GMT) From: Eddie James To: openbmc@lists.ozlabs.org Subject: [PATCH u-boot v2019.04-aspeed-openbmc v2 1/9] tpm: Add more TPM2 definitions Date: Fri, 13 May 2022 12:07:07 -0500 Message-Id: <20220513170715.43475-2-eajames@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220513170715.43475-1-eajames@linux.ibm.com> References: <20220513170715.43475-1-eajames@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: N-82p9mAhiyZxHuWjzce5huK1yD4HOQa X-Proofpoint-ORIG-GUID: N-82p9mAhiyZxHuWjzce5huK1yD4HOQa X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-13_09,2022-05-13_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 priorityscore=1501 suspectscore=0 mlxlogscore=779 adultscore=0 malwarescore=0 mlxscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205130073 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cjengel@us.ibm.com, joel@jms.id.au Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" From: Simon Glass Add definitions for access and status. Need to drop the mixed case. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- include/tpm-v2.h | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/include/tpm-v2.h b/include/tpm-v2.h index ae00803f6d..d53d2e4023 100644 --- a/include/tpm-v2.h +++ b/include/tpm-v2.h @@ -161,6 +161,37 @@ enum tpm_index_attrs { TPMA_NV_AUTHWRITE | TPMA_NV_POLICYWRITE, }; +enum { + TPM_ACCESS_VALID = 1 << 7, + TPM_ACCESS_ACTIVE_LOCALITY = 1 << 5, + TPM_ACCESS_REQUEST_PENDING = 1 << 2, + TPM_ACCESS_REQUEST_USE = 1 << 1, + TPM_ACCESS_ESTABLISHMENT = 1 << 0, +}; + +enum { + TPM_STS_FAMILY_SHIFT = 26, + TPM_STS_FAMILY_MASK = 0x3 << TPM_STS_FAMILY_SHIFT, + TPM_STS_FAMILY_TPM2 = 1 << TPM_STS_FAMILY_SHIFT, + TPM_STS_RESE_TESTABLISMENT_BIT = 1 << 25, + TPM_STS_COMMAND_CANCEL = 1 << 24, + TPM_STS_BURST_COUNT_SHIFT = 8, + TPM_STS_BURST_COUNT_MASK = 0xffff << TPM_STS_BURST_COUNT_SHIFT, + TPM_STS_VALID = 1 << 7, + TPM_STS_COMMAND_READY = 1 << 6, + TPM_STS_GO = 1 << 5, + TPM_STS_DATA_AVAIL = 1 << 4, + TPM_STS_DATA_EXPECT = 1 << 3, + TPM_STS_SELF_TEST_DONE = 1 << 2, + TPM_STS_RESPONSE_RETRY = 1 << 1, +}; + +enum { + TPM_CMD_COUNT_OFFSET = 2, + TPM_CMD_ORDINAL_OFFSET = 6, + TPM_MAX_BUF_SIZE = 1260, +}; + /** * Issue a TPM2_Startup command. * From patchwork Fri May 13 17:07:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 1630853 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=KuVZ0pa0; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4L0FW43bDrz9sFk for ; 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Fri, 13 May 2022 17:07:16 +0000 (GMT) From: Eddie James To: openbmc@lists.ozlabs.org Subject: [PATCH u-boot v2019.04-aspeed-openbmc v2 2/9] tpm: add #ifndef to fix redeclaration build errors Date: Fri, 13 May 2022 12:07:08 -0500 Message-Id: <20220513170715.43475-3-eajames@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220513170715.43475-1-eajames@linux.ibm.com> References: <20220513170715.43475-1-eajames@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: dbAv0VyhBEdqD24w3FU_lA-KTZJ0QKfO X-Proofpoint-ORIG-GUID: dbAv0VyhBEdqD24w3FU_lA-KTZJ0QKfO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-13_09,2022-05-13_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 spamscore=0 mlxlogscore=672 priorityscore=1501 mlxscore=0 malwarescore=0 phishscore=0 impostorscore=0 clxscore=1015 adultscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205130073 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cjengel@us.ibm.com, joel@jms.id.au Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" From: Johannes Holland tpm_tis_spi.c directly includes tpm_tis.h and tpm-v2.h which both define the same enums (see e.g. TPM_ACCESS_VALID). Add an #ifndef to prevent redeclaration errors. Signed-off-by: Johannes Holland --- drivers/tpm/tpm_tis.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/tpm/tpm_tis.h b/drivers/tpm/tpm_tis.h index 947585f8e3..2a160fe05c 100644 --- a/drivers/tpm/tpm_tis.h +++ b/drivers/tpm/tpm_tis.h @@ -104,6 +104,7 @@ struct tpm_cmd_t { /* Max number of iterations after i2c NAK */ #define MAX_COUNT 3 +#ifndef __TPM_V2_H /* * Max number of iterations after i2c NAK for 'long' commands * @@ -127,5 +128,6 @@ enum tis_status { TPM_STS_DATA_AVAIL = 0x10, TPM_STS_DATA_EXPECT = 0x08, }; +#endif #endif From patchwork Fri May 13 17:07:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 1630852 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=JLN+LBxn; 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Fri, 13 May 2022 17:07:19 +0000 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 24DH7IlF28049808 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 13 May 2022 17:07:18 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 28985AC05E; Fri, 13 May 2022 17:07:18 +0000 (GMT) Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9A67DAC059; Fri, 13 May 2022 17:07:17 +0000 (GMT) Received: from v0005c16.aus.stglabs.ibm.com (unknown [9.163.1.123]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 13 May 2022 17:07:17 +0000 (GMT) From: Eddie James To: openbmc@lists.ozlabs.org Subject: [PATCH u-boot v2019.04-aspeed-openbmc v2 3/9] tpm2: Introduce TIS tpm core Date: Fri, 13 May 2022 12:07:09 -0500 Message-Id: <20220513170715.43475-4-eajames@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220513170715.43475-1-eajames@linux.ibm.com> References: <20220513170715.43475-1-eajames@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 8MhhJ6yAWACcIyywzLsDe15mo7nb9ciB X-Proofpoint-ORIG-GUID: 8MhhJ6yAWACcIyywzLsDe15mo7nb9ciB X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-13_09,2022-05-13_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxlogscore=999 adultscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 phishscore=0 mlxscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205130073 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cjengel@us.ibm.com, joel@jms.id.au Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" From: Ilias Apalodimas There's a lot of code duplication in U-Boot right now. All the TPM TIS compatible drivers we have at the moment have their own copy of a TIS implementation. So let's create a common layer which implements the core TIS functions. Any driver added from now own, which is compatible with the TIS spec, will only have to provide the underlying bus communication mechanisms. Signed-off-by: Ilias Apalodimas --- drivers/tpm/tpm2_tis_core.c | 463 ++++++++++++++++++++++++++++++++++++ drivers/tpm/tpm_tis.h | 136 +++++++++++ include/tpm-v2.h | 1 + 3 files changed, 600 insertions(+) create mode 100644 drivers/tpm/tpm2_tis_core.c diff --git a/drivers/tpm/tpm2_tis_core.c b/drivers/tpm/tpm2_tis_core.c new file mode 100644 index 0000000000..ec8c730fe9 --- /dev/null +++ b/drivers/tpm/tpm2_tis_core.c @@ -0,0 +1,463 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2020, Linaro Limited + * + * Based on the Linux TIS core interface and U-Boot original SPI TPM driver + */ + +#include +#include +#include +#include +#include +#include "tpm_tis.h" + +int tpm_tis_get_desc(struct udevice *dev, char *buf, int size) +{ + struct tpm_chip *chip = dev_get_priv(dev); + + if (size < 80) + return -ENOSPC; + + return snprintf(buf, size, + "%s v2.0: VendorID 0x%04x, DeviceID 0x%04x, RevisionID 0x%02x [%s]", + dev->name, chip->vend_dev & 0xFFFF, + chip->vend_dev >> 16, chip->rid, + (chip->is_open ? "open" : "closed")); +} + +/** + * tpm_tis_check_locality - Check the current TPM locality + * + * @dev: TPM device + * @loc: locality + * + * Return: True if the tested locality matches + */ +static bool tpm_tis_check_locality(struct udevice *dev, int loc) +{ + struct tpm_chip *chip = dev_get_priv(dev); + struct tpm_tis_phy_ops *phy_ops = chip->phy_ops; + u8 locality; + + phy_ops->read_bytes(dev, TPM_ACCESS(loc), 1, &locality); + if ((locality & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID | + TPM_ACCESS_REQUEST_USE)) == + (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { + chip->locality = loc; + return true; + } + + return false; +} + +/** + * tpm_tis_request_locality - Request a locality from the TPM + * + * @dev: TPM device + * @loc: requested locality + * + * Return: 0 on success -1 on failure + */ +int tpm_tis_request_locality(struct udevice *dev, int loc) +{ + struct tpm_chip *chip = dev_get_priv(dev); + struct tpm_tis_phy_ops *phy_ops = chip->phy_ops; + u8 buf = TPM_ACCESS_REQUEST_USE; + unsigned long start, stop; + + if (tpm_tis_check_locality(dev, loc)) + return 0; + + phy_ops->write_bytes(dev, TPM_ACCESS(loc), 1, &buf); + start = get_timer(0); + stop = chip->timeout_a; + do { + if (tpm_tis_check_locality(dev, loc)) + return 0; + mdelay(TPM_TIMEOUT_MS); + } while (get_timer(start) < stop); + + return -1; +} + +/** + * tpm_tis_status - Check the current device status + * + * @dev: TPM device + * @status: return value of status + * + * Return: 0 on success, negative on failure + */ +static int tpm_tis_status(struct udevice *dev, u8 *status) +{ + struct tpm_chip *chip = dev_get_priv(dev); + struct tpm_tis_phy_ops *phy_ops = chip->phy_ops; + + if (chip->locality < 0) + return -EINVAL; + + phy_ops->read_bytes(dev, TPM_STS(chip->locality), 1, status); + + if ((*status & TPM_STS_READ_ZERO)) { + log_err("TPM returned invalid status\n"); + return -EINVAL; + } + + return 0; +} + +/** + * tpm_tis_release_locality - Release the requested locality + * + * @dev: TPM device + * @loc: requested locality + * + * Return: 0 on success, negative on failure + */ +int tpm_tis_release_locality(struct udevice *dev, int loc) +{ + struct tpm_chip *chip = dev_get_priv(dev); + struct tpm_tis_phy_ops *phy_ops = chip->phy_ops; + u8 buf = TPM_ACCESS_ACTIVE_LOCALITY; + int ret; + + if (chip->locality < 0) + return 0; + + ret = phy_ops->write_bytes(dev, TPM_ACCESS(loc), 1, &buf); + chip->locality = -1; + + return ret; +} + +/** + * tpm_tis_wait_for_stat - Wait for TPM to become ready + * + * @dev: TPM device + * @mask: mask to match + * @timeout: timeout for retries + * @status: current status + * + * Return: 0 on success, negative on failure + */ +static int tpm_tis_wait_for_stat(struct udevice *dev, u8 mask, + unsigned long timeout, u8 *status) +{ + unsigned long start = get_timer(0); + unsigned long stop = timeout; + int ret; + + do { + mdelay(TPM_TIMEOUT_MS); + ret = tpm_tis_status(dev, status); + if (ret) + return ret; + + if ((*status & mask) == mask) + return 0; + } while (get_timer(start) < stop); + + return -ETIMEDOUT; +} + +/** + * tpm_tis_get_burstcount - Get the burstcount for the data FIFO + * + * @dev: TPM device + * @burstcount: current burstcount + * + * Return: 0 on success, negative on failure + */ +static int tpm_tis_get_burstcount(struct udevice *dev, size_t *burstcount) +{ + struct tpm_chip *chip = dev_get_priv(dev); + struct tpm_tis_phy_ops *phy_ops = chip->phy_ops; + unsigned long start, stop; + u32 burst; + + if (chip->locality < 0) + return -EINVAL; + + /* wait for burstcount */ + start = get_timer(0); + /* + * This is the TPMv2 defined timeout. Change this in case you want to + * make the driver compatile to TPMv1 + */ + stop = chip->timeout_a; + do { + phy_ops->read32(dev, TPM_STS(chip->locality), &burst); + *burstcount = (burst >> 8) & 0xFFFF; + if (*burstcount) + return 0; + + mdelay(TPM_TIMEOUT_MS); + } while (get_timer(start) < stop); + + return -ETIMEDOUT; +} + +/** + * tpm_tis_ready - Cancel pending comands and get the device on a ready state + * + * @dev: TPM device + * + * Return: 0 on success, negative on failure + */ +static int tpm_tis_ready(struct udevice *dev) +{ + struct tpm_chip *chip = dev_get_priv(dev); + struct tpm_tis_phy_ops *phy_ops = chip->phy_ops; + u8 data = TPM_STS_COMMAND_READY; + + /* This will cancel any pending commands */ + return phy_ops->write_bytes(dev, TPM_STS(chip->locality), 1, &data); +} + +int tpm_tis_send(struct udevice *dev, const u8 *buf, size_t len) +{ + struct tpm_chip *chip = dev_get_priv(dev); + struct tpm_tis_phy_ops *phy_ops = chip->phy_ops; + size_t burstcnt, wr_size, sent = 0; + u8 data = TPM_STS_GO; + u8 status; + int ret; + + if (!chip) + return -ENODEV; + + ret = tpm_tis_request_locality(dev, 0); + if (ret < 0) + return -EBUSY; + + ret = tpm_tis_status(dev, &status); + if (ret) + goto release_locality; + + if (!(status & TPM_STS_COMMAND_READY)) { + ret = tpm_tis_ready(dev); + if (ret) { + log_err("Can't cancel previous TPM operation\n"); + goto release_locality; + } + ret = tpm_tis_wait_for_stat(dev, TPM_STS_COMMAND_READY, + chip->timeout_b, &status); + if (ret) { + log_err("TPM not ready\n"); + goto release_locality; + } + } + + while (len > 0) { + ret = tpm_tis_get_burstcount(dev, &burstcnt); + if (ret) + goto release_locality; + + wr_size = min(len, burstcnt); + ret = phy_ops->write_bytes(dev, TPM_DATA_FIFO(chip->locality), + wr_size, buf + sent); + if (ret < 0) + goto release_locality; + + ret = tpm_tis_wait_for_stat(dev, TPM_STS_VALID, + chip->timeout_c, &status); + if (ret) + goto release_locality; + + sent += wr_size; + len -= wr_size; + /* make sure the TPM expects more data */ + if (len && !(status & TPM_STS_DATA_EXPECT)) { + ret = -EIO; + goto release_locality; + } + } + + /* + * Make a final check ensuring everything is ok and the TPM expects no + * more data + */ + ret = tpm_tis_wait_for_stat(dev, TPM_STS_VALID, chip->timeout_c, + &status); + if (ret) + goto release_locality; + + if (status & TPM_STS_DATA_EXPECT) { + ret = -EIO; + goto release_locality; + } + + ret = phy_ops->write_bytes(dev, TPM_STS(chip->locality), 1, &data); + if (ret) + goto release_locality; + + return sent; + +release_locality: + tpm_tis_ready(dev); + tpm_tis_release_locality(dev, chip->locality); + + return ret; +} + +static int tpm_tis_recv_data(struct udevice *dev, u8 *buf, size_t count) +{ + struct tpm_chip *chip = dev_get_priv(dev); + struct tpm_tis_phy_ops *phy_ops = chip->phy_ops; + int size = 0, len, ret; + size_t burstcnt; + u8 status; + + while (size < count && + tpm_tis_wait_for_stat(dev, TPM_STS_DATA_AVAIL | TPM_STS_VALID, + chip->timeout_c, &status) == 0) { + ret = tpm_tis_get_burstcount(dev, &burstcnt); + if (ret) + return ret; + + len = min_t(int, burstcnt, count - size); + ret = phy_ops->read_bytes(dev, TPM_DATA_FIFO(chip->locality), + len, buf + size); + if (ret < 0) + return ret; + + size += len; + } + + return size; +} + +/** + * tpm_tis_recv - Receive data from a device + * + * @dev: TPM device + * @buf: buffer to copy data + * @size: buffer size + * + * Return: bytes read or negative on failure + */ +int tpm_tis_recv(struct udevice *dev, u8 *buf, size_t count) +{ + struct tpm_chip *chip = dev_get_priv(dev); + int size, expected; + + if (count < TPM_HEADER_SIZE) + return -E2BIG; + + size = tpm_tis_recv_data(dev, buf, TPM_HEADER_SIZE); + if (size < TPM_HEADER_SIZE) { + log_err("TPM error, unable to read header\n"); + goto out; + } + + expected = get_unaligned_be32(buf + TPM_CMD_COUNT_OFFSET); + if (expected > count) { + size = -EIO; + log_warning("Too much data: %d > %zu\n", expected, count); + goto out; + } + + size += tpm_tis_recv_data(dev, &buf[TPM_HEADER_SIZE], + expected - TPM_HEADER_SIZE); + if (size < expected) { + log(LOGC_NONE, LOGL_ERR, + "TPM error, unable to read remaining bytes of result\n"); + size = -EIO; + goto out; + } + +out: + tpm_tis_ready(dev); + /* acquired in tpm_tis_send */ + tpm_tis_release_locality(dev, chip->locality); + + return size; +} + +int tpm_tis_cleanup(struct udevice *dev) +{ + struct tpm_chip *chip = dev_get_priv(dev); + + tpm_tis_ready(dev); + tpm_tis_release_locality(dev, chip->locality); + + return 0; +} + +int tpm_tis_open(struct udevice *dev) +{ + struct tpm_chip *chip = dev_get_priv(dev); + int ret; + + if (chip->is_open) + return -EBUSY; + + ret = tpm_tis_request_locality(dev, 0); + if (!ret) + chip->is_open = 1; + + return ret; +} + +void tpm_tis_ops_register(struct udevice *dev, struct tpm_tis_phy_ops *ops) +{ + struct tpm_chip *chip = dev_get_priv(dev); + + chip->phy_ops = ops; +} + +static bool tis_check_ops(struct tpm_tis_phy_ops *phy_ops) +{ + if (!phy_ops || !phy_ops->read_bytes || !phy_ops->write_bytes || + !phy_ops->read32 || !phy_ops->write32) + return false; + + return true; +} + +int tpm_tis_init(struct udevice *dev) +{ + struct tpm_chip *chip = dev_get_priv(dev); + struct tpm_tis_phy_ops *phy_ops = chip->phy_ops; + int ret; + u32 tmp; + + if (!tis_check_ops(phy_ops)) { + log_err("Driver bug. No bus ops defined\n"); + return -1; + } + ret = tpm_tis_request_locality(dev, 0); + if (ret) + return ret; + + chip->timeout_a = TIS_SHORT_TIMEOUT_MS; + chip->timeout_b = TIS_LONG_TIMEOUT_MS; + chip->timeout_c = TIS_SHORT_TIMEOUT_MS; + chip->timeout_d = TIS_SHORT_TIMEOUT_MS; + + /* Disable interrupts */ + phy_ops->read32(dev, TPM_INT_ENABLE(chip->locality), &tmp); + tmp |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT | + TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT; + tmp &= ~TPM_GLOBAL_INT_ENABLE; + phy_ops->write32(dev, TPM_INT_ENABLE(chip->locality), tmp); + + phy_ops->read_bytes(dev, TPM_RID(chip->locality), 1, &chip->rid); + phy_ops->read32(dev, TPM_DID_VID(chip->locality), &chip->vend_dev); + + return tpm_tis_release_locality(dev, chip->locality); +} + +int tpm_tis_close(struct udevice *dev) +{ + struct tpm_chip *chip = dev_get_priv(dev); + int ret = 0; + + if (chip->is_open) { + ret = tpm_tis_release_locality(dev, chip->locality); + chip->is_open = 0; + } + + return ret; +} diff --git a/drivers/tpm/tpm_tis.h b/drivers/tpm/tpm_tis.h index 2a160fe05c..93f622f291 100644 --- a/drivers/tpm/tpm_tis.h +++ b/drivers/tpm/tpm_tis.h @@ -21,6 +21,73 @@ #include #include +/** + * struct tpm_tis_phy_ops - low-level TPM bus operations + */ +struct tpm_tis_phy_ops { + /* read_bytes() - Read a number of bytes from the device + * + * @udev: TPM device + * @addr: offset from device base + * @len: len to read + * @result: data read + * + * @return: 0 on success, negative on failure + */ + int (*read_bytes)(struct udevice *udev, u32 addr, u16 len, + u8 *result); + /* write_bytes() - Read a number of bytes from the device + * + * @udev: TPM device + * @addr: offset from device base + * @len: len to read + * @value: data to write + * + * @return: 0 on success, negative on failure + */ + int (*write_bytes)(struct udevice *udev, u32 addr, u16 len, + const u8 *value); + /* read32() - Read a 32bit value of the device + * + * @udev: TPM device + * @addr: offset from device base + * @result: data read + * + * @return: 0 on success, negative on failure + */ + int (*read32)(struct udevice *udev, u32 addr, u32 *result); + /* write32() - write a 32bit value to the device + * + * @udev: TPM device + * @addr: offset from device base + * @src: data to write + * + * @return: 0 on success, negative on failure + */ + int (*write32)(struct udevice *udev, u32 addr, u32 src); +}; + +enum tis_int_flags { + TPM_GLOBAL_INT_ENABLE = 0x80000000, + TPM_INTF_BURST_COUNT_STATIC = 0x100, + TPM_INTF_CMD_READY_INT = 0x080, + TPM_INTF_INT_EDGE_FALLING = 0x040, + TPM_INTF_INT_EDGE_RISING = 0x020, + TPM_INTF_INT_LEVEL_LOW = 0x010, + TPM_INTF_INT_LEVEL_HIGH = 0x008, + TPM_INTF_LOCALITY_CHANGE_INT = 0x004, + TPM_INTF_STS_VALID_INT = 0x002, + TPM_INTF_DATA_AVAIL_INT = 0x001, +}; + +#define TPM_ACCESS(l) (0x0000 | ((l) << 12)) +#define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12)) +#define TPM_STS(l) (0x0018 | ((l) << 12)) +#define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12)) +#define TPM_DID_VID(l) (0x0f00 | ((l) << 12)) +#define TPM_RID(l) (0x0f04 | ((l) << 12)) +#define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12)) + enum tpm_timeout { TPM_TIMEOUT_MS = 5, TIS_SHORT_TIMEOUT_MS = 750, @@ -43,6 +110,7 @@ struct tpm_chip { u8 rid; unsigned long timeout_a, timeout_b, timeout_c, timeout_d; /* msec */ ulong chip_type; + struct tpm_tis_phy_ops *phy_ops; }; struct tpm_input_header { @@ -130,4 +198,72 @@ enum tis_status { }; #endif +/** + * tpm_tis_open - Open the device and request locality 0 + * + * @dev: TPM device + * + * @return: 0 on success, negative on failure + */ +int tpm_tis_open(struct udevice *udev); +/** + * tpm_tis_close - Close the device and release locality + * + * @dev: TPM device + * + * @return: 0 on success, negative on failure + */ +int tpm_tis_close(struct udevice *udev); +/** tpm_tis_cleanup - Get the device in ready state and release locality + * + * @dev: TPM device + * + * @return: always 0 + */ +int tpm_tis_cleanup(struct udevice *udev); +/** + * tpm_tis_send - send data to the device + * + * @dev: TPM device + * @buf: buffer to send + * @len: size of the buffer + * + * @return: number of bytes sent or negative on failure + */ +int tpm_tis_send(struct udevice *udev, const u8 *buf, size_t len); +/** + * tpm_tis_recv_data - Receive data from a device. Wrapper for tpm_tis_recv + * + * @dev: TPM device + * @buf: buffer to copy data + * @size: buffer size + * + * @return: bytes read or negative on failure + */ +int tpm_tis_recv(struct udevice *udev, u8 *buf, size_t count); +/** + * tpm_tis_get_desc - Get the TPM description + * + * @dev: TPM device + * @buf: buffer to fill data + * @size: buffer size + * + * @return: Number of characters written (or would have been written) in buffer + */ +int tpm_tis_get_desc(struct udevice *udev, char *buf, int size); +/** + * tpm_tis_init - inititalize the device + * + * @dev: TPM device + * + * @return: 0 on success, negative on failure + */ +int tpm_tis_init(struct udevice *udev); +/** + * tpm_tis_ops_register - register the PHY ops for the device + * + * @dev: TPM device + * @ops: tpm_tis_phy_ops ops for the device + */ +void tpm_tis_ops_register(struct udevice *udev, struct tpm_tis_phy_ops *ops); #endif diff --git a/include/tpm-v2.h b/include/tpm-v2.h index d53d2e4023..b65f2ce55a 100644 --- a/include/tpm-v2.h +++ b/include/tpm-v2.h @@ -184,6 +184,7 @@ enum { TPM_STS_DATA_EXPECT = 1 << 3, TPM_STS_SELF_TEST_DONE = 1 << 2, TPM_STS_RESPONSE_RETRY = 1 << 1, + TPM_STS_READ_ZERO = 0x23 }; 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Fri, 13 May 2022 17:07:18 +0000 (GMT) From: Eddie James To: openbmc@lists.ozlabs.org Subject: [PATCH u-boot v2019.04-aspeed-openbmc v2 4/9] tis: fix tpm_tis_remove() Date: Fri, 13 May 2022 12:07:10 -0500 Message-Id: <20220513170715.43475-5-eajames@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220513170715.43475-1-eajames@linux.ibm.com> References: <20220513170715.43475-1-eajames@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: QlnGkPtr435cpClZRlJ66PDAil0lDH6U X-Proofpoint-ORIG-GUID: QlnGkPtr435cpClZRlJ66PDAil0lDH6U X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-13_09,2022-05-13_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 suspectscore=0 bulkscore=0 clxscore=1015 adultscore=0 mlxscore=0 malwarescore=0 phishscore=0 mlxlogscore=774 spamscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205130073 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cjengel@us.ibm.com, joel@jms.id.au Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" From: Heinrich Schuchardt tpm_tis_remove() leads to calling tpm_tis_ready() with the IO region unmapped and chip->locality == -1 (locality released). This leads to a crash in mmio_write_bytes(). The patch implements these changes: tpm_tis_remove(): Unmap the IO region after calling tpm_tis_cleanup(). tpm_tis_cleanup(): Request locality before IO output and releasing locality. Signed-off-by: Heinrich Schuchardt Reviewed-by: Ilias Apalodimas Signed-off-by: Ilias Apalodimas --- drivers/tpm/tpm2_tis_core.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/tpm/tpm2_tis_core.c b/drivers/tpm/tpm2_tis_core.c index ec8c730fe9..51392c4584 100644 --- a/drivers/tpm/tpm2_tis_core.c +++ b/drivers/tpm/tpm2_tis_core.c @@ -378,8 +378,14 @@ out: int tpm_tis_cleanup(struct udevice *dev) { struct tpm_chip *chip = dev_get_priv(dev); + int ret; + + ret = tpm_tis_request_locality(dev, 0); + if (ret) + return ret; tpm_tis_ready(dev); + tpm_tis_release_locality(dev, chip->locality); return 0; From patchwork Fri May 13 17:07:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 1630854 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; 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Fri, 13 May 2022 17:07:20 +0000 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 24DH7JVq8782302 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 13 May 2022 17:07:19 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6ADBFAC060; Fri, 13 May 2022 17:07:19 +0000 (GMT) Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id EA98EAC059; Fri, 13 May 2022 17:07:18 +0000 (GMT) Received: from v0005c16.aus.stglabs.ibm.com (unknown [9.163.1.123]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 13 May 2022 17:07:18 +0000 (GMT) From: Eddie James To: openbmc@lists.ozlabs.org Subject: [PATCH u-boot v2019.04-aspeed-openbmc v2 5/9] tpm: core: Set timeouts before requesting locality Date: Fri, 13 May 2022 12:07:11 -0500 Message-Id: <20220513170715.43475-6-eajames@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220513170715.43475-1-eajames@linux.ibm.com> References: <20220513170715.43475-1-eajames@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: OhZCvALOQtezirp66-CLz7qQo0XCunRm X-Proofpoint-ORIG-GUID: OhZCvALOQtezirp66-CLz7qQo0XCunRm X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-13_09,2022-05-13_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 suspectscore=0 bulkscore=0 clxscore=1015 adultscore=0 mlxscore=0 malwarescore=0 phishscore=0 mlxlogscore=886 spamscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205130073 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cjengel@us.ibm.com, joel@jms.id.au Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Requesting the locality uses the timeout values, so they need to be set beforehand. Signed-off-by: Eddie James --- drivers/tpm/tpm2_tis_core.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/tpm/tpm2_tis_core.c b/drivers/tpm/tpm2_tis_core.c index 51392c4584..985a816219 100644 --- a/drivers/tpm/tpm2_tis_core.c +++ b/drivers/tpm/tpm2_tis_core.c @@ -433,15 +433,16 @@ int tpm_tis_init(struct udevice *dev) log_err("Driver bug. No bus ops defined\n"); return -1; } - ret = tpm_tis_request_locality(dev, 0); - if (ret) - return ret; chip->timeout_a = TIS_SHORT_TIMEOUT_MS; chip->timeout_b = TIS_LONG_TIMEOUT_MS; chip->timeout_c = TIS_SHORT_TIMEOUT_MS; chip->timeout_d = TIS_SHORT_TIMEOUT_MS; + ret = tpm_tis_request_locality(dev, 0); + if (ret) + return ret; + /* Disable interrupts */ phy_ops->read32(dev, TPM_INT_ENABLE(chip->locality), &tmp); tmp |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT | From patchwork Fri May 13 17:07:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 1630856 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=r32Qfyiz; dkim-atps=neutral Authentication-Results: ozlabs.org; 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Fri, 13 May 2022 17:07:21 +0000 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 24DH7KT623658978 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 13 May 2022 17:07:20 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1A0C8AC060; Fri, 13 May 2022 17:07:20 +0000 (GMT) Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 91A11AC059; Fri, 13 May 2022 17:07:19 +0000 (GMT) Received: from v0005c16.aus.stglabs.ibm.com (unknown [9.163.1.123]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 13 May 2022 17:07:19 +0000 (GMT) From: Eddie James To: openbmc@lists.ozlabs.org Subject: [PATCH u-boot v2019.04-aspeed-openbmc v2 6/9] i2c: ast_i2c: Remove SCL direct drive mode Date: Fri, 13 May 2022 12:07:12 -0500 Message-Id: <20220513170715.43475-7-eajames@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220513170715.43475-1-eajames@linux.ibm.com> References: <20220513170715.43475-1-eajames@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: ns0TSMjm2ywwLxSLJ_8xDo33oNVoQ1A5 X-Proofpoint-GUID: ns0TSMjm2ywwLxSLJ_8xDo33oNVoQ1A5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-13_09,2022-05-13_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 lowpriorityscore=0 malwarescore=0 suspectscore=0 adultscore=0 bulkscore=0 mlxlogscore=901 clxscore=1015 priorityscore=1501 phishscore=0 spamscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205130073 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cjengel@us.ibm.com, joel@jms.id.au Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" SCL direct drive mode prevents communication with devices that do clock stretching, so disable. The Linux driver doesn't use this mode, and the engine can handle clock stretching. Signed-off-by: Eddie James --- drivers/i2c/ast_i2c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c index bbc32d6cdb..13420ade84 100644 --- a/drivers/i2c/ast_i2c.c +++ b/drivers/i2c/ast_i2c.c @@ -73,7 +73,7 @@ static void ast_i2c_init_bus(struct udevice *dev) /* Enable Master Mode. Assuming single-master */ writel(I2CD_MASTER_EN | I2CD_M_SDA_LOCK_EN - | I2CD_MULTI_MASTER_DIS | I2CD_M_SCL_DRIVE_EN, + | I2CD_MULTI_MASTER_DIS, &priv->regs->fcr); /* Enable Interrupts */ writel(I2CD_INTR_TX_ACK From patchwork Fri May 13 17:07:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 1630859 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=PKy34PDH; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4L0FZl5YdRz9sFk for ; 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Fri, 13 May 2022 17:07:20 +0000 (GMT) From: Eddie James To: openbmc@lists.ozlabs.org Subject: [PATCH u-boot v2019.04-aspeed-openbmc v2 7/9] tpm: add support for TPMv2.x I2C chips Date: Fri, 13 May 2022 12:07:13 -0500 Message-Id: <20220513170715.43475-8-eajames@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220513170715.43475-1-eajames@linux.ibm.com> References: <20220513170715.43475-1-eajames@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: X6xaBDil3_RID8oQVjTywTyYbEpQW8Xv X-Proofpoint-ORIG-GUID: X6xaBDil3_RID8oQVjTywTyYbEpQW8Xv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-13_09,2022-05-13_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 priorityscore=1501 suspectscore=0 mlxlogscore=999 adultscore=0 malwarescore=0 mlxscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205130073 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cjengel@us.ibm.com, joel@jms.id.au Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Add the tpm2_tis_i2c driver that should support any TPMv2 compliant I2C chips, such as the NPCT75X chip. Signed-off-by: Eddie James --- drivers/tpm/Kconfig | 9 ++ drivers/tpm/Makefile | 1 + drivers/tpm/tpm2_tis_i2c.c | 171 +++++++++++++++++++++++++++++++++++++ 3 files changed, 181 insertions(+) create mode 100644 drivers/tpm/tpm2_tis_i2c.c diff --git a/drivers/tpm/Kconfig b/drivers/tpm/Kconfig index 94629dffd2..6fd98ac057 100644 --- a/drivers/tpm/Kconfig +++ b/drivers/tpm/Kconfig @@ -145,6 +145,15 @@ config TPM2_TIS_SPI to the device using the standard TPM Interface Specification (TIS) protocol. +config TPM2_TIS_I2C + bool "Enable support for TPMv2.x I2C chips" + depends on TPM_V2 && DM_I2C + help + This driver supports TPMv2.x devices connected on the I2C bus. + The usual TPM operations and the 'tpm' command can be used to talk + to the device using the standard TPM Interface Specification (TIS) + protocol. + endif # TPM_V2 endmenu diff --git a/drivers/tpm/Makefile b/drivers/tpm/Makefile index 94c337b8ed..33bc0784f6 100644 --- a/drivers/tpm/Makefile +++ b/drivers/tpm/Makefile @@ -12,3 +12,4 @@ obj-$(CONFIG_TPM_ST33ZP24_SPI) += tpm_tis_st33zp24_spi.o obj-$(CONFIG_TPM2_TIS_SANDBOX) += tpm2_tis_sandbox.o obj-$(CONFIG_TPM2_TIS_SPI) += tpm2_tis_spi.o +obj-$(CONFIG_TPM2_TIS_I2C) += tpm2_tis_core.o tpm2_tis_i2c.o diff --git a/drivers/tpm/tpm2_tis_i2c.c b/drivers/tpm/tpm2_tis_i2c.c new file mode 100644 index 0000000000..33cd5bb84b --- /dev/null +++ b/drivers/tpm/tpm2_tis_i2c.c @@ -0,0 +1,171 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 IBM Corp. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "tpm_tis.h" +#include "tpm_internal.h" + +struct tpm_tis_chip_data { + unsigned int pcr_count; + unsigned int pcr_select_min; +}; + +static uint tpm_tis_i2c_address_to_register(u32 addr) +{ + addr &= 0xFFF; + + /* + * Adapt register addresses that have changed compared to older TIS + * version. + */ + switch (addr) { + case TPM_ACCESS(0): + return 0x04; + case TPM_DID_VID(0): + return 0x48; + case TPM_RID(0): + return 0x4C; + default: + return addr; + } +} + +static int tpm_tis_i2c_read(struct udevice *dev, u32 addr, u16 len, u8 *in) +{ + int rc; + int count = 0; + uint reg = tpm_tis_i2c_address_to_register(addr); + + do { + rc = dm_i2c_read(dev, reg, in, len); + udelay(SLEEP_DURATION_US); + } while (rc && count++ < MAX_COUNT); + + return rc; +} + +static int tpm_tis_i2c_write(struct udevice *dev, u32 addr, u16 len, + const u8 *out) +{ + int rc; + int count = 0; + uint reg = tpm_tis_i2c_address_to_register(addr); + + do { + rc = dm_i2c_write(dev, reg, out, len); + udelay(SLEEP_DURATION_US); + } while (rc && count++ < MAX_COUNT); + + return rc; +} + +static int tpm_tis_i2c_read32(struct udevice *dev, u32 addr, u32 *result) +{ + __le32 result_le; + int rc; + + rc = tpm_tis_i2c_read(dev, addr, sizeof(u32), (u8 *)&result_le); + if (!rc) + *result = le32_to_cpu(result_le); + + return rc; +} + +static int tpm_tis_i2c_write32(struct udevice *dev, u32 addr, u32 value) +{ + __le32 value_le = cpu_to_le32(value); + + return tpm_tis_i2c_write(dev, addr, sizeof(value), (u8 *)&value_le); +} + +static struct tpm_tis_phy_ops phy_ops = { + .read_bytes = tpm_tis_i2c_read, + .write_bytes = tpm_tis_i2c_write, + .read32 = tpm_tis_i2c_read32, + .write32 = tpm_tis_i2c_write32, +}; + +static int tpm_tis_i2c_probe(struct udevice *udev) +{ + struct tpm_tis_chip_data *drv_data = (void *)dev_get_driver_data(udev); + struct tpm_chip_priv *priv = dev_get_uclass_priv(udev); + int rc; + u8 loc = 0; + + tpm_tis_ops_register(udev, &phy_ops); + + /* + * Force locality 0. The core driver doesn't actually write the + * locality register and instead just reads/writes various access + * bits of the selected locality. + */ + rc = dm_i2c_write(udev, 0, &loc, 1); + if (rc) + return rc; + + rc = tpm_tis_init(udev); + if (rc) + return rc; + + priv->pcr_count = drv_data->pcr_count; + priv->pcr_select_min = drv_data->pcr_select_min; + priv->version = TPM_V2; + + return 0; +} + +static int tpm_tis_i2c_remove(struct udevice *udev) +{ + return tpm_tis_cleanup(udev); +} + +static const struct tpm_ops tpm_tis_i2c_ops = { + .open = tpm_tis_open, + .close = tpm_tis_close, + .get_desc = tpm_tis_get_desc, + .send = tpm_tis_send, + .recv = tpm_tis_recv, + .cleanup = tpm_tis_cleanup, +}; + +static const struct tpm_tis_chip_data tpm_tis_std_chip_data = { + .pcr_count = 24, + .pcr_select_min = 3, +}; + +static const struct udevice_id tpm_tis_i2c_ids[] = { + { + .compatible = "nuvoton,npct75x", + .data = (ulong)&tpm_tis_std_chip_data, + }, + { + .compatible = "tcg,tpm-tis-i2c", + .data = (ulong)&tpm_tis_std_chip_data, + }, + { } +}; + +U_BOOT_DRIVER(tpm_tis_i2c) = { + .name = "tpm_tis_i2c", + .id = UCLASS_TPM, + .of_match = tpm_tis_i2c_ids, + .ops = &tpm_tis_i2c_ops, + .probe = tpm_tis_i2c_probe, + .remove = tpm_tis_i2c_remove, + .priv_auto_alloc_size = sizeof(struct tpm_chip), +}; From patchwork Fri May 13 17:07:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 1630857 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=Zqn7n+63; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; 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Fri, 13 May 2022 17:07:20 +0000 (GMT) From: Eddie James To: openbmc@lists.ozlabs.org Subject: [PATCH u-boot v2019.04-aspeed-openbmc v2 8/9] arm: dts: ast2600-rainier: Add NPCT75X TPM Date: Fri, 13 May 2022 12:07:14 -0500 Message-Id: <20220513170715.43475-9-eajames@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220513170715.43475-1-eajames@linux.ibm.com> References: <20220513170715.43475-1-eajames@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: YxTiK2Zg5IgtDfUZ9Ud7U561AI6iyE7K X-Proofpoint-ORIG-GUID: YxTiK2Zg5IgtDfUZ9Ud7U561AI6iyE7K X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-13_09,2022-05-13_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxlogscore=818 adultscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 phishscore=0 mlxscore=0 impostorscore=0 priorityscore=1501 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205130073 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cjengel@us.ibm.com, joel@jms.id.au Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Add the TPM device on I2C bus 12. Signed-off-by: Eddie James --- arch/arm/dts/ast2600-rainier.dts | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/ast2600-rainier.dts b/arch/arm/dts/ast2600-rainier.dts index 8a44fd8a0a..aa91b12ed3 100755 --- a/arch/arm/dts/ast2600-rainier.dts +++ b/arch/arm/dts/ast2600-rainier.dts @@ -106,12 +106,14 @@ &gpio0 { u-boot,dm-pre-reloc; +}; + +&i2c12 { + status = "okay"; - tpm_reset { - u-boot,dm-pre-reloc; - gpio-hog; - output-high; - gpios = ; + tpm@2e { + compatible = "nuvoton,npct75x"; + reg = <0x2e>; }; }; From patchwork Fri May 13 17:07:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eddie James X-Patchwork-Id: 1630860 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=QsQb7C+S; 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Fri, 13 May 2022 17:07:23 +0000 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 24DH7LbI42074518 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 13 May 2022 17:07:22 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DFFC3AC060; Fri, 13 May 2022 17:07:21 +0000 (GMT) Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 77AA5AC059; Fri, 13 May 2022 17:07:21 +0000 (GMT) Received: from v0005c16.aus.stglabs.ibm.com (unknown [9.163.1.123]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP; Fri, 13 May 2022 17:07:21 +0000 (GMT) From: Eddie James To: openbmc@lists.ozlabs.org Subject: [PATCH u-boot v2019.04-aspeed-openbmc v2 9/9] board: ast2600-ibm: Add AST2600 BMC based POWER10+ servers Date: Fri, 13 May 2022 12:07:15 -0500 Message-Id: <20220513170715.43475-10-eajames@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220513170715.43475-1-eajames@linux.ibm.com> References: <20220513170715.43475-1-eajames@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: vG3wPn-pL5XtC_3iqI8rgV3XwdnfDKOs X-Proofpoint-ORIG-GUID: vG3wPn-pL5XtC_3iqI8rgV3XwdnfDKOs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-13_09,2022-05-13_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 suspectscore=0 bulkscore=0 clxscore=1015 adultscore=0 mlxscore=0 malwarescore=0 phishscore=0 mlxlogscore=999 spamscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205130073 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cjengel@us.ibm.com, joel@jms.id.au Errors-To: openbmc-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "openbmc" Support IBM-specific options for POWER10+ servers built on AST2600 BMC. Signed-off-by: Eddie James --- arch/arm/mach-aspeed/ast2600/Kconfig | 7 ++ board/aspeed/ast2600_ibm/Kconfig | 13 +++ board/aspeed/ast2600_ibm/Makefile | 1 + board/aspeed/ast2600_ibm/ibm.c | 46 +++++++++ configs/ast2600_ibm_defconfig | 137 +++++++++++++++++++++++++++ 5 files changed, 204 insertions(+) create mode 100644 board/aspeed/ast2600_ibm/Kconfig create mode 100644 board/aspeed/ast2600_ibm/Makefile create mode 100644 board/aspeed/ast2600_ibm/ibm.c create mode 100644 configs/ast2600_ibm_defconfig diff --git a/arch/arm/mach-aspeed/ast2600/Kconfig b/arch/arm/mach-aspeed/ast2600/Kconfig index fcdc425de5..412ea639ad 100644 --- a/arch/arm/mach-aspeed/ast2600/Kconfig +++ b/arch/arm/mach-aspeed/ast2600/Kconfig @@ -31,6 +31,12 @@ config TARGET_SLT_AST2600 help SLT-AST2600 is Aspeed SLT board for AST2600 chip. +config TARGET_AST2600_IBM + bool "AST2600-IBM" + depends on ASPEED_AST2600 + help + AST2600-IBM is IBM boards for AST2600 BMC based P0WER10+ servers + config TARGET_AST2600_INTEL bool "AST2600-INTEL" depends on ASPEED_AST2600 @@ -43,6 +49,7 @@ endchoice source "board/aspeed/evb_ast2600/Kconfig" source "board/aspeed/fpga_ast2600/Kconfig" source "board/aspeed/slt_ast2600/Kconfig" +source "board/aspeed/ast2600_ibm/Kconfig" source "board/aspeed/ast2600_intel/Kconfig" endif diff --git a/board/aspeed/ast2600_ibm/Kconfig b/board/aspeed/ast2600_ibm/Kconfig new file mode 100644 index 0000000000..38ee579ed7 --- /dev/null +++ b/board/aspeed/ast2600_ibm/Kconfig @@ -0,0 +1,13 @@ +if TARGET_AST2600_IBM + +config SYS_BOARD + default "ast2600_ibm" + +config SYS_VENDOR + default "aspeed" + +config SYS_CONFIG_NAME + string "board configuration name" + default "ast2600_ibm" + +endif diff --git a/board/aspeed/ast2600_ibm/Makefile b/board/aspeed/ast2600_ibm/Makefile new file mode 100644 index 0000000000..ae1aded893 --- /dev/null +++ b/board/aspeed/ast2600_ibm/Makefile @@ -0,0 +1 @@ +obj-y += ibm.o diff --git a/board/aspeed/ast2600_ibm/ibm.c b/board/aspeed/ast2600_ibm/ibm.c new file mode 100644 index 0000000000..d9e06fafe0 --- /dev/null +++ b/board/aspeed/ast2600_ibm/ibm.c @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 IBM Corp. + */ + +#include +#if defined(CONFIG_TPM_V2) +#include +#include +#include +#endif + +__weak int board_late_init(void) +{ +#if defined(CONFIG_TPM_V2) + int rc; + struct udevice *dev; + /* + * The digest is just an arbitrary sequence for now to ensure that the + * TPM gets "poisoned." + */ + unsigned char digest[32] = { + 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x00, 0x01, + 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, + 0xa0, 0xb1, 0xc2, 0xd3, 0xe4, 0xf5, 0x06, 0x17, + 0x28, 0x39, 0x4a, 0x5b, 0x6c, 0x7d, 0x8e, 0x9f + }; + + rc = uclass_first_device_err(UCLASS_TPM, &dev); + if (rc) + return 0; + + rc = tpm_init(dev); + if (rc) + return 0; + + rc = tpm2_startup(dev, TPM2_SU_CLEAR); + if (rc) + return 0; + + rc = tpm2_pcr_extend(dev, 0, digest); + if (!rc) + printf("TPM: PCR0 extended.\n"); +#endif + return 0; +} diff --git a/configs/ast2600_ibm_defconfig b/configs/ast2600_ibm_defconfig new file mode 100644 index 0000000000..3fe85bc57a --- /dev/null +++ b/configs/ast2600_ibm_defconfig @@ -0,0 +1,137 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="evb_ast2600_spl_emmc" +CONFIG_SYS_DCACHE_OFF=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_SYS_THUMB_BUILD=y +# CONFIG_SPL_USE_ARCH_MEMCPY is not set +# CONFIG_SPL_USE_ARCH_MEMSET is not set +CONFIG_SPL_LDSCRIPT="arch/$(ARCH)/mach-aspeed/ast2600/u-boot-spl.lds" +CONFIG_ARCH_ASPEED=y +CONFIG_SYS_TEXT_BASE=0x81000000 +CONFIG_ASPEED_AST2600=y +# CONFIG_ASPEED_LOADERS is not set +CONFIG_TARGET_AST2600_IBM=y +CONFIG_DEFAULT_DEVICE_TREE="ast2600-rainier" +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_ENV_SIZE=0x10000 +CONFIG_ENV_OFFSET=0x5000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 +CONFIG_SPL=y +CONFIG_SPL_STACK_R_ADDR=0x90300000 +CONFIG_ARMV7_BOOT_SEC_DEFAULT=y +CONFIG_ARMV7_PSCI_NR_CPUS=2 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y +CONFIG_FIT_ENABLE_SHA512_SUPPORT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw" +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="bootm 20100000" +CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_BOARD_INIT=y +# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 +CONFIG_SPL_SHA512_SUPPORT=y +CONFIG_SPL_FIT_IMAGE_TINY=y +CONFIG_SPL_DM_RESET=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_HUSH_PARSER=y +# CONFIG_AUTO_COMPLETE is not set +CONFIG_SYS_PROMPT="ast# " +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +# CONFIG_RANDOM_UUID is not set +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +CONFIG_CMD_SF=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_NCSI=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_MTDPARTS=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_DEFAULT_ENV_FILE=y +CONFIG_DEFAULT_ENV_FILE="board/aspeed/ast2600_openbmc_mmc.txt" +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_OF_TRANSLATE=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_ASPEED_HACE_V1=y +CONFIG_DM_GPIO=y +CONFIG_SPL_GPIO_HOG=y +CONFIG_ASPEED_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_ASPEED=y +CONFIG_MISC=y +CONFIG_ASPEED_AHBC=y +CONFIG_DM_MMC=y +CONFIG_SPL_MMC_TINY=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ASPEED=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_BROADCOM=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_NCSI=y +CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_FTGMAC100=y +CONFIG_MDIO=y +CONFIG_PHY=y +CONFIG_PINCTRL=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_DM_SERIAL=y +CONFIG_SYS_NS16550=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_SYSRESET=y +CONFIG_WDT=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_TPM=y +CONFIG_TPM2_TIS_I2C=y +# CONFIG_EFI_LOADER is not set