From patchwork Fri May 6 04:37:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neha Malcom Francis X-Patchwork-Id: 1627506 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=TN1EzXp8; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KvnY75TzYz9sCq for ; Fri, 6 May 2022 20:55:55 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7352883F52; Fri, 6 May 2022 12:55:43 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="TN1EzXp8"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 3A684806B7; Fri, 6 May 2022 06:38:15 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 7953683FE0 for ; Fri, 6 May 2022 06:38:06 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=n-francis@ti.com Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2464c5FD113842 for ; Thu, 5 May 2022 23:38:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1651811885; bh=sXrjvLi22NWCHtSTzFRPyHxeLX2dYxKw0Ooo+4+mIxU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=TN1EzXp8K76OE4TOZLIrfEIcX2L1qiwIuYw+HcOEtZJs090QkW4GlScOiLMeas2vq OQpc+r1Lp/VpUeAsCR8iiUnpVnQx0qZkiX1j/rY/v0RxACio9vJaWJarBqCN+MUFtH TGMFxMHSGsbNn0L+Ntg3xGfeLvMHbH9RqEIooiTA= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2464c55p030088 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL) for ; Thu, 5 May 2022 23:38:05 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Thu, 5 May 2022 23:38:04 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Thu, 5 May 2022 23:38:04 -0500 Received: from ula0497641.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2464bxmK032170; Thu, 5 May 2022 23:38:02 -0500 From: Neha Malcom Francis To: CC: Subject: [PATCH RFC v2 01/11] j721e_evm: schema: yaml: Add general schema and J721E board config files Date: Fri, 6 May 2022 10:07:49 +0530 Message-ID: <20220506043759.8193-2-n-francis@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220506043759.8193-1-n-francis@ti.com> References: <20220506043759.8193-1-n-francis@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Mailman-Approved-At: Fri, 06 May 2022 12:55:38 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Schema file in YAML must be provided in board/ti/common for validating input config files and packaging system firmware. The schema includes entries for rm-cfg, board-cfg, pm-cfg and sec-cfg. Board config file must be provided in board/ti/ in YAML. These can then be consumed for generation of binaries to package system firmware. Added YAML config for J721E EVM in particular. It is to be noted that the bootflow followed by J721E requires tiboot3.bin, TIFS and board config binaries to be packaged into sysfw.itb along with u-boot.img. It also requires DM, ATF, OPTEE packaged into tispl.bin. Signed-off-by: Tarun Sahu [n-francis@ti.com: prepared patch for upstreaming] Signed-off-by: Neha Malcom Francis --- board/ti/common/schema.yaml | 355 ++++ board/ti/j721e/config.yaml | 3162 +++++++++++++++++++++++++++++++++++ 2 files changed, 3517 insertions(+) create mode 100644 board/ti/common/schema.yaml create mode 100644 board/ti/j721e/config.yaml diff --git a/board/ti/common/schema.yaml b/board/ti/common/schema.yaml new file mode 100644 index 0000000000..070ff797e0 --- /dev/null +++ b/board/ti/common/schema.yaml @@ -0,0 +1,355 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Config schema for TI K3 devices +# + +--- + +definitions: + u8: + type: integer + minimum: 0 + maximum: 0xff + u16: + type: integer + minimum: 0 + maximum: 0xffff + u32: + type: integer + minimum: 0 + maximum: 0xffffffff + + + +type: object +properties: + pm-cfg: + type: object + properties: + rev: + type: object + properties: + boardcfg_abi_maj: + $ref: "#/definitions/u8" + boardcfg_abi_min: + $ref: "#/definitions/u8" + board-cfg: + type: object + properties: + rev: + type: object + properties: + boardcfg_abi_maj: + $ref: "#/definitions/u8" + boardcfg_abi_min: + $ref: "#/definitions/u8" + control: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + main_isolation_enable: + $ref: "#/definitions/u8" + main_isolation_hostid: + $ref: "#/definitions/u16" + + + secproxy: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + scaling_factor: + $ref: "#/definitions/u8" + scaling_profile: + $ref: "#/definitions/u8" + disable_main_nav_secure_proxy: + $ref: "#/definitions/u8" + + msmc: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + msmc_cache_size: + $ref: "#/definitions/u8" + debug_cfg: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + trace_dst_enables: + $ref: "#/definitions/u16" + trace_src_enables: + $ref: "#/definitions/u16" + + sec-cfg: + type: object + properties: + rev: + type: object + properties: + boardcfg_abi_maj: + $ref: "#/definitions/u8" + boardcfg_abi_min: + $ref: "#/definitions/u8" + + processor_acl_list: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + proc_acl_entries: + type: array + minItems: 32 + maxItems: 32 + items: + type: object + properties: + processor_id: + $ref: "#/definitions/u8" + proc_access_master: + $ref: "#/definitions/u8" + proc_access_secondary: + type: array + minItems: 3 + maxItems: 3 + items: + $ref: "#/definitions/u8" + host_hierarchy: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + host_hierarchy_entries: + type: array + minItems: 32 + maxItems: 32 + items: + type: object + properties: + host_id: + $ref: "#/definitions/u8" + supervisor_host_id: + $ref: "#/definitions/u8" + + otp_config: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + otp_entry: + type: array + minItems: 32 + maxItems: 32 + items: + type: object + properties: + host_id: + $ref: "#/definitions/u8" + host_perms: + $ref: "#/definitions/u8" + write_host_id: + $ref: "#/definitions/u8" + + dkek_config: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + allowed_hosts: + type: array + minItems: 4 + maxItems: 4 + items: + $ref: "#/definitions/u8" + allow_dkek_export_tisci: + $ref: "#/definitions/u8" + rsvd: + type: array + minItems: 3 + maxItems: 3 + items: + $ref: "#/definitions/u8" + + sa2ul_cfg: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + rsvd: + type: array + minItems: 4 + maxItems: 4 + items: + $ref: "#/definitions/u8" + sec_dbg_config: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + allow_jtag_unlock: + $ref: "#/definitions/u8" + allow_wildcard_unlock: + $ref: "#/definitions/u8" + allowed_debug_level_rsvd: + $ref: "#/definitions/u8" + rsvd: + $ref: "#/definitions/u8" + min_cert_rev: + $ref: "#/definitions/u32" + jtag_unlock_hosts: + type: array + minItems: 4 + maxItems: 4 + items: + $ref: "#/definitions/u8" + + + sec_handover_cfg: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + handover_msg_sender: + $ref: "#/definitions/u8" + handover_to_host_id: + $ref: "#/definitions/u8" + rsvd: + type: array + minItems: 4 + maxItems: 4 + items: + $ref: "#/definitions/u8" + + rm-cfg: + type: object + properties: + rm_boardcfg: + type: object + properties: + rev: + type: object + properties: + boardcfg_abi_maj: + $ref: "#/definitions/u8" + boardcfg_abi_min: + $ref: "#/definitions/u8" + + host_cfg: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + host_cfg_entries: + type: array + minItems: 0 + maxItems: 32 + items: + type: object + properties: + host_id: + $ref: "#/definitions/u8" + allowed_atype: + $ref: "#/definitions/u8" + allowed_qos: + $ref: "#/definitions/u16" + allowed_orderid: + $ref: "#/definitions/u32" + allowed_priority: + $ref: "#/definitions/u16" + allowed_sched_priority: + $ref: "#/definitions/u8" + resasg: + type: object + properties: + subhdr: + type: object + properties: + magic: + $ref: "#/definitions/u16" + size: + $ref: "#/definitions/u16" + resasg_entries_size: + $ref: "#/definitions/u16" + reserved: + $ref: "#/definitions/u16" + + resasg_entries: + type: array + minItems: 0 + maxItems: 418 + items: + type: object + properties: + start_resource: + $ref: "#/definitions/u16" + num_resource: + $ref: "#/definitions/u16" + type: + $ref: "#/definitions/u16" + host_id: + $ref: "#/definitions/u8" + reserved: + $ref: "#/definitions/u8" diff --git a/board/ti/j721e/config.yaml b/board/ti/j721e/config.yaml new file mode 100644 index 0000000000..710517404f --- /dev/null +++ b/board/ti/j721e/config.yaml @@ -0,0 +1,3162 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Board configuration for J721E EVM +# + +--- + +pm-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + +board-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + control: + subhdr: + magic: 0xC1D3 + size: 7 + main_isolation_enable: 0x5A + main_isolation_hostid: 0x2 + secproxy: + subhdr: + magic: 0x1207 + size: 7 + scaling_factor: 0x1 + scaling_profile: 0x1 + disable_main_nav_secure_proxy: 0 + msmc: + subhdr: + magic: 0xA5C3 + size: 5 + msmc_cache_size: 0x0 + debug_cfg: + subhdr: + magic: 0x020C + size: 8 + trace_dst_enables: 0x00 + trace_src_enables: 0x00 + +sec-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + processor_acl_list: + subhdr: + magic: 0xF1EA + size: 164 + proc_acl_entries: + - #1 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #2 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #3 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #4 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #5 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #6 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #7 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #8 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #9 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #10 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #11 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #12 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #13 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #14 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #15 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #16 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #17 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #18 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #19 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #20 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #21 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #22 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #23 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #24 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #25 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #26 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #27 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #28 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #29 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #30 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #31 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - #32 + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + + host_hierarchy: + subhdr: + magic: 0x8D27 + size: 68 + host_hierarchy_entries: + - #1 + host_id: 0 + supervisor_host_id: 0 + - #2 + host_id: 0 + supervisor_host_id: 0 + - #3 + host_id: 0 + supervisor_host_id: 0 + - #4 + host_id: 0 + supervisor_host_id: 0 + - #5 + host_id: 0 + supervisor_host_id: 0 + - #6 + host_id: 0 + supervisor_host_id: 0 + - #7 + host_id: 0 + supervisor_host_id: 0 + - #8 + host_id: 0 + supervisor_host_id: 0 + - #9 + host_id: 0 + supervisor_host_id: 0 + - #10 + host_id: 0 + supervisor_host_id: 0 + - #11 + host_id: 0 + supervisor_host_id: 0 + - #12 + host_id: 0 + supervisor_host_id: 0 + - #13 + host_id: 0 + supervisor_host_id: 0 + - #14 + host_id: 0 + supervisor_host_id: 0 + - #15 + host_id: 0 + supervisor_host_id: 0 + - #16 + host_id: 0 + supervisor_host_id: 0 + - #17 + host_id: 0 + supervisor_host_id: 0 + - #18 + host_id: 0 + supervisor_host_id: 0 + - #19 + host_id: 0 + supervisor_host_id: 0 + - #20 + host_id: 0 + supervisor_host_id: 0 + - #21 + host_id: 0 + supervisor_host_id: 0 + - #22 + host_id: 0 + supervisor_host_id: 0 + - #23 + host_id: 0 + supervisor_host_id: 0 + - #24 + host_id: 0 + supervisor_host_id: 0 + - #25 + host_id: 0 + supervisor_host_id: 0 + - #26 + host_id: 0 + supervisor_host_id: 0 + - #27 + host_id: 0 + supervisor_host_id: 0 + - #28 + host_id: 0 + supervisor_host_id: 0 + - #29 + host_id: 0 + supervisor_host_id: 0 + - #30 + host_id: 0 + supervisor_host_id: 0 + - #31 + host_id: 0 + supervisor_host_id: 0 + - #32 + host_id: 0 + supervisor_host_id: 0 + otp_config: + subhdr: + magic: 0x4081 + size: 69 + otp_entry: + - #1 + host_id: 0 + host_perms: 0 + - #2 + host_id: 0 + host_perms: 0 + - #3 + host_id: 0 + host_perms: 0 + - #4 + host_id: 0 + host_perms: 0 + - #5 + host_id: 0 + host_perms: 0 + - #6 + host_id: 0 + host_perms: 0 + - #7 + host_id: 0 + host_perms: 0 + - #8 + host_id: 0 + host_perms: 0 + - #9 + host_id: 0 + host_perms: 0 + - #10 + host_id: 0 + host_perms: 0 + - #11 + host_id: 0 + host_perms: 0 + - #12 + host_id: 0 + host_perms: 0 + - #13 + host_id: 0 + host_perms: 0 + - #14 + host_id: 0 + host_perms: 0 + - #15 + host_id: 0 + host_perms: 0 + - #16 + host_id: 0 + host_perms: 0 + - #17 + host_id: 0 + host_perms: 0 + - #18 + host_id: 0 + host_perms: 0 + - #19 + host_id: 0 + host_perms: 0 + - #20 + host_id: 0 + host_perms: 0 + - #21 + host_id: 0 + host_perms: 0 + - #22 + host_id: 0 + host_perms: 0 + - #23 + host_id: 0 + host_perms: 0 + - #24 + host_id: 0 + host_perms: 0 + - #25 + host_id: 0 + host_perms: 0 + - #26 + host_id: 0 + host_perms: 0 + - #27 + host_id: 0 + host_perms: 0 + - #28 + host_id: 0 + host_perms: 0 + - #29 + host_id: 0 + host_perms: 0 + - #30 + host_id: 0 + host_perms: 0 + - #31 + host_id: 0 + host_perms: 0 + - #32 + host_id: 0 + host_perms: 0 + write_host_id: 0 + dkek_config: + subhdr: + magic: 0x5170 + size: 12 + allowed_hosts: [128, 0, 0, 0] + allow_dkek_export_tisci: 0x5A + rsvd: [0, 0, 0] + sa2ul_cfg: + subhdr: + magic: 0x23BE + size: 0 + rsvd: [0, 0, 0, 0] + sec_dbg_config: + subhdr: + magic: 0x42AF + size: 16 + allow_jtag_unlock: 0x5A + allow_wildcard_unlock: 0x5A + allowed_debug_level_rsvd: 0 + rsvd: 0 + min_cert_rev: 0x0 + jtag_unlock_hosts: [0, 0, 0, 0] + sec_handover_cfg: + subhdr: + magic: 0x608F + size: 10 + handover_msg_sender: 0 + handover_to_host_id: 0 + rsvd: [0, 0, 0, 0] + +rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size: 356 + host_cfg_entries: + - #1 + host_id: 3 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #2 + host_id: 5 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #3 + host_id: 12 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #4 + host_id: 13 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #5 + host_id: 21 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #6 + host_id: 26 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #7 + host_id: 28 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #8 + host_id: 35 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #9 + host_id: 37 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + 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[10.64.6.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2464c6Uv029023 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL) for ; Thu, 5 May 2022 23:38:06 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Thu, 5 May 2022 23:38:06 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Thu, 5 May 2022 23:38:06 -0500 Received: from ula0497641.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2464bxmL032170; Thu, 5 May 2022 23:38:05 -0500 From: Neha Malcom Francis To: CC: Subject: [PATCH RFC v2 02/11] ti: tools: config: Add board config class to generate config binaries Date: Fri, 6 May 2022 10:07:50 +0530 Message-ID: <20220506043759.8193-3-n-francis@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220506043759.8193-1-n-francis@ti.com> References: <20220506043759.8193-1-n-francis@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean For validating config files and generating binary config artifacts, here board specific config class is added. Add function cfgBinaryGen() in tibcfg_gen.py. It uses TIBoardConfig class to load given schema and config files in YAML, validate them and generate binaries. Signed-off-by: Tarun Sahu [n-francis@ti.com: prepared patch for upstreaming] Signed-off-by: Neha Malcom Francis --- test/py/requirements.txt | 1 + tools/tibcfg_gen.py | 114 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 115 insertions(+) create mode 100644 tools/tibcfg_gen.py diff --git a/test/py/requirements.txt b/test/py/requirements.txt index 33c5c0bbc4..a91ba64563 100644 --- a/test/py/requirements.txt +++ b/test/py/requirements.txt @@ -4,6 +4,7 @@ coverage==4.5.4 extras==1.0.0 fixtures==3.0.0 importlib-metadata==0.23 +jsonschema==4.0.0 linecache2==1.0.0 more-itertools==7.2.0 packaging==19.2 diff --git a/tools/tibcfg_gen.py b/tools/tibcfg_gen.py new file mode 100644 index 0000000000..e5fa2690c8 --- /dev/null +++ b/tools/tibcfg_gen.py @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# TI Board Configuration Class for Schema Validation and Binary Generation +# + +import os +import getopt +import sys + +import yaml + +from jsonschema import validate + + +class TIBoardConfig: + + """ Texas Instruments Board Configuration File""" + + def __init__(self, file, schema, data_rules=""): + """Load a YAML configuration file and YAML schema + + Validation of the config file against the schema is also done.""" + with open(file, 'r') as f: + self.file_yaml = yaml.safe_load(f) + with open(schema, 'r') as sch: + self.schema_yaml = yaml.safe_load(sch) + self.data_rules = data_rules + try: + validate(self.file_yaml, self.schema_yaml) + except Exception as e: + print(e) + + def _convert_to_byte_chunk(self, val, data_type): + """Convert value into byte array""" + size = 0 + if(data_type == "#/definitions/u8"): + size = 1 + elif(data_type == "#/definitions/u16"): + size = 2 + elif(data_type == "#/definitions/u32"): + size = 4 + else: + raise Exception("Data type not present in definitions") + if type(val) == int: + br = val.to_bytes(size, byteorder="little") + return br + + def _compile_yaml(self, schema_yaml, file_yaml): + """Convert YAML file into byte array based on YAML schema""" + br = bytearray() + for key in file_yaml.keys(): + node = file_yaml[key] + node_schema = schema_yaml['properties'][key] + node_type = node_schema.get('type') + if not 'type' in node_schema: + br += self._convert_to_byte_chunk(node, + node_schema.get('$ref')) + elif node_type == 'object': + br += self._compile_yaml(node_schema, node) + elif node_type == 'array': + for item in node: + if not isinstance(item, dict): + br += self._convert_to_byte_chunk( + item, schema_yaml['properties'][key]['items']["$ref"]) + else: + br += self._compile_yaml(node_schema.get('items'), item) + return br + + def generate_binaries(self, out_path=""): + """Generate config binary artifacts from the loaded YAML configuration file""" + if not os.path.isdir(out_path): + os.mkdir(out_path) + for key in self.file_yaml.keys(): + node = self.file_yaml[key] + node_schema = self.schema_yaml['properties'][key] + br = self._compile_yaml(node_schema, node) + path = os.path.join(out_path, key + ".bin") + with open(path, 'wb') as cfg: + cfg.write(br) + + def delete_binaries(self, out_path=""): + """Delete generated binaries""" + if os.path.isdir(out_path): + for key in self.file_yaml.keys(): + path = os.path.join(out_path, key + ".bin") + if os.path.isfile(path): + os.remove(path) + + +def cfgBinaryGen(): + """Generate config binaries from YAML config file and YAML schema + Arguments: + - config_yaml: board config file in YAML + - schema_yaml: schema file in YAML to validate config_yaml against + - output_dir: output directory where generated binaries can be populated + Pass the arguments along with the filename in the Makefile. + """ + opts, args = getopt.getopt(sys.argv[1:], "c:s:o") + for opt, val in opts: + if opt == "-c": + config_yaml = val + elif opt == "-s": + schema_yaml = val + elif opt == "-o": + output_dir = os.path.abspath(val) + try: + tibcfg = TIBoardConfig(config_yaml, schema_yaml) + tibcfg.generate_binaries(output_dir) + except: + raise ValueError("Could not find config files!") + + +cfgBinaryGen() From patchwork Fri May 6 04:37:51 2022 Content-Type: text/plain; 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Thu, 5 May 2022 23:38:08 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Thu, 5 May 2022 23:38:08 -0500 Received: from ula0497641.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2464bxmM032170; Thu, 5 May 2022 23:38:07 -0500 From: Neha Malcom Francis To: CC: Subject: [PATCH RFC v2 03/11] ti: etype: sysfw: Add entry type for sysfw Date: Fri, 6 May 2022 10:07:51 +0530 Message-ID: <20220506043759.8193-4-n-francis@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220506043759.8193-1-n-francis@ti.com> References: <20220506043759.8193-1-n-francis@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean For K3 devices that require a sysfw image, add entry for SYSFW. It can contain system firmware image that can be packaged into sysfw.itb by binman. Signed-off-by: Tarun Sahu [n-francis@ti.com: added tests for addition of etype] Signed-off-by: Neha Malcom Francis --- Makefile | 1 + tools/binman/entries.rst | 11 +++++++++++ tools/binman/etype/ti_sysfw.py | 28 ++++++++++++++++++++++++++++ tools/binman/ftest.py | 7 +++++++ tools/binman/test/232_ti_sysfw.dts | 13 +++++++++++++ 5 files changed, 60 insertions(+) create mode 100644 tools/binman/etype/ti_sysfw.py create mode 100644 tools/binman/test/232_ti_sysfw.dts diff --git a/Makefile b/Makefile index 4b347d3603..581fbba4c3 100644 --- a/Makefile +++ b/Makefile @@ -1338,6 +1338,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \ -a opensbi-path=${OPENSBI} \ -a default-dt=$(default_dt) \ -a scp-path=$(SCP) \ + -a ti-sysfw-path=$(SYSFW) \ -a spl-bss-pad=$(if $(CONFIG_SPL_SEPARATE_BSS),,1) \ -a tpl-bss-pad=$(if $(CONFIG_TPL_SEPARATE_BSS),,1) \ -a spl-dtb=$(CONFIG_SPL_OF_REAL) \ diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst index ae4305c99e..6c0f03b34f 100644 --- a/tools/binman/entries.rst +++ b/tools/binman/entries.rst @@ -1203,6 +1203,17 @@ This entry holds firmware for an external platform-specific coprocessor. +Entry: sysfw: Texas Instruments System Firmware (SYSFW) blob +------------------------------------------------------------ + +Properties / Entry arguments: + - ti-sysfw-path: Filename of file to read into the entry, typically sysfw.bin + +This entry contains system firmware necessary for booting of K3 architecture +devices. + + + Entry: section: Entry that contains other entries ------------------------------------------------- diff --git a/tools/binman/etype/ti_sysfw.py b/tools/binman/etype/ti_sysfw.py new file mode 100644 index 0000000000..5b5b307030 --- /dev/null +++ b/tools/binman/etype/ti_sysfw.py @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Entry type module for TI SYSFW binary blob +# + +import os +import struct +import sys +import zlib + +from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg +from dtoc import fdt_util +from patman import tools + + +class Entry_ti_sysfw(Entry_blob_named_by_arg): + """Entry containing Texas Instruments System Firmware (SYSFW) blob + + Properties / Entry arguments: + - ti-sysfw-path: Filename of file to read into the entry, typically sysfw.bin + + This entry contains system firmware necessary for booting of K3 architecture devices. + """ + + def __init__(self, section, etype, node): + super().__init__(section, etype, node, 'ti-sysfw') + self.external = True diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index 4ce181a066..ec408de334 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -87,6 +87,7 @@ ATF_BL31_DATA = b'bl31' TEE_OS_DATA = b'this is some tee OS data' ATF_BL2U_DATA = b'bl2u' OPENSBI_DATA = b'opensbi' +TI_SYSFW_DATA = b'sysfw' SCP_DATA = b'scp' TEST_FDT1_DATA = b'fdt1' TEST_FDT2_DATA = b'test-fdt2' @@ -195,6 +196,7 @@ class TestFunctional(unittest.TestCase): TestFunctional._MakeInputFile('tee-pager.bin', TEE_OS_DATA) TestFunctional._MakeInputFile('bl2u.bin', ATF_BL2U_DATA) TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA) + TestFunctional._MakeInputFile('sysfw.bin', TI_SYSFW_DATA) TestFunctional._MakeInputFile('scp.bin', SCP_DATA) # Add a few .dtb files for testing @@ -5522,6 +5524,11 @@ fdt fdtmap Extract the devicetree blob from the fdtmap """Test an image with a pre-load header with an invalid key""" with self.assertRaises(ValueError) as e: data = self._DoReadFile('231_pre_load_invalid_key.dts') + + def testPackTiSysfw(self): + """Test that an image with a SYSFW binary can be created""" + data = self._DoReadFile('232_ti_sysfw.dts') + self.assertEqual(TI_SYSFW_DATA, data[:len(TI_SYSFW_DATA)]) if __name__ == "__main__": unittest.main() diff --git a/tools/binman/test/232_ti_sysfw.dts b/tools/binman/test/232_ti_sysfw.dts new file mode 100644 index 0000000000..9e66cbe77b --- /dev/null +++ b/tools/binman/test/232_ti_sysfw.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + binman { + ti-sysfw { + filename = "sysfw.bin"; + }; + }; +}; From patchwork Fri May 6 04:37:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neha Malcom Francis X-Patchwork-Id: 1627377 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=eegxdQB9; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KvdBV06m1z9sG4 for ; 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Thu, 5 May 2022 23:38:10 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Thu, 5 May 2022 23:38:10 -0500 Received: from ula0497641.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2464bxmN032170; Thu, 5 May 2022 23:38:09 -0500 From: Neha Malcom Francis To: CC: Subject: [PATCH RFC v2 04/11] ti: etype: dm: Add entry type for TI DM Date: Fri, 6 May 2022 10:07:52 +0530 Message-ID: <20220506043759.8193-5-n-francis@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220506043759.8193-1-n-francis@ti.com> References: <20220506043759.8193-1-n-francis@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean K3 devices introduces the concept of centralized power, resource and security management to System Firmware. This is to overcome challenges by the traditional approach that implements system control functions on each of the processing units. The software interface for System Firmware is split into TIFS and DM. DM (Device Manager) is responsible for resource and power management from secure and non-secure hosts. This additional binary is necessary for specific platforms' ROM boot images and is to be packaged into tispl.bin Add an entry for DM. The entry can be used for the packaging of tispl.bin by binman along with ATF and TEE. Signed-off-by: Neha Malcom Francis --- Makefile | 1 + tools/binman/entries.rst | 10 ++++++++++ tools/binman/etype/ti_dm.py | 23 +++++++++++++++++++++++ tools/binman/ftest.py | 7 +++++++ tools/binman/test/225_ti_dm.dts | 13 +++++++++++++ 5 files changed, 54 insertions(+) create mode 100644 tools/binman/etype/ti_dm.py create mode 100644 tools/binman/test/225_ti_dm.dts diff --git a/Makefile b/Makefile index 581fbba4c3..7e9c8272c3 100644 --- a/Makefile +++ b/Makefile @@ -1335,6 +1335,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \ $(foreach f,$(BINMAN_INDIRS),-I $(f)) \ -a atf-bl31-path=${BL31} \ -a tee-os-path=${TEE} \ + -a ti-dm-path=${DM} \ -a opensbi-path=${OPENSBI} \ -a default-dt=$(default_dt) \ -a scp-path=$(SCP) \ diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst index 6c0f03b34f..0c6d82fce8 100644 --- a/tools/binman/entries.rst +++ b/tools/binman/entries.rst @@ -1214,6 +1214,16 @@ devices. +Entry: ti-dm: Texas Instruments Device Manager (DM) blob +----------------------------------------------------------------- + +Properties / Entry arguments: + - ti-dm-path: Filename of file to read into the entry, typically dm.bin + +This entry holds the device manager responsible for resource and power management in K3 devices. + + + Entry: section: Entry that contains other entries ------------------------------------------------- diff --git a/tools/binman/etype/ti_dm.py b/tools/binman/etype/ti_dm.py new file mode 100644 index 0000000000..4203fff36e --- /dev/null +++ b/tools/binman/etype/ti_dm.py @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ +# +# Entry type for TI Device Manager + +import os + +from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg + + +class Entry_ti_dm(Entry_blob_named_by_arg): + """Entry containing a Texas Instruments Device Manager (DM) + + Properties / Entry arguments: + - ti-dm-path: Filename of file to read into the entry, typically dm.bin + + This entry holds the device manager responsible for resource and power management + in K3 devices. + """ + + def __init__(self, section, etype, node): + super().__init__(section, etype, node, 'ti-dm') + self.external = True diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index ec408de334..5ff294a386 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -85,6 +85,7 @@ FSP_S_DATA = b'fsp_s' FSP_T_DATA = b'fsp_t' ATF_BL31_DATA = b'bl31' TEE_OS_DATA = b'this is some tee OS data' +TI_DM_DATA = b'tidmtidm' ATF_BL2U_DATA = b'bl2u' OPENSBI_DATA = b'opensbi' TI_SYSFW_DATA = b'sysfw' @@ -194,6 +195,7 @@ class TestFunctional(unittest.TestCase): TestFunctional._MakeInputFile('compress_big', COMPRESS_DATA_BIG) TestFunctional._MakeInputFile('bl31.bin', ATF_BL31_DATA) TestFunctional._MakeInputFile('tee-pager.bin', TEE_OS_DATA) + TestFunctional._MakeInputFile('dm.bin', TI_DM_DATA) TestFunctional._MakeInputFile('bl2u.bin', ATF_BL2U_DATA) TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA) TestFunctional._MakeInputFile('sysfw.bin', TI_SYSFW_DATA) @@ -5300,6 +5302,11 @@ fdt fdtmap Extract the devicetree blob from the fdtmap data = self._DoReadFile('222_tee_os.dts') self.assertEqual(TEE_OS_DATA, data[:len(TEE_OS_DATA)]) + def testPackTiDm(self): + """Test that an image with a TI DM binary can be created""" + data = self._DoReadFile('225_ti_dm.dts') + self.assertEqual(TI_DM_DATA, data[:len(TI_DM_DATA)]) + def testFitFdtOper(self): """Check handling of a specified FIT operation""" entry_args = { diff --git a/tools/binman/test/225_ti_dm.dts b/tools/binman/test/225_ti_dm.dts new file mode 100644 index 0000000000..3ab754131e --- /dev/null +++ b/tools/binman/test/225_ti_dm.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + binman { + ti-dm { + filename = "dm.bin"; + }; + }; +}; From patchwork Fri May 6 04:37:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neha Malcom Francis X-Patchwork-Id: 1627376 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=ngG+Wms/; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KvdBD1MHTz9sG4 for ; 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Thu, 5 May 2022 23:38:11 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Thu, 5 May 2022 23:38:11 -0500 Received: from ula0497641.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2464bxmO032170; Thu, 5 May 2022 23:38:10 -0500 From: Neha Malcom Francis To: CC: Subject: [PATCH RFC v2 05/11] ti: etype: x509: Add etype for x509 certificate for K3 devices Date: Fri, 6 May 2022 10:07:53 +0530 Message-ID: <20220506043759.8193-6-n-francis@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220506043759.8193-1-n-francis@ti.com> References: <20220506043759.8193-1-n-francis@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean K3 devices x509 certificate added to certain binaries that allows ROM to validate the integrity of the image. Etype that generates an x509 certificate depending on boot flow added. Signed-off-by: Neha Malcom Francis --- tools/binman/entries.rst | 15 ++ tools/binman/etype/x509_cert.py | 248 ++++++++++++++++++++++++++++ tools/binman/ftest.py | 7 + tools/binman/test/232_x509_cert.dts | 18 ++ tools/k3_gen_x509_cert.sh | 10 +- 5 files changed, 293 insertions(+), 5 deletions(-) create mode 100644 tools/binman/etype/x509_cert.py create mode 100644 tools/binman/test/232_x509_cert.dts diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst index 0c6d82fce8..dfa281e49f 100644 --- a/tools/binman/entries.rst +++ b/tools/binman/entries.rst @@ -1890,6 +1890,21 @@ and kernel are genuine. +Entry: x509cert: x509 certificate for K3 devices +------------------------------------------------ + +Properties / Entry arguments: + - content: Phandle of binary to sign + - output: Name of the final output file + - key_file: File with key inside it. If not provided, script generates RSA degenerate key + - core: Target core ID on which image would be running + - load: Target load address of the binary in hex + + Output files: + - certificate.bin: Signed certificate binary + + + Entry: x86-reset16: x86 16-bit reset code for U-Boot ---------------------------------------------------- diff --git a/tools/binman/etype/x509_cert.py b/tools/binman/etype/x509_cert.py new file mode 100644 index 0000000000..0009973155 --- /dev/null +++ b/tools/binman/etype/x509_cert.py @@ -0,0 +1,248 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (c) 2018 Google, Inc +# Written by Simon Glass +# + +# Support for a x509 certificate for signing K3 devices + +import os +from collections import OrderedDict +from subprocess import Popen, PIPE +from sys import stderr, stdout + +import asn1 +from Crypto.PublicKey import RSA +from cryptography.hazmat.backends import default_backend +from cryptography.hazmat.primitives import serialization + +from binman.etype.collection import Entry_collection +from dtoc import fdt_util +from patman import tools + +temp_x509 = "x509-temp.cert" +cert = "certificate.bin" +rand_key = "eckey.pem" +bootcore_opts = 0 +bootcore = 0 +debug_type = 0 + + +class Entry_x509_cert(Entry_collection): + """ An entry which contains a x509 certificate + + Properties / Entry arguments: + - content: Phandle of binary to sign + - key_file: File with key inside it. If not provided, script generates RSA degenerate key + - core: Target core ID on which image would be running + - load: Target load address of the binary in hex + + Output files: + - certificate.bin: Signed certificate binary""" + + def __init__(self, section, etype, node): + super().__init__(section, etype, node) + self.key_file = fdt_util.GetString(self._node, 'key-file', "") + self.core = fdt_util.GetInt(self._node, 'core', 0) + self.load_addr = fdt_util.GetInt(self._node, 'load', 0x41c00000) + + def ReadNode(self): + super().ReadNode() + if self.key_file == "": + self.degen_key = True + else: + self.degen_key = False + + def _CreateCertificate(self): + """Create certificate for legacy boot flow""" + if self.degen_key == True: + gen_degen_key() + self.key_file = rand_key + + sha_val = get_sha_val("intermediate-sysfw.bin") + bin_size = get_file_size("intermediate-sysfw.bin") + addr = "%08x" % self.load_addr + if self.core == 0: + cert_type = 2 + elif self.core == 16: + cert_type = 1 + else: + cert_type = 2 + debug_type = 0 + + gen_template() + gen_cert(bin_size, sha_val, cert_type, bootcore_opts, + self.core, addr, debug_type, self.key_file) + + return tools.read_file("certificate.bin") + + def ObtainContents(self): + self.image = self.GetContents(False) + if self.image is None: + return False + f = open("intermediate-sysfw.bin", "wb") + f.write(self.image) + f.close() + self.SetContents(self._CreateCertificate()) + return True + + def ProcessContents(self): + data = self._CreateCertificate() + return self.ProcessContentsUpdate(data) + + +def get_sha_val(binary_file): + process = Popen(['openssl', 'dgst', '-sha512', '-hex', + binary_file], stdout=PIPE, stderr=PIPE) + stdout, stderr = process.communicate() + sha_val = stdout.split()[1] + return sha_val + + +def get_file_size(binary_file): + return os.path.getsize(binary_file) + + +def gen_degen_template(): + with open("degen-template.txt", 'w+', encoding='utf-8') as f: + degen_temp = """ +asn1=SEQUENCE:rsa_key + +[rsa_key] +version=INTEGER:0 +modulus=INTEGER:0xDEGEN_MODULUS +pubExp=INTEGER:1 +privExp=INTEGER:1 +p=INTEGER:0xDEGEN_P +q=INTEGER:0xDEGEN_Q +e1=INTEGER:1 +e2=INTEGER:1 +coeff=INTEGER:0xDEGEN_COEFF""" + f.write(degen_temp) + + +def gen_template(): + """Generate x509 Template""" + with open("x509-template.txt", "w+", encoding='utf-8') as f: + x509template = """ +[ req ] +distinguished_name = req_distinguished_name +x509_extensions = v3_ca +prompt = no +dirstring_type = nobmp + +[ req_distinguished_name ] +C = US +ST = TX +L = Dallas +O = Texas Instruments Incorporated +OU = Processors +CN = TI support +emailAddress = support@ti.com + +[ v3_ca ] +basicConstraints = CA:true +1.3.6.1.4.1.294.1.1 = ASN1:SEQUENCE:boot_seq +1.3.6.1.4.1.294.1.2 = ASN1:SEQUENCE:image_integrity +1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv +# 1.3.6.1.4.1.294.1.4 = ASN1:SEQUENCE:encryption +1.3.6.1.4.1.294.1.8 = ASN1:SEQUENCE:debug + +[ boot_seq ] +certType = INTEGER:TEST_CERT_TYPE +bootCore = INTEGER:TEST_BOOT_CORE +bootCoreOpts = INTEGER:TEST_BOOT_CORE_OPTS +destAddr = FORMAT:HEX,OCT:TEST_BOOT_ADDR +imageSize = INTEGER:TEST_IMAGE_LENGTH + +[ image_integrity ] +shaType = OID:2.16.840.1.101.3.4.2.3 +shaValue = FORMAT:HEX,OCT:TEST_IMAGE_SHA_VAL + +[ swrv ] +swrv = INTEGER:0 + +# [ encryption ] +# initalVector = FORMAT:HEX,OCT:TEST_IMAGE_ENC_IV +# randomString = FORMAT:HEX,OCT:TEST_IMAGE_ENC_RS +# iterationCnt = INTEGER:TEST_IMAGE_KEY_DERIVE_INDEX +# salt = FORMAT:HEX,OCT:TEST_IMAGE_KEY_DERIVE_SALT + +[ debug ] +debugUID = FORMAT:HEX,OCT:0000000000000000000000000000000000000000000000000000000000000000 +debugType = INTEGER:TEST_DEBUG_TYPE +coreDbgEn = INTEGER:0 +coreDbgSecEn = INTEGER:0""" + f.write(x509template) + + +def parse_key(inp_key, section): + parsed_key = "" + section_true = False + with open(inp_key, 'r') as file: + for line in file: + if section in line: + section_true = True + elif section_true: + if " " not in line: + break + else: + parsed_key += line.replace(":", "").replace(" ", "") + return parsed_key.replace("\n", "") + + +def gen_degen_key(): + """Generate a 4096 bit RSA key""" + try: + # generates 1024 bit PEM encoded RSA key in PKCS#1 format + private_key = RSA.generate(1024) + f = open('key.pem', 'wb') + f.write(private_key.exportKey('PEM')) + f.close() + except: + raise(Exception) + + try: + process = Popen(['openssl', 'rsa', '-in', 'key.pem', + '-text', '-out', 'key.txt'], stdout=PIPE, stderr=PIPE) + stdout, stderr = process.communicate() + except: + raise(stderr) + + DEGEN_MODULUS = parse_key("key.txt", "modulus") + DEGEN_P = parse_key("key.txt", "prime1") + DEGEN_Q = parse_key("key.txt", "prime2") + DEGEN_COEFF = parse_key("key.txt", "coefficient") + + gen_degen_template() + + with open("degen-template.txt", 'r') as file_input: + with open("degenerateKey.txt", 'w') as file_output: + for line in file_input: + s = line.replace("DEGEN_MODULUS", DEGEN_MODULUS).replace( + "DEGEN_P", DEGEN_P).replace("DEGEN_Q", DEGEN_Q).replace("DEGEN_COEFF", DEGEN_COEFF) + file_output.write(s) + + try: + process = Popen(['openssl', 'asn1parse', '-genconf', 'degenerateKey.txt', + '-out', 'degenerateKey.der'], stdout=PIPE, stderr=PIPE) + stdout, stderr = process.communicate() + except: + raise(stderr) + + try: + process = Popen(['openssl', 'rsa', '-in', 'degenerateKey.der', + '-inform', 'DER', '-outform', 'PEM', '-out', rand_key]) + stdout, stderr = process.communicate() + except: + raise(stderr) + + +def gen_cert(bin_size, sha_val, cert_type, bootcore_opts, bootcore, addr, debug_type, key): + with open(temp_x509, "w") as output_file: + with open("x509-template.txt", "r") as input_file: + for line in input_file: + output_file.write(line.replace("TEST_IMAGE_LENGTH", str(bin_size)).replace("TEST_IMAGE_SHA_VAL", sha_val.decode("utf-8")).replace("TEST_CERT_TYPE", str(cert_type)).replace( + "TEST_BOOT_CORE_OPTS", str(bootcore_opts)).replace("TEST_BOOT_CORE", str(bootcore)).replace("TEST_BOOT_ADDR", str(addr)).replace("TEST_DEBUG_TYPE", str(debug_type))) + process = Popen(['openssl', 'req', '-new', '-x509', '-key', key, '-nodes', '-outform', + 'DER', '-out', cert, '-config', temp_x509, '-sha512'], stdout=PIPE, stderr=PIPE) + stdout, stderr = process.communicate() diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index 5ff294a386..d8ee592250 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -96,6 +96,7 @@ ENV_DATA = b'var1=1\nvar2="2"' PRE_LOAD_MAGIC = b'UBSH' PRE_LOAD_VERSION = 0x11223344.to_bytes(4, 'big') PRE_LOAD_HDR_SIZE = 0x00001000.to_bytes(4, 'big') +X509_DATA = b'filetobesigned' # Subdirectory of the input dir to use to put test FDTs TEST_FDT_SUBDIR = 'fdts' @@ -200,6 +201,7 @@ class TestFunctional(unittest.TestCase): TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA) TestFunctional._MakeInputFile('sysfw.bin', TI_SYSFW_DATA) TestFunctional._MakeInputFile('scp.bin', SCP_DATA) + TestFunctional._MakeInputFile('tosign.bin', X509_DATA) # Add a few .dtb files for testing TestFunctional._MakeInputFile('%s/test-fdt1.dtb' % TEST_FDT_SUBDIR, @@ -5537,5 +5539,10 @@ fdt fdtmap Extract the devicetree blob from the fdtmap data = self._DoReadFile('232_ti_sysfw.dts') self.assertEqual(TI_SYSFW_DATA, data[:len(TI_SYSFW_DATA)]) + def testX509Cert(self): + """Test an image with the default x509 certificate header""" + data = self._DoReadFile('232_x509_cert.dts') + self.assertEqual(X509_DATA, data[938:938 + len(X509_DATA)]) + if __name__ == "__main__": unittest.main() diff --git a/tools/binman/test/232_x509_cert.dts b/tools/binman/test/232_x509_cert.dts new file mode 100644 index 0000000000..f768568ca7 --- /dev/null +++ b/tools/binman/test/232_x509_cert.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + x509-cert { + content = <&image>; + }; + + image: blob-ext { + filename = "tosign.bin"; + }; + }; +}; diff --git a/tools/k3_gen_x509_cert.sh b/tools/k3_gen_x509_cert.sh index 298cec1313..b6ef5a2de3 100755 --- a/tools/k3_gen_x509_cert.sh +++ b/tools/k3_gen_x509_cert.sh @@ -109,7 +109,7 @@ gen_degen_key() { openssl asn1parse -genconf degenerateKey.txt -out degenerateKey.der >>/dev/null 2>&1 openssl rsa -in degenerateKey.der -inform DER -outform PEM -out $RAND_KEY >>/dev/null 2>&1 KEY=$RAND_KEY - rm key.pem key.txt degen-template.txt degenerateKey.txt degenerateKey.der + #rm key.pem key.txt degen-template.txt degenerateKey.txt degenerateKey.der } declare -A options_help @@ -246,7 +246,7 @@ gen_cert cat $CERT $BIN > $OUTPUT # Remove all intermediate files -rm $TEMP_X509 $CERT x509-template.txt -if [ "$KEY" == "$RAND_KEY" ]; then - rm $RAND_KEY -fi +#rm $TEMP_X509 $CERT x509-template.txt +#if [ "$KEY" == "$RAND_KEY" ]; then +# rm $RAND_KEY +#fi From patchwork Fri May 6 04:37:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neha Malcom Francis X-Patchwork-Id: 1627375 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=QAc0JN2T; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KvdB14Jc7z9s09 for ; Fri, 6 May 2022 14:38:49 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id DC4C684181; Fri, 6 May 2022 06:38:22 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="QAc0JN2T"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 0F15683FE0; Fri, 6 May 2022 06:38:18 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.2 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4B53F83FE0 for ; Fri, 6 May 2022 06:38:15 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=n-francis@ti.com Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2464cEV5032964 for ; Thu, 5 May 2022 23:38:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1651811894; bh=iW9bZBBJUJoHwhlL2w8UREvw3T3GF4AYewLjAfPpO1Q=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=QAc0JN2TQhy146gJfwrkwCzpi5/o1UgbJYTAfG9LFv87hsyn0wfZhaHNcBxlhlNRB RwUdFwjycS4RKgi67xrcZ+aFlWndiQXTl5KNFASgzqk1ng8+ZWR7bxkFDmz72DMhhy koI6Pc+yPDvE2QMNLFAKN/aoBu1Qs8Wqd2LsVpcA= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2464cEGO108074 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL) for ; Thu, 5 May 2022 23:38:14 -0500 Received: from DFLE105.ent.ti.com (10.64.6.26) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Thu, 5 May 2022 23:38:13 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Thu, 5 May 2022 23:38:13 -0500 Received: from ula0497641.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2464bxmP032170; Thu, 5 May 2022 23:38:12 -0500 From: Neha Malcom Francis To: CC: Subject: [PATCH RFC v2 06/11] ti: sysfw: Add support for packaging sysfw.itb Date: Fri, 6 May 2022 10:07:54 +0530 Message-ID: <20220506043759.8193-7-n-francis@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220506043759.8193-1-n-francis@ti.com> References: <20220506043759.8193-1-n-francis@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean For devices that require sysfw.itb, board config binary artifacts must be populated in the R5 output directory. These can be used by binman to package sysfw.itb. config.mk for mach-k3 updated to generate the required binaries using tibcfg_gen.py. Signed-off-by: Neha Malcom Francis --- arch/arm/mach-k3/config.mk | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk index da458bcfb2..e6c13c1800 100644 --- a/arch/arm/mach-k3/config.mk +++ b/arch/arm/mach-k3/config.mk @@ -28,6 +28,24 @@ else KEY=$(patsubst "%",$(srctree)/%,$(CONFIG_SYS_K3_KEY)) endif +# Board config binary artifacts necessary for packaging of tiboot3.bin +# and sysfw.itb by binman, currently for general purpose devices and +# devices that require sysfw.itb in ROM boot image. Currently set up +# for J721E +ifneq ($(CONFIG_SOC_K3_J721E), ) +ifneq ($(CONFIG_TI_SECURE_DEVICE), y) + +CONFIG_YAML = $(srctree)/board/ti/$(BOARD)/config.yaml +SCHEMA_YAML = $(srctree)/board/ti/common/schema.yaml +board-cfg.bin pm-cfg.bin rm-cfg.bin sec-cfg.bin: + $(PYTHON3) $(srctree)/tools/tibcfg_gen.py -c $(CONFIG_YAML) -s $(SCHEMA_YAML) -o $(O) +INPUTS-y += board-cfg.bin +INPUTS-y += pm-cfg.bin +INPUTS-y += rm-cfg.bin +INPUTS-y += sec-cfg.bin +endif +endif + # tiboot3.bin is mandated by ROM and ROM only supports R5 boot. # So restrict tiboot3.bin creation for CPU_V7R. ifdef CONFIG_CPU_V7R From patchwork Fri May 6 04:37:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neha Malcom Francis X-Patchwork-Id: 1627378 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; 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Thu, 5 May 2022 23:38:15 -0500 Received: from ula0497641.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2464bxmQ032170; Thu, 5 May 2022 23:38:14 -0500 From: Neha Malcom Francis To: CC: Subject: [PATCH RFC v2 07/11] ti: tiboot3.bin: Remove tiboot3.bin target from makefile Date: Fri, 6 May 2022 10:07:55 +0530 Message-ID: <20220506043759.8193-8-n-francis@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220506043759.8193-1-n-francis@ti.com> References: <20220506043759.8193-1-n-francis@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Intention of patch is to move the signing and packaging of tiboot3.bin image to binman, thus removing target from makefile. Also deleting k3_gen_x509_cert.sh which was earlier used to sign a binary associated with K3 devices with x509 certificate. This functionality has been replicated in binman with the etype x509_cert. Signed-off-by: Neha Malcom Francis --- arch/arm/mach-k3/config.mk | 19 ------------------- 1 file changed, 19 deletions(-) diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk index e6c13c1800..49f80ae79b 100644 --- a/arch/arm/mach-k3/config.mk +++ b/arch/arm/mach-k3/config.mk @@ -46,25 +46,6 @@ INPUTS-y += sec-cfg.bin endif endif -# tiboot3.bin is mandated by ROM and ROM only supports R5 boot. -# So restrict tiboot3.bin creation for CPU_V7R. -ifdef CONFIG_CPU_V7R -image_check: $(obj)/u-boot-spl.bin FORCE - @if [ $(IMAGE_SIZE) -gt $(MAX_SIZE) ]; then \ - echo "===============================================" >&2; \ - echo "ERROR: Final Image too big. " >&2; \ - echo "$< size = $(IMAGE_SIZE), max size = $(MAX_SIZE)" >&2; \ - echo "===============================================" >&2; \ - exit 1; \ - fi - -tiboot3.bin: image_check FORCE - $(srctree)/tools/k3_gen_x509_cert.sh -c 16 -b $(obj)/u-boot-spl.bin \ - -o $@ -l $(CONFIG_SPL_TEXT_BASE) -k $(KEY) - -INPUTS-y += tiboot3.bin -endif - ifdef CONFIG_ARM64 ifeq ($(CONFIG_SOC_K3_J721E),) From patchwork Fri May 6 04:37:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neha Malcom Francis X-Patchwork-Id: 1627379 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=xl5oZD34; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Thu, 5 May 2022 23:38:17 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Thu, 5 May 2022 23:38:17 -0500 Received: from ula0497641.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2464bxmR032170; Thu, 5 May 2022 23:38:16 -0500 From: Neha Malcom Francis To: CC: Subject: [PATCH RFC v2 08/11] ti: tispl.bin: Removed script that packages tispl.bin Date: Fri, 6 May 2022 10:07:56 +0530 Message-ID: <20220506043759.8193-9-n-francis@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220506043759.8193-1-n-francis@ti.com> References: <20220506043759.8193-1-n-francis@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean As tispl.bin is to be packaged (with ATF, OPTEE, DM and A72 SPL) using binman, the shell script k3_fit_atf.sh is no longer needed. Removing this file. Signed-off-by: Neha Malcom Francis --- tools/k3_fit_atf.sh | 123 -------------------------------------------- 1 file changed, 123 deletions(-) delete mode 100755 tools/k3_fit_atf.sh diff --git a/tools/k3_fit_atf.sh b/tools/k3_fit_atf.sh deleted file mode 100755 index 7bc07ad074..0000000000 --- a/tools/k3_fit_atf.sh +++ /dev/null @@ -1,123 +0,0 @@ -#!/bin/sh -# SPDX-License-Identifier: GPL-2.0+ -# -# script to generate FIT image source for K3 Family boards with -# ATF, OPTEE, SPL and multiple device trees (given on the command line). -# Inspired from board/sunxi/mksunxi_fit_atf.sh -# -# usage: $0 [ [&2 - ATF=/dev/null -fi - -[ -z "$TEE" ] && TEE="bl32.bin" - -if [ ! -f $TEE ]; then - echo "WARNING OPTEE file $TEE NOT found, resulting might be non-functional" >&2 - TEE=/dev/null -fi - -[ -z "$DM" ] && DM="dm.bin" - -if [ ! -e $DM ]; then - echo "WARNING DM file $DM NOT found, resulting might be non-functional" >&2 - DM=/dev/null -fi - -if [ ! -z "$IS_HS" ]; then - HS_APPEND=_HS -fi - -cat << __HEADER_EOF -/dts-v1/; - -/ { - description = "Configuration to load ATF and SPL"; - #address-cells = <1>; - - images { - atf { - description = "ARM Trusted Firmware"; - data = /incbin/("$ATF"); - type = "firmware"; - arch = "arm64"; - compression = "none"; - os = "arm-trusted-firmware"; - load = <$1>; - entry = <$1>; - }; - tee { - description = "OPTEE"; - data = /incbin/("$TEE"); - type = "tee"; - arch = "arm64"; - compression = "none"; - os = "tee"; - load = <0x9e800000>; - entry = <0x9e800000>; - }; - dm { - description = "DM binary"; - data = /incbin/("$DM"); - type = "firmware"; - arch = "arm32"; - compression = "none"; - os = "DM"; - load = <0x89000000>; - entry = <0x89000000>; - }; - spl { - description = "SPL (64-bit)"; - data = /incbin/("spl/u-boot-spl-nodtb.bin$HS_APPEND"); - type = "standalone"; - os = "U-Boot"; - arch = "arm64"; - compression = "none"; - load = <0x80080000>; - entry = <0x80080000>; - }; -__HEADER_EOF - -# shift through ATF load address in the command line arguments -shift - -for dtname in $* -do - cat << __FDT_IMAGE_EOF - $(basename $dtname) { - description = "$(basename $dtname .dtb)"; - data = /incbin/("$dtname$HS_APPEND"); - type = "flat_dt"; - arch = "arm"; - compression = "none"; - }; -__FDT_IMAGE_EOF -done - -cat << __CONF_HEADER_EOF - }; - configurations { - default = "$(basename $1)"; - -__CONF_HEADER_EOF - -for dtname in $* -do - cat << __CONF_SECTION_EOF - $(basename $dtname) { - description = "$(basename $dtname .dtb)"; - firmware = "atf"; - loadables = "tee", "dm", "spl"; - fdt = "$(basename $dtname)"; - }; -__CONF_SECTION_EOF -done - -cat << __ITS_EOF - }; -}; -__ITS_EOF From patchwork Fri May 6 04:37:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neha Malcom Francis X-Patchwork-Id: 1627380 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=WZxtrzco; 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Thu, 5 May 2022 23:38:18 -0500 Received: from ula0497641.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2464bxmS032170; Thu, 5 May 2022 23:38:17 -0500 From: Neha Malcom Francis To: CC: Subject: [PATCH RFC v2 09/11] ti: x509: Remove shell script used for signing Date: Fri, 6 May 2022 10:07:57 +0530 Message-ID: <20220506043759.8193-10-n-francis@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220506043759.8193-1-n-francis@ti.com> References: <20220506043759.8193-1-n-francis@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Earlier the k3_gen_x509_cert.sh was used for signing binaries with the x509 certificate for Texas Instruments K3 architecture devices. Since the signing process is handled by x509 etype now, there is no more requirement for this script, hence removing it. Signed-off-by: Neha Malcom Francis --- tools/k3_gen_x509_cert.sh | 252 -------------------------------------- 1 file changed, 252 deletions(-) delete mode 100755 tools/k3_gen_x509_cert.sh diff --git a/tools/k3_gen_x509_cert.sh b/tools/k3_gen_x509_cert.sh deleted file mode 100755 index b6ef5a2de3..0000000000 --- a/tools/k3_gen_x509_cert.sh +++ /dev/null @@ -1,252 +0,0 @@ -#!/bin/bash -# SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause -# -# Script to add K3 specific x509 cetificate to a binary. -# - -# Variables -OUTPUT=tiboot3.bin -TEMP_X509=x509-temp.cert -CERT=certificate.bin -RAND_KEY=eckey.pem -LOADADDR=0x41c00000 -BOOTCORE_OPTS=0 -BOOTCORE=16 -DEBUG_TYPE=0 - -gen_degen_template() { -cat << 'EOF' > degen-template.txt - -asn1=SEQUENCE:rsa_key - -[rsa_key] -version=INTEGER:0 -modulus=INTEGER:0xDEGEN_MODULUS -pubExp=INTEGER:1 -privExp=INTEGER:1 -p=INTEGER:0xDEGEN_P -q=INTEGER:0xDEGEN_Q -e1=INTEGER:1 -e2=INTEGER:1 -coeff=INTEGER:0xDEGEN_COEFF -EOF -} - -# Generate x509 Template -gen_template() { -cat << 'EOF' > x509-template.txt - [ req ] - distinguished_name = req_distinguished_name - x509_extensions = v3_ca - prompt = no - dirstring_type = nobmp - - [ req_distinguished_name ] - C = US - ST = TX - L = Dallas - O = Texas Instruments Incorporated - OU = Processors - CN = TI support - emailAddress = support@ti.com - - [ v3_ca ] - basicConstraints = CA:true - 1.3.6.1.4.1.294.1.1 = ASN1:SEQUENCE:boot_seq - 1.3.6.1.4.1.294.1.2 = ASN1:SEQUENCE:image_integrity - 1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv -# 1.3.6.1.4.1.294.1.4 = ASN1:SEQUENCE:encryption - 1.3.6.1.4.1.294.1.8 = ASN1:SEQUENCE:debug - - [ boot_seq ] - certType = INTEGER:TEST_CERT_TYPE - bootCore = INTEGER:TEST_BOOT_CORE - bootCoreOpts = INTEGER:TEST_BOOT_CORE_OPTS - destAddr = FORMAT:HEX,OCT:TEST_BOOT_ADDR - imageSize = INTEGER:TEST_IMAGE_LENGTH - - [ image_integrity ] - shaType = OID:2.16.840.1.101.3.4.2.3 - shaValue = FORMAT:HEX,OCT:TEST_IMAGE_SHA_VAL - - [ swrv ] - swrv = INTEGER:0 - -# [ encryption ] -# initalVector = FORMAT:HEX,OCT:TEST_IMAGE_ENC_IV -# randomString = FORMAT:HEX,OCT:TEST_IMAGE_ENC_RS -# iterationCnt = INTEGER:TEST_IMAGE_KEY_DERIVE_INDEX -# salt = FORMAT:HEX,OCT:TEST_IMAGE_KEY_DERIVE_SALT - - [ debug ] - debugUID = FORMAT:HEX,OCT:0000000000000000000000000000000000000000000000000000000000000000 - debugType = INTEGER:TEST_DEBUG_TYPE - coreDbgEn = INTEGER:0 - coreDbgSecEn = INTEGER:0 -EOF -} - -parse_key() { - sed '/\ \ \ \ /s/://g' key.txt | awk '!/\ \ \ \ / {printf("\n%s\n", $0)}; /\ \ \ \ / {printf("%s", $0)}' | sed 's/\ \ \ \ //g' | awk "/$1:/{getline; print}" -} - -gen_degen_key() { -# Generate a 4096 bit RSA Key - openssl genrsa -out key.pem 1024 >>/dev/null 2>&1 - openssl rsa -in key.pem -text -out key.txt >>/dev/null 2>&1 - DEGEN_MODULUS=$( parse_key 'modulus' ) - DEGEN_P=$( parse_key 'prime1' ) - DEGEN_Q=$( parse_key 'prime2' ) - DEGEN_COEFF=$( parse_key 'coefficient' ) - gen_degen_template - - sed -e "s/DEGEN_MODULUS/$DEGEN_MODULUS/"\ - -e "s/DEGEN_P/$DEGEN_P/" \ - -e "s/DEGEN_Q/$DEGEN_Q/" \ - -e "s/DEGEN_COEFF/$DEGEN_COEFF/" \ - degen-template.txt > degenerateKey.txt - - openssl asn1parse -genconf degenerateKey.txt -out degenerateKey.der >>/dev/null 2>&1 - openssl rsa -in degenerateKey.der -inform DER -outform PEM -out $RAND_KEY >>/dev/null 2>&1 - KEY=$RAND_KEY - #rm key.pem key.txt degen-template.txt degenerateKey.txt degenerateKey.der -} - -declare -A options_help -usage() { - if [ -n "$*" ]; then - echo "ERROR: $*" - fi - echo -n "Usage: $0 " - for option in "${!options_help[@]}" - do - arg=`echo ${options_help[$option]}|cut -d ':' -f1` - if [ -n "$arg" ]; then - arg=" $arg" - fi - echo -n "[-$option$arg] " - done - echo - echo -e "\nWhere:" - for option in "${!options_help[@]}" - do - arg=`echo ${options_help[$option]}|cut -d ':' -f1` - txt=`echo ${options_help[$option]}|cut -d ':' -f2` - tb="\t\t\t" - if [ -n "$arg" ]; then - arg=" $arg" - tb="\t" - fi - echo -e " -$option$arg:$tb$txt" - done - echo - echo "Examples of usage:-" - echo "# Example of signing the SYSFW binary with rsa degenerate key" - echo " $0 -c 0 -b ti-sci-firmware-am6x.bin -o sysfw.bin -l 0x40000" - echo "# Example of signing the SPL binary with rsa degenerate key" - echo " $0 -c 16 -b spl/u-boot-spl.bin -o tiboot3.bin -l 0x41c00000" -} - -options_help[b]="bin_file:Bin file that needs to be signed" -options_help[k]="key_file:file with key inside it. If not provided script generates a rsa degenerate key." -options_help[o]="output_file:Name of the final output file. default to $OUTPUT" -options_help[c]="core_id:target core id on which the image would be running. Default to $BOOTCORE" -options_help[l]="loadaddr: Target load address of the binary in hex. Default to $LOADADDR" -options_help[d]="debug_type: Debug type, set to 4 to enable early JTAG. Default to $DEBUG_TYPE" - -while getopts "b:k:o:c:l:d:h" opt -do - case $opt in - b) - BIN=$OPTARG - ;; - k) - KEY=$OPTARG - ;; - o) - OUTPUT=$OPTARG - ;; - l) - LOADADDR=$OPTARG - ;; - c) - BOOTCORE=$OPTARG - ;; - d) - DEBUG_TYPE=$OPTARG - ;; - h) - usage - exit 0 - ;; - \?) - usage "Invalid Option '-$OPTARG'" - exit 1 - ;; - :) - usage "Option '-$OPTARG' Needs an argument." - exit 1 - ;; - esac -done - -if [ "$#" -eq 0 ]; then - usage "Arguments missing" - exit 1 -fi - -if [ -z "$BIN" ]; then - usage "Bin file missing in arguments" - exit 1 -fi - -# Generate rsa degenerate key if user doesn't provide a key -if [ -z "$KEY" ]; then - gen_degen_key -fi - -if [ $BOOTCORE == 0 ]; then # BOOTCORE M3, loaded by ROM - CERTTYPE=2 -elif [ $BOOTCORE == 16 ]; then # BOOTCORE R5, loaded by ROM - CERTTYPE=1 -else # Non BOOTCORE, loaded by SYSFW - BOOTCORE_OPTS_VER=$(printf "%01x" 1) - # Add input args option for SET and CLR flags. - BOOTCORE_OPTS_SETFLAG=$(printf "%08x" 0) - BOOTCORE_OPTS_CLRFLAG=$(printf "%08x" 0x100) # Clear FLAG_ARMV8_AARCH32 - BOOTCORE_OPTS="0x$BOOTCORE_OPTS_VER$BOOTCORE_OPTS_SETFLAG$BOOTCORE_OPTS_CLRFLAG" - # Set the cert type to zero. - # We are not using public/private key store now - CERTTYPE=$(printf "0x%08x" 0) -fi - -SHA_VAL=`openssl dgst -sha512 -hex $BIN | sed -e "s/^.*= //g"` -BIN_SIZE=`cat $BIN | wc -c` -ADDR=`printf "%08x" $LOADADDR` - -gen_cert() { - #echo "Certificate being generated :" - #echo " LOADADDR = 0x$ADDR" - #echo " IMAGE_SIZE = $BIN_SIZE" - #echo " CERT_TYPE = $CERTTYPE" - #echo " DEBUG_TYPE = $DEBUG_TYPE" - sed -e "s/TEST_IMAGE_LENGTH/$BIN_SIZE/" \ - -e "s/TEST_IMAGE_SHA_VAL/$SHA_VAL/" \ - -e "s/TEST_CERT_TYPE/$CERTTYPE/" \ - -e "s/TEST_BOOT_CORE_OPTS/$BOOTCORE_OPTS/" \ - -e "s/TEST_BOOT_CORE/$BOOTCORE/" \ - -e "s/TEST_BOOT_ADDR/$ADDR/" \ - -e "s/TEST_DEBUG_TYPE/$DEBUG_TYPE/" \ - x509-template.txt > $TEMP_X509 - openssl req -new -x509 -key $KEY -nodes -outform DER -out $CERT -config $TEMP_X509 -sha512 -} - -gen_template -gen_cert -cat $CERT $BIN > $OUTPUT - -# Remove all intermediate files -#rm $TEMP_X509 $CERT x509-template.txt -#if [ "$KEY" == "$RAND_KEY" ]; then -# rm $RAND_KEY -#fi From patchwork Fri May 6 04:37:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neha Malcom Francis X-Patchwork-Id: 1627381 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=NvUaQu0m; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4KvdCG5mgnz9sG4 for ; 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Thu, 5 May 2022 23:38:20 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Thu, 5 May 2022 23:38:20 -0500 Received: from ula0497641.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2464bxmT032170; Thu, 5 May 2022 23:38:19 -0500 From: Neha Malcom Francis To: CC: Subject: [PATCH RFC v2 10/11] ti: dtsi: j721e: Use binman to package sysfw.itb and tiboot3.bin Date: Fri, 6 May 2022 10:07:58 +0530 Message-ID: <20220506043759.8193-11-n-francis@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220506043759.8193-1-n-francis@ti.com> References: <20220506043759.8193-1-n-francis@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean By providing entries in the binman node of the device tree, binman will be able to find and package board config binary artifacts generated by TIBoardConfig with sysfw.bin and generate the final image sysfw.itb. k3-j721e-r5-binman.dtsi has been introduced for R5 specific binman node. It can be then be include by files that require it like k3-j721e-r5-common-proc-board-u-boot.dtsi. Signed-off-by: Tarun Sahu [n-francis@ti.com: prepared patch for upstreaming] Signed-off-by: Neha Malcom Francis --- arch/arm/dts/k3-j721e-r5-binman.dtsi | 88 +++++++++++++++++++ .../k3-j721e-r5-common-proc-board-u-boot.dtsi | 1 + board/ti/j721e/Kconfig | 1 + 3 files changed, 90 insertions(+) create mode 100644 arch/arm/dts/k3-j721e-r5-binman.dtsi diff --git a/arch/arm/dts/k3-j721e-r5-binman.dtsi b/arch/arm/dts/k3-j721e-r5-binman.dtsi new file mode 100644 index 0000000000..cf5b5bfdf6 --- /dev/null +++ b/arch/arm/dts/k3-j721e-r5-binman.dtsi @@ -0,0 +1,88 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + +#include + +/ { + binman: binman { + multiple-images; + }; +}; + +&binman { + tiboot3 { + filename = "tiboot3.bin"; + x509-cert { + content = <&image1>; + core = <16>; + load = ; + }; + image1: u-boot-spl { + no-expanded; + }; + }; + binary { + filename = "sysfw.bin"; + x509-cert { + content = <&image2>; + core = <0>; + load = <0x0040000>; + }; + image2: ti-sysfw { + }; + }; + itb { + filename = "sysfw.itb"; + fit { + description = "SYSFW and Config Fragments"; + #address-cells = <1>; + images { + sysfw.bin { + description = "sysfw"; + type = "firmware"; + arch = "arm"; + compression = "none"; + blob { + filename = "sysfw.bin"; + }; + }; + board-cfg.bin { + description = "board-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + blob-ext { + filename = "board-cfg.bin"; + }; + }; + pm-cfg.bin { + description = "pm-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + blob-ext { + filename = "pm-cfg.bin"; + }; + }; + rm-cfg.bin { + description = "rm-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + blob-ext { + filename = "rm-cfg.bin"; + }; + }; + sec-cfg.bin { + description = "sec-cfg"; + type = "firmware"; + arch = "arm"; + compression = "none"; + blob-ext { + filename = "sec-cfg.bin"; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi index 48c6ddf672..75ec722e89 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi @@ -4,6 +4,7 @@ */ #include "k3-j721e-common-proc-board-u-boot.dtsi" +#include "k3-j721e-r5-binman.dtsi" / { chosen { diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig index c28752a658..a3a9d504ae 100644 --- a/board/ti/j721e/Kconfig +++ b/board/ti/j721e/Kconfig @@ -24,6 +24,7 @@ config TARGET_J721E_R5_EVM select RAM select SPL_RAM select K3_DDRSS + select BINMAN imply SYS_K3_SPL_ATF imply TI_I2C_BOARD_DETECT From patchwork Fri May 6 04:37:59 2022 Content-Type: text/plain; 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Thu, 5 May 2022 23:38:22 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Thu, 5 May 2022 23:38:22 -0500 Received: from ula0497641.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2464bxmU032170; Thu, 5 May 2022 23:38:21 -0500 From: Neha Malcom Francis To: CC: Subject: [PATCH RFC v2 11/11] ti: dtsi: j721e: Use binman to package tispl.bin Date: Fri, 6 May 2022 10:07:59 +0530 Message-ID: <20220506043759.8193-12-n-francis@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220506043759.8193-1-n-francis@ti.com> References: <20220506043759.8193-1-n-francis@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Explicit make commands were earlier used to generate tispl.bin image, now it is replaced using binman. Binman picks up and packages entries according to the description of entries given in the binman node in the device tree. The make commands that were earlier responsible for generating tispl.bin has been removed. k3-j721e-a72-binman.dtsi has been introduced for A72 specific binman node. It can be included in files that require it like k3-j721e-common-proc-board-u-boot.dtsi. Note that make commands for secure devices has also been removed as focus is on general purpose devices at present time. Signed-off-by: Tarun Sahu [n-francis@ti.com: prepared patch for upstreaming] Signed-off-by: Neha Malcom Francis --- arch/arm/dts/k3-j721e-a72-binman.dtsi | 86 +++++++++++++++++++ .../k3-j721e-common-proc-board-u-boot.dtsi | 1 + arch/arm/mach-k3/config.mk | 33 ------- board/ti/j721e/Kconfig | 1 + scripts/Makefile.spl | 4 - 5 files changed, 88 insertions(+), 37 deletions(-) create mode 100644 arch/arm/dts/k3-j721e-a72-binman.dtsi diff --git a/arch/arm/dts/k3-j721e-a72-binman.dtsi b/arch/arm/dts/k3-j721e-a72-binman.dtsi new file mode 100644 index 0000000000..beb3424bb9 --- /dev/null +++ b/arch/arm/dts/k3-j721e-a72-binman.dtsi @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + +#include + +#ifdef CONFIG_ARM64 +/ { + binman: binman { + multiple-images; + }; +}; + +&binman { + tispl { + filename = "tispl.bin"; + fit { + description = "FIT IMAGE"; + #address-cells = <1>; + images { + atf { + description = "ARM Trusted Firmware"; + type = "firmware"; + arch = "arm64"; + compression = "none"; + os = "arm-trusted-firmware"; + load = ; + entry = ; + atf-bl31 { + }; + }; + tee { + description = "OPTEE"; + type = "tee"; + arch = "arm64"; + compression = "none"; + os = "tee"; + load = <0x9e800000>; + entry = <0x9e800000>; + tee-os { + }; + }; + dm { + description = "DM binary"; + type = "firmware"; + arch = "arm32"; + compression = "none"; + os = "DM"; + load = <0x89000000>; + entry = <0x89000000>; + ti-dm { + }; + }; + spl { + description = "SPL (64-bit)"; + type = "standalone"; + os = "U-Boot"; + arch = "arm64"; + compression = "none"; + load = ; + entry = ; + u-boot-spl-nodtb { + }; + }; + k3-j721e-common-proc-board.dtb { + description = "k3-j721e-common-proc-board"; + type = "flat_dt"; + arch = "arm"; + compression = "none"; + blob-ext { + filename = "spl/dts/k3-j721e-common-proc-board.dtb"; + }; + }; + }; + configurations { + default = "conf"; + conf { + description = "k3-j721e-common-proc-board"; + firmware = "atf"; + loadables = "tee", "dm", "spl"; + fdt = "k3-j721e-common-proc-board.dtb"; + }; + }; + }; + }; +}; +#endif diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index 677a72d2a2..6490d71f7e 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -4,6 +4,7 @@ */ #include +#include "k3-j721e-a72-binman.dtsi" / { chosen { diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk index 49f80ae79b..e0d9ea97c9 100644 --- a/arch/arm/mach-k3/config.mk +++ b/arch/arm/mach-k3/config.mk @@ -52,38 +52,5 @@ ifeq ($(CONFIG_SOC_K3_J721E),) export DM := /dev/null endif -ifeq ($(CONFIG_TI_SECURE_DEVICE),y) -SPL_ITS := u-boot-spl-k3_HS.its -$(SPL_ITS): export IS_HS=1 -INPUTS-y += tispl.bin_HS -else -SPL_ITS := u-boot-spl-k3.its -INPUTS-y += tispl.bin -endif - -ifeq ($(CONFIG_SPL_OF_LIST),) -LIST_OF_DTB := $(CONFIG_DEFAULT_DEVICE_TREE) -else -LIST_OF_DTB := $(CONFIG_SPL_OF_LIST) endif - -quiet_cmd_k3_mkits = MKITS $@ -cmd_k3_mkits = \ - $(srctree)/tools/k3_fit_atf.sh \ - $(CONFIG_K3_ATF_LOAD_ADDR) \ - $(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(LIST_OF_DTB))) > $@ - -$(SPL_ITS): FORCE - $(call cmd,k3_mkits) endif - -else - -ifeq ($(CONFIG_TI_SECURE_DEVICE),y) -INPUTS-y += u-boot.img_HS -else -INPUTS-y += u-boot.img -endif -endif - -include $(srctree)/arch/arm/mach-k3/config_secure.mk diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig index a3a9d504ae..3cf05f0d3b 100644 --- a/board/ti/j721e/Kconfig +++ b/board/ti/j721e/Kconfig @@ -14,6 +14,7 @@ config TARGET_J721E_A72_EVM select BOARD_LATE_INIT imply TI_I2C_BOARD_DETECT select SYS_DISABLE_DCACHE_OPS + select BINMAN config TARGET_J721E_R5_EVM bool "TI K3 based J721E EVM running on R5" diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index 6ad82cecfb..5f8a8487c5 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -577,7 +577,3 @@ $(obj)/$(SPL_BIN).multidtb.fit.gz: $(obj)/$(SPL_BIN).multidtb.fit $(obj)/$(SPL_BIN).multidtb.fit.lzo: $(obj)/$(SPL_BIN).multidtb.fit @lzop -f9 $< > $@ -ifdef CONFIG_ARCH_K3 -tispl.bin: $(obj)/u-boot-spl-nodtb.bin $(SHRUNK_ARCH_DTB) $(SPL_ITS) FORCE - $(call if_changed,mkfitimage) -endif