From patchwork Wed Feb 21 06:58:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajkumar Rampelli X-Patchwork-Id: 875959 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zmSz04ZQLz9ryJ for ; Wed, 21 Feb 2018 17:59:40 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751534AbeBUG7c (ORCPT ); Wed, 21 Feb 2018 01:59:32 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:16219 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751416AbeBUG7a (ORCPT ); Wed, 21 Feb 2018 01:59:30 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Tue, 20 Feb 2018 22:59:34 -0800 Received: from HQMAIL103.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 20 Feb 2018 22:59:28 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 20 Feb 2018 22:59:28 -0800 Received: from DRUKMAIL102.nvidia.com (10.25.59.20) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 06:59:28 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by drukmail102.nvidia.com (10.25.59.20) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 06:59:23 +0000 Received: from rrajk-ubuntu.nvidia.com (10.124.1.5) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Wed, 21 Feb 2018 06:59:12 +0000 From: Rajkumar Rampelli To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH 01/10] pwm: core: Add support for PWM HW driver with pwm capture only Date: Wed, 21 Feb 2018 12:28:50 +0530 Message-ID: <1519196339-9377-2-git-send-email-rrajk@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> References: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add support for pwm HW driver which has only capture functionality. This helps to implement the PWM based Tachometer driver which reads the PWM output signals from electronic fans. PWM Tachometer captures the period and duty cycle of the PWM signal Signed-off-by: Rajkumar Rampelli --- drivers/pwm/core.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pwm/core.c b/drivers/pwm/core.c index 1581f6a..87d14c9 100644 --- a/drivers/pwm/core.c +++ b/drivers/pwm/core.c @@ -246,6 +246,10 @@ static bool pwm_ops_check(const struct pwm_ops *ops) if (ops->apply) return true; + /* driver supports capture operation */ + if (ops->capture) + return true; + return false; } From patchwork Wed Feb 21 06:58:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajkumar Rampelli X-Patchwork-Id: 875962 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zmSz46wRBz9ryl for ; Wed, 21 Feb 2018 17:59:44 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751631AbeBUG7n (ORCPT ); Wed, 21 Feb 2018 01:59:43 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:16239 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751565AbeBUG7j (ORCPT ); Wed, 21 Feb 2018 01:59:39 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Tue, 20 Feb 2018 22:59:44 -0800 Received: from HQMAIL107.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 20 Feb 2018 22:59:38 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 20 Feb 2018 22:59:38 -0800 Received: from UKMAIL102.nvidia.com (10.26.138.15) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 06:59:37 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by UKMAIL102.nvidia.com (10.26.138.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 06:59:33 +0000 Received: from rrajk-ubuntu.nvidia.com (10.124.1.5) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Wed, 21 Feb 2018 06:59:25 +0000 From: Rajkumar Rampelli To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH 02/10] dt-bindings: Tegra186 tachometer device tree bindings Date: Wed, 21 Feb 2018 12:28:51 +0530 Message-ID: <1519196339-9377-3-git-send-email-rrajk@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> References: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Supply Device tree binding documentation for the NVIDIA Tegra186 SoC's Tachometer Controller Signed-off-by: Rajkumar Rampelli --- .../bindings/pwm/pwm-tegra-tachometer.txt | 31 ++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-tegra-tachometer.txt diff --git a/Documentation/devicetree/bindings/pwm/pwm-tegra-tachometer.txt b/Documentation/devicetree/bindings/pwm/pwm-tegra-tachometer.txt new file mode 100644 index 0000000..4a7ead4 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-tegra-tachometer.txt @@ -0,0 +1,31 @@ +Bindings for a PWM based Tachometer driver + +Required properties: +- compatible: Must be "nvidia,tegra186-pwm-tachometer" +- reg: physical base addresses of the controller and length of + memory mapped region. +- #pwm-cells: should be 2. See pwm.txt in this directory for a + description of the cells format. +- clocks: phandle list of tachometer clocks +- clock-names: should be "tachometer". See clock-bindings.txt in documentations +- resets: phandle to the reset controller for the Tachometer IP +- reset-names: should be "tachometer". See reset.txt in documentations +- nvidia,pulse-per-rev: Integer, pulses per revolution of a Fan. This value + obtained from Fan specification document. +- nvidia,capture-window-len: Integer, window of the Fan Tach monitor, it indicates + that how many period of the input fan tach signal will the FAN TACH logic + monitor. Valid values are 1, 2, 4 and 8 only. + +Example: + tegra_tachometer: tachometer@39c0000 { + compatible = "nvidia,tegra186-pwm-tachometer"; + reg = <0x0 0x039c0000 0x0 0x10>; + #pwm-cells = <2>; + clocks = <&tegra_car TEGRA186_CLK_TACH>; + clock-names = "tachometer"; + resets = <&tegra_car TEGRA186_RESET_TACH>; + reset-names = "tachometer"; + nvidia,pulse-per-rev = <2>; + nvidia,capture-window-len = <2>; + status = "disabled"; + }; From patchwork Wed Feb 21 06:58:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajkumar Rampelli X-Patchwork-Id: 875963 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zmSzH66RRz9rxj for ; Wed, 21 Feb 2018 17:59:55 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751658AbeBUG7z (ORCPT ); Wed, 21 Feb 2018 01:59:55 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:16263 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751645AbeBUG7w (ORCPT ); Wed, 21 Feb 2018 01:59:52 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Tue, 20 Feb 2018 22:59:56 -0800 Received: from HQMAIL107.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 20 Feb 2018 22:59:50 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 20 Feb 2018 22:59:50 -0800 Received: from BGMAIL104.nvidia.com (10.25.59.13) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 06:59:48 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by bgmail104.nvidia.com (10.25.59.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 06:59:44 +0000 Received: from rrajk-ubuntu.nvidia.com (10.124.1.5) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Wed, 21 Feb 2018 06:59:36 +0000 From: Rajkumar Rampelli To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH 03/10] pwm: tegra: Add PWM based Tachometer driver Date: Wed, 21 Feb 2018 12:28:52 +0530 Message-ID: <1519196339-9377-4-git-send-email-rrajk@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> References: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org PWM Tachometer driver capture the PWM signal which is output of FAN in general and provide the period of PWM signal which is converted to RPM by SW. Add Tegra Tachometer driver which implements the pwm-capture to measure period. Signed-off-by: Rajkumar Rampelli Signed-off-by: Laxman Dewangan --- drivers/pwm/Kconfig | 10 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-tegra-tachometer.c | 303 +++++++++++++++++++++++++++++++++++++ 3 files changed, 314 insertions(+) create mode 100644 drivers/pwm/pwm-tegra-tachometer.c diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 763ee50..29aeeeb 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -454,6 +454,16 @@ config PWM_TEGRA To compile this driver as a module, choose M here: the module will be called pwm-tegra. +config PWM_TEGRA_TACHOMETER + tristate "NVIDIA Tegra Tachometer PWM driver" + depends on ARCH_TEGRA + help + NVIDIA Tegra Tachometer reads the PWM signal and reports the PWM + signal periods. This helps in measuring the fan speed where Fan + output for speed is PWM signal. + + This driver support the Tachometer driver in PWM framework. + config PWM_TIECAP tristate "ECAP PWM support" depends on ARCH_OMAP2PLUS || ARCH_DAVINCI_DA8XX || ARCH_KEYSTONE diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 0258a74..14c183e 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -45,6 +45,7 @@ obj-$(CONFIG_PWM_STM32_LP) += pwm-stm32-lp.o obj-$(CONFIG_PWM_STMPE) += pwm-stmpe.o obj-$(CONFIG_PWM_SUN4I) += pwm-sun4i.o obj-$(CONFIG_PWM_TEGRA) += pwm-tegra.o +obj-$(CONFIG_PWM_TEGRA_TACHOMETER) += pwm-tegra-tachometer.o obj-$(CONFIG_PWM_TIECAP) += pwm-tiecap.o obj-$(CONFIG_PWM_TIEHRPWM) += pwm-tiehrpwm.o obj-$(CONFIG_PWM_TIPWMSS) += pwm-tipwmss.o diff --git a/drivers/pwm/pwm-tegra-tachometer.c b/drivers/pwm/pwm-tegra-tachometer.c new file mode 100644 index 0000000..1304e47 --- /dev/null +++ b/drivers/pwm/pwm-tegra-tachometer.c @@ -0,0 +1,303 @@ +/* + * Tegra Tachometer Pulse-Width-Modulation driver + * + * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Since oscillator clock (38.4MHz) serves as a clock source for + * the tach input controller, 1.0105263MHz (i.e. 38.4/38) has to be + * used as a clock value in the RPM calculations + */ +#define TACH_COUNTER_CLK 1010526 + +#define TACH_FAN_TACH0 0x0 +#define TACH_FAN_TACH0_PERIOD_MASK 0x7FFFF +#define TACH_FAN_TACH0_PERIOD_MAX 0x7FFFF +#define TACH_FAN_TACH0_PERIOD_MIN 0x0 +#define TACH_FAN_TACH0_WIN_LENGTH_SHIFT 25 +#define TACH_FAN_TACH0_WIN_LENGTH_MASK 0x3 +#define TACH_FAN_TACH0_OVERFLOW_MASK BIT(24) + +#define TACH_FAN_TACH1 0x4 +#define TACH_FAN_TACH1_HI_MASK 0x7FFFF +/* + * struct pwm_tegra_tach - Tegra tachometer object + * @dev: device providing the Tachometer + * @pulse_per_rev: Pulses per revolution of a Fan + * @capture_window_len: Defines the window of the FAN TACH monitor + * @regs: physical base addresses of the controller + * @clk: phandle list of tachometer clocks + * @rst: phandle to reset the controller + * @chip: PWM chip providing this PWM device + */ +struct pwm_tegra_tach { + struct device *dev; + void __iomem *regs; + struct clk *clk; + struct reset_control *rst; + u32 pulse_per_rev; + u32 capture_window_len; + struct pwm_chip chip; +}; + +static struct pwm_tegra_tach *to_tegra_pwm_chip(struct pwm_chip *chip) +{ + return container_of(chip, struct pwm_tegra_tach, chip); +} + +static u32 tachometer_readl(struct pwm_tegra_tach *ptt, unsigned long reg) +{ + return readl(ptt->regs + reg); +} + +static inline void tachometer_writel(struct pwm_tegra_tach *ptt, u32 val, + unsigned long reg) +{ + writel(val, ptt->regs + reg); +} + +static int pwm_tegra_tach_set_wlen(struct pwm_tegra_tach *ptt, + u32 window_length) +{ + u32 tach0, wlen; + + /* + * As per FAN Spec, the window length value should be greater than or + * equal to Pulses Per Revolution value to measure the time period + * values accurately. + */ + if (ptt->pulse_per_rev > ptt->capture_window_len) { + dev_err(ptt->dev, + "Window length value < pulses per revolution value\n"); + return -EINVAL; + } + + if (hweight8(window_length) != 1) { + dev_err(ptt->dev, + "Valid value of window length is {1, 2, 4 or 8}\n"); + return -EINVAL; + } + + wlen = ffs(window_length) - 1; + tach0 = tachometer_readl(ptt, TACH_FAN_TACH0); + tach0 &= ~(TACH_FAN_TACH0_WIN_LENGTH_MASK << + TACH_FAN_TACH0_WIN_LENGTH_SHIFT); + tach0 |= wlen << TACH_FAN_TACH0_WIN_LENGTH_SHIFT; + tachometer_writel(ptt, tach0, TACH_FAN_TACH0); + + return 0; +} + +static int pwm_tegra_tach_capture(struct pwm_chip *chip, + struct pwm_device *pwm, + struct pwm_capture *result, + unsigned long timeout) +{ + struct pwm_tegra_tach *ptt = to_tegra_pwm_chip(chip); + unsigned long period; + u32 tach; + + tach = tachometer_readl(ptt, TACH_FAN_TACH1); + result->duty_cycle = tach & TACH_FAN_TACH1_HI_MASK; + + tach = tachometer_readl(ptt, TACH_FAN_TACH0); + if (tach & TACH_FAN_TACH0_OVERFLOW_MASK) { + /* Fan is stalled, clear overflow state by writing 1 */ + dev_dbg(ptt->dev, "Tachometer Overflow is detected\n"); + tachometer_writel(ptt, tach, TACH_FAN_TACH0); + } + + period = tach & TACH_FAN_TACH0_PERIOD_MASK; + if ((period == TACH_FAN_TACH0_PERIOD_MIN) || + (period == TACH_FAN_TACH0_PERIOD_MAX)) { + dev_dbg(ptt->dev, "Period set to min/max 0x%lx, Invalid RPM\n", + period); + result->period = 0; + result->duty_cycle = 0; + return 0; + } + + period = period + 1; + + period = DIV_ROUND_CLOSEST_ULL(period * ptt->pulse_per_rev * 1000000ULL, + ptt->capture_window_len * + TACH_COUNTER_CLK); + + /* + * period & duty cycle values are in units of micro seconds. + * Hence, convert them into nano seconds and store. + */ + result->period = period * 1000; + result->duty_cycle = result->duty_cycle * 1000; + + return 0; +} + +static const struct pwm_ops pwm_tegra_tach_ops = { + .capture = pwm_tegra_tach_capture, + .owner = THIS_MODULE, +}; + +static int pwm_tegra_tach_read_platform_data(struct pwm_tegra_tach *ptt) +{ + struct device_node *np = ptt->dev->of_node; + u32 pval; + int err = 0; + + err = of_property_read_u32(np, "nvidia,pulse-per-rev", &pval); + if (err < 0) { + dev_err(ptt->dev, + "\"nvidia,pulse-per-rev\" property is missing\n"); + return err; + } + ptt->pulse_per_rev = pval; + + err = of_property_read_u32(np, "nvidia,capture-window-len", &pval); + if (err < 0) { + dev_err(ptt->dev, + "\"nvidia,capture-window-len\" property is missing\n"); + return err; + } + ptt->capture_window_len = pval; + + return err; +} + +static int pwm_tegra_tach_probe(struct platform_device *pdev) +{ + struct pwm_tegra_tach *ptt; + struct resource *res; + int err = 0; + + ptt = devm_kzalloc(&pdev->dev, sizeof(*ptt), GFP_KERNEL); + if (!ptt) + return -ENOMEM; + + ptt->dev = &pdev->dev; + + err = pwm_tegra_tach_read_platform_data(ptt); + if (err < 0) + return err; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + ptt->regs = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(ptt->regs)) { + dev_err(&pdev->dev, "Failed to remap I/O memory\n"); + return PTR_ERR(ptt->regs); + } + + platform_set_drvdata(pdev, ptt); + + ptt->clk = devm_clk_get(&pdev->dev, "tach"); + if (IS_ERR(ptt->clk)) { + err = PTR_ERR(ptt->clk); + dev_err(&pdev->dev, "Failed to get Tachometer clk: %d\n", err); + return err; + } + + ptt->rst = devm_reset_control_get(&pdev->dev, "tach"); + if (IS_ERR(ptt->rst)) { + err = PTR_ERR(ptt->rst); + dev_err(&pdev->dev, "Failed to get reset handle: %d\n", err); + return err; + } + + err = clk_prepare_enable(ptt->clk); + if (err < 0) { + dev_err(&pdev->dev, "Failed to prepare clock: %d\n", err); + return err; + } + + err = clk_set_rate(ptt->clk, TACH_COUNTER_CLK); + if (err < 0) { + dev_err(&pdev->dev, "Failed to set clock rate %d: %d\n", + TACH_COUNTER_CLK, err); + goto clk_unprep; + } + + reset_control_reset(ptt->rst); + + ptt->chip.dev = &pdev->dev; + ptt->chip.ops = &pwm_tegra_tach_ops; + ptt->chip.base = -1; + ptt->chip.npwm = 1; + + err = pwmchip_add(&ptt->chip); + if (err < 0) { + dev_err(&pdev->dev, "Failed to add tachometer PWM: %d\n", err); + goto reset_assert; + } + + err = pwm_tegra_tach_set_wlen(ptt, ptt->capture_window_len); + if (err < 0) { + dev_err(ptt->dev, "Failed to set window length: %d\n", err); + goto pwm_remove; + } + + return 0; + +pwm_remove: + pwmchip_remove(&ptt->chip); + +reset_assert: + reset_control_assert(ptt->rst); + +clk_unprep: + clk_disable_unprepare(ptt->clk); + + return err; +} + +static int pwm_tegra_tach_remove(struct platform_device *pdev) +{ + struct pwm_tegra_tach *ptt = platform_get_drvdata(pdev); + + reset_control_assert(ptt->rst); + + clk_disable_unprepare(ptt->clk); + + return pwmchip_remove(&ptt->chip); +} + +static const struct of_device_id pwm_tegra_tach_of_match[] = { + { .compatible = "nvidia,tegra186-pwm-tachometer" }, + {} +}; +MODULE_DEVICE_TABLE(of, pwm_tegra_tach_of_match); + +static struct platform_driver tegra_tach_driver = { + .driver = { + .name = "pwm-tegra-tachometer", + .of_match_table = pwm_tegra_tach_of_match, + }, + .probe = pwm_tegra_tach_probe, + .remove = pwm_tegra_tach_remove, +}; + +module_platform_driver(tegra_tach_driver); + +MODULE_DESCRIPTION("PWM based NVIDIA Tegra Tachometer driver"); +MODULE_AUTHOR("Rajkumar Rampelli "); +MODULE_AUTHOR("Laxman Dewangan "); +MODULE_LICENSE("GPL v2"); From patchwork Wed Feb 21 06:58:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajkumar Rampelli X-Patchwork-Id: 875964 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zmSzd1QtHz9s5R for ; Wed, 21 Feb 2018 18:00:13 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751702AbeBUHAF (ORCPT ); Wed, 21 Feb 2018 02:00:05 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:12372 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751630AbeBUHAC (ORCPT ); Wed, 21 Feb 2018 02:00:02 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Tue, 20 Feb 2018 23:00:05 -0800 Received: from HQMAIL105.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 20 Feb 2018 23:00:00 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 20 Feb 2018 23:00:00 -0800 Received: from UKMAIL101.nvidia.com (10.26.138.13) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 06:59:58 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by UKMAIL101.nvidia.com (10.26.138.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 06:59:54 +0000 Received: from rrajk-ubuntu.nvidia.com (10.124.1.5) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Wed, 21 Feb 2018 06:59:46 +0000 From: Rajkumar Rampelli To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH 04/10] hwmon: generic-pwm-tachometer: Add DT binding details Date: Wed, 21 Feb 2018 12:28:53 +0530 Message-ID: <1519196339-9377-5-git-send-email-rrajk@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> References: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add DT binding details for the PWM based generic tachometer driver which gets the period of the PWM tach-output from Fan via PWM IP having capability of capturing the signal. Signed-off-by: Rajkumar Rampelli --- .../bindings/hwmon/generic-pwm-tachometer.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/generic-pwm-tachometer.txt diff --git a/Documentation/devicetree/bindings/hwmon/generic-pwm-tachometer.txt b/Documentation/devicetree/bindings/hwmon/generic-pwm-tachometer.txt new file mode 100644 index 0000000..3541fe5 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/generic-pwm-tachometer.txt @@ -0,0 +1,25 @@ +Device tree bindings for fan tach output connected to PWM controller with +PWM capture capability. + +Required properties: +- compatible : Should be "generic-pwm-tachometer" +- pwms : PWM handle. Please refer pwm.txt DT binding for more details. + +Example: + tegra_tachometer: tachometer@39c0000 { + compatible = "nvidia,tegra186-pwm-tachometer"; + reg = <0x0 0x039c0000 0x0 0x10>; + clocks = <&bpmp_clks TEGRA194_CLK_TACH>; + clock-names = "tachometer"; + resets = <&bpmp_resets TEGRA194_RESET_TACH>; + reset-names = "tachometer"; + nvidia,pulse-per-rev = <2>; + nvidia,sampling-window = <2>; + status = "okay"; + }; + + generic_pwm_tachometer { + compatible = "generic-pwm-tachometer"; + pwms = <&tegra_tachometer 0 1000000>; + status = "okay"; + }; From patchwork Wed Feb 21 06:58:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajkumar Rampelli X-Patchwork-Id: 875965 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zmSzt5N4xz9ryG for ; Wed, 21 Feb 2018 18:00:26 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751744AbeBUHAP (ORCPT ); Wed, 21 Feb 2018 02:00:15 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:3208 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751679AbeBUHAM (ORCPT ); Wed, 21 Feb 2018 02:00:12 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Tue, 20 Feb 2018 23:00:17 -0800 Received: from HQMAIL106.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 20 Feb 2018 23:00:11 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 20 Feb 2018 23:00:11 -0800 Received: from DRUKMAIL101.nvidia.com (10.25.59.19) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 07:00:10 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by drukmail101.nvidia.com (10.25.59.19) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 07:00:05 +0000 Received: from rrajk-ubuntu.nvidia.com (10.124.1.5) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Wed, 21 Feb 2018 06:59:57 +0000 From: Rajkumar Rampelli To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH 05/10] hwmon: generic-pwm-tachometer: Add generic PWM based tachometer Date: Wed, 21 Feb 2018 12:28:54 +0530 Message-ID: <1519196339-9377-6-git-send-email-rrajk@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> References: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add generic PWM based tachometer driver via HWMON interface to report the RPM of motor. This drivers get the period/duty cycle from PWM IP which captures the motor PWM output. This driver implements a simple interface for monitoring the speed of a fan and exposes it in roatations per minute (RPM) to the user space by using the hwmon's sysfs interface Signed-off-by: Rajkumar Rampelli --- Documentation/hwmon/generic-pwm-tachometer | 17 +++++ drivers/hwmon/Kconfig | 10 +++ drivers/hwmon/Makefile | 1 + drivers/hwmon/generic-pwm-tachometer.c | 112 +++++++++++++++++++++++++++++ 4 files changed, 140 insertions(+) create mode 100644 Documentation/hwmon/generic-pwm-tachometer create mode 100644 drivers/hwmon/generic-pwm-tachometer.c diff --git a/Documentation/hwmon/generic-pwm-tachometer b/Documentation/hwmon/generic-pwm-tachometer new file mode 100644 index 0000000..e0713ee --- /dev/null +++ b/Documentation/hwmon/generic-pwm-tachometer @@ -0,0 +1,17 @@ +Kernel driver generic-pwm-tachometer +==================================== + +This driver enables the use of a PWM module to monitor a fan. It uses the +generic PWM interface and can be used on SoCs as along as the SoC supports +Tachometer controller that moniors the Fan speed in periods. + +Author: Rajkumar Rampelli + +Description +----------- + +The driver implements a simple interface for monitoring the Fan speed using +PWM module and Tachometer controller. It requests period value through PWM +capture interface to Tachometer and measures the Rotations per minute using +received period value. It exposes the Fan speed in RPM to the user space by +using the hwmon's sysfs interface. diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index ef23553..8912dcb 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -1878,6 +1878,16 @@ config SENSORS_XGENE If you say yes here you get support for the temperature and power sensors for APM X-Gene SoC. +config GENERIC_PWM_TACHOMETER + tristate "Generic PWM based tachometer driver" + depends on PWM + help + Enables a driver to use PWM signal from motor to use + for measuring the motor speed. The RPM is captured by + PWM modules which has PWM capture capability and this + drivers reads the captured data from PWM IP to convert + it to speed in RPM. + if ACPI comment "ACPI drivers" diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index f814b4a..9dcc374 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -175,6 +175,7 @@ obj-$(CONFIG_SENSORS_WM8350) += wm8350-hwmon.o obj-$(CONFIG_SENSORS_XGENE) += xgene-hwmon.o obj-$(CONFIG_PMBUS) += pmbus/ +obj-$(CONFIG_GENERIC_PWM_TACHOMETER) += generic-pwm-tachometer.o ccflags-$(CONFIG_HWMON_DEBUG_CHIP) := -DDEBUG diff --git a/drivers/hwmon/generic-pwm-tachometer.c b/drivers/hwmon/generic-pwm-tachometer.c new file mode 100644 index 0000000..9354d43 --- /dev/null +++ b/drivers/hwmon/generic-pwm-tachometer.c @@ -0,0 +1,112 @@ +/* + * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#include +#include +#include +#include +#include +#include + +struct pwm_hwmon_tach { + struct device *dev; + struct pwm_device *pwm; + struct device *hwmon; +}; + +static ssize_t show_rpm(struct device *dev, struct device_attribute *attr, + char *buf) +{ + struct pwm_hwmon_tach *ptt = dev_get_drvdata(dev); + struct pwm_device *pwm = ptt->pwm; + struct pwm_capture result; + int err; + unsigned int rpm = 0; + + err = pwm_capture(pwm, &result, 0); + if (err < 0) { + dev_err(ptt->dev, "Failed to capture PWM: %d\n", err); + return err; + } + + if (result.period) + rpm = DIV_ROUND_CLOSEST_ULL(60ULL * NSEC_PER_SEC, + result.period); + + return sprintf(buf, "%u\n", rpm); +} + +static SENSOR_DEVICE_ATTR(rpm, 0444, show_rpm, NULL, 0); + +static struct attribute *pwm_tach_attrs[] = { + &sensor_dev_attr_rpm.dev_attr.attr, + NULL, +}; + +ATTRIBUTE_GROUPS(pwm_tach); + +static int pwm_tach_probe(struct platform_device *pdev) +{ + struct pwm_hwmon_tach *ptt; + int err; + + ptt = devm_kzalloc(&pdev->dev, sizeof(*ptt), GFP_KERNEL); + if (!ptt) + return -ENOMEM; + + ptt->dev = &pdev->dev; + + platform_set_drvdata(pdev, ptt); + dev_set_drvdata(&pdev->dev, ptt); + + ptt->pwm = devm_of_pwm_get(&pdev->dev, pdev->dev.of_node, NULL); + if (IS_ERR(ptt->pwm)) { + err = PTR_ERR(ptt->pwm); + dev_err(&pdev->dev, "Failed to get pwm handle, err: %d\n", + err); + return err; + } + + ptt->hwmon = devm_hwmon_device_register_with_groups(&pdev->dev, + "pwm_tach", ptt, pwm_tach_groups); + if (IS_ERR(ptt->hwmon)) { + err = PTR_ERR_OR_ZERO(ptt->hwmon); + dev_err(&pdev->dev, "Failed to register hwmon device: %d\n", + err); + return err; + } + + return 0; +} + +static const struct of_device_id pwm_tach_of_match[] = { + { .compatible = "generic-pwm-tachometer" }, + {} +}; +MODULE_DEVICE_TABLE(of, pwm_tach_of_match); + +static struct platform_driver pwm_tach_driver = { + .driver = { + .name = "generic-pwm-tachometer", + .of_match_table = pwm_tach_of_match, + }, + .probe = pwm_tach_probe, +}; + +module_platform_driver(pwm_tach_driver); + +MODULE_DESCRIPTION("PWM based Generic Tachometer driver"); +MODULE_AUTHOR("Laxman Dewangan "); +MODULE_AUTHOR("Rajkumar Rampelli "); +MODULE_LICENSE("GPL v2"); From patchwork Wed Feb 21 06:58:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajkumar Rampelli X-Patchwork-Id: 875966 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zmT022M1qz9ryG for ; Wed, 21 Feb 2018 18:00:34 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751795AbeBUHA0 (ORCPT ); Wed, 21 Feb 2018 02:00:26 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:3232 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751760AbeBUHAX (ORCPT ); Wed, 21 Feb 2018 02:00:23 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Tue, 20 Feb 2018 23:00:28 -0800 Received: from HQMAIL105.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 20 Feb 2018 23:00:22 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 20 Feb 2018 23:00:22 -0800 Received: from DRUKMAIL101.nvidia.com (10.25.59.19) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 07:00:21 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by drukmail101.nvidia.com (10.25.59.19) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 07:00:16 +0000 Received: from rrajk-ubuntu.nvidia.com (10.124.1.5) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Wed, 21 Feb 2018 07:00:08 +0000 From: Rajkumar Rampelli To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH 06/10] arm64: tegra: Add Tachometer Controller on Tegra186 Date: Wed, 21 Feb 2018 12:28:55 +0530 Message-ID: <1519196339-9377-7-git-send-email-rrajk@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> References: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The NVIDIA Tegra186 SoC has a Tachometer Controller that analyzes the PWM signal of a Fan and reports the period value through pwm interface. Signed-off-by: Rajkumar Rampelli --- arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 5 +++++ arch/arm64/boot/dts/nvidia/tegra186.dtsi | 11 +++++++++++ 2 files changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts index bd5305a..13c3e59 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts @@ -172,4 +172,9 @@ vin-supply = <&vdd_5v0_sys>; }; }; + + tachometer@39c0000 { + nvidia,pulse-per-rev = <2>; + nvidia,capture-window-len = <2>; + }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index b762227..8f2d598 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1031,4 +1031,15 @@ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; interrupt-parent = <&gic>; }; + + tegra_tachometer: tachometer@39c0000 { + compatible = "nvidia,tegra186-pwm-tachometer"; + reg = <0x0 0x039c0000 0x0 0x10>; + #pwm-cells = <2>; + clocks = <&bpmp TEGRA186_CLK_TACH>; + clock-names = "tachometer"; + resets = <&bpmp TEGRA186_RESET_TACH>; + reset-names = "tachometer"; + status = "disabled"; + }; }; From patchwork Wed Feb 21 06:58:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajkumar Rampelli X-Patchwork-Id: 875973 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zmT1D1LM6z9ry4 for ; Wed, 21 Feb 2018 18:01:36 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751807AbeBUHAg (ORCPT ); Wed, 21 Feb 2018 02:00:36 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:3255 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751760AbeBUHAc (ORCPT ); Wed, 21 Feb 2018 02:00:32 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Tue, 20 Feb 2018 23:00:37 -0800 Received: from HQMAIL103.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 20 Feb 2018 23:00:32 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 20 Feb 2018 23:00:32 -0800 Received: from UKMAIL101.nvidia.com (10.26.138.13) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 07:00:31 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by UKMAIL101.nvidia.com (10.26.138.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 07:00:27 +0000 Received: from rrajk-ubuntu.nvidia.com (10.124.1.5) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Wed, 21 Feb 2018 07:00:19 +0000 From: Rajkumar Rampelli To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH 07/10] arm64: tegra: Add PWM based Tachometer support on Tegra186 Date: Wed, 21 Feb 2018 12:28:56 +0530 Message-ID: <1519196339-9377-8-git-send-email-rrajk@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> References: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add PWM based Tachometer support on Tegra186 to measure number of rotations of a Fan per minute by using PWM capture interface Signed-off-by: Rajkumar Rampelli --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 8f2d598..37149e9 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1042,4 +1042,10 @@ reset-names = "tachometer"; status = "disabled"; }; + + generic_pwm_tachometer { + compatible = "generic-pwm-tachometer"; + pwms = <&tegra_tachometer 0 1000000>; + status = "disabled"; + }; }; From patchwork Wed Feb 21 06:58:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajkumar Rampelli X-Patchwork-Id: 875967 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zmT0J5gyKz9ryG for ; Wed, 21 Feb 2018 18:00:48 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751854AbeBUHAr (ORCPT ); Wed, 21 Feb 2018 02:00:47 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:12393 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751754AbeBUHAo (ORCPT ); Wed, 21 Feb 2018 02:00:44 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Tue, 20 Feb 2018 23:00:48 -0800 Received: from HQMAIL104.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 20 Feb 2018 23:00:43 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 20 Feb 2018 23:00:43 -0800 Received: from DRUKMAIL101.nvidia.com (10.25.59.19) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 07:00:42 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by drukmail101.nvidia.com (10.25.59.19) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 07:00:38 +0000 Received: from rrajk-ubuntu.nvidia.com (10.124.1.5) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Wed, 21 Feb 2018 07:00:29 +0000 From: Rajkumar Rampelli To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH 08/10] arm64: defconfig: enable Nvidia Tegra Tachometer as a module Date: Wed, 21 Feb 2018 12:28:57 +0530 Message-ID: <1519196339-9377-9-git-send-email-rrajk@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> References: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Tegra Tachometer driver implements PWM capture to measure period. Enable this driver as a module in the ARM64 defconfig. Signed-off-by: Rajkumar Rampelli --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 634b373..8b2bda7 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -550,6 +550,7 @@ CONFIG_PWM_MESON=m CONFIG_PWM_ROCKCHIP=y CONFIG_PWM_SAMSUNG=y CONFIG_PWM_TEGRA=m +CONFIG_PWM_TEGRA_TACHOMETER=m CONFIG_PHY_RCAR_GEN3_USB2=y CONFIG_PHY_HI6220_USB=y CONFIG_PHY_QCOM_USB_HS=y From patchwork Wed Feb 21 06:58:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajkumar Rampelli X-Patchwork-Id: 875968 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zmT0X5Gx9z9ryJ for ; Wed, 21 Feb 2018 18:01:00 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751886AbeBUHA6 (ORCPT ); Wed, 21 Feb 2018 02:00:58 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:16290 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751492AbeBUHAz (ORCPT ); Wed, 21 Feb 2018 02:00:55 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Tue, 20 Feb 2018 23:01:00 -0800 Received: from HQMAIL101.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 20 Feb 2018 23:00:54 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 20 Feb 2018 23:00:54 -0800 Received: from UKMAIL101.nvidia.com (10.26.138.13) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 07:00:54 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by UKMAIL101.nvidia.com (10.26.138.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 07:00:50 +0000 Received: from rrajk-ubuntu.nvidia.com (10.124.1.5) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Wed, 21 Feb 2018 07:00:40 +0000 From: Rajkumar Rampelli To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH 09/10] arm64: defconfig: Enable Generic PWM based Tachometer driver Date: Wed, 21 Feb 2018 12:28:58 +0530 Message-ID: <1519196339-9377-10-git-send-email-rrajk@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> References: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Enable Generic PWM based Tachometer driver which implements a simple interface for monitoring the speed of a fan in roatations per minute, and exposes it to the user space by using the hwmon's sysfs interface. Enable this driver as a module in the ARM64 defconfig. Signed-off-by: Rajkumar Rampelli --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 8b2bda7..1b29109 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -321,6 +321,7 @@ CONFIG_BATTERY_BQ27XXX=y CONFIG_SENSORS_ARM_SCPI=y CONFIG_SENSORS_LM90=m CONFIG_SENSORS_INA2XX=m +CONFIG_GENERIC_PWM_TACHOMETER=m CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y CONFIG_CPU_THERMAL=y CONFIG_THERMAL_EMULATION=y From patchwork Wed Feb 21 06:58:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajkumar Rampelli X-Patchwork-Id: 875969 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zmT0v713gz9ry1 for ; Wed, 21 Feb 2018 18:01:19 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751896AbeBUHBI (ORCPT ); Wed, 21 Feb 2018 02:01:08 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:3323 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751887AbeBUHBG (ORCPT ); Wed, 21 Feb 2018 02:01:06 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Tue, 20 Feb 2018 23:01:11 -0800 Received: from HQMAIL108.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 20 Feb 2018 23:01:05 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 20 Feb 2018 23:01:05 -0800 Received: from UKMAIL102.nvidia.com (10.26.138.15) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 07:01:04 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by UKMAIL102.nvidia.com (10.26.138.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 07:01:00 +0000 Received: from rrajk-ubuntu.nvidia.com (10.124.1.5) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Wed, 21 Feb 2018 07:00:52 +0000 From: Rajkumar Rampelli To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH 10/10] arm64: tegra: Add PWM controller on Tegra186 soc Date: Wed, 21 Feb 2018 12:28:59 +0530 Message-ID: <1519196339-9377-11-git-send-email-rrajk@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> References: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The NVIDIA Tegra186 SoC has a PWM controller which is used in FAN control use case. Signed-off-by: Rajkumar Rampelli --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 37149e9..c6f154e 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1032,6 +1032,17 @@ interrupt-parent = <&gic>; }; + pwm@c340000 { + compatible = "nvidia,tegra186-pwm"; + reg = <0x0 0xc340000 0x0 0x10000>; + clocks = <&bpmp TEGRA186_CLK_PWM4>; + clock-names = "pwm"; + #pwm-cells = <2>; + resets = <&bpmp TEGRA186_RESET_PWM4>; + reset-names = "pwm"; + status = "disabled"; + }; + tegra_tachometer: tachometer@39c0000 { compatible = "nvidia,tegra186-pwm-tachometer"; reg = <0x0 0x039c0000 0x0 0x10>;