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Tue, 12 Apr 2022 09:05:48 -0700 (PDT) From: Fabio Estevam To: sbabic@denx.de Cc: paul.liu@linaro.org, u-boot@lists.denx.de, Fabio Estevam Subject: [PATCH v2 1/5] imx8mm-cl-iot-gate: Add SPL EEPROM support Date: Tue, 12 Apr 2022 13:05:35 -0300 Message-Id: <20220412160539.3249234-1-festevam@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Fabio Estevam imx8mm-cl-iot-gate supports multiple DDR sizes and models. The DDR type can be retrieved from the EEPROM, so add SPL code that can be used to get the DDR information. Based on the original code from Compulab's U-Boot. Signed-off-by: Fabio Estevam --- Changes since v1: - None board/compulab/imx8mm-cl-iot-gate/Makefile | 2 +- .../compulab/imx8mm-cl-iot-gate/eeprom_spl.c | 130 ++++++++++++++++++ 2 files changed, 131 insertions(+), 1 deletion(-) create mode 100644 board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c diff --git a/board/compulab/imx8mm-cl-iot-gate/Makefile b/board/compulab/imx8mm-cl-iot-gate/Makefile index 3a2bfc4dc4b1..3800b21a6fd0 100644 --- a/board/compulab/imx8mm-cl-iot-gate/Makefile +++ b/board/compulab/imx8mm-cl-iot-gate/Makefile @@ -8,6 +8,6 @@ obj-y += imx8mm-cl-iot-gate.o ifdef CONFIG_SPL_BUILD -obj-y += spl.o +obj-y += spl.o eeprom_spl.o obj-y += ddr/ endif diff --git a/board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c b/board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c new file mode 100644 index 000000000000..ee6d2bb0016a --- /dev/null +++ b/board/compulab/imx8mm-cl-iot-gate/eeprom_spl.c @@ -0,0 +1,130 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* (C) Copyright 2019 CompuLab, Ltd. */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_SPL_BUILD + +#define CONFIG_SYS_I2C_EEPROM_ADDR_P1 0x51 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 + +static iomux_v3_cfg_t const eeprom_pads[] = { + IMX8MQ_PAD_GPIO1_IO13__GPIO1_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +#define EEPROM_WP_GPIO IMX_GPIO_NR(1, 13) + +static void cl_eeprom_we(int enable) +{ + static int done; + + if (done) { + gpio_direction_output(EEPROM_WP_GPIO, enable); + return; + } + + imx_iomux_v3_setup_multiple_pads(eeprom_pads, ARRAY_SIZE(eeprom_pads)); + gpio_request(EEPROM_WP_GPIO, "eeprom_wp"); + gpio_direction_output(EEPROM_WP_GPIO, enable); + done = 1; +} + +static int cl_eeprom_read(uint offset, uchar *buf, int len) +{ + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(1, CONFIG_SYS_I2C_EEPROM_ADDR_P1, + CONFIG_SYS_I2C_EEPROM_ADDR_LEN, &dev); + if (ret) { + printf("%s: Cannot find EEPROM: %d\n", __func__, ret); + return ret; + } + + return dm_i2c_read(dev, offset, buf, len); +} + +static int cl_eeprom_write(uint offset, uchar *buf, int len) +{ + struct udevice *dev; + int ret; + + cl_eeprom_we(1); + + ret = i2c_get_chip_for_busnum(1, CONFIG_SYS_I2C_EEPROM_ADDR_P1, + CONFIG_SYS_I2C_EEPROM_ADDR_LEN, &dev); + if (ret) { + printf("%s: Cannot find EEPROM: %d\n", __func__, ret); + return ret; + } + + return dm_i2c_write(dev, offset, buf, len); +} + +/* Reserved for fututre use area */ +#define BOARD_DDRINFO_OFFSET 0x40 +#define BOARD_DDR_SIZE 4 +static u32 board_ddrinfo = 0xdeadbeef; + +#define BOARD_DDRSUBIND_OFFSET 0x44 +#define BOARD_DDRSUBIND_SIZE 1 +static u8 board_ddrsubind = 0xff; + +#define BOARD_OSIZE_OFFSET 0x80 +#define BOARD_OSIZE_SIZE 4 +static u32 board_osize = 0xdeadbeef; + +#define BOARD_DDRINFO_VALID(A) ((A) != 0xdeadbeef) + +u32 cl_eeprom_get_ddrinfo(void) +{ + if (!BOARD_DDRINFO_VALID(board_ddrinfo)) { + if (cl_eeprom_read(BOARD_DDRINFO_OFFSET, (uchar *)&board_ddrinfo, BOARD_DDR_SIZE)) + return 0; + } + return board_ddrinfo; +}; + +u32 cl_eeprom_set_ddrinfo(u32 ddrinfo) +{ + if (cl_eeprom_write(BOARD_DDRINFO_OFFSET, (uchar *)&ddrinfo, BOARD_DDR_SIZE)) + return 0; + + board_ddrinfo = ddrinfo; + + return board_ddrinfo; +}; + +u8 cl_eeprom_get_subind(void) +{ + if (cl_eeprom_read(BOARD_DDRSUBIND_OFFSET, (uchar *)&board_ddrsubind, BOARD_DDRSUBIND_SIZE)) + return 0xff; + + return board_ddrsubind; +}; + +u8 cl_eeprom_set_subind(u8 ddrsubind) +{ + if (cl_eeprom_write(BOARD_DDRSUBIND_OFFSET, (uchar *)&ddrsubind, BOARD_DDRSUBIND_SIZE)) + return 0xff; + board_ddrsubind = ddrsubind; + + return board_ddrsubind; +}; + +/* override-size ifaces */ +u32 cl_eeprom_get_osize(void) +{ + if (cl_eeprom_read(BOARD_OSIZE_OFFSET, (uchar *)&board_osize, BOARD_OSIZE_SIZE)) + return 0; + + return board_osize; +}; +#endif From patchwork Tue Apr 12 16:05:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 1616338 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=fJWEG6fc; dkim-atps=neutral Authentication-Results: ozlabs.org; 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Tue, 12 Apr 2022 09:05:51 -0700 (PDT) Received: from localhost.localdomain ([2804:14c:485:4b69:db7b:6eca:4085:74a9]) by smtp.gmail.com with ESMTPSA id i28-20020a056870891c00b000de777f1a41sm13325247oao.46.2022.04.12.09.05.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Apr 2022 09:05:50 -0700 (PDT) From: Fabio Estevam To: sbabic@denx.de Cc: paul.liu@linaro.org, u-boot@lists.denx.de, Fabio Estevam Subject: [PATCH v2 2/5] imx8mm-cl-iot-gate: Retrieve the DDR type from EEPROM Date: Tue, 12 Apr 2022 13:05:36 -0300 Message-Id: <20220412160539.3249234-2-festevam@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220412160539.3249234-1-festevam@gmail.com> References: <20220412160539.3249234-1-festevam@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Fabio Estevam Currently, the DDR type is retrieved by iteracting inside an array of possible DDR types. This may take saveral attempts, which slows the overall U-Boot process and does not provide a good user experience: U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000) DDRINFO: Cfg attempt: [ 1/6 ] DDRINFO(M): mr5-8 [ 0xff000010 ] DDRINFO(T): mr5-8 [ 0x5000010 ] resetting ... U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000) DDRINFO: Cfg attempt: [ 2/6 ] DDRINFO(M): mr5-8 [ 0xff000010 ] DDRINFO(T): mr5-8 [ 0x1061010 ] resetting ... U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000) DDRINFO: Cfg attempt: [ 3/6 ] DDRINFO(M): mr5-8 [ 0xff000010 ] DDRINFO(T): mr5-8 [ 0xff000010 ] Normal Boot WDT: Not starting Trying to boot from MMC2 NOTICE: BL31: v2.5(release):v2.5 NOTICE: BL31: Built : 07:12:44, Jan 24 2022 Improve the boot time by retrieving the correct DDR information from the EEPROM: U-Boot SPL 2022.04-rc4-00045-g6d02bc40d58c (Mar 19 2022 - 08:22:29 -0300) DDRINFO(D): Kingston 4096G DDRINFO(M): mr5-8 [ 0xff000010 ] DDRINFO(E): mr5-8 [ 0xff000010 ] Normal Boot WDT: Started watchdog@30280000 with servicing (60s timeout) Trying to boot from MMC2 NOTICE: BL31: v2.5(release):v2.5 NOTICE: BL31: Built : 22:28:11, Mar 15 2022 Based on the original code from Compulab's U-Boot. Tested on a imx8mm-cl-iot-gate board populated with 4GB of RAM. Signed-off-by: Fabio Estevam --- Changes since v1: - None board/compulab/imx8mm-cl-iot-gate/ddr/ddr.c | 24 ++++++++++++++++++--- board/compulab/imx8mm-cl-iot-gate/ddr/ddr.h | 5 +++++ 2 files changed, 26 insertions(+), 3 deletions(-) diff --git a/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.c b/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.c index 42dd0dbf18fa..5b93491923e9 100644 --- a/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.c +++ b/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.c @@ -22,6 +22,8 @@ #include #include "ddr.h" +#include + static unsigned int lpddr4_mr_read(unsigned int mr_rank, unsigned int mr_addr) { unsigned int tmp; @@ -137,10 +139,11 @@ void spl_dram_init_compulab(void) (struct lpddr4_tcm_desc *)SPL_TCM_DATA; if (lpddr4_tcm_desc->sign != DEFAULT) { - /* if not in tcm scan mode */ + /* get ddr type from the eeprom if not in tcm scan mode */ + ddr_info = cl_eeprom_get_ddrinfo(); for (i = 0; i < ARRAY_SIZE(lpddr4_array); i++) { if (lpddr4_array[i].id == ddr_info && - lpddr4_array[i].subind == 0xff) { + lpddr4_array[i].subind == cl_eeprom_get_subind()) { ddr_found = 1; break; } @@ -198,10 +201,25 @@ void spl_dram_init_compulab(void) SPL_TCM_FINI; + if (ddr_found == 0) { + /* Update eeprom */ + cl_eeprom_set_ddrinfo(ddr_info_mrr); + mdelay(10); + ddr_info = cl_eeprom_get_ddrinfo(); + mdelay(10); + cl_eeprom_set_subind(lpddr4_array[i].subind); + /* make sure that the ddr_info has reached the eeprom */ + printf("DDRINFO(E): mr5-8 [ 0x%x ], read back\n", ddr_info); + if (ddr_info_mrr != ddr_info || cl_eeprom_get_subind() != lpddr4_array[i].subind) { + printf("DDRINFO(EEPROM): make sure that the eeprom is accessible\n"); + printf("DDRINFO(EEPROM): i2c dev 1; i2c md 0x51 0x40 0x50\n"); + } + } + /* Pass the dram size to th U-Boot through the tcm memory */ { /* To figure out what to store into the TCM buffer */ /* For debug purpouse only. To override the real memsize */ - unsigned int ddr_tcm_size = 0; + unsigned int ddr_tcm_size = cl_eeprom_get_osize(); if (ddr_tcm_size == 0 || ddr_tcm_size == -1) ddr_tcm_size = lpddr4_array[i].size; diff --git a/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.h b/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.h index 59c18911592e..f7d4fdc1016a 100644 --- a/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.h +++ b/board/compulab/imx8mm-cl-iot-gate/ddr/ddr.h @@ -23,4 +23,9 @@ struct lpddr4_tcm_desc { unsigned int count; }; +u32 cl_eeprom_get_ddrinfo(void); +u32 cl_eeprom_set_ddrinfo(u32 ddrinfo); +u32 cl_eeprom_get_subind(void); +u32 cl_eeprom_set_subind(u32 subind); +u32 cl_eeprom_get_osize(void); #endif From patchwork Tue Apr 12 16:05:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 1616339 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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Tue, 12 Apr 2022 09:05:53 -0700 (PDT) Received: from localhost.localdomain ([2804:14c:485:4b69:db7b:6eca:4085:74a9]) by smtp.gmail.com with ESMTPSA id i28-20020a056870891c00b000de777f1a41sm13325247oao.46.2022.04.12.09.05.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Apr 2022 09:05:53 -0700 (PDT) From: Fabio Estevam To: sbabic@denx.de Cc: paul.liu@linaro.org, u-boot@lists.denx.de, Fabio Estevam Subject: [PATCH v2 3/5] imx8mm-cl-iot-gate: Retrieve the MAC address from EEPROM Date: Tue, 12 Apr 2022 13:05:37 -0300 Message-Id: <20220412160539.3249234-3-festevam@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220412160539.3249234-1-festevam@gmail.com> References: <20220412160539.3249234-1-festevam@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Fabio Estevam Currently the eth0 MAC address is randomly assigned. Retrieve the MAC address from EEPROM. Signed-off-by: Fabio Estevam --- Changes since v1: - Also update imx8mm-cl-iot-gate-optee_defconfig to fix the build (Stefano). arch/arm/dts/imx8mm-cl-iot-gate.dts | 12 ++++- .../imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c | 51 +++++++++++++++++++ configs/imx8mm-cl-iot-gate-optee_defconfig | 2 + configs/imx8mm-cl-iot-gate_defconfig | 2 + 4 files changed, 66 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/imx8mm-cl-iot-gate.dts b/arch/arm/dts/imx8mm-cl-iot-gate.dts index 62e8d0394933..425701204a0c 100644 --- a/arch/arm/dts/imx8mm-cl-iot-gate.dts +++ b/arch/arm/dts/imx8mm-cl-iot-gate.dts @@ -17,6 +17,11 @@ stdout-path = &uart3; }; + aliases { + eeprom0 = &i2c_eeprom0; + eeprom1 = &i2c_eeprom1; + }; + reg_vusb_5v: regulator-usdhc2 { compatible = "regulator-fixed"; regulator-name = "VUSB_5V"; @@ -79,7 +84,7 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - eeprom@54 { + i2c_eeprom0: eeprom@54 { compatible = "atmel,24c08"; reg = <0x54>; pagesize = <16>; @@ -92,6 +97,11 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; + i2c_eeprom1: eeprom@50 { + compatible = "atmel,24c08"; + reg = <0x50>; + pagesize = <16>; + }; rtc@69 { compatible = "abracon,ab1805"; reg = <0x69>; diff --git a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c index 7e2d88f449ce..779b64b140ad 100644 --- a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c +++ b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c @@ -12,6 +12,8 @@ #include #include #include +#include +#include #include #include @@ -418,12 +420,61 @@ int extension_board_scan(struct list_head *extension_list) return ret; } +static int setup_mac_address(void) +{ + unsigned char enetaddr[6]; + struct udevice *dev; + int ret, off; + + ret = eth_env_get_enetaddr("ethaddr", enetaddr); + if (ret) + return 0; + + off = fdt_path_offset(gd->fdt_blob, "eeprom1"); + if (off < 0) { + printf("No eeprom0 path offset found in DT\n"); + return off; + } + + ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, off, &dev); + if (ret) { + printf("%s: Could not find EEPROM\n", __func__); + return ret; + } + + ret = i2c_set_chip_offset_len(dev, 1); + if (ret) + return ret; + + ret = i2c_eeprom_read(dev, 4, enetaddr, sizeof(enetaddr)); + if (ret) { + printf("%s: Could not read EEPROM\n", __func__); + return ret; + } + + ret = is_valid_ethaddr(enetaddr); + if (!ret) + return -EINVAL; + + ret = eth_env_set_enetaddr("ethaddr", enetaddr); + if (ret) + return ret; + + return 0; +} + int board_late_init(void) { + int ret; + if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) { env_set("board_name", "IOT-GATE-IMX8"); env_set("board_rev", "SBC-IOTMX8"); } + ret = setup_mac_address(); + if (ret < 0) + printf("Cannot set MAC address from EEPROM\n"); + return 0; } diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index 2014509ed52d..c736fd84d91c 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -84,6 +84,8 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_KEYBOARD=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index 0ef9e2548e99..9265299e98f9 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -85,6 +85,8 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_KEYBOARD=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y From patchwork Tue Apr 12 16:05:38 2022 Content-Type: text/plain; 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Tue, 12 Apr 2022 09:05:55 -0700 (PDT) From: Fabio Estevam To: sbabic@denx.de Cc: paul.liu@linaro.org, u-boot@lists.denx.de, Fabio Estevam Subject: [PATCH v2 4/5] imx8mm-cl-iot-gate: Retrieve the serial number from EEPROM Date: Tue, 12 Apr 2022 13:05:38 -0300 Message-Id: <20220412160539.3249234-4-festevam@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220412160539.3249234-1-festevam@gmail.com> References: <20220412160539.3249234-1-festevam@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Fabio Estevam The serial number is located at offset 0x14 of the EEPROM under i2c0 bus at address 0x54. To print the serial number in Linux: SERNUM=$(cat /proc/device-tree/serial-number) echo $SERNUM Signed-off-by: Fabio Estevam --- Changes since v1: - None .../imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c index 779b64b140ad..27200f728efe 100644 --- a/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c +++ b/board/compulab/imx8mm-cl-iot-gate/imx8mm-cl-iot-gate.c @@ -463,6 +463,52 @@ static int setup_mac_address(void) return 0; } +static int read_serial_number(void) +{ + unsigned char serialnumber[6]; + unsigned char reversed[6]; + char serial_string[12]; + struct udevice *dev; + int ret, off, i; + + off = fdt_path_offset(gd->fdt_blob, "eeprom0"); + if (off < 0) { + printf("No eeprom0 path offset found in DT\n"); + return off; + } + + ret = uclass_get_device_by_of_offset(UCLASS_I2C_EEPROM, off, &dev); + if (ret) { + printf("%s: Could not find EEPROM\n", __func__); + return ret; + } + + ret = i2c_set_chip_offset_len(dev, 1); + if (ret) + return ret; + + ret = i2c_eeprom_read(dev, 0x14, serialnumber, sizeof(serialnumber)); + if (ret) { + printf("%s: Could not read EEPROM\n", __func__); + return ret; + } + + for (i = sizeof(serialnumber) - 1; i >= 0; i--) + reversed[i] = serialnumber[sizeof(serialnumber) - 1 - i]; + + for (i = 0; i < sizeof(reversed); i++) { + serial_string[i * 2] = (reversed[i] >> 4) & 0xf; + serial_string[i * 2 + 1] = reversed[i] & 0xf; + } + + for (i = 0; i < sizeof(serial_string); i++) + serial_string[i] += '0'; + + env_set("serial#", serial_string); + + return 0; +} + int board_late_init(void) { int ret; @@ -476,5 +522,9 @@ int board_late_init(void) if (ret < 0) printf("Cannot set MAC address from EEPROM\n"); + ret = read_serial_number(); + if (ret < 0) + printf("Cannot read serial number from EEPROM\n"); + return 0; } From patchwork Tue Apr 12 16:05:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 1616341 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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Tue, 12 Apr 2022 09:05:58 -0700 (PDT) Received: from localhost.localdomain ([2804:14c:485:4b69:db7b:6eca:4085:74a9]) by smtp.gmail.com with ESMTPSA id i28-20020a056870891c00b000de777f1a41sm13325247oao.46.2022.04.12.09.05.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Apr 2022 09:05:58 -0700 (PDT) From: Fabio Estevam To: sbabic@denx.de Cc: paul.liu@linaro.org, u-boot@lists.denx.de, Fabio Estevam Subject: [PATCH v2 5/5] imx8mm-cl-iot-gate: Add redundand environment support Date: Tue, 12 Apr 2022 13:05:39 -0300 Message-Id: <20220412160539.3249234-5-festevam@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220412160539.3249234-1-festevam@gmail.com> References: <20220412160539.3249234-1-festevam@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean From: Fabio Estevam Add redundand environment support as it is required by SWUpdate. While at it, also adjust the CONFIG_ENV_OFFSET to a more appropriate larger offset as done on other i.MX8M defconfigs. Signed-off-by: Fabio Estevam --- Changes since v1: - None configs/imx8mm-cl-iot-gate_defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index 9265299e98f9..c9946cacef11 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -8,7 +8,9 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x4000 -CONFIG_ENV_OFFSET=0x4400 +CONFIG_ENV_OFFSET=0x200000 +CONFIG_ENV_OFFSET_REDUND=0x204000 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx8mm-cl-iot-gate" CONFIG_SPL_TEXT_BASE=0x7E1000