From patchwork Sun Feb 27 18:27:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 1598396 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=mailerdienst.de header.i=@mailerdienst.de header.a=rsa-sha256 header.s=20200217 header.b=rF33pGDM; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-ide-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4K6Bpm5TJNz9sGM for ; Mon, 28 Feb 2022 05:28:32 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230384AbiB0S3F (ORCPT ); Sun, 27 Feb 2022 13:29:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34762 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230351AbiB0S3C (ORCPT ); Sun, 27 Feb 2022 13:29:02 -0500 Received: from mxout4.routing.net (mxout4.routing.net [IPv6:2a03:2900:1:a::9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C33296327; Sun, 27 Feb 2022 10:28:23 -0800 (PST) Received: from mxbox1.masterlogin.de (unknown [192.168.10.88]) by mxout4.routing.net (Postfix) with ESMTP id 59BC410077C; Sun, 27 Feb 2022 18:28:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1645986501; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=MF0tLgmx2g6E4ZrnpnexpNhjlLSkSnH6Zfy8eS4SQV0=; b=rF33pGDMIdsMH9Qqrsy73+ubpclC9z7Nau538CU2nynr3NrGavczFVv9L7snUhvian8xq4 rZejAAXMSkwQdn8gzttkLzT9iuluC7mVLDRA63mY1qmfVKgQ4kJ4z18kn/CIo9GPCGTxOh Fyhi6o42o97qZPFxmMjuZrYZbyx7IuE= Received: from localhost.localdomain (fttx-pool-80.245.76.205.bambit.de [80.245.76.205]) by mxbox1.masterlogin.de (Postfix) with ESMTPSA id 9E924405AF; Sun, 27 Feb 2022 18:28:20 +0000 (UTC) From: Frank Wunderlich To: "devicetree @ vger . kernel . org Damien Le Moal" , Rob Herring , Krzysztof Kozlowski , Hans de Goede , Jens Axboe , linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, Heiko Stuebner , Peter Geis , Michael Riesch , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Cc: Frank Wunderlich Subject: [PATCH v3 1/3] dt-bindings: Convert ahci-platform DT bindings to yaml Date: Sun, 27 Feb 2022 19:27:58 +0100 Message-Id: <20220227182800.275572-2-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220227182800.275572-1-linux@fw-web.de> References: <20220227182800.275572-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: 8a7f4aef-73a8-4cc1-a58c-260611dd9f5c X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org From: Frank Wunderlich Create a yaml file for dtbs_check from the old txt binding. Signed-off-by: Frank Wunderlich --- v3: - add conversion to sata-series - fix some errors in dt_binding_check and dtbs_check - move to unevaluated properties = false --- imho all errors should be fixed in the dts not in the yaml... errors about the subitem requirement that was defined in txt but not fixed some marvell dts some dts for Marvell SoC bring error 'phys' is a required property 'target-supply' is a required property problem is in arch/arm64/boot/dts/marvell/armada-cp11x.dtsi:331 here the sata-port@0 is defined, but not overridden with phy/target-supply in any following dts ==================================================================== arch/arm64/boot/dts/broadcom/northstar2 ns2-svk.dt.yaml: ns2-xmc.dt.yaml: ahci@663f2000: $nodename:0: 'ahci@663f2000' does not match '^sata(@.*)?$' Unevaluated properties are not allowed ('reg-names', '#address-cells', '#size-cells' were unexpected) --- .../devicetree/bindings/ata/ahci-platform.txt | 79 ---------- .../bindings/ata/ahci-platform.yaml | 140 ++++++++++++++++++ 2 files changed, 140 insertions(+), 79 deletions(-) delete mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.txt create mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.yaml diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt deleted file mode 100644 index 77091a277642..000000000000 --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt +++ /dev/null @@ -1,79 +0,0 @@ -* AHCI SATA Controller - -SATA nodes are defined to describe on-chip Serial ATA controllers. -Each SATA controller should have its own node. - -It is possible, but not required, to represent each port as a sub-node. -It allows to enable each port independently when dealing with multiple -PHYs. - -Required properties: -- compatible : compatible string, one of: - - "brcm,iproc-ahci" - - "hisilicon,hisi-ahci" - - "cavium,octeon-7130-ahci" - - "ibm,476gtr-ahci" - - "marvell,armada-380-ahci" - - "marvell,armada-3700-ahci" - - "snps,dwc-ahci" - - "snps,spear-ahci" - - "generic-ahci" -- interrupts : -- reg : - -Please note that when using "generic-ahci" you must also specify a SoC specific -compatible: - compatible = "manufacturer,soc-model-ahci", "generic-ahci"; - -Optional properties: -- dma-coherent : Present if dma operations are coherent -- clocks : a list of phandle + clock specifier pairs -- resets : a list of phandle + reset specifier pairs -- target-supply : regulator for SATA target power -- phy-supply : regulator for PHY power -- phys : reference to the SATA PHY node -- phy-names : must be "sata-phy" -- ahci-supply : regulator for AHCI controller -- ports-implemented : Mask that indicates which ports that the HBA supports - are available for software to use. Useful if PORTS_IMPL - is not programmed by the BIOS, which is true with - some embedded SOC's. - -Required properties when using sub-nodes: -- #address-cells : number of cells to encode an address -- #size-cells : number of cells representing the size of an address - -Sub-nodes required properties: -- reg : the port number -And at least one of the following properties: -- phys : reference to the SATA PHY node -- target-supply : regulator for SATA target power - -Examples: - sata@ffe08000 { - compatible = "snps,spear-ahci"; - reg = <0xffe08000 0x1000>; - interrupts = <115>; - }; - -With sub-nodes: - sata@f7e90000 { - compatible = "marvell,berlin2q-achi", "generic-ahci"; - reg = <0xe90000 0x1000>; - interrupts = ; - clocks = <&chip CLKID_SATA>; - #address-cells = <1>; - #size-cells = <0>; - - sata0: sata-port@0 { - reg = <0>; - phys = <&sata_phy 0>; - target-supply = <®_sata0>; - }; - - sata1: sata-port@1 { - reg = <1>; - phys = <&sata_phy 1>; - target-supply = <®_sata1>;; - }; - }; diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml new file mode 100644 index 000000000000..cc246b312c59 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml @@ -0,0 +1,140 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/ahci-platform.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AHCI SATA Controller +description: + SATA nodes are defined to describe on-chip Serial ATA controllers. + Each SATA controller should have its own node. + + It is possible, but not required, to represent each port as a sub-node. + It allows to enable each port independently when dealing with multiple + PHYs. + +maintainers: + - Hans de Goede + - Jens Axboe + +properties: + compatible: + contains: + enum: + - brcm,iproc-ahci + - cavium,octeon-7130-ahci + - generic-ahci + - hisilicon,hisi-ahci + - ibm,476gtr-ahci + - marvell,armada-380-ahci + - marvell,armada-3700-ahci + - snps,dwc-ahci + - snps,spear-ahci + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 3 + + interrupts: + minItems: 1 + + ahci-supply: + description: + regulator for AHCI controller + + dma-coherent: + description: + Present if dma operations are coherent + + phy-supply: + description: + regulator for PHY power + + phys: + minItems: 1 + + phy-names: + minItems: 1 + + ports-implemented: + description: + Mask that indicates which ports that the HBA supports + are available for software to use. Useful if PORTS_IMPL + is not programmed by the BIOS, which is true with + some embedded SoCs. + minItems: 1 + + resets: + minItems: 1 + + target-supply: + description: + regulator for SATA target power + +required: + - compatible + - reg + - interrupts + +patternProperties: + "^sata-port@[0-9]+$": + type: object + description: + Subnode with configuration of the Ports. + + properties: + reg: + maxItems: 1 + + phys: + minItems: 1 + + target-supply: + description: + regulator for SATA target power + + required: + - reg + + anyOf: + - required: [ phys ] + - required: [ target-supply ] + +allOf: +- $ref: "sata-common.yaml#" + +unevaluatedProperties: false + +examples: + - | + sata@ffe08000 { + compatible = "snps,spear-ahci"; + reg = <0xffe08000 0x1000>; + interrupts = <115>; + }; + - | + #include + #include + sata@f7e90000 { + compatible = "marvell,berlin2q-achi", "generic-ahci"; + reg = <0xe90000 0x1000>; + interrupts = ; + clocks = <&chip CLKID_SATA>; + #address-cells = <1>; + #size-cells = <0>; + + sata0: sata-port@0 { + reg = <0>; + phys = <&sata_phy 0>; + target-supply = <®_sata0>; + }; + + sata1: sata-port@1 { + reg = <1>; + phys = <&sata_phy 1>; + target-supply = <®_sata1>; + }; + }; From patchwork Sun Feb 27 18:27:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 1598393 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=mailerdienst.de header.i=@mailerdienst.de header.a=rsa-sha256 header.s=20200217 header.b=NWQ6DYLT; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-ide-owner@vger.kernel.org; receiver=) Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4K6Bpk0N8Lz9sG7 for ; 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bh=oIQHQqWpYDTR34+UZ2EQU8OCgFjoZwuBhLuDbXdN8Pw=; b=NWQ6DYLTPInxte0uI9CJeESL+8IeAVbmDBvKvNpDqpewD3fJO8kj0Mbl+jzfMwovDc5hdz DTo8yONJT88/IDSfnPyuGtnPp2RQb1OTsuElCixo3IRIA2HMmkFFc+fTlbbkNpcRn5uLjz 2I1mA53Je4Ozv81vfMb3zgE8o+g3Nd0= Received: from localhost.localdomain (fttx-pool-80.245.76.205.bambit.de [80.245.76.205]) by mxbox1.masterlogin.de (Postfix) with ESMTPSA id 546444054D; Sun, 27 Feb 2022 18:28:21 +0000 (UTC) From: Frank Wunderlich To: "devicetree @ vger . kernel . org Damien Le Moal" , Rob Herring , Krzysztof Kozlowski , Hans de Goede , Jens Axboe , linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, Heiko Stuebner , Peter Geis , Michael Riesch , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Cc: Frank Wunderlich Subject: [PATCH v3 2/3] dt-bindings: Add power-domains property to ahci-platform Date: Sun, 27 Feb 2022 19:27:59 +0100 Message-Id: <20220227182800.275572-3-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220227182800.275572-1-linux@fw-web.de> References: <20220227182800.275572-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: f4cced9d-11f3-4d4c-a033-595f9377fcc2 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org From: Frank Wunderlich Some SoC using power-domains property so add it here Signed-off-by: Frank Wunderlich --- changes in v3: - new patch --- Documentation/devicetree/bindings/ata/ahci-platform.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml index cc246b312c59..cc3710fe4fd4 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.yaml +++ b/Documentation/devicetree/bindings/ata/ahci-platform.yaml @@ -67,6 +67,9 @@ properties: some embedded SoCs. minItems: 1 + power-domains: + maxItems: 1 + resets: minItems: 1 From patchwork Sun Feb 27 18:28:00 2022 Content-Type: text/plain; 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Sun, 27 Feb 2022 18:28:21 +0000 (UTC) From: Frank Wunderlich To: "devicetree @ vger . kernel . org Damien Le Moal" , Rob Herring , Krzysztof Kozlowski , Hans de Goede , Jens Axboe , linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, Heiko Stuebner , Peter Geis , Michael Riesch , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Cc: Frank Wunderlich Subject: [PATCH v3 3/3] arm64: dts: rockchip: Add sata nodes to rk356x Date: Sun, 27 Feb 2022 19:28:00 +0100 Message-Id: <20220227182800.275572-4-linux@fw-web.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220227182800.275572-1-linux@fw-web.de> References: <20220227182800.275572-1-linux@fw-web.de> MIME-Version: 1.0 X-Mail-ID: fc5c7eba-beac-4129-b3e2-d00c639c3d91 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org From: Frank Wunderlich RK356x supports up to 3 sata controllers which were compatible with the existing snps,dwc-ahci binding. Signed-off-by: Frank Wunderlich --- changes in v3: - fix combphy error by moving sata0 to rk3568.dtsi - remove clock-names and interrupt-names changes in v2: - added sata0 + 1, but have only tested sata2 --- arch/arm64/boot/dts/rockchip/rk3568.dtsi | 14 +++++++++++++ arch/arm64/boot/dts/rockchip/rk356x.dtsi | 26 ++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi index 5b0f528d6818..2a2f65899d47 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -8,6 +8,19 @@ / { compatible = "rockchip,rk3568"; + sata0: sata@fc000000 { + compatible = "snps,dwc-ahci"; + reg = <0 0xfc000000 0 0x1000>; + clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>, + <&cru CLK_SATA0_RXOOB>; + interrupts = ; + phys = <&combphy0 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&power RK3568_PD_PIPE>; + status = "disabled"; + }; + pipe_phy_grf0: syscon@fdc70000 { compatible = "rockchip,rk3568-pipe-phy-grf", "syscon"; reg = <0x0 0xfdc70000 0x0 0x1000>; @@ -114,3 +127,4 @@ power-domain@RK3568_PD_PIPE { #power-domain-cells = <0>; }; }; + diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 7cdef800cb3c..484c5ace718a 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -230,6 +230,32 @@ scmi_shmem: sram@0 { }; }; + sata1: sata@fc400000 { + compatible = "snps,dwc-ahci"; + reg = <0 0xfc400000 0 0x1000>; + clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>, + <&cru CLK_SATA1_RXOOB>; + interrupts = ; + phys = <&combphy1 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&power RK3568_PD_PIPE>; + status = "disabled"; + }; + + sata2: sata@fc800000 { + compatible = "snps,dwc-ahci"; + reg = <0 0xfc800000 0 0x1000>; + clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>, + <&cru CLK_SATA2_RXOOB>; + interrupts = ; + phys = <&combphy2 PHY_TYPE_SATA>; + phy-names = "sata-phy"; + ports-implemented = <0x1>; + power-domains = <&power RK3568_PD_PIPE>; + status = "disabled"; + }; + gic: interrupt-controller@fd400000 { compatible = "arm,gic-v3"; reg = <0x0 0xfd400000 0 0x10000>, /* GICD */