From patchwork Thu Jan 20 00:28:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Dinh X-Patchwork-Id: 1581976 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=fntmA1Ez; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4JfNgG1LKlz9sSs for ; Thu, 20 Jan 2022 11:29:29 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0B2D8832DA; Thu, 20 Jan 2022 01:29:27 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="fntmA1Ez"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 3A066832CD; Thu, 20 Jan 2022 01:29:25 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.2 Received: from mail-qv1-xf36.google.com (mail-qv1-xf36.google.com [IPv6:2607:f8b0:4864:20::f36]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 3F947832DA for ; Thu, 20 Jan 2022 01:29:21 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mibodhi@gmail.com Received: by mail-qv1-xf36.google.com with SMTP id u26so5031275qva.7 for ; Wed, 19 Jan 2022 16:29:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2EQn0RLAyjKhc5Ifa4u8BZr5fK6+DnMyrUndsnYi29M=; b=fntmA1EzI1yPeBlbZk4SJ/x3NuFNzsTSVTm+IcV1Yg4aL0zDhO5O1dxDoRqU1ipMy9 7qn4cl4KsEBJ0V4XwLotss5rYNMzN5OjmBIag+TCDrCCH62FL+b/EtrYwsejIZb9SE6O lMKuCzGMsUJA6puc0CY3wUVF1bPN0VgBH1tq+HjIFJq54YB+AUbT3fEYuFYahVKXZSz6 vOJVo1M25NAzbBRa50SX0aN1EgvCc7lRdY6+kk7BZOyLIkXZoZkyV3b7Nc3SuLVo/6nr LJVJ1faAzflTL9368/h03bfJuJ4ksQ0Mq42SZFCKw8Ev7LoSPJ4ZGFhYQMpa9inUQxJ/ 3Rhw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2EQn0RLAyjKhc5Ifa4u8BZr5fK6+DnMyrUndsnYi29M=; b=UN7XH2IuR43UYkg2j7GLRZ1Gcc+7rqROfg4NTBoL5wwLKdQS9d/IoglEKbjPoHhqKO X5inguEeWIrUFlg6SoXvlJ1LOPbnvBtBNp4MsEJ2QuP3MVAgLWaUFF4karsDnRKgaGRu mR2GpnEzHYM9GE6n3DV9kAUc3v+FGLOJecknrkY+n/JfYF9zj/ml4FclnLGxkAMNpN4z Q1TpdvjilhBlUagc0rNlMw9IbGGNo31sjj2UqIMF8UZqBxHlgKLY92WUuWkonkA5vSLa PwjrBs6CqDv1T5YstNXaC7EGTjCUwzwIndc8cqjYXNndRW2hNfGztYuFdV+wRg3LOs8P UbvA== X-Gm-Message-State: AOAM533AKQTj+/mJ6PRJ+PQ1xI7OsrvLSBityp1T7rALRw/ADuwjwJpd 04h4al1muZzyJaLVqKqbMloxirNthoQ= X-Google-Smtp-Source: ABdhPJxQ83T2Fj20njtmFDyrbmBHgHb9v62koF2mrH249FIJTJnKUExZC3ZgC8DG9X/srS1oYOYnAA== X-Received: by 2002:ad4:5aa5:: with SMTP id u5mr30004211qvg.88.1642638560057; Wed, 19 Jan 2022 16:29:20 -0800 (PST) Received: from localhost.localdomain (76-229-100-169.lightspeed.irvnca.sbcglobal.net. [76.229.100.169]) by smtp.gmail.com with ESMTPSA id v12sm790904qkp.21.2022.01.19.16.29.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Jan 2022 16:29:19 -0800 (PST) From: Tony Dinh To: U-Boot Mailing List , Stefan Roese Cc: =?unknown-8bit?q?Pali_Roh=E1r__=3Cpali=40kernel=2Eorg=3E=2C_Marek_Beh=FA?= =?unknown-8bit?q?n__=3Cmarek=2Ebehun=40nic=2Ecz=3E=2C_Tom_Rini_=3Ctrini=40k?= =?unknown-8bit?q?onsulko=2Ecom=3E=2C_David_Purdy_=3Cdavid=2Ec=2Epurdy=40gma?= =?unknown-8bit?q?il=2Ecom=3E=2C_Tony_Dinh_=3Cmibodhi=40gmail=2Ecom=3E=2C_An?= =?unknown-8bit?q?dre_Przywara_=3Candre=2Eprzywara=40arm=2Ecom=3E=2C_Christi?= =?unknown-8bit?q?an_Hewitt_=3Cchristianshewitt=40gmail=2Ecom=3E=2C_Fabio_Es?= =?unknown-8bit?q?tevam_=3Cfestevam=40denx=2Ede=3E=2C_Jagan_Teki_=3Cjagan=40?= =?unknown-8bit?q?amarulasolutions=2Ecom=3E=2C_Kever_Yang_=3Ckever=2Eyang=40?= =?unknown-8bit?q?rock-chips=2Ecom=3E=2C_Lokesh_Vutla_=3Clokeshvutla=40ti=2E?= =?unknown-8bit?q?com=3E=2C_Peter_Robinson_=3Cpbrobinson=40gmail=2Ecom=3E=2C?= =?unknown-8bit?q?_Simon_Glass_=3Csjg=40chromium=2Eorg=3E=2C_Tim_Harvey_=3Ct?= =?unknown-8bit?q?harvey=40gateworks=2Ecom=3E?= Subject: [RESEND PATCH v3 1/4] arm: kirkwood: Pogoplug-V4 : Add DTS files Date: Wed, 19 Jan 2022 16:28:32 -0800 Message-Id: <20220120002835.21877-2-mibodhi@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220120002835.21877-1-mibodhi@gmail.com> References: <20220120002835.21877-1-mibodhi@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Add DTS files for Pogoplug V4 board Reviewed-by: Stefan Roese Signed-off-by: Tony Dinh --- (no changes since v2) Changes in v2: - Use mainline Linux DTS version arch/arm/dts/Makefile | 1 + arch/arm/dts/kirkwood-pogoplug-series-4.dts | 180 ++++++++++++++++++++ 2 files changed, 181 insertions(+) create mode 100644 arch/arm/dts/kirkwood-pogoplug-series-4.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 1b65e65eb8..ce33a4b52b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -71,6 +71,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += \ kirkwood-openrd-client.dtb \ kirkwood-openrd-ultimate.dtb \ kirkwood-pogo_e02.dtb \ + kirkwood-pogoplug-series-4.dtb \ kirkwood-sheevaplug.dtb dtb-$(CONFIG_MACH_S900) += \ diff --git a/arch/arm/dts/kirkwood-pogoplug-series-4.dts b/arch/arm/dts/kirkwood-pogoplug-series-4.dts new file mode 100644 index 0000000000..5aa4669ae2 --- /dev/null +++ b/arch/arm/dts/kirkwood-pogoplug-series-4.dts @@ -0,0 +1,180 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * kirkwood-pogoplug-series-4.dts - Device tree file for PogoPlug Series 4 + * inspired by the board files made by Kevin Mihelich for ArchLinux, + * and their DTS file. + * + * Copyright (C) 2015 Linus Walleij + */ + +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6192.dtsi" +#include + +/ { + model = "Cloud Engines PogoPlug Series 4"; + compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192", + "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x08000000>; + }; + + chosen { + stdout-path = "uart0:115200n8"; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_button_eject>; + pinctrl-names = "default"; + + eject { + debounce-interval = <50>; + wakeup-source; + linux,code = ; + label = "Eject Button"; + gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_led_green &pmx_led_red>; + pinctrl-names = "default"; + + health { + label = "pogoplugv4:green:health"; + gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + fault { + label = "pogoplugv4:red:fault"; + gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&pinctrl { + pmx_sata0: pmx-sata0 { + marvell,pins = "mpp21"; + marvell,function = "sata0"; + }; + + pmx_sata1: pmx-sata1 { + marvell,pins = "mpp20"; + marvell,function = "sata1"; + }; + + pmx_sdio_cd: pmx-sdio-cd { + marvell,pins = "mpp27"; + marvell,function = "gpio"; + }; + + pmx_sdio_wp: pmx-sdio-wp { + marvell,pins = "mpp28"; + marvell,function = "gpio"; + }; + + pmx_button_eject: pmx-button-eject { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + + pmx_led_green: pmx-led-green { + marvell,pins = "mpp22"; + marvell,function = "gpio"; + }; + + pmx_led_red: pmx-led-red { + marvell,pins = "mpp24"; + marvell,function = "gpio"; + }; +}; + +&uart0 { + status = "okay"; +}; + +/* + * This PCIE controller has a USB 3.0 XHCI controller at 1,0 + */ +&pciec { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; + +&sata { + status = "okay"; + pinctrl-0 = <&pmx_sata0 &pmx_sata1>; + pinctrl-names = "default"; + nr-ports = <1>; +}; + +&sdio { + status = "okay"; + pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>; + pinctrl-names = "default"; + cd-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; +}; + +&nand { + /* 128 MiB of NAND flash */ + chip-delay = <40>; + status = "okay"; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x00000000 0x200000>; + read-only; + }; + + partition@200000 { + label = "uImage"; + reg = <0x00200000 0x300000>; + }; + + partition@500000 { + label = "uImage2"; + reg = <0x00500000 0x300000>; + }; + + partition@800000 { + label = "failsafe"; + reg = <0x00800000 0x800000>; + }; + + partition@1000000 { + label = "root"; + reg = <0x01000000 0x7000000>; + }; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; From patchwork Thu Jan 20 00:28:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Dinh X-Patchwork-Id: 1581977 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=UOy6jAx0; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4JfNgT5cxtz9sSs for ; Thu, 20 Jan 2022 11:29:41 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 26C6D83855; Thu, 20 Jan 2022 01:29:39 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="UOy6jAx0"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 2C8ED83801; Thu, 20 Jan 2022 01:29:38 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.2 Received: from mail-qt1-x829.google.com (mail-qt1-x829.google.com [IPv6:2607:f8b0:4864:20::829]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 648248385C for ; Thu, 20 Jan 2022 01:29:35 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mibodhi@gmail.com Received: by mail-qt1-x829.google.com with SMTP id f5so3827362qtp.11 for ; Wed, 19 Jan 2022 16:29:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BE4DscjNy2ETzGNLwMr6oy9FGW599WbLQ9P9Iv4TlMI=; b=UOy6jAx0GO7avk4iE9qev5NXpBZX/F5QWsclVgFlPd4w7h7B5hrTVVo6iQsOeIwwG2 zS5qXnRcosonKYzmAgt4EW8m70BncfNbvr2FWMpazCJRXdUPJ2wBOrej1vs28W+oNI87 m4AM2J3KyYAlbm04azyNZorLBUMyr1U78E5Cq3lpmij8hl42aZ8D69RJqzQhlBS5wPFs JNTbGHDYJZwgMoh+yPQPmyH2OEPInykGzKd25/0uNLN73AkvMcMCsrsxeNctkcUIgoZp Uya6yAVj3PbpMBgw5myB3FahL2x7EEVQ/aR2lMG1s8WUQyi9FWZFDEyEnxriEdb1cOQq yPDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BE4DscjNy2ETzGNLwMr6oy9FGW599WbLQ9P9Iv4TlMI=; b=CO4FZLxxDIBB+VAj+SzoGTW0pVofWQJpWam/6MynPMiXP79+VvbAYjbKGLC75fnQcU 6pVSZNHccZmRelNInB6yWsis/EzF22wsHn0aAbPB0JfFPXhlNAciraIltN6DddhxxULJ lhPwcylqa2fE0V1TQXBjTSPcuC7zQfsiiPdAT0qYMIg3eLJPVJGDJKPzEchhNARp+1vq YB6AQGgOGXRN0TTQFI4aYt7gceyHRw/nn4a8r43jZJ0oaxTR0w6Rjh1lPZhPj264fzbm ux5P7cVCKZeEEwX+jYoDjtC/hMtC/vwl6rh3PF/9D6qL1Xkp87jnDTlMH6sf3JFAeD5f 2e7w== X-Gm-Message-State: AOAM530+WrowvcXC7ly93y4SZvqpBxIm4rjFWsiwkdQE/EgvFNry9xRS GE/GxPuZB7piXaqTqRGo484KwrYcAEw= X-Google-Smtp-Source: ABdhPJxLtZseZwI8xZeceH05IOdS4aJ+kQHO+57Xk2huXKh6NGpbXHy62YEqg+Cs23PNtn+U3ehZpg== X-Received: by 2002:a05:622a:1113:: with SMTP id e19mr18034713qty.132.1642638574041; Wed, 19 Jan 2022 16:29:34 -0800 (PST) Received: from localhost.localdomain (76-229-100-169.lightspeed.irvnca.sbcglobal.net. [76.229.100.169]) by smtp.gmail.com with ESMTPSA id v12sm790904qkp.21.2022.01.19.16.29.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Jan 2022 16:29:33 -0800 (PST) From: Tony Dinh To: U-Boot Mailing List , Stefan Roese Cc: =?unknown-8bit?b?UGFsaSBSb2jhciAgPHBhbGlAa2VybmVsLm9yZz4sIE1hcmVrIEJl?= =?unknown-8bit?b?aPpuICA8bWFyZWsuYmVodW5AbmljLmN6PiwgVG9tIFJpbmkgPHRyaW5p?= =?unknown-8bit?b?QGtvbnN1bGtvLmNvbT4sIERhdmlkIFB1cmR5IDxkYXZpZC5jLnB1cmR5?= =?unknown-8bit?b?QGdtYWlsLmNvbT4sIFRvbnkgRGluaCA8bWlib2RoaUBnbWFpbC5jb20+?= Subject: [RESEND PATCH v3 2/4] arm: kirkwood: Pogoplug-V4 : Add Kconfig files Date: Wed, 19 Jan 2022 16:28:33 -0800 Message-Id: <20220120002835.21877-3-mibodhi@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220120002835.21877-1-mibodhi@gmail.com> References: <20220120002835.21877-1-mibodhi@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Add Kconfig files for Pogoplug V4 board Signed-off-by: Tony Dinh --- Changes in v3: - Migrate symbols from board include header to Kconfig arch/arm/mach-kirkwood/Kconfig | 6 ++++++ board/cloudengines/pogo_v4/Kconfig | 16 ++++++++++++++++ 2 files changed, 22 insertions(+) create mode 100644 board/cloudengines/pogo_v4/Kconfig diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index c060cc8546..382b836267 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -51,6 +51,11 @@ config TARGET_POGO_E02 select FEROCEON_88FR131 select KW88F6281 +config TARGET_POGO_V4 + bool "Pogoplug V4 Board" + select FEROCEON_88FR131 + select KW88F6192 + config TARGET_DNS325 bool "dns325 Board" select FEROCEON_88FR131 @@ -123,6 +128,7 @@ source "board/Marvell/guruplug/Kconfig" source "board/Marvell/sheevaplug/Kconfig" source "board/buffalo/lsxl/Kconfig" source "board/cloudengines/pogo_e02/Kconfig" +source "board/cloudengines/pogo_v4/Kconfig" source "board/d-link/dns325/Kconfig" source "board/iomega/iconnect/Kconfig" source "board/keymile/Kconfig" diff --git a/board/cloudengines/pogo_v4/Kconfig b/board/cloudengines/pogo_v4/Kconfig new file mode 100644 index 0000000000..db3b76b4d4 --- /dev/null +++ b/board/cloudengines/pogo_v4/Kconfig @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2014-2021 Tony Dinh +# +if TARGET_POGO_V4 + +config SYS_BOARD + default "pogo_v4" + +config SYS_VENDOR + default "cloudengines" + +config SYS_CONFIG_NAME + default "pogo_v4" + +endif From patchwork Thu Jan 20 00:28:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Dinh X-Patchwork-Id: 1581978 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=LG9jpAvH; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4JfNhd07x5z9sSs for ; Thu, 20 Jan 2022 11:30:40 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D8BE38383D; Thu, 20 Jan 2022 01:30:37 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="LG9jpAvH"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 4BD43832DA; Thu, 20 Jan 2022 01:30:36 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.2 Received: from mail-qk1-x731.google.com (mail-qk1-x731.google.com [IPv6:2607:f8b0:4864:20::731]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 3C70D8383D for ; Thu, 20 Jan 2022 01:30:32 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mibodhi@gmail.com Received: by mail-qk1-x731.google.com with SMTP id s12so4653469qkg.6 for ; Wed, 19 Jan 2022 16:30:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NCZegUFCQ+0KXruIMm8mu38LpC+JEA1cPamp95Z5ehM=; b=LG9jpAvHvf/3Nj/BUBxKfpTgTu+QJAm2ZmbypgHtDGKOhd5hmBQF3FQYu+WWM7qafl +3mLSqKxnEP11K3MnMUf2Gh+cxuEyVJEVCIvhvCRJnnZHr++BAUnFOyIvsP7cwBXTpsH 77lHdaDuIYMAVkzzJMCe0JcCfDoYe25AHqmUHAmSK/eVWAcYM4xq2tGbtqT9TyaJLEUF dlDaqWq0ID+5B9RyDjledO1Sg60p/i2Ci3DDGQeBnf65Kh6As8eOk1Ez/oIth33Kg0D5 bKnzY+kaDH4cDt/PUw8sTbimejOrddro/e2IRYtvRIcMc4tsUToPR2Af2XCuZvGfFJ+M 1mRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NCZegUFCQ+0KXruIMm8mu38LpC+JEA1cPamp95Z5ehM=; b=1+/8P8K0PK0wfbRXaH1UHINfGoZ1JcqeWPSA6UpHxJtci/P0uDqedfcLbCjvzsIrRf CIDjBkH8dV/hoXyVImGhwgByH1NlU/EZiPbqhNPD2F+0k/Eq4wITGpQr44pBJ1sM+0vM KqX09eHY4bryDMbDCAT3OaAUInIBUudb6ZoSQ7/6T+r105Edavw2TD726GoKE/BHQtAP CWzX/NpaCVTUQYI9E3NmMcCcOrN/B3n0h/G2+q404c4O/1DxfSeTSZalAWuGJeKniQ5M csnw4CSqIcom/JD6rNrcKaqJG4jRVylubu8TP82BNztKc0xIjVSLLj4Nj8S9y9MJE1lT DMKA== X-Gm-Message-State: AOAM533BHz9ip0BW5XT787JodcPUKz5/4PZ2M0SAHMnD+ne4RIdp0Txw mvbtkB/fo+XCoBc7RwRHfZFFAtxAiNM= X-Google-Smtp-Source: ABdhPJy130wjwVyPznfzZm+co49nizo/fR753/Dg4kqEXYygkg6xR5JXmMXwQ6omsF0Y3AuMjxmnBQ== X-Received: by 2002:a05:620a:4450:: with SMTP id w16mr3865077qkp.340.1642638630730; Wed, 19 Jan 2022 16:30:30 -0800 (PST) Received: from localhost.localdomain (76-229-100-169.lightspeed.irvnca.sbcglobal.net. [76.229.100.169]) by smtp.gmail.com with ESMTPSA id v12sm790904qkp.21.2022.01.19.16.30.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Jan 2022 16:30:30 -0800 (PST) From: Tony Dinh To: U-Boot Mailing List , Stefan Roese Cc: =?unknown-8bit?b?UGFsaSBSb2jhciAgPHBhbGlAa2VybmVsLm9yZz4sIE1hcmVrIEJl?= =?unknown-8bit?b?aPpuICA8bWFyZWsuYmVodW5AbmljLmN6PiwgVG9tIFJpbmkgPHRyaW5p?= =?unknown-8bit?b?QGtvbnN1bGtvLmNvbT4sIERhdmlkIFB1cmR5IDxkYXZpZC5jLnB1cmR5?= =?unknown-8bit?b?QGdtYWlsLmNvbT4sIFRvbnkgRGluaCA8bWlib2RoaUBnbWFpbC5jb20+?= Subject: [RESEND PATCH v3 3/4] arm: kirkwood: Pogoplug-V4 : Add board implementation files Date: Wed, 19 Jan 2022 16:28:34 -0800 Message-Id: <20220120002835.21877-4-mibodhi@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220120002835.21877-1-mibodhi@gmail.com> References: <20220120002835.21877-1-mibodhi@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Note: currently the fdt_get_phy_addr function in this file is duplicate in this board and many other Kirkwood boards (eg. Sheevaplug, GoFlex Home, etc.). This function is being factored out into common area by another patch. And because it was written for flattree only, the patch is being rewritten to use livetree calls. Signed-off-by: Tony Dinh --- Changes in v3: - Squash board file small patches into one patch Changes in v2: - Move constants to .c file and remove header file board/cloudengines/pogo_v4/MAINTAINERS | 6 + board/cloudengines/pogo_v4/Makefile | 10 ++ board/cloudengines/pogo_v4/kwbimage.cfg | 148 ++++++++++++++++ board/cloudengines/pogo_v4/pogo_v4.c | 220 ++++++++++++++++++++++++ 4 files changed, 384 insertions(+) create mode 100644 board/cloudengines/pogo_v4/MAINTAINERS create mode 100644 board/cloudengines/pogo_v4/Makefile create mode 100644 board/cloudengines/pogo_v4/kwbimage.cfg create mode 100644 board/cloudengines/pogo_v4/pogo_v4.c diff --git a/board/cloudengines/pogo_v4/MAINTAINERS b/board/cloudengines/pogo_v4/MAINTAINERS new file mode 100644 index 0000000000..35fd7858b7 --- /dev/null +++ b/board/cloudengines/pogo_v4/MAINTAINERS @@ -0,0 +1,6 @@ +POGO_V4 BOARD +M: Tony Dinh +S: Maintained +F: board/cloudengines/pogo_v4/ +F: include/configs/pogo_v4.h +F: configs/pogo_v4_defconfig diff --git a/board/cloudengines/pogo_v4/Makefile b/board/cloudengines/pogo_v4/Makefile new file mode 100644 index 0000000000..511bf5ff7e --- /dev/null +++ b/board/cloudengines/pogo_v4/Makefile @@ -0,0 +1,10 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2014-2021 Tony Dinh +# +# Based on +# Marvell Semiconductor +# Written-by: Prafulla Wadaskar +# + +obj-y := pogo_v4.o diff --git a/board/cloudengines/pogo_v4/kwbimage.cfg b/board/cloudengines/pogo_v4/kwbimage.cfg new file mode 100644 index 0000000000..f6294fe313 --- /dev/null +++ b/board/cloudengines/pogo_v4/kwbimage.cfg @@ -0,0 +1,148 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2012 +# David Purdy +# +# Based on Kirkwood support: +# (C) Copyright 2009 +# Marvell Semiconductor +# Written-by: Prafulla Wadaskar marvell.com> + +# Boot Media configurations (DONE) +BOOT_FROM nand +NAND_ECC_MODE default +NAND_PAGE_SIZE 0x0800 + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0 interface pad voltage to 1.8V (SHOULD BE SAME) +DATA 0xffd100e0 0x1b1b1b9b + +#Dram initalization for SINGLE x16 CL=3 @ 200MHz (need CL=3 @ 200MHz?) +DATA 0xffd01400 0x43000618 # DDR Configuration register +# bit13-0: 0x200 (200 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xffd01404 0x34143000 # DDR Controller Control Low +# bit 4: 0=addr/cmd in smame cycle +# bit 5: 0=clk is driven during self refresh, we don't care for APX +# bit 6: 0=use recommended falling edge of clk for addr/cmd +# bit14: 0=input buffer always powered up +# bit18: 1=cpu lock transaction enabled +# bit23-20: 3=recommended value for CL=3 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 6= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31: 0=no additional STARTBURST delay + +DATA 0xffd01408 0x11012227 # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xffd0140c 0x00000819 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xffd01410 0x00000001 # DDR Address Control (changed to Dockstar vals) +# bit1-0: 00, Cs0width=x16 +# bit3-2: 10, Cs0size=512Mb +# bit5-4: 00, Cs2width=nonexistent +# bit7-6: 00, Cs1size =nonexistent +# bit9-8: 00, Cs2width=nonexistent +# bit11-10: 00, Cs2size =nonexistent +# bit13-12: 00, Cs3width=nonexistent +# bit15-14: 00, Cs3size =nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0 required + +DATA 0xffd01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0 required + +DATA 0xffd01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0 required + +DATA 0xffd0141c 0x00000632 # DDR Mode +# bit2-0: 2, BurstLen=2 required +# bit3: 0, BurstType=0 required +# bit6-4: 4, CL=5 (<===== change to CL=3 ?) +# bit7: 0, TestMode=0 normal +# bit8: 0, DLL reset=0 normal +# bit11-9: 6, auto-precharge write recovery ???????????? +# bit12: 0, PD must be zero +# bit31-13: 0 required + +DATA 0xffd01420 0x00000040 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 0, DDR drive strenght normal +# bit2: 0, DDR ODT control lsd (disabled) +# bit5-3: 000, required +# bit6: 1, DDR ODT control msb, (disabled) +# bit9-7: 000, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0 required + +DATA 0xffd01424 0x0000F07F # DDR Controller Control High +# bit2-0: 111, required +# bit3 : 1 , MBUS Burst Chop disabled +# bit6-4: 111, required +# bit7 : 0 +# bit8 : 0 , no sample stage +# bit9 : 0 , no half clock cycle addition to dataout +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh +# bit15-12: 1111 required +# bit31-16: 0 required + +DATA 0xffd01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xffd0147c 0x00008552 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x07FFFFF1 # CS[0]n Size +# bit0: 1, Window enabled +# bit1: 0, Write Protect disabled +# bit3-2: 00, CS0 hit selected +# bit23-4: ones, required +# bit31-24: 0x07, Size (i.e. 128MB) + +DATA 0xFFD0150C 0x00000000 # CS[1]n Size, window disabled +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xffd01494 0x00030000 # DDR ODT Control (Low) (DONE) +# bit3-0: 2, ODT0Rd, MODT[0] asserted during read from DRAM CS1 +# bit7-4: 1, ODT0Rd, MODT[0] asserted during read from DRAM CS0 +# bit19-16:2, ODT0Wr, MODT[0] asserted during write to DRAM CS1 +# bit23-20:1, ODT0Wr, MODT[0] asserted during write to DRAM CS0 + +DATA 0xffd01498 0x00000000 # DDR ODT Control (High) (DONE) +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above +# bit3-2: 01, ODT1 active NEVER! +# bit31-4: zero, required + +DATA 0xffd0149c 0x0000e803 # CPU ODT Control (DONE) +DATA 0xffd01480 0x00000001 # DDR Initialization Control (DONE) +#bit0=1, enable DDR init upon this register write + +# End of Header extension +DATA 0x0 0x0 diff --git a/board/cloudengines/pogo_v4/pogo_v4.c b/board/cloudengines/pogo_v4/pogo_v4.c new file mode 100644 index 0000000000..c85de0b22e --- /dev/null +++ b/board/cloudengines/pogo_v4/pogo_v4.c @@ -0,0 +1,220 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2014-2021 Tony Dinh + * + * Based on + * Copyright (C) 2012 David Purdy + * + * Based on Kirkwood support: + * (C) Copyright 2009 + * Marvell Semiconductor + * Written-by: Prafulla Wadaskar + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* GPIO configuration */ +#define POGO_V4_OE_LOW (~(0)) +#define POGO_V4_OE_HIGH (~(0)) +#define POGO_V4_OE_VAL_LOW BIT(29) +#define POGO_V4_OE_VAL_HIGH 0 + +/* PHY related */ +#define MV88E1116_LED_FCTRL_REG 10 +#define MV88E1116_CPRSP_CR3_REG 21 +#define MV88E1116_MAC_CTRL_REG 21 +#define MV88E1116_PGADR_REG 22 +#define MV88E1116_RGMII_TXTM_CTRL BIT(4) +#define MV88E1116_RGMII_RXTM_CTRL BIT(5) + +/* button */ +#define BTN_EJECT 29 + +int board_early_init_f(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + mvebu_config_gpio(POGO_V4_OE_VAL_LOW, + POGO_V4_OE_VAL_HIGH, + POGO_V4_OE_LOW, POGO_V4_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP12_SD_CLK, + MPP13_SD_CMD, + MPP14_SD_D0, + MPP15_SD_D1, + MPP16_SD_D2, + MPP17_SD_D3, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_SATA1_ACTn, + MPP21_SATA0_ACTn, + MPP22_GPIO, /* Green LED */ + MPP23_GPIO, + MPP24_GPIO, /* Red LED */ + MPP25_GPIO, + MPP26_GPIO, + MPP27_GPIO, + MPP28_GPIO, + MPP29_GPIO, /* Eject button */ + MPP30_GPIO, + MPP31_GPIO, + MPP32_GPIO, + MPP33_GPIO, + MPP34_GPIO, + MPP35_GPIO, /* FR6192 has only 36 GPIOs */ + 0 + }; + kirkwood_mpp_conf(kwmpp_config, NULL); + + return 0; +} + +int board_late_init(void) +{ + /* Do late init to ensure successful enumeration of XHCI devices */ + pci_init(); + return 0; +} + +int board_init(void) +{ + /* Boot parameters address */ + gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; + + return 0; +} + +int fdt_get_phy_addr(const char *path) +{ + const void *fdt = gd->fdt_blob; + const u32 *reg; + const u32 *val; + int node, phandle, addr; + + /* Find the node by its full path */ + node = fdt_path_offset(fdt, path); + if (node >= 0) { + /* Look up phy-handle */ + val = fdt_getprop(fdt, node, "phy-handle", NULL); + if (!val) { + /* Look up phy (deprecated property for phy handle) */ + val = fdt_getprop(fdt, node, "phy", NULL); + } + if (val) { + phandle = fdt32_to_cpu(*val); + if (!phandle) + return -FDT_ERR_NOTFOUND; + + /* Follow it to its node */ + node = fdt_node_offset_by_phandle(fdt, phandle); + if (node) { + /* Look up reg */ + reg = fdt_getprop(fdt, node, "reg", NULL); + if (reg) { + addr = fdt32_to_cpu(*reg); + return addr; + } + } + } + } + return -FDT_ERR_NOTFOUND; +} + +#if defined(CONFIG_RESET_PHY_R) +/* Configure and initialize PHY */ +void reset_phy(void) +{ + u16 reg; + int phyaddr; + char *name = "ethernet-controller@72000"; + char *eth0_path = "/ocp@f1000000/ethernet-controller@72000"; + + if (miiphy_set_current_dev(name)) + return; + + phyaddr = fdt_get_phy_addr(eth0_path); + if (phyaddr < 0) + return; + + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 4.7.2 of chip datasheet + */ + miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2); + miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, ®); + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); + miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg); + miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0); + + /* reset the phy */ + miiphy_reset(name, phyaddr); + + printf("88E1116 Initialized on %s\n", name); +} +#endif /* CONFIG_RESET_PHY_R */ + +#if CONFIG_IS_ENABLED(BOOTSTAGE) +#define GREEN_LED BIT(22) +#define RED_LED BIT(24) +#define BOTH_LEDS (GREEN_LED | RED_LED) +#define NEITHER_LED 0 + +static void set_leds(u32 leds, u32 blinking) +{ + struct kwgpio_registers *r; + u32 oe; + u32 bl; + + r = (struct kwgpio_registers *)MVEBU_GPIO0_BASE; + oe = readl(&r->oe) | BOTH_LEDS; + writel(oe & ~leds, &r->oe); /* active low */ + bl = readl(&r->blink_en) & ~BOTH_LEDS; + writel(bl | blinking, &r->blink_en); +} + +void show_boot_progress(int val) +{ + switch (val) { + case BOOTSTAGE_ID_RUN_OS: /* booting Linux */ + set_leds(BOTH_LEDS, NEITHER_LED); + break; + case BOOTSTAGE_ID_NET_ETH_START: /* Ethernet initialization */ + set_leds(GREEN_LED, GREEN_LED); + break; + default: + if (val < 0) /* error */ + set_leds(RED_LED, RED_LED); + break; + } +} +#endif From patchwork Thu Jan 20 00:28:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tony Dinh X-Patchwork-Id: 1581979 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=L+nMVsKN; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4JfNhn6wDxz9sSs for ; Thu, 20 Jan 2022 11:30:49 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 1214F83868; Thu, 20 Jan 2022 01:30:47 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="L+nMVsKN"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 445068386B; Thu, 20 Jan 2022 01:30:46 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-qt1-x836.google.com (mail-qt1-x836.google.com [IPv6:2607:f8b0:4864:20::836]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 28FDF83867 for ; Thu, 20 Jan 2022 01:30:43 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=mibodhi@gmail.com Received: by mail-qt1-x836.google.com with SMTP id l17so3855485qtk.7 for ; Wed, 19 Jan 2022 16:30:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=4L9U7id7FbjFX7fwr7+VJ9A0RFkTVz1nTPnkeXqRx6k=; b=L+nMVsKNakUJKr7Ijzt5BL8l3GyM9PrF5pSkwf5FxRCxaiE56hu4XqDo4kwKX1j7iu GK+6TCOJ7cQG2tSWmrSfymDwIMghMuj5lzez1bPR0I8mwRQ99tpU+9HKp3SpBfmXh6Te SwQU4XGJabqFuqGtYWLO85NEb+LwSj/L2LcPsRkgtJqY48KZgnksDxF+ArHXvYpIZks+ RNtu5tOVIIpdcf1m/NJ/H82ujwA1y7KaWgUa33017LSNIa13fhnkUnvK6Y2U7SsXbUSW z5NMuBgVEK+/SHvLyqPZXLtDo0MflzoT41nmu3KCp3aRMfeaxTrDYClcjS8iFPhKfJRi zb5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=4L9U7id7FbjFX7fwr7+VJ9A0RFkTVz1nTPnkeXqRx6k=; b=2eHEq+HDq/cL45HBDvXHmMj82rGxttnMcf5mGxX5/x5fIfavswPBrlUluCj1m8iil/ sdlDqMwELPWhv8qcROIemLU/e2TsDAxHIlzYPPDxDf1Cq4k9/lHpYd9Bg6VH4dv143tP IobiDgXXs32d+ncXRrhFdrvSl9uLgeSDmhSI7vM/pMYHuUKCfyMKdYCKJCgHKTOW2Fml +yydjZW05eqo9+F9Qi12sKBEHs8iUc1c36TIFnfq/Hbs8VWNnh4IIOQLEs4ehl6cbvCo phdoPEsz6fOxDvUYrQyBn6mWAK5gd1KLdjJ7RDxKP4IhCKUlPjbtlIUDc8fzupVcd+DZ l7nA== X-Gm-Message-State: AOAM533Xj1w+MGl6I/VC8kIh8nhJ1VlKIAzPQ/W33oT3tZ6TRQRDvgCq XOMOxHpocLAEUYxLa55u4H/XwWg9wW4= X-Google-Smtp-Source: ABdhPJziAnnMEzcL7EHbSpCd7vNHOcPnWFKrznPfwj9sj62d0OUXVciC0Afs0Bm2DrgS8kh3zYm2ZQ== X-Received: by 2002:ac8:5993:: with SMTP id e19mr17429601qte.500.1642638641912; Wed, 19 Jan 2022 16:30:41 -0800 (PST) Received: from localhost.localdomain (76-229-100-169.lightspeed.irvnca.sbcglobal.net. [76.229.100.169]) by smtp.gmail.com with ESMTPSA id v12sm790904qkp.21.2022.01.19.16.30.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Jan 2022 16:30:41 -0800 (PST) From: Tony Dinh To: U-Boot Mailing List , Stefan Roese Cc: =?unknown-8bit?b?UGFsaSBSb2jhciAgPHBhbGlAa2VybmVsLm9yZz4sIE1hcmVrIEJl?= =?unknown-8bit?b?aPpuICA8bWFyZWsuYmVodW5AbmljLmN6PiwgVG9tIFJpbmkgPHRyaW5p?= =?unknown-8bit?b?QGtvbnN1bGtvLmNvbT4sIERhdmlkIFB1cmR5IDxkYXZpZC5jLnB1cmR5?= =?unknown-8bit?b?QGdtYWlsLmNvbT4sIFRvbnkgRGluaCA8bWlib2RoaUBnbWFpbC5jb20+?= Subject: [RESEND PATCH v3 4/4] arm: kirkwood: Pogoplug V4 : Add board include header and defconfig files Date: Wed, 19 Jan 2022 16:28:35 -0800 Message-Id: <20220120002835.21877-5-mibodhi@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220120002835.21877-1-mibodhi@gmail.com> References: <20220120002835.21877-1-mibodhi@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Add board include header and defconfig files for Pogoplug V4 Signed-off-by: Tony Dinh --- Changes in v3: - Migrate config symbols from board include header to defconfig - Remove obsolete config symbols from header file - Don't use ifdefs for unselectable config symbols in header file Changes in v2: - Use canonical format for defconfig file configs/pogo_v4_defconfig | 79 +++++++++++++++++++++++++++++++++++++++ include/configs/pogo_v4.h | 56 +++++++++++++++++++++++++++ 2 files changed, 135 insertions(+) create mode 100644 configs/pogo_v4_defconfig create mode 100644 include/configs/pogo_v4.h diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig new file mode 100644 index 0000000000..5490067b9e --- /dev/null +++ b/configs/pogo_v4_defconfig @@ -0,0 +1,79 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_DCACHE_OFF=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_SYS_THUMB_BUILD=y +CONFIG_ARCH_KIRKWOOD=y +CONFIG_SYS_KWD_CONFIG="board/cloudengines/pogo_v4/kwbimage.cfg" +CONFIG_SYS_TEXT_BASE=0x600000 +CONFIG_TARGET_POGO_V4=y +CONFIG_ENV_SIZE=0x20000 +CONFIG_ENV_OFFSET=0xC0000 +CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogoplug-series-4" +CONFIG_IDENT_STRING="\nPogoplug V4" +CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_BOOTSTAGE=y +CONFIG_SHOW_BOOT_PROGRESS=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTCOMMAND=y +CONFIG_BOOTCOMMAND="setenv bootargs ${bootargs_console}; run bootcmd_usb; bootm 0x00800000 0x01100000 0x2c00000" +CONFIG_USE_PREBOOT=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="Pogo_V4> " +CONFIG_CMD_BOOTZ=y +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_NAND=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SATA=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_SNTP=y +CONFIG_CMD_DNS=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_JFFS2=y +CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" +CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:2M(u-boot),3M(uImage),3M(uImage2),8M(failsafe),112M(root)" +CONFIG_CMD_UBI=y +CONFIG_ISO_PARTITION=y +CONFIG_EFI_PARTITION=y +CONFIG_PARTITION_TYPE_GUID=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_NAND=y +CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_NETCONSOLE=y +CONFIG_DM=y +CONFIG_SATA_MV=y +CONFIG_KIRKWOOD_GPIO=y +# CONFIG_MMC_HW_PARTITIONING is not set +CONFIG_MVEBU_MMC=y +CONFIG_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_DM_ETH=y +CONFIG_MVGBE=y +CONFIG_MII=y +CONFIG_PCI=y +CONFIG_PCI_MVEBU=y +CONFIG_DM_RTC=y +CONFIG_RTC_EMULATION=y +CONFIG_SYS_NS16550=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PCI=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_NAND=y diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h new file mode 100644 index 0000000000..d94d49505a --- /dev/null +++ b/include/configs/pogo_v4.h @@ -0,0 +1,56 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2014-2022 Tony Dinh + * + * Based on + * Copyright (C) 2012 + * David Purdy + * + * Based on Kirkwood support: + * (C) Copyright 2009 + * Marvell Semiconductor + * Written-by: Prafulla Wadaskar + */ + +#ifndef _CONFIG_POGO_V4_H +#define _CONFIG_POGO_V4_H + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* + * Default environment variables + */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "dtb_file=/boot/dts/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"\ + "mtdids=nand0=orion_nand\0"\ + "bootargs_console=console=ttyS0,115200\0" \ + "bootcmd_usb=usb start; load usb 0:1 0x00800000 /boot/uImage; " \ + "load usb 0:1 0x01100000 /boot/uInitrd; " \ + "load usb 0:1 0x2c00000 $dtb_file\0" + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_FEATURE_COMMAND_EDITING /* for netconsole */ +#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ +#define CONFIG_PHY_BASE_ADR 0 +#endif /* CONFIG_CMD_NET */ + +/* + * SATA Driver configuration + */ +#define CONFIG_SYS_SATA_MAX_DEVICE 1 + +/* + * Support large disk for SATA and USB + */ +#define CONFIG_SYS_64BIT_LBA +#define CONFIG_LBA48 + +#endif /* _CONFIG_POGO_V4_H */