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Tue, 30 Nov 2021 02:43:54 -0800 (PST) From: INAGAKI Hiroshi To: openwrt-devel@lists.openwrt.org Cc: sander@svanheule.net, hauke@hauke-m.de, INAGAKI Hiroshi Subject: [PATCH v2 2/2] realtek: add support for Panasonic Switch-M8eG PN28080K Date: Tue, 30 Nov 2021 19:43:10 +0900 Message-Id: <20211130104310.1484-3-musashino.open@gmail.com> X-Mailer: git-send-email 2.33.0.windows.2 In-Reply-To: <20211130104310.1484-1-musashino.open@gmail.com> References: <20211130104310.1484-1-musashino.open@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211130_024356_680878_B563874A X-CRM114-Status: GOOD ( 23.23 ) X-Spam-Score: -0.2 (/) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: Panasonic Switch-M8eG PN28080K is a 8 + 1 port gigabit switch, based on RTL8380M. Specification: - SoC : Realtek RTL8380M - RAM : DDR3 128 MiB (Winbond W631GG8KB-15) - Flash : SPI-NOR 32 MiB (Macronix MX25L25635FMI-10G) - Ethernet : 10/100/1000 Mbps x8 + 1 - port 1-8 : TP, RTL8218B (SoC) - port 9 [...] Content analysis details: (-0.2 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:102e listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [musashino.open[at]gmail.com] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "openwrt-devel" Errors-To: openwrt-devel-bounces+incoming=patchwork.ozlabs.org@lists.openwrt.org Panasonic Switch-M8eG PN28080K is a 8 + 1 port gigabit switch, based on RTL8380M. Specification: - SoC : Realtek RTL8380M - RAM : DDR3 128 MiB (Winbond W631GG8KB-15) - Flash : SPI-NOR 32 MiB (Macronix MX25L25635FMI-10G) - Ethernet : 10/100/1000 Mbps x8 + 1 - port 1-8 : TP, RTL8218B (SoC) - port 9 : SFP, RTL8380M (SoC) - LEDs/Keys : 7x / 1x - UART : RS-232 port on the front panel (connector: RJ-45) - 3:TX, 4:GND, 5:GND, 6:RX (pin number: RJ-45) - 9600n8 - Power : 100-240 VAC, 50/60 Hz, 0.5 A - Plug : IEC 60320-C13 - Stock OS : VxWorks based Flash instruction using initramfs image: 1. Prepare the TFTP server with the IP address 192.168.1.111 2. Rename the OpenWrt initramfs image to "0101A8C0.img" and place it to the TFTP directory 3. Download the official upgrading firmware (ex: pn28080k_v30000.rom) and place it to the TFTP directory 4. Boot M8eG and interrupt the U-Boot with Ctrl + C keys 5. Execute the following commands and boot with the OpenWrt initramfs image rtk network on tftpboot 0x81000000 bootm 6. Backup mtdblock files to the computer by scp or anything and reboot 7. Interrupt the U-Boot and execute the following commands to re-create filesystem in the flash ffsmount c:/ ffsfmt c:/ this step takes a long time, about ~ 4 mins 8. Execute the following commands to put the official images to the filesystem updatert example: updatert pn28080k_v30000.rom this step takes about ~ 40 secs 9. Set the environment variables of the U-Boot by the following commands setenv loadaddr 0xb4e00000 setenv bootcmd bootm saveenv 10: Download the OpenWrt initramfs image and boot with it tftpboot 0x81000000 0101A8C0.img bootm 11: On the initramfs image, download the sysupgrade image and perform sysupgrade with it sysupgrade 12: Wait ~ 120 seconds to complete flashing Note: - "Switch-M8eG" is a model name, and "PN28080K" is a model number. Switch-M8eG has an another (old) model number ("PN28080"), it's not a Realtek based hardware. - Switch-M8eG has a "POWER" LED (Green), but it's not connected to any GPIO pin. - The U-Boot checks the runtime images in the flash when booting and fails to execute anything in "bootcmd" variable if the images are not exsisting. - A filesystem is formed in the flash (0x100000-0x1DFFFFF) on the stock firmware and it includes the stock images, configuration files and checksum files. It's unknown format, can't be managed on the OpenWrt. To get the enough space for OpenWrt, move the filesystem to the head of "fs_reserved" partition by execution of "ffsfmt" and "updatert". - On the other devices in the same series of Switch-M8eG PN28080K, the INT pin on the PCA9555 is not connected to anywhere. Back to the stock firmware: 1. Delete "loadaddr" variable and set "bootcmd" to the original value on U-Boot: setenv loadaddr setenv bootcmd 'bootm 0x81000000' on OpenWrt: fw_setenv loadaddr fw_setenv bootcmd 'bootm 0x81000000' 2. Perform reset or reboot on U-Boot: reset on OpenWrt: reboot Signed-off-by: INAGAKI Hiroshi --- v1 -> v2: - drop changes for kernel 5.4 - add interrupt-related properties to the nodes of PCA9539 and PCA9555 - use "gpio-keys" instead of "gpio-keys-polled" - update/remove comments in mtd partitions - use "led-*" scheme and add color/function properties for each node of LEDs - drop unnecessary default values from gpio-restart node .../rtl8380_panasonic_m8eg-pn28080k.dts | 123 ++++++++++ .../rtl83xx_panasonic_mxxeg-pn28xx0k.dtsi | 229 ++++++++++++++++++ target/linux/realtek/image/Makefile | 10 + 3 files changed, 362 insertions(+) create mode 100644 target/linux/realtek/dts-5.10/rtl8380_panasonic_m8eg-pn28080k.dts create mode 100644 target/linux/realtek/dts-5.10/rtl83xx_panasonic_mxxeg-pn28xx0k.dtsi diff --git a/target/linux/realtek/dts-5.10/rtl8380_panasonic_m8eg-pn28080k.dts b/target/linux/realtek/dts-5.10/rtl8380_panasonic_m8eg-pn28080k.dts new file mode 100644 index 0000000000..7b6bfc7991 --- /dev/null +++ b/target/linux/realtek/dts-5.10/rtl8380_panasonic_m8eg-pn28080k.dts @@ -0,0 +1,123 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "rtl838x.dtsi" +#include "rtl83xx_panasonic_mxxeg-pn28xx0k.dtsi" + +#include + +/ { + compatible = "panasonic,m8eg-pn28080k", "realtek,rtl838x-soc"; + model = "Panasonic Switch-M8eG PN28080K"; + + aliases { + led-boot = &led_status_eco_green; + led-failsafe = &led_status_eco_amber; + led-running = &led_status_eco_green; + led-upgrade = &led_status_eco_green; + }; + + sfp0: sfp-p9 { + compatible = "sff,sfp"; + i2c-bus = <&i2c0>; + tx-fault-gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; + tx-disable-gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; + los-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>; + }; +}; + +&leds { + led_status_eco_amber: led-5 { + label = "amber:status_eco"; + gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_STATUS; + function-enumerator = <1>; + }; + + led_status_eco_green: led-6 { + label = "green:status_eco"; + gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_STATUS; + function-enumerator = <2>; + }; +}; + +&i2c_gpio_0 { + scl-gpios = <&gpio0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; +}; + +&i2c_gpio_1 { + scl-gpios = <&gpio0 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio0 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; +}; + +&gpio1 { + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gpio0>; + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; +}; + +&gpio2 { + interrupt-parent = <&gpio0>; + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; +}; + +ðernet0 { + mdio-bus { + compatible = "realtek,rtl838x-mdio"; + regmap = <ðernet0>; + #address-cells = <1>; + #size-cells = <0>; + + INTERNAL_PHY(8) + INTERNAL_PHY(9) + INTERNAL_PHY(10) + INTERNAL_PHY(11) + INTERNAL_PHY(12) + INTERNAL_PHY(13) + INTERNAL_PHY(14) + INTERNAL_PHY(15) + + INTERNAL_PHY(24) + }; +}; + +&switch0 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + SWITCH_PORT(8, 1, internal) + SWITCH_PORT(9, 2, internal) + SWITCH_PORT(10, 3, internal) + SWITCH_PORT(11, 4, internal) + SWITCH_PORT(12, 5, internal) + SWITCH_PORT(13, 6, internal) + SWITCH_PORT(14, 7, internal) + SWITCH_PORT(15, 8, internal) + + port@24 { + reg = <24>; + label = "lan9"; + phy-mode = "1000base-x"; + phy-handle = <&phy24>; + managed = "in-band-status"; + sfp = <&sfp0>; + }; + + port@28 { + ethernet = <ðernet0>; + reg = <28>; + phy-mode = "internal"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; +}; diff --git a/target/linux/realtek/dts-5.10/rtl83xx_panasonic_mxxeg-pn28xx0k.dtsi b/target/linux/realtek/dts-5.10/rtl83xx_panasonic_mxxeg-pn28xx0k.dtsi new file mode 100644 index 0000000000..40bf3a264e --- /dev/null +++ b/target/linux/realtek/dts-5.10/rtl83xx_panasonic_mxxeg-pn28xx0k.dtsi @@ -0,0 +1,229 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include +#include +#include + +/ { + chosen { + bootargs = "console=ttyS0,9600"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x8000000>; + }; + + leds: leds { + compatible = "gpio-leds"; + + led-0 { + label = "amber:any_col"; + gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_FAULT; + }; + + led-1 { + label = "green:giga"; + gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <1>; + }; + + led-2 { + label = "green:100m"; + gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <2>; + }; + + led-3 { + label = "green:full"; + gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <3>; + }; + + led-4 { + label = "green:loop_history"; + gpios = <&gpio2 11 GPIO_ACTIVE_LOW>; + color = ; + function = LED_FUNCTION_INDICATOR; + function-enumerator = <4>; + }; + }; + + keys { + compatible = "gpio-keys"; + + led_mode { + label = "led-mode"; + gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-restart { + compatible = "gpio-restart"; + gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; + }; + + /* Switch-M*eG PN28xx0K has no RTL8231 chip */ + /delete-node/ rtl8231-gpio; + + i2c_gpio_0: i2c-gpio-0 { + compatible = "i2c-gpio"; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + + gpio1: gpio@20 { + compatible = "nxp,pca9555"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio2: gpio@75 { + compatible = "nxp,pca9539"; + reg = <0x75>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + + /* + * GPIO14 (IO1_6): Shift Register RESET (port LED) + * - Switch-M8eG PN28080K: 3x 74HC164 + * - Switch-M24eG PN28240K: 6x 74HC164 + * - Switch-M48eG PN28480K: 12x 74HC164 + */ + portled_sregister_reset { + gpio-hog; + gpios = <14 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "portled-sregister-reset"; + }; + }; + }; + + i2c_gpio_1: i2c-gpio-1 { + compatible = "i2c-gpio"; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + + i2c-switch@70 { + compatible = "nxp,pca9545"; + reset-gpios = <&gpio2 13 GPIO_ACTIVE_LOW>; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + /* + * - Switch-M8eG PN28080K: 0 (sfp p9) + * - Switch-M24eG PN28240K: 0-1 (sfp p23-p24) + * - Switch-M48eG PN28480K: 0-3 (sfp p45-p48) + */ + i2c0: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + i2c2: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c3: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + label = "u-boot-env"; + reg = <0x80000 0x10000>; + }; + + partition@90000 { + label = "u-boot-env2"; + reg = <0x90000 0x10000>; + }; + + partition@a0000 { + label = "sysinfo"; + reg = <0xa0000 0x60000>; + read-only; + }; + + /* + * Filesystem area in stock firmware + * (0x100000-0x1DFFFFF) + * + * stock firmware images are required to pass + * the checking by the U-Boot, also for OpenWrt + * + * in OpenWrt: + * - 0x100000-0xDFFFFF (13M): stock images + * - 0xE00000-0x1DFFFFF(16M): OpenWrt image + */ + partition@100000 { + label = "fs_reserved"; + reg = <0x100000 0xd00000>; + }; + + partition@e00000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0xe00000 0x1000000>; + }; + + partition@1e00000 { + label = "vlog_data"; + reg = <0x1e00000 0x100000>; + read-only; + }; + + partition@1f00000 { + label = "elog_data"; + reg = <0x1f00000 0x100000>; + read-only; + }; + }; + }; +}; diff --git a/target/linux/realtek/image/Makefile b/target/linux/realtek/image/Makefile index a7961970a3..2e1c445b56 100644 --- a/target/linux/realtek/image/Makefile +++ b/target/linux/realtek/image/Makefile @@ -112,6 +112,16 @@ define Device/netgear_gs310tp-v1 endef TARGET_DEVICES += netgear_gs310tp-v1 +define Device/panasonic_m8eg-pn28080k + SOC := rtl8380 + IMAGE_SIZE := 16384k + DEVICE_VENDOR := Panasonic + DEVICE_MODEL := Switch-M8eG + DEVICE_VARIANT := PN28080K + DEVICE_PACKAGES := kmod-i2c-mux-pca954x +endef +TARGET_DEVICES += panasonic_m8eg-pn28080k + define Device/zyxel_gs1900 SOC := rtl8380 IMAGE_SIZE := 6976k