From patchwork Wed Nov 24 10:22:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Chiu X-Patchwork-Id: 1559010 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=u0l4W4tG; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HzcXS6rv3z9t4b for ; Wed, 24 Nov 2021 21:23:03 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1mppQJ-00038h-2i; Wed, 24 Nov 2021 10:22:43 +0000 Received: from smtp-relay-internal-0.internal ([10.131.114.225] helo=smtp-relay-internal-0.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1mppQH-00038D-OR for kernel-team@lists.ubuntu.com; Wed, 24 Nov 2021 10:22:41 +0000 Received: from mail-pg1-f199.google.com (mail-pg1-f199.google.com [209.85.215.199]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 7EDBA3F19E for ; Wed, 24 Nov 2021 10:22:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1637749361; bh=XXCIKf+zRI7XmgohEo4Uh9uOfmxRZaIyLX7XBcSQSk4=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=u0l4W4tGpMINThc1Msvm/0mkJHrV4Hq9peLyNX+U61QrwqHWPHgPsjPX3ZUu+p1RQ 0Eu96fts0ZRmGFkogLyIhxUljXffNP+9U/lR15/PHRNkz2zy9fOhkFKqLaIgT6B2E3 cTIFAxKO58sq7sqL8BIrO6TnhPhDoCkOyutBfwiQdmd0XjnT11z9+trWlWcXvZNc8n C6ld3+ReOeh0zcHVkVpMXt3RxMUGtAVpoh0sgtI5uFfruiY4K7Y52YlkuHajr+LdO0 AShMePM9TvP/rEPCar60jqbIidX+tNFgkdrSqp4roTYns+OAG8FUDVZIl59P9+Dq6Q CGh1W0NvnALeA== Received: by mail-pg1-f199.google.com with SMTP id 141-20020a630793000000b003214e421b2cso581947pgh.5 for ; Wed, 24 Nov 2021 02:22:41 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XXCIKf+zRI7XmgohEo4Uh9uOfmxRZaIyLX7XBcSQSk4=; b=c0zW2CSCjz6VhuydlBrybpzUOGffjhVisPzfjitZFitsYQrgTqAk47Dt6ZBmg0Vr9W z1r3EruhwZrcRfPcS4M98LMfcN/Y1udRQ3h/AE9mFCzoR8Bw7YsGhhX8TQQNb8KveKc3 qW0cqSij31VYT9XF8DJe4Mz7E/NvKicphsFDhvIMzv4Q4smWCX2Y9FTVTNzkN/qhaAjr vPNHKlSmzGLMBuFy3A2j4MIpRYvKZqKsVVfTgdxMtlIEHOrkBTooBeIllpJu0ClDRUsx 81a4lEM5Dz8mXOgo5BkBc3u4DvRzmFbi7EXKLP1v3uPZvUXgiJN/OK0fKdysqf6IFkBi ukGg== X-Gm-Message-State: AOAM5304XSVONdYAJ9mAmVxxHi8Q06YBLOlCCnzkYajuc2WMeBUl3kly 6WV6HKgS7H1rCp9BSjxX+59U8lwRaRaMPChm4+Mvyo5MzcR3dquLQYP7Lzg7arI+X+0XZ8ZceBZ TO73mCYBaFxEfLBSgvJ7cnzoXOy4vin+KHkoV9So6Uw== X-Received: by 2002:a05:6a00:23c4:b0:49f:e054:84cb with SMTP id g4-20020a056a0023c400b0049fe05484cbmr4873915pfc.63.1637749359884; Wed, 24 Nov 2021 02:22:39 -0800 (PST) X-Google-Smtp-Source: ABdhPJxghxdi5P6qzVmYYNvvF52GM/08007/LmtPOQfmp41QORIkSwhsfZZ5ODvmRaIzBBkZvlrd8A== X-Received: by 2002:a05:6a00:23c4:b0:49f:e054:84cb with SMTP id g4-20020a056a0023c400b0049fe05484cbmr4873886pfc.63.1637749359518; Wed, 24 Nov 2021 02:22:39 -0800 (PST) Received: from localhost.localdomain (111-240-133-170.dynamic-ip.hinet.net. [111.240.133.170]) by smtp.gmail.com with ESMTPSA id 13sm15064724pfp.216.2021.11.24.02.22.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 02:22:39 -0800 (PST) From: Chris Chiu To: kernel-team@lists.ubuntu.com Subject: [PATCH 01/12][SRU][U/OEM-5.14] drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode Date: Wed, 24 Nov 2021 18:22:24 +0800 Message-Id: <20211124102235.447553-2-chris.chiu@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211124102235.447553-1-chris.chiu@canonical.com> References: <20211124102235.447553-1-chris.chiu@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Imre Deak BugLink: https://bugs.launchpad.net/bugs/1952041 On ADL-P the PHY ready (aka status complete on other platforms) flag is always set, besides when a DP-alt, legacy sink is connected also when a TBT sink is connected or nothing is connected. So assume the PHY to be connected when both the TBT live status and PHY ready flags are set. Cc: José Roberto de Souza Signed-off-by: Imre Deak Reviewed-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210921002313.1132357-3-imre.deak@intel.com (cherry picked from commit 4f7dad584fdce914d698233179a1188481789884) Signed-off-by: Chris Chiu --- drivers/gpu/drm/i915/display/intel_tc.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 3ffece568ed9..7dc3696085c7 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -509,6 +509,10 @@ static bool icl_tc_phy_is_connected(struct intel_digital_port *dig_port) return dig_port->tc_mode == TC_PORT_TBT_ALT; } + /* On ADL-P the PHY complete flag is set in TBT mode as well. */ + if (IS_ALDERLAKE_P(i915) && dig_port->tc_mode == TC_PORT_TBT_ALT) + return true; + if (!tc_phy_is_owned(dig_port)) { drm_dbg_kms(&i915->drm, "Port %s: PHY not owned\n", dig_port->tc_port_name); From patchwork Wed Nov 24 10:22:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Chiu X-Patchwork-Id: 1559006 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=RCAz4S69; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HzcXT1SlBz9t55 for ; Wed, 24 Nov 2021 21:23:04 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1mppQL-00039Q-AC; Wed, 24 Nov 2021 10:22:45 +0000 Received: from smtp-relay-internal-1.internal ([10.131.114.114] helo=smtp-relay-internal-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1mppQI-00038U-GH for kernel-team@lists.ubuntu.com; Wed, 24 Nov 2021 10:22:42 +0000 Received: from mail-pf1-f200.google.com (mail-pf1-f200.google.com [209.85.210.200]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 554463F32E for ; Wed, 24 Nov 2021 10:22:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1637749362; bh=g4X8uGPo6UKimFH0ndeA71oCVea6LQiomATdOtsSy/A=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=RCAz4S69aVUoszjCVZk+Gdk6l66AsDi48lS+elvrj9etl+NqUkZO3PFZmxMOfHRfZ OvlNhBDPSSCnKrL7c1gpMzFBYj9Un34dKuD2X7Y/xD7qOGOCI43EKAeOen0qoUQWAU O4UDk+EiysBVlgTp+5OPvgY4L5mLSBdLXAcNWQhnjQM/1aLs34j8y4jaN6QdtFmMzu tW2TWifkVX4KOKr2TZi1bpSqoA6p+Oy3AwTX6Y9z61zVfuGeC8HsTX+tq0PrzJenp+ JUCCRpwTBtsT68ghX2moDWp0S5jm+0TZLHKxWiQYP7gX5JOtxmO5jxmp8UBJ7K3i3M BUMsFK+bIGpGw== Received: by mail-pf1-f200.google.com with SMTP id y68-20020a626447000000b004a2b2d0c39eso1252439pfb.14 for ; Wed, 24 Nov 2021 02:22:42 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=g4X8uGPo6UKimFH0ndeA71oCVea6LQiomATdOtsSy/A=; b=QCd8Rc53Q57BDajyRd+84w+VoV5HPhtDd85h+IZaJXkMep0jckFxUFr+df5y1QYO64 Cl12JwBMS4vGx5DPqGtTdTAXmGY2vH7goScb5BhAazHiYVVHnNVPnaezob8DiqDg3862 07iTbwqVR177Q65Yq77ELhxPP5Y5eDMsbyIs3oUOTCBQJBH+jR+00BQ/UksJwPBIoJ+t r3TkVCR/NpN9Tgs7TPxeSv4gE6Jr8SYInIblN10/YG7B8gRVXvW2OooZGfOUKyqEoVcB 4sbHCz236/rSj404/jx6Jb3wCtbOVjkCI9q/Rua8quaVLptnYXRkKV+MR3hUcL6AF74y rP5w== X-Gm-Message-State: AOAM531gXiVhLyZAA9GIYDEJi8coQgVoVpI02yt0/GqySrolDh9GdRGy w+HkCTFgNZgxrO6QV+oXYnsbzKIvenE4JYSYSH65oaPhkWvD8km9X/mq0m5oX/SI7uB8J/e9+D3 7IxaEflCS3tKZ8Xnx5si6Q/TOXqoMnHQwy7FwDxsbqQ== X-Received: by 2002:a05:6a00:1741:b0:4a6:3de7:a816 with SMTP id j1-20020a056a00174100b004a63de7a816mr4841050pfc.29.1637749360858; Wed, 24 Nov 2021 02:22:40 -0800 (PST) X-Google-Smtp-Source: ABdhPJwsuU+L6GLzIwwJWr5XH5ZLdrXa7y2LS+9cHDmEHE4q1oBKPVp8visfalZZ+rqndsJDj5rqRA== X-Received: by 2002:a05:6a00:1741:b0:4a6:3de7:a816 with SMTP id j1-20020a056a00174100b004a63de7a816mr4841014pfc.29.1637749360572; Wed, 24 Nov 2021 02:22:40 -0800 (PST) Received: from localhost.localdomain (111-240-133-170.dynamic-ip.hinet.net. [111.240.133.170]) by smtp.gmail.com with ESMTPSA id 13sm15064724pfp.216.2021.11.24.02.22.39 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 02:22:40 -0800 (PST) From: Chris Chiu To: kernel-team@lists.ubuntu.com Subject: [PATCH 02/12][SRU][U/OEM-5.14] drm/i915/tc: Remove waiting for PHY complete during releasing ownership Date: Wed, 24 Nov 2021 18:22:25 +0800 Message-Id: <20211124102235.447553-3-chris.chiu@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211124102235.447553-1-chris.chiu@canonical.com> References: <20211124102235.447553-1-chris.chiu@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Imre Deak BugLink: https://bugs.launchpad.net/bugs/1952041 Waiting for the PHY complete flag to clear when releasing the PHY ownership was add in commit ddec362724f9 ("drm/i915: Wait for TypeC PHY complete flag to clear in safe mode") This isn't required by the spec, the vague idea was to make the handshake with the firmware more robust, without actual evidence for when it would be needed. Checking this again, the flag doesn't clear on ICL until after the PHY's PLL is disabled and the flag is permanently set on ADL-P. To avoid the spurious timeout messages in dmesg, just remove this wait. Cc: José Roberto de Souza Signed-off-by: Imre Deak Reviewed-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210921002313.1132357-4-imre.deak@intel.com (cherry picked from commit 62e1e308ffd7a867ef82375f3cff7f8789ce6721) Signed-off-by: Chris Chiu --- drivers/gpu/drm/i915/display/intel_tc.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 7dc3696085c7..0d3555437b0b 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -339,11 +339,6 @@ static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port, intel_uncore_write(uncore, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val); - if (!take && wait_for(!tc_phy_status_complete(dig_port), 10)) - drm_dbg_kms(&i915->drm, - "Port %s: PHY complete clear timed out\n", - dig_port->tc_port_name); - return true; } From patchwork Wed Nov 24 10:22:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Chiu X-Patchwork-Id: 1559008 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=R+FH33Pi; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HzcXS6hQwz9t25 for ; Wed, 24 Nov 2021 21:23:03 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1mppQM-0003AV-PT; Wed, 24 Nov 2021 10:22:46 +0000 Received: from smtp-relay-internal-0.internal ([10.131.114.225] helo=smtp-relay-internal-0.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1mppQJ-000390-PY for kernel-team@lists.ubuntu.com; Wed, 24 Nov 2021 10:22:43 +0000 Received: from mail-pf1-f200.google.com (mail-pf1-f200.google.com [209.85.210.200]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 9ADFC3F19E for ; Wed, 24 Nov 2021 10:22:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1637749363; bh=OAXM0TBP3qqivzjAZuwFI9fowuUN/kYeiA0Sq55uai4=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=R+FH33PigbLnCJZyJaMXgLIbItBNom3zxzjc5T/q7cf8yyFA+L8JHEXcivD61/NHT /dnv+MdJYRgReXYoPkYdu4nA1Y441zxFvNJzTmEDBMUi61FvIPuwosiQjxuMn5S3Cv ZSmku4c8ezHP/S8vq9zmgkVem4SWkGVPjpAo142IwYbfROc0F8UfMnTar7ANO5V0Va FkKhEvWxWUt1o7DAUazb4MR0Ci0SZOSbFyH0pGXStEGOHW9NzAyhFsEQJGPR7FSJXG sBTGl4j+fUXZ2t6f5Keu1Mn+VhxztF3cz6t9fzGGTgcJlhaD/qofeFYtu8MbUSx1yI cG+5SgiqgW9gw== Received: by mail-pf1-f200.google.com with SMTP id 4-20020a621604000000b004a4ab765028so1256260pfw.13 for ; Wed, 24 Nov 2021 02:22:43 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OAXM0TBP3qqivzjAZuwFI9fowuUN/kYeiA0Sq55uai4=; b=lRRq55iqcH8Ccu/vFkNiFt0E3bUomykquSqpMdBLBr3XDRdiPCg5jdf7YTpHxBG3Ja 4vRjIn8zZePT2Hqylmyh19QuSzfqUowyumbOC1ekKBQmsBuDIohlPGJ+QgPik0IVVIrk YUqAsnKGuXp+s+UUTfU1YsXNLM94cUzJ/PfKpKk4VScMkjONcbzHygfC1yYTSCAwVvX8 hacF38lynI8oKgeN43eUmTxPvnF6oF+/FoP6n82rs6unD/UhdyQUvHHKdiWyHET0Ca+V ieQ0VeJWYMHLc3kbY7blXpKKegl32e3N+UajFZusSEQON1cejkYv4XtSCvJJGrVwAq1O DrKg== X-Gm-Message-State: AOAM5326lcbdqMvm/mGoIYvv3byvhKv7T4KU7nX8cEeH8zaJpk4U8jyB XX/Qb+SzeiEuJvBafNYi18N2SLn2TsZ5Ef+/MNYDz9RUq55V2qkyZFGuzPumCoFsmfrNzM6uegK QpZyNReu4oPANTdZX1DrkF3IsvPy7E4Y/eHW2iDmk2Q== X-Received: by 2002:a05:6a00:a8b:b0:44d:ef7c:94b9 with SMTP id b11-20020a056a000a8b00b0044def7c94b9mr4784242pfl.36.1637749362038; Wed, 24 Nov 2021 02:22:42 -0800 (PST) X-Google-Smtp-Source: ABdhPJxGSieXqwSSFSU7CpgtiJK36EJkDiQVaWXUpWPYEh+4hI7Q5hxwp62uaqIcCRY2Yq06kOf9fQ== X-Received: by 2002:a05:6a00:a8b:b0:44d:ef7c:94b9 with SMTP id b11-20020a056a000a8b00b0044def7c94b9mr4784200pfl.36.1637749361646; Wed, 24 Nov 2021 02:22:41 -0800 (PST) Received: from localhost.localdomain (111-240-133-170.dynamic-ip.hinet.net. [111.240.133.170]) by smtp.gmail.com with ESMTPSA id 13sm15064724pfp.216.2021.11.24.02.22.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 02:22:41 -0800 (PST) From: Chris Chiu To: kernel-team@lists.ubuntu.com Subject: [PATCH 03/12][SRU][U/OEM-5.14] drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership Date: Wed, 24 Nov 2021 18:22:26 +0800 Message-Id: <20211124102235.447553-4-chris.chiu@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211124102235.447553-1-chris.chiu@canonical.com> References: <20211124102235.447553-1-chris.chiu@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Imre Deak BugLink: https://bugs.launchpad.net/bugs/1952041 On ADL-P the PHY ready/complete flag is always set even in TBT-alt mode. To avoid taking the PHY ownership and the following spurious "PHY sudden disconnect" messages on this platform when connecting the PHY in TBT mode, check if there is any DP-alt or legacy sink connected before taking the ownership. v2: (Jose) - Fix debug message clarifying that a TBT sink can be connected. - Add comments describing the PHY complete HW flag semantic differences between adl-p and other platforms. Cc: José Roberto de Souza Signed-off-by: Imre Deak Reviewed-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210929132833.2253961-2-imre.deak@intel.com (cherry picked from commit 30e114ef4b1620bd6768952279b53ea24e232efb) Signed-off-by: Chris Chiu --- drivers/gpu/drm/i915/display/intel_tc.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 0d3555437b0b..4e5ff823a3a3 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -270,6 +270,14 @@ static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port) return icl_tc_port_live_status_mask(dig_port); } +/* + * Return the PHY status complete flag indicating that display can acquire the + * PHY ownership. The IOM firmware sets this flag when a DP-alt or legacy sink + * is connected and it's ready to switch the ownership to display. The flag + * will be left cleared when a TBT-alt sink is connected, where the PHY is + * owned by the TBT subsystem and so switching the ownership to display is not + * required. + */ static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port) { struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); @@ -288,6 +296,13 @@ static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port) return val & DP_PHY_MODE_STATUS_COMPLETED(dig_port->tc_phy_fia_idx); } +/* + * Return the PHY status complete flag indicating that display can acquire the + * PHY ownership. The IOM firmware sets this flag when it's ready to switch + * the ownership to display, regardless of what sink is connected (TBT-alt, + * DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by the TBT + * subsystem and so switching the ownership to display is not required. + */ static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port) { struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); @@ -424,6 +439,7 @@ static void icl_tc_phy_connect(struct intel_digital_port *dig_port, int required_lanes) { struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); + u32 live_status_mask; int max_lanes; if (!tc_phy_status_complete(dig_port)) { @@ -432,6 +448,13 @@ static void icl_tc_phy_connect(struct intel_digital_port *dig_port, goto out_set_tbt_alt_mode; } + live_status_mask = tc_port_live_status_mask(dig_port); + if (!(live_status_mask & (BIT(TC_PORT_DP_ALT) | BIT(TC_PORT_LEGACY)))) { + drm_dbg_kms(&i915->drm, "Port %s: PHY ownership not required (live status %02x)\n", + dig_port->tc_port_name, live_status_mask); + goto out_set_tbt_alt_mode; + } + if (!tc_phy_take_ownership(dig_port, true) && !drm_WARN_ON(&i915->drm, dig_port->tc_legacy_port)) goto out_set_tbt_alt_mode; From patchwork Wed Nov 24 10:22:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Chiu X-Patchwork-Id: 1559013 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=fyOVhBaL; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HzcXY6sx6z9t25 for ; Wed, 24 Nov 2021 21:23:09 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1mppQS-0003GX-Ng; Wed, 24 Nov 2021 10:22:52 +0000 Received: from smtp-relay-internal-0.internal ([10.131.114.225] helo=smtp-relay-internal-0.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1mppQL-00039P-9d for kernel-team@lists.ubuntu.com; Wed, 24 Nov 2021 10:22:45 +0000 Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id DDECF3F19E for ; Wed, 24 Nov 2021 10:22:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1637749364; bh=6cIUmHuI7uMLtNz2yi/yilGSMkQ2EfP9ORlSAdWwmi0=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=fyOVhBaLhwz6z//q8vYnishyMf6yV1WC5YlFuoz9FoyP4yqA3J2/7wMOZWDxPQk3X 0ovnk2bbdNtsCbEb8wj2uM5VouVzQtviAacghdfyIQxIfXkl5cevS2stTrk1sSoe1a /FM5qDHu95qsf+Em7XEoskrFqWkkQiy9+XmZtHYm7LZJgMhWEFP5bJ+bnvVNW+isSb aNF9Y3dGrztKtkXWIV6krMmw+4PZ264gei8ZKap+ZhdtUP7C2iN8Q0yKZU3J2VTTmQ SwBsss2ixFULhsYQTPVHHHYrhon08iQ11VV2qD+2HQcpJHubYXW7T0/0vx5JyPjzgn LXjJSRAtfF58A== Received: by mail-pj1-f70.google.com with SMTP id hg9-20020a17090b300900b001a6aa0b7d8cso1402064pjb.2 for ; Wed, 24 Nov 2021 02:22:44 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6cIUmHuI7uMLtNz2yi/yilGSMkQ2EfP9ORlSAdWwmi0=; b=qN009InM3gD1HwRKogfeBtwELNkYzZdaJC5DmxpO1yulUERMYN98GxfqCiFc8mjFiV nctCJ5lBhC9Pye4UqqVxRuo6QRcNssB+UK995mcDvJwIHxYc92P0OJVSutD6mG92VjqJ axMVqLFYTeQid/lrxx/7mCrJP9+yLVPBKcvlRAn131ZVcdcf5r0/KYJgHKu1jeBS/nhW HjdOQxAN954CvmQCot1QLupGDkwPQZ0CYSTpo+Deolhf5z0+TfrLu7+cT1dH1qFWWssE yOCFiOTFYmINwCa8Ng+dUFIoz9YcXFrdprkAxam5VQjrs4xBKZXZoKTFG7YmbNOc5/f0 FuPA== X-Gm-Message-State: AOAM531hivqP0lvI1YB5UaJ5FoirIXYI5HMZDriqCVCwctMImCBO2fuq STH+G0JGt2XehDPc0Opr7j72HfPmZ6FPaNNB2O8Ix6T4rEUOZECHlVrE8khog9qYDEp2az7LDuY Dn1+ZHzykxaF2/q8sUQ4hl00gq6gjhawy03iqBcDMJw== X-Received: by 2002:a05:6a00:1594:b0:49f:c5f0:19df with SMTP id u20-20020a056a00159400b0049fc5f019dfmr4649581pfk.70.1637749363096; Wed, 24 Nov 2021 02:22:43 -0800 (PST) X-Google-Smtp-Source: ABdhPJxUIN9MgD9C7oLgsHbgmCGyxt9XG2hWuPn0I/0FcWw9xmKcbsRxs6lF1D+hEqYglkSg3WWFcQ== X-Received: by 2002:a05:6a00:1594:b0:49f:c5f0:19df with SMTP id u20-20020a056a00159400b0049fc5f019dfmr4649552pfk.70.1637749362697; Wed, 24 Nov 2021 02:22:42 -0800 (PST) Received: from localhost.localdomain (111-240-133-170.dynamic-ip.hinet.net. [111.240.133.170]) by smtp.gmail.com with ESMTPSA id 13sm15064724pfp.216.2021.11.24.02.22.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 02:22:42 -0800 (PST) From: Chris Chiu To: kernel-team@lists.ubuntu.com Subject: [PATCH 04/12][SRU][U/OEM-5.14] drm/i915/tc: Add/use helpers to retrieve TypeC port properties Date: Wed, 24 Nov 2021 18:22:27 +0800 Message-Id: <20211124102235.447553-5-chris.chiu@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211124102235.447553-1-chris.chiu@canonical.com> References: <20211124102235.447553-1-chris.chiu@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Imre Deak BugLink: https://bugs.launchpad.net/bugs/1952041 Instead of directly accessing the TypeC port internal struct members, add/use helpers to retrieve the corresponding properties. No functional change. Cc: José Roberto de Souza Signed-off-by: Imre Deak Reviewed-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210921002313.1132357-6-imre.deak@intel.com (backported from commit 11a8970865b49c2a1e714ea3ba910d05fdde6944) [Chris: dg2_ddi_pre_enable_dp for i915/dg2 which cause cherry-pick failure is not required.] Signed-off-by: Chris Chiu --- drivers/gpu/drm/i915/display/intel_ddi.c | 27 +++++++------------ drivers/gpu/drm/i915/display/intel_display.c | 6 +---- .../drm/i915/display/intel_display_power.c | 4 +-- drivers/gpu/drm/i915/display/intel_dp_aux.c | 6 +---- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 5 ++-- drivers/gpu/drm/i915/display/intel_tc.c | 24 +++++++++++++++++ drivers/gpu/drm/i915/display/intel_tc.h | 4 +++ 7 files changed, 45 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 861aa94359cc..485a74ae0545 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -282,7 +282,7 @@ static void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder, if (IS_ALDERLAKE_P(i915) && intel_phy_is_tc(i915, phy)) { intel_dp->DP |= ddi_buf_phy_link_rate(crtc_state->port_clock); - if (dig_port->tc_mode != TC_PORT_TBT_ALT) + if (!intel_tc_port_in_tbt_alt_mode(dig_port)) intel_dp->DP |= DDI_BUF_CTL_TC_PHY_OWNERSHIP; } } @@ -856,8 +856,7 @@ static void intel_ddi_get_power_domains(struct intel_encoder *encoder, dig_port = enc_to_dig_port(encoder); - if (!intel_phy_is_tc(dev_priv, phy) || - dig_port->tc_mode != TC_PORT_TBT_ALT) { + if (!intel_tc_port_in_tbt_alt_mode(dig_port)) { drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref); dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv, dig_port->ddi_io_power_domain); @@ -1271,7 +1270,7 @@ static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder, int n_entries, ln; u32 val; - if (enc_to_dig_port(encoder)->tc_mode == TC_PORT_TBT_ALT) + if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder))) return; ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries); @@ -1408,7 +1407,7 @@ tgl_dkl_phy_ddi_vswing_sequence(struct intel_encoder *encoder, u32 val, dpcnt_mask, dpcnt_val; int n_entries, ln; - if (enc_to_dig_port(encoder)->tc_mode == TC_PORT_TBT_ALT) + if (intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder))) return; ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries); @@ -2218,7 +2217,7 @@ icl_program_mg_dp_mode(struct intel_digital_port *dig_port, u8 width; if (!intel_phy_is_tc(dev_priv, phy) || - dig_port->tc_mode == TC_PORT_TBT_ALT) + intel_tc_port_in_tbt_alt_mode(dig_port)) return; if (DISPLAY_VER(dev_priv) >= 12) { @@ -2243,7 +2242,7 @@ icl_program_mg_dp_mode(struct intel_digital_port *dig_port, switch (pin_assignment) { case 0x0: drm_WARN_ON(&dev_priv->drm, - dig_port->tc_mode != TC_PORT_LEGACY); + !intel_tc_port_in_legacy_mode(dig_port)); if (width == 1) { ln1 |= MG_DP_MODE_CFG_DP_X1_MODE; } else { @@ -2488,7 +2487,6 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state, { struct intel_dp *intel_dp = enc_to_intel_dp(encoder); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - enum phy phy = intel_port_to_phy(dev_priv, encoder->port); struct intel_digital_port *dig_port = enc_to_dig_port(encoder); bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST); int level = intel_ddi_dp_level(intel_dp); @@ -2525,8 +2523,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state, intel_ddi_enable_clock(encoder, crtc_state); /* 5. If IO power is controlled through PWR_WELL_CTL, Enable IO Power */ - if (!intel_phy_is_tc(dev_priv, phy) || - dig_port->tc_mode != TC_PORT_TBT_ALT) { + if (!intel_tc_port_in_tbt_alt_mode(dig_port)) { drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref); dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv, dig_port->ddi_io_power_domain); @@ -2631,7 +2628,6 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state, struct intel_dp *intel_dp = enc_to_intel_dp(encoder); struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); enum port port = encoder->port; - enum phy phy = intel_port_to_phy(dev_priv, port); struct intel_digital_port *dig_port = enc_to_dig_port(encoder); bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST); int level = intel_ddi_dp_level(intel_dp); @@ -2650,8 +2646,7 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state, intel_ddi_enable_clock(encoder, crtc_state); - if (!intel_phy_is_tc(dev_priv, phy) || - dig_port->tc_mode != TC_PORT_TBT_ALT) { + if (!intel_tc_port_in_tbt_alt_mode(dig_port)) { drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref); dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv, dig_port->ddi_io_power_domain); @@ -2820,7 +2815,6 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state, struct intel_dp *intel_dp = &dig_port->dp; bool is_mst = intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST); - enum phy phy = intel_port_to_phy(dev_priv, encoder->port); if (!is_mst) intel_dp_set_infoframes(encoder, false, @@ -2863,8 +2857,7 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state, intel_pps_vdd_on(intel_dp); intel_pps_off(intel_dp); - if (!intel_phy_is_tc(dev_priv, phy) || - dig_port->tc_mode != TC_PORT_TBT_ALT) + if (!intel_tc_port_in_tbt_alt_mode(dig_port)) intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain, fetch_and_zero(&dig_port->ddi_io_wakeref)); @@ -3341,7 +3334,7 @@ intel_ddi_pre_pll_enable(struct intel_atomic_state *state, intel_ddi_main_link_aux_domain(dig_port)); } - if (is_tc_port && dig_port->tc_mode != TC_PORT_TBT_ALT) + if (is_tc_port && !intel_tc_port_in_tbt_alt_mode(dig_port)) /* * Program the lane count for static/dynamic connections on * Type-C ports. Skip this step for TBT. diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index fcbcaf61b8e6..fc4fdfda61e5 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3811,11 +3811,7 @@ enum intel_display_power_domain intel_port_to_power_domain(enum port port) enum intel_display_power_domain intel_aux_power_domain(struct intel_digital_port *dig_port) { - struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); - enum phy phy = intel_port_to_phy(dev_priv, dig_port->base.port); - - if (intel_phy_is_tc(dev_priv, phy) && - dig_port->tc_mode == TC_PORT_TBT_ALT) { + if (intel_tc_port_in_tbt_alt_mode(dig_port)) { switch (dig_port->aux_ch) { case AUX_CH_C: return POWER_DOMAIN_AUX_C_TBT; diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 7f77f53e7de9..00a50dba3380 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -557,7 +557,7 @@ static void icl_tc_port_assert_ref_held(struct drm_i915_private *dev_priv, if (drm_WARN_ON(&dev_priv->drm, !dig_port)) return; - if (DISPLAY_VER(dev_priv) == 11 && dig_port->tc_legacy_port) + if (DISPLAY_VER(dev_priv) == 11 && intel_tc_cold_requires_aux_pw(dig_port)) return; drm_WARN_ON(&dev_priv->drm, !intel_tc_port_ref_held(dig_port)); @@ -626,7 +626,7 @@ icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv, * exit sequence. */ timeout_expected = is_tbt || intel_tc_cold_requires_aux_pw(dig_port); - if (DISPLAY_VER(dev_priv) == 11 && dig_port->tc_legacy_port) + if (DISPLAY_VER(dev_priv) == 11 && intel_tc_cold_requires_aux_pw(dig_port)) icl_tc_cold_exit(dev_priv); hsw_wait_for_power_well_enable(dev_priv, power_well, timeout_expected); diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c index 7c048d2ecf43..eddf6ec432bb 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c @@ -150,9 +150,6 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp, u32 unused) { struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); - struct drm_i915_private *i915 = - to_i915(dig_port->base.base.dev); - enum phy phy = intel_port_to_phy(i915, dig_port->base.port); u32 ret; /* @@ -171,8 +168,7 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp, DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) | DP_AUX_CH_CTL_SYNC_PULSE_SKL(32); - if (intel_phy_is_tc(i915, phy) && - dig_port->tc_mode == TC_PORT_TBT_ALT) + if (intel_tc_port_in_tbt_alt_mode(dig_port)) ret |= DP_AUX_CH_CTL_TBT_IO; return ret; diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index 882bfd499e55..ceea110b6915 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -26,6 +26,7 @@ #include "intel_dpio_phy.h" #include "intel_dpll.h" #include "intel_dpll_mgr.h" +#include "intel_tc.h" /** * DOC: Display PLLs @@ -3532,8 +3533,8 @@ static void icl_update_active_dpll(struct intel_atomic_state *state, enc_to_dig_port(encoder); if (primary_port && - (primary_port->tc_mode == TC_PORT_DP_ALT || - primary_port->tc_mode == TC_PORT_LEGACY)) + (intel_tc_port_in_dp_alt_mode(primary_port) || + intel_tc_port_in_legacy_mode(primary_port))) port_dpll_id = ICL_PORT_DPLL_MG_PHY; icl_set_active_port_dpll(crtc_state, port_dpll_id); diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 4e5ff823a3a3..f9242056693e 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -23,6 +23,30 @@ static const char *tc_port_mode_name(enum tc_port_mode mode) return names[mode]; } +static bool intel_tc_port_in_mode(struct intel_digital_port *dig_port, + enum tc_port_mode mode) +{ + struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); + enum phy phy = intel_port_to_phy(i915, dig_port->base.port); + + return intel_phy_is_tc(i915, phy) && dig_port->tc_mode == mode; +} + +bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port) +{ + return intel_tc_port_in_mode(dig_port, TC_PORT_TBT_ALT); +} + +bool intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port) +{ + return intel_tc_port_in_mode(dig_port, TC_PORT_DP_ALT); +} + +bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port) +{ + return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY); +} + static enum intel_display_power_domain tc_cold_get_power_domain(struct intel_digital_port *dig_port) { diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h index 0c881f645e27..0fdcddb4fc87 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.h +++ b/drivers/gpu/drm/i915/display/intel_tc.h @@ -12,6 +12,10 @@ struct intel_digital_port; struct intel_encoder; +bool intel_tc_port_in_tbt_alt_mode(struct intel_digital_port *dig_port); +bool intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port); +bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port); + bool intel_tc_port_connected(struct intel_encoder *encoder); void intel_tc_port_disconnect_phy(struct intel_digital_port *dig_port); From patchwork Wed Nov 24 10:22:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Chiu X-Patchwork-Id: 1559009 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=g4eJVboU; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HzcXS6k9Sz9t2p for ; Wed, 24 Nov 2021 21:23:03 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1mppQN-0003Ax-4S; Wed, 24 Nov 2021 10:22:47 +0000 Received: from smtp-relay-internal-0.internal ([10.131.114.225] helo=smtp-relay-internal-0.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1mppQL-00039w-Ng for kernel-team@lists.ubuntu.com; Wed, 24 Nov 2021 10:22:45 +0000 Received: from mail-pf1-f198.google.com (mail-pf1-f198.google.com [209.85.210.198]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 7D6AE3F19E for ; Wed, 24 Nov 2021 10:22:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1637749365; bh=iRabhOxifFk2Uotca4fAZIHPEKOAQpK5tFIsJxXmEtQ=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=g4eJVboUR+keQmcJlapi2OzomgwWa8R7B9vJaHK3WUFUOHUXPHRr+YN2oBb7J/I5w UMq6hGOtQJKw/n60kFM/oBQ2Nm24Udx8XvTn/HWQ1S+lvUGR51UP6GOo1blGsBOHaI gmZJrUecBT5EZhnXzmCGE9kuUXIG7mF/O9GXmyArJFckwJAkn0ywpTPSJ/NtkbJDV7 3DMB2wzom5oUCJmADDNXqk+Ss4Ip9GXE46MG2hozZ/sXJGPdBWaRubs2RbyrycBzC7 zrijgSSeUJWGJ2OgavvsTeZsg7HpNMSGxwa6NyxWS9risko9vdHugf8EuZMKxgRT+6 8Hve1PklSi+wA== Received: by mail-pf1-f198.google.com with SMTP id 4-20020a621604000000b004a4ab765028so1256295pfw.13 for ; Wed, 24 Nov 2021 02:22:45 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iRabhOxifFk2Uotca4fAZIHPEKOAQpK5tFIsJxXmEtQ=; b=Ijm/D7aS/Y3PdYv8VHp2Wftj2mGQyTffAW4b6oH8Yildx7HBezsDppB/14FooaUhx0 WjLkkDBlc+8dhsudfwM4t6ekWjCF2/IBJxQ33u/zyu8OG7Ehixg0E3CpLmcXN2GW28Fn pbg/k3MgiYxaOfggcG4KYwk5m0xq/568dIPXB1L6DyNN//mj5caLk2foFh62mVSHzGfR 5rpU9gF1M1FcJ/bjrTV10JgSnTL/wwSinBL87rAUUMzKsxiEoVu9KHeqS39XqlXjSWx4 B6WpLi/PK2VF1aUD7/p4kDE2CRq2qVUJ3s2Sb5sUwbB4nSahLAduBYiuocbDMu5OOxgC KuUg== X-Gm-Message-State: AOAM532FZuibWfTIY9JHP6WFqGIG1hjaClKLARmjPszmi5pKkPCZqhhJ 5WXryc/ofaaM97P1siLx+wvqSMRgoCcBoMLxZPp+unO/U+zggmyZF6P25ZE4RRhg3TKgeR0/lkq Tcbf4WFqNkFdzACiarqY6b9i2NQIwGq53rMaBtnOdJg== X-Received: by 2002:a05:6a00:244d:b0:44d:c279:5155 with SMTP id d13-20020a056a00244d00b0044dc2795155mr4715601pfj.0.1637749363956; Wed, 24 Nov 2021 02:22:43 -0800 (PST) X-Google-Smtp-Source: ABdhPJxigPd+06jAjfGQX82DRDcsqu+9+Hj4L97piuVDMoyphHCaOKiENDQ+7BepyfwQ+S9iRv5dOg== X-Received: by 2002:a05:6a00:244d:b0:44d:c279:5155 with SMTP id d13-20020a056a00244d00b0044dc2795155mr4715574pfj.0.1637749363628; Wed, 24 Nov 2021 02:22:43 -0800 (PST) Received: from localhost.localdomain (111-240-133-170.dynamic-ip.hinet.net. [111.240.133.170]) by smtp.gmail.com with ESMTPSA id 13sm15064724pfp.216.2021.11.24.02.22.42 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 02:22:43 -0800 (PST) From: Chris Chiu To: kernel-team@lists.ubuntu.com Subject: [PATCH 05/12][SRU][U/OEM-5.14] drm/i915/tc: Don't keep legacy TypeC ports in connected state w/o a sink Date: Wed, 24 Nov 2021 18:22:28 +0800 Message-Id: <20211124102235.447553-6-chris.chiu@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211124102235.447553-1-chris.chiu@canonical.com> References: <20211124102235.447553-1-chris.chiu@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Imre Deak BugLink: https://bugs.launchpad.net/bugs/1952041 A follow-up patch will disconnect/reconnect PHYs around AUX transfers and modeset enable/disables. To prepare for that and make things consistent for all TypeC modes stop connecting the PHY in legacy mode without a sink being connected. This was done before since in legacy mode the PHY is dedicated to display usage, so there was no point in disconnecting it. However after the follow-up changes the TC-cold blocking power domains will be held as long as the PHY is in the connected state, so we'll need to disconnect/re-connect the PHY in all TypeC modes to allow for power saving. Cc: José Roberto de Souza Signed-off-by: Imre Deak Reviewed-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210921002313.1132357-7-imre.deak@intel.com (cherry picked from commit 675d23c14821fbaef3df5cbad94b42ec2e3a858a) Signed-off-by: Chris Chiu --- drivers/gpu/drm/i915/display/intel_tc.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index f9242056693e..6d0a1b376767 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -527,8 +527,6 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port) { switch (dig_port->tc_mode) { case TC_PORT_LEGACY: - /* Nothing to do, we never disconnect from legacy mode */ - break; case TC_PORT_DP_ALT: tc_phy_take_ownership(dig_port, false); dig_port->tc_mode = TC_PORT_TBT_ALT; @@ -596,9 +594,7 @@ intel_tc_port_get_target_mode(struct intel_digital_port *dig_port) if (live_status_mask) return fls(live_status_mask) - 1; - return tc_phy_status_complete(dig_port) && - dig_port->tc_legacy_port ? TC_PORT_LEGACY : - TC_PORT_TBT_ALT; + return TC_PORT_TBT_ALT; } static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port, @@ -659,14 +655,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port) "Port %s: PHY disconnected with %d active link(s)\n", dig_port->tc_port_name, active_links); intel_tc_port_link_init_refcount(dig_port, active_links); - - goto out; } - if (dig_port->tc_legacy_port) - icl_tc_phy_connect(dig_port, 1); - -out: drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n", dig_port->tc_port_name, tc_port_mode_name(dig_port->tc_mode)); From patchwork Wed Nov 24 10:22:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Chiu X-Patchwork-Id: 1559012 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=jvFgtjVu; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HzcXZ0MMkz9t2p for ; Wed, 24 Nov 2021 21:23:10 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1mppQU-0003Hz-Hz; Wed, 24 Nov 2021 10:22:54 +0000 Received: from smtp-relay-internal-0.internal ([10.131.114.225] helo=smtp-relay-internal-0.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1mppQM-0003Aa-UO for kernel-team@lists.ubuntu.com; Wed, 24 Nov 2021 10:22:46 +0000 Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 9FA863F19E for ; Wed, 24 Nov 2021 10:22:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1637749366; bh=svBh3/WkZ06y9WpRoQSmeR8rS9YfkW6UZ6QnEJQIpQg=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=jvFgtjVuyILWtcr0RuPB63nMQ5cHx3nkHGnbMFik6UQ+koEENvJ8RJlI904wGuZIm ijIKoARI+bNUBPi0RxMYPBSQGGVoAL2Kd1Pc5wF4q3/Bru93olmW6b9t+0S7BwZSR8 7B2VlZEmq5Ihu3sNFSCDUt7npXv/uiTATUaKtNrmWSVfJLoj12NSTb94l8WRNXWbF9 iOkOKmwFNNTsX1y0Yr3apUr9G1O9ut8EOWFhtY8AmrgZpIHlCkTwy28fwAHuqQg01i jtxaO1DjsXoD7mbJF0/0qwD5njsVlQZ2eCXpkJFz2ySvJ0aLaqUWAicJTlgBPceLKn h2MrmGhoZh1WQ== Received: by mail-pj1-f70.google.com with SMTP id lt10-20020a17090b354a00b001a649326aedso3109381pjb.5 for ; Wed, 24 Nov 2021 02:22:46 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=svBh3/WkZ06y9WpRoQSmeR8rS9YfkW6UZ6QnEJQIpQg=; b=MF03cVBErnU5eJrCspkoQOujUUj2VYNXQMBFX7JXX1xFXd6iLIPXosgdONJ58RE9jm iQb1piYDxiK+zQo6NL9omAPdN1d31rUhXvvkEJJcjtA5Vfn179mWShdRyia2pWV8E5Vq MNB6FNaetw4/3PqGD2f0Z0wBeIVzgrpGGisQtDfhi8bCZ3rlLvXbqR22LxzPv3TU+mdP Z917xtTNO/WZX+EdoOl1WCQIzXmOYuP8Q3YvtrIYD4raoUfS410qSbiMBuEULGUuT9uM 9K1Q7NrcrCv3piUK+8fpFfMqZnlXhyV3sPBuPayjfsiXgkBbaFksolfHf5fwCDf5XLVE W8DQ== X-Gm-Message-State: AOAM530KSzxRO3cCaBFVZu9HpWQufNDzbFIPv4tQJqQjWbVjEz0K10Ju KmGdN6kzHbGeyTJZ91jyIauvuT5nLajBgf7QD+jd8Y1y56NHF5qD5f8Ax8C7FZ5umS9DGaYohe2 QNTZTHIHVXHJawl1dL7t97DzMBy1SALm9DK6x7tGMLg== X-Received: by 2002:a17:902:8f93:b0:142:8731:1a5d with SMTP id z19-20020a1709028f9300b0014287311a5dmr16622159plo.60.1637749365102; Wed, 24 Nov 2021 02:22:45 -0800 (PST) X-Google-Smtp-Source: ABdhPJymysO/+8ikKbZK2DNGnZTLx0OIfXb6HjD0Eg2J0Icq1La0WpJhxJvwSCFRKhT04gZMg4cxKg== X-Received: by 2002:a17:902:8f93:b0:142:8731:1a5d with SMTP id z19-20020a1709028f9300b0014287311a5dmr16622116plo.60.1637749364807; Wed, 24 Nov 2021 02:22:44 -0800 (PST) Received: from localhost.localdomain (111-240-133-170.dynamic-ip.hinet.net. [111.240.133.170]) by smtp.gmail.com with ESMTPSA id 13sm15064724pfp.216.2021.11.24.02.22.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 02:22:44 -0800 (PST) From: Chris Chiu To: kernel-team@lists.ubuntu.com Subject: [PATCH 06/12][SRU][U/OEM-5.14] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state Date: Wed, 24 Nov 2021 18:22:29 +0800 Message-Id: <20211124102235.447553-7-chris.chiu@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211124102235.447553-1-chris.chiu@canonical.com> References: <20211124102235.447553-1-chris.chiu@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Imre Deak BugLink: https://bugs.launchpad.net/bugs/1952041 A follow-up change will start to disconnect/re-connect PHYs around AUX transfers and modeset enable/disables. To prepare for that add a new TypeC PHY disconnected mode, to help tracking the TC-cold blocking power domain status (no power domain in disconnected state, mode dependent power domain in connected state). v2: Move the !disconnected mode and phy-owned asserts in __intel_tc_port_lock() later in the patchset, when the asserts will hold. (Jose) Cc: José Roberto de Souza Signed-off-by: Imre Deak Reviewed-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210929132833.2253961-3-imre.deak@intel.com (cherry picked from commit 64851a32c463e5412561de67764d6fdc074bd193) Signed-off-by: Chris Chiu --- drivers/gpu/drm/i915/display/intel_display.h | 1 + drivers/gpu/drm/i915/display/intel_tc.c | 22 +++++++++++++------- 2 files changed, 15 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index c9dbaf074d77..3f1424f8263c 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -270,6 +270,7 @@ enum tc_port { }; enum tc_port_mode { + TC_PORT_DISCONNECTED, TC_PORT_TBT_ALT, TC_PORT_DP_ALT, TC_PORT_LEGACY, diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 6d0a1b376767..62a3070abf0a 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -12,13 +12,14 @@ static const char *tc_port_mode_name(enum tc_port_mode mode) { static const char * const names[] = { + [TC_PORT_DISCONNECTED] = "disconnected", [TC_PORT_TBT_ALT] = "tbt-alt", [TC_PORT_DP_ALT] = "dp-alt", [TC_PORT_LEGACY] = "legacy", }; if (WARN_ON(mode >= ARRAY_SIZE(names))) - mode = TC_PORT_TBT_ALT; + mode = TC_PORT_DISCONNECTED; return names[mode]; } @@ -529,10 +530,11 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port) case TC_PORT_LEGACY: case TC_PORT_DP_ALT: tc_phy_take_ownership(dig_port, false); - dig_port->tc_mode = TC_PORT_TBT_ALT; - break; + fallthrough; case TC_PORT_TBT_ALT: - /* Nothing to do, we stay in TBT-alt mode */ + dig_port->tc_mode = TC_PORT_DISCONNECTED; + fallthrough; + case TC_PORT_DISCONNECTED: break; default: MISSING_CASE(dig_port->tc_mode); @@ -637,31 +639,34 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port) { struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); struct intel_encoder *encoder = &dig_port->base; - intel_wakeref_t tc_cold_wref; int active_links = 0; mutex_lock(&dig_port->tc_lock); - tc_cold_wref = tc_cold_block(dig_port); - dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port); if (dig_port->dp.is_mst) active_links = intel_dp_mst_encoder_active_links(dig_port); else if (encoder->base.crtc) active_links = to_intel_crtc(encoder->base.crtc)->active; + drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED); if (active_links) { + intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port); + + dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port); + if (!icl_tc_phy_is_connected(dig_port)) drm_dbg_kms(&i915->drm, "Port %s: PHY disconnected with %d active link(s)\n", dig_port->tc_port_name, active_links); intel_tc_port_link_init_refcount(dig_port, active_links); + + tc_cold_unblock(dig_port, tc_cold_wref); } drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n", dig_port->tc_port_name, tc_port_mode_name(dig_port->tc_mode)); - tc_cold_unblock(dig_port, tc_cold_wref); mutex_unlock(&dig_port->tc_lock); } @@ -832,6 +837,7 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy) mutex_init(&dig_port->tc_lock); dig_port->tc_legacy_port = is_legacy; + dig_port->tc_mode = TC_PORT_DISCONNECTED; dig_port->tc_link_refcount = 0; tc_port_load_fia_params(i915, dig_port); } From patchwork Wed Nov 24 10:22:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Chiu X-Patchwork-Id: 1559016 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=JvXAoz1+; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HzcXj13Sgz9t2p for ; Wed, 24 Nov 2021 21:23:16 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1mppQa-0003PW-Nu; Wed, 24 Nov 2021 10:23:00 +0000 Received: from smtp-relay-internal-1.internal ([10.131.114.114] helo=smtp-relay-internal-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1mppQN-0003Bd-QB for kernel-team@lists.ubuntu.com; Wed, 24 Nov 2021 10:22:47 +0000 Received: from mail-pj1-f69.google.com (mail-pj1-f69.google.com [209.85.216.69]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 8BC9F3F32E for ; Wed, 24 Nov 2021 10:22:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1637749367; bh=fIcAif8Lds1YqvF/hL2uakY02H6SmCOin4UAs1h3c3U=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=JvXAoz1+On0P69Fti4SzpjXKLPBcqnunwvxW09bVArFoXvFkQoQDuh5AGLt5xRmDf 0u+7cznX7Lrq6pvE3pI2PbhHEN1Kh+90BahkER9XrKAYxsOrd6t4DyQyQRBAYqevvq EzQ1mjsaOiFDs9xUKulecedrEApja3FeiNbVlkxKPZQFa1QcAbh5OquNj+StKAuKlc SP0O9luKNN9/nVbYCpz9Kd1UD74BrwCrrA5nlrZcpcIxPlaGm3Vwn+IDB9Fa8I1hlh gkBxEvzWhOTbWe4N88ys/nc8cQ0zizWn9CTIHcopd8F8TademeOjkkcueIPBlkmbav 9N+2+k4K2goaQ== Received: by mail-pj1-f69.google.com with SMTP id bf17-20020a17090b0b1100b001a634dbd737so3101999pjb.9 for ; Wed, 24 Nov 2021 02:22:47 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fIcAif8Lds1YqvF/hL2uakY02H6SmCOin4UAs1h3c3U=; b=3qQaMiAZz9WqVBxwn0Y12HX4SiZgLtT1DEYrBOYVNRNAmxtOwj0rjl4vkb2fkePbhh 1WPgBdOcTB13A0a7Qm780ockNPLgb5ZIlDYUcOJM7jcnKXxGDloG6XRlb8pP/Q2SX56l fxMAvWikZ7mX/aSnpiNecr+sHEFd3rQX0RmnU54piy0QSChGdev7vdOPKtFy80odXteh RC1OlYEt31diHRtaWMPMKlKa6rIiEm9u0EjNoTHX9MbPyDasw31crP4TzhvCmXBdc6PC 47Uj/HeR3p/VyZaBIkLkSvgYEeqwjwDbx7kEZ9Ghp4G6d1BzWBOUZEwIxxNxkd6hROts VhAg== X-Gm-Message-State: AOAM532MJGwEXKRMwwMFT+JdwMjQLanXPiqiWPenUDWksqEc1deyDlDN qvHsBnoL36FCDr7ymAcekpNiWdn/IuRUxZC+9X8bWlZmwNNEQkBC7GKc+osWkBqZ66FwBa8fw/K mlhUghEz2wZDT/VHNoHSMoR/tOMCLo7Kd7dcNEmPJUw== X-Received: by 2002:a17:90b:1d90:: with SMTP id pf16mr13620200pjb.93.1637749366043; Wed, 24 Nov 2021 02:22:46 -0800 (PST) X-Google-Smtp-Source: ABdhPJwZoLL9O0aUNSUSMxw9DSPeOfX2L5LotfWePYzEcV0H0zhhfhrrA3BIplFudyUEs3aKZSzZzg== X-Received: by 2002:a17:90b:1d90:: with SMTP id pf16mr13620169pjb.93.1637749365730; Wed, 24 Nov 2021 02:22:45 -0800 (PST) Received: from localhost.localdomain (111-240-133-170.dynamic-ip.hinet.net. [111.240.133.170]) by smtp.gmail.com with ESMTPSA id 13sm15064724pfp.216.2021.11.24.02.22.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 02:22:45 -0800 (PST) From: Chris Chiu To: kernel-team@lists.ubuntu.com Subject: [PATCH 07/12][SRU][U/OEM-5.14] drm/i915/tc: Refactor TC-cold block/unblock helpers Date: Wed, 24 Nov 2021 18:22:30 +0800 Message-Id: <20211124102235.447553-8-chris.chiu@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211124102235.447553-1-chris.chiu@canonical.com> References: <20211124102235.447553-1-chris.chiu@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Imre Deak BugLink: https://bugs.launchpad.net/bugs/1952041 A follow-up change will select the TC-cold blocking power domain based on the TypeC mode, prepare for that here. Also bring intel_tc_cold_requires_aux_pw() earlier to its logical place for readability. No functional change. v2: Add code comment about IOM reg accesses in TCCOLD. (Jose) Cc: José Roberto de Souza Signed-off-by: Imre Deak Reviewed-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210929132833.2253961-4-imre.deak@intel.com (cherry picked from commit d0bc677056bd9de6eb731dd8bff889a5fe36e381) Signed-off-by: Chris Chiu --- .../drm/i915/display/intel_display_types.h | 2 + drivers/gpu/drm/i915/display/intel_tc.c | 68 ++++++++++++------- 2 files changed, 44 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 118da8eeaffc..025c58c2f47c 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1651,8 +1651,10 @@ struct intel_digital_port { enum intel_display_power_domain ddi_io_power_domain; intel_wakeref_t ddi_io_wakeref; intel_wakeref_t aux_wakeref; + struct mutex tc_lock; /* protects the TypeC port mode */ intel_wakeref_t tc_lock_wakeref; + enum intel_display_power_domain tc_lock_power_domain; int tc_link_refcount; bool tc_legacy_port:1; char tc_port_name[8]; diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 62a3070abf0a..69c917fce03e 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -48,8 +48,16 @@ bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port) return intel_tc_port_in_mode(dig_port, TC_PORT_LEGACY); } +bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port) +{ + struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); + + return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) || + IS_ALDERLAKE_P(i915); +} + static enum intel_display_power_domain -tc_cold_get_power_domain(struct intel_digital_port *dig_port) +tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode) { if (intel_tc_cold_requires_aux_pw(dig_port)) return intel_legacy_aux_to_power_domain(dig_port->aux_ch); @@ -58,23 +66,30 @@ tc_cold_get_power_domain(struct intel_digital_port *dig_port) } static intel_wakeref_t -tc_cold_block(struct intel_digital_port *dig_port) +tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mode, + enum intel_display_power_domain *domain) { struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - enum intel_display_power_domain domain; if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port) return 0; - domain = tc_cold_get_power_domain(dig_port); - return intel_display_power_get(i915, domain); + *domain = tc_cold_get_power_domain(dig_port, mode); + + return intel_display_power_get(i915, *domain); +} + +static intel_wakeref_t +tc_cold_block(struct intel_digital_port *dig_port, enum intel_display_power_domain *domain) +{ + return tc_cold_block_in_mode(dig_port, dig_port->tc_mode, domain); } static void -tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref) +tc_cold_unblock(struct intel_digital_port *dig_port, enum intel_display_power_domain domain, + intel_wakeref_t wakeref) { struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - enum intel_display_power_domain domain; /* * wakeref == -1, means some error happened saving save_depot_stack but @@ -84,8 +99,7 @@ tc_cold_unblock(struct intel_digital_port *dig_port, intel_wakeref_t wakeref) if (wakeref == 0) return; - domain = tc_cold_get_power_domain(dig_port); - intel_display_power_put_async(i915, domain, wakeref); + intel_display_power_put(i915, domain, wakeref); } static void @@ -98,7 +112,8 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port) return; enabled = intel_display_power_is_enabled(i915, - tc_cold_get_power_domain(dig_port)); + tc_cold_get_power_domain(dig_port, + dig_port->tc_mode)); drm_WARN_ON(&i915->drm, !enabled); } @@ -269,6 +284,11 @@ static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port) struct intel_uncore *uncore = &i915->uncore; u32 val, mask = 0; + /* + * On ADL-P HW/FW will wake from TCCOLD to complete the read access of + * registers in IOM. Note that this doesn't apply to PHY and FIA + * registers. + */ val = intel_uncore_read(uncore, TCSS_DDI_STATUS(tc_port)); if (val & TCSS_DDI_STATUS_HPD_LIVE_STATUS_ALT) mask |= BIT(TC_PORT_DP_ALT); @@ -650,7 +670,8 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port) drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED); if (active_links) { - intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port); + enum intel_display_power_domain domain; + intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain); dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port); @@ -660,7 +681,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port) dig_port->tc_port_name, active_links); intel_tc_port_link_init_refcount(dig_port, active_links); - tc_cold_unblock(dig_port, tc_cold_wref); + tc_cold_unblock(dig_port, domain, tc_cold_wref); } drm_dbg_kms(&i915->drm, "Port %s: sanitize mode (%s)\n", @@ -689,15 +710,16 @@ bool intel_tc_port_connected(struct intel_encoder *encoder) { struct intel_digital_port *dig_port = enc_to_dig_port(encoder); bool is_connected; + enum intel_display_power_domain domain; intel_wakeref_t tc_cold_wref; intel_tc_port_lock(dig_port); - tc_cold_wref = tc_cold_block(dig_port); + tc_cold_wref = tc_cold_block(dig_port, &domain); is_connected = tc_port_live_status_mask(dig_port) & BIT(dig_port->tc_mode); - tc_cold_unblock(dig_port, tc_cold_wref); + tc_cold_unblock(dig_port, domain, tc_cold_wref); intel_tc_port_unlock(dig_port); return is_connected; @@ -714,15 +736,16 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port, mutex_lock(&dig_port->tc_lock); if (!dig_port->tc_link_refcount) { + enum intel_display_power_domain domain; intel_wakeref_t tc_cold_wref; - tc_cold_wref = tc_cold_block(dig_port); + tc_cold_wref = tc_cold_block(dig_port, &domain); if (force_disconnect || intel_tc_port_needs_reset(dig_port)) intel_tc_port_reset_mode(dig_port, required_lanes, force_disconnect); - tc_cold_unblock(dig_port, tc_cold_wref); + tc_cold_unblock(dig_port, domain, tc_cold_wref); } drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref); @@ -787,6 +810,7 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port) static bool tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig_port) { + enum intel_display_power_domain domain; intel_wakeref_t wakeref; u32 val; @@ -794,9 +818,9 @@ tc_has_modular_fia(struct drm_i915_private *i915, struct intel_digital_port *dig return false; mutex_lock(&dig_port->tc_lock); - wakeref = tc_cold_block(dig_port); + wakeref = tc_cold_block(dig_port, &domain); val = intel_uncore_read(&i915->uncore, PORT_TX_DFLEXDPSP(FIA1)); - tc_cold_unblock(dig_port, wakeref); + tc_cold_unblock(dig_port, domain, wakeref); mutex_unlock(&dig_port->tc_lock); drm_WARN_ON(&i915->drm, val == 0xffffffff); @@ -841,11 +865,3 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy) dig_port->tc_link_refcount = 0; tc_port_load_fia_params(i915, dig_port); } - -bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port) -{ - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - - return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) || - IS_ALDERLAKE_P(i915); -} From patchwork Wed Nov 24 10:22:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Chiu X-Patchwork-Id: 1559011 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=nUFMDW1b; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HzcXW1ZQ5z9t54 for ; Wed, 24 Nov 2021 21:23:06 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1mppQQ-0003E0-GT; Wed, 24 Nov 2021 10:22:50 +0000 Received: from smtp-relay-internal-1.internal ([10.131.114.114] helo=smtp-relay-internal-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1mppQO-0003CT-Q5 for kernel-team@lists.ubuntu.com; Wed, 24 Nov 2021 10:22:48 +0000 Received: from mail-pj1-f71.google.com (mail-pj1-f71.google.com [209.85.216.71]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 91B783F32E for ; Wed, 24 Nov 2021 10:22:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1637749368; bh=jf7BgkHRsLOGEF0YH305pNZP/Ulog0iHMU8q0YqD6GA=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=nUFMDW1b9Gw4fbPKYNSlHiw2scGoUp1+zTXeA49N2H91Xt9C2JyMH/FlwVOgsXdY8 /ODW4HQoi+ZpodqxGnzWy0/5t7jb80ljdFh2Wb5kTYA1sm1a2cmIMKqMy2YVBhbyCM 0nttyprt7qKxmwce+hJTfPnx+twy9SbLpUfKKwsylE3MVqL1ZX4JW88xC6XYj0nLhJ iXlhscjcIMNmc/LhPazw9LytRlk/YCViwaRecqtRnaVA+cwZzr0fxKLNAOeqTxuzbl 3fFoyQmCu7Li4iBgtoyPMkvodDW/16k4Cqek0U+XRXsAGil0md8zqWyfVJTMTAs9j7 MPwMUT7CgwIpg== Received: by mail-pj1-f71.google.com with SMTP id bf17-20020a17090b0b1100b001a634dbd737so3102013pjb.9 for ; Wed, 24 Nov 2021 02:22:48 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jf7BgkHRsLOGEF0YH305pNZP/Ulog0iHMU8q0YqD6GA=; b=C6tZFQqP16VrJnfhMv+sUzO9sX3WJQu8O/yGPpMa2YNTlT2uCzN4amxMZ4MI4Pt9TL ojI+V3si1GbNxb+pSvEKhgZOgKewbf04kwmPA2inDX0Q7oc8eppaTbQ4qlJFd5LVVybV Jkt7vvyZ9DcHNGMHMMCT9THS56+um51ttdqd8T/gX7YKoCxD3+IRzfYiekLuSCIcG0wr 8LOGedElsncqNmmHLF+pEgH+7GqixGYMKWKFu8d/0XalGhwTI/Uzdi1EIAE1Wo88gmGD U1duOy9d+aez6VyEYhfHhQjZY/+/FxG4Gh+Yw7anWu5Khp2DBJxscVcIix3/bKuvKtic sOQQ== X-Gm-Message-State: AOAM530PeJSHmcOemXRGFj+pNJqMFl+fe/BJZTAQSI6dYx/n2zEkJcPY vbVvuuDTMJP8oUtZ+4D6R0zaOhe7xdoxNstJGvvenSO9H8rdv2z6FFsago+qqNUJGNDLewMv1Rb 4gUbWdqHTsc3UQrS3W1lcn3DiHrMZLqtgaUXpvsEdaw== X-Received: by 2002:a17:902:8696:b0:143:d007:4159 with SMTP id g22-20020a170902869600b00143d0074159mr16716508plo.86.1637749367058; Wed, 24 Nov 2021 02:22:47 -0800 (PST) X-Google-Smtp-Source: ABdhPJyLDnA1vi1D9m0KVQcgG5xns7Ld4w7yhiI5KAaHha/HqQOk0TDkXC5u1BSOScEdm61WShzVkA== X-Received: by 2002:a17:902:8696:b0:143:d007:4159 with SMTP id g22-20020a170902869600b00143d0074159mr16716464plo.86.1637749366682; Wed, 24 Nov 2021 02:22:46 -0800 (PST) Received: from localhost.localdomain (111-240-133-170.dynamic-ip.hinet.net. [111.240.133.170]) by smtp.gmail.com with ESMTPSA id 13sm15064724pfp.216.2021.11.24.02.22.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 02:22:46 -0800 (PST) From: Chris Chiu To: kernel-team@lists.ubuntu.com Subject: [PATCH 08/12][SRU][U/OEM-5.14] drm/i915/tc: Avoid using legacy AUX PW in TBT mode Date: Wed, 24 Nov 2021 18:22:31 +0800 Message-Id: <20211124102235.447553-9-chris.chiu@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211124102235.447553-1-chris.chiu@canonical.com> References: <20211124102235.447553-1-chris.chiu@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Imre Deak BugLink: https://bugs.launchpad.net/bugs/1952041 For the ADL-P TBT mode the spec doesn't require blocking TC-cold by using the legacy AUX power domain. To avoid the timeouts that this would cause during PHY disconnect/reconnect sequences (which will be more frequent after a follow-up change) use the TC_COLD_OFF power domain in TBT mode on all platforms. On TGL this power domain blocks TC-cold via a PUNIT command, while on other platforms the domain just takes a runtime PM reference. If the HPD live status indicates that the port mode needs to be reset - for instance after switching from TBT to a DP-alt sink - still take the AUX domain, since the IOM firmware handshake requires this. v2: Rebased on v2 of the previous patch. Cc: José Roberto de Souza Signed-off-by: Imre Deak Reviewed-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210929132833.2253961-5-imre.deak@intel.com (cherry picked from commit 8e8289a00e6360e0b340db05b7e16dfb5e7be067) Signed-off-by: Chris Chiu --- drivers/gpu/drm/i915/display/intel_tc.c | 55 ++++++++++++++++--------- 1 file changed, 36 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 69c917fce03e..2df4d0beb636 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -59,10 +59,10 @@ bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port) static enum intel_display_power_domain tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode) { - if (intel_tc_cold_requires_aux_pw(dig_port)) - return intel_legacy_aux_to_power_domain(dig_port->aux_ch); - else + if (mode == TC_PORT_TBT_ALT || !intel_tc_cold_requires_aux_pw(dig_port)) return POWER_DOMAIN_TC_COLD_OFF; + + return intel_legacy_aux_to_power_domain(dig_port->aux_ch); } static intel_wakeref_t @@ -645,6 +645,36 @@ static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port, tc_port_mode_name(dig_port->tc_mode)); } +static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port) +{ + return intel_tc_port_get_target_mode(dig_port) != dig_port->tc_mode; +} + +static void intel_tc_port_update_mode(struct intel_digital_port *dig_port, + int required_lanes, bool force_disconnect) +{ + enum intel_display_power_domain domain; + intel_wakeref_t wref; + bool needs_reset = force_disconnect; + + if (!needs_reset) { + /* Get power domain required to check the hotplug live status. */ + wref = tc_cold_block(dig_port, &domain); + needs_reset = intel_tc_port_needs_reset(dig_port); + tc_cold_unblock(dig_port, domain, wref); + } + + if (!needs_reset) + return; + + /* Get power domain required for resetting the mode. */ + wref = tc_cold_block_in_mode(dig_port, TC_PORT_DISCONNECTED, &domain); + + intel_tc_port_reset_mode(dig_port, required_lanes, force_disconnect); + + tc_cold_unblock(dig_port, domain, wref); +} + static void intel_tc_port_link_init_refcount(struct intel_digital_port *dig_port, int refcount) @@ -691,11 +721,6 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port) mutex_unlock(&dig_port->tc_lock); } -static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port) -{ - return intel_tc_port_get_target_mode(dig_port) != dig_port->tc_mode; -} - /* * The type-C ports are different because even when they are connected, they may * not be available/usable by the graphics driver: see the comment on @@ -735,18 +760,10 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port, mutex_lock(&dig_port->tc_lock); - if (!dig_port->tc_link_refcount) { - enum intel_display_power_domain domain; - intel_wakeref_t tc_cold_wref; - - tc_cold_wref = tc_cold_block(dig_port, &domain); - if (force_disconnect || intel_tc_port_needs_reset(dig_port)) - intel_tc_port_reset_mode(dig_port, required_lanes, - force_disconnect); - - tc_cold_unblock(dig_port, domain, tc_cold_wref); - } + if (!dig_port->tc_link_refcount) + intel_tc_port_update_mode(dig_port, required_lanes, + force_disconnect); drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref); dig_port->tc_lock_wakeref = wakeref; From patchwork Wed Nov 24 10:22:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Chiu X-Patchwork-Id: 1559014 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=CIt6NsbP; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HzcXb36Jpz9t25 for ; Wed, 24 Nov 2021 21:23:11 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1mppQV-0003Jb-Hy; Wed, 24 Nov 2021 10:22:55 +0000 Received: from smtp-relay-internal-1.internal ([10.131.114.114] helo=smtp-relay-internal-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1mppQQ-0003DU-6e for kernel-team@lists.ubuntu.com; Wed, 24 Nov 2021 10:22:50 +0000 Received: from mail-pl1-f198.google.com (mail-pl1-f198.google.com [209.85.214.198]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 029923F32E for ; Wed, 24 Nov 2021 10:22:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1637749370; bh=XJYw34m5+hdt9ibYFIVJJJLRXJcZ6X0qXM8FeCSJ31Y=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=CIt6NsbPmInAULfJ8Do8UcWqYe1iGxi40tgrYLc0pUo43teJ6Qj39u2cnVvaWLRLx dHzZ1hg8qCi2FMXWuYYx6l6iBtbVkwYhzw46OzSwA1yHFnG8IJ+GQz9rgHch6W05+v 1o2k1Ye1siHnwm1eeeLRwY9CgTzTOJAm3GYgq9cQ6sRTl6Hw1sdwQEZGoCfHRPOMxv +tTnXKHU8aF91N0jv6o/vcmq1Yzl2fPiG0F+3V+TEv8WzihSm3tn8rhbiWBB5q3Pk7 NCjFyi3jsWzYLYDq0wYZlpp7chH5gU+PAsxWlZ1D9dKn4gRcnyN/xM7dXLwGHOGSR7 BwViQwcvJAUeQ== Received: by mail-pl1-f198.google.com with SMTP id l14-20020a170903120e00b00143cc292bc3so560966plh.1 for ; Wed, 24 Nov 2021 02:22:49 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XJYw34m5+hdt9ibYFIVJJJLRXJcZ6X0qXM8FeCSJ31Y=; b=A3hFW6dYyDbpECcA32NmMeQZNYAklbl0K7E5UR1op50mutwNDE9r28ktrjGPpueDKA zmC/42W5R4Ic4Ht0f745UJlXQg7mcShWU/2OdedSW+4ZKlLb1evJtAL3lwOE7Gd9KKrZ cNRJb8GkSKIdXsovJwQHkL0zFxpaRTjLY2DXDK3vYkjkTsmRFfpqbaT2MEaM+hp0BKjv ZLBVfCQCtfy/clkzksqHXXGJ7iyLcTItg3Uo/5qpLJFDuGVwcbrLj3dOfdQHOSn0TUoO XK1hHJ+j7yM3LooxYT2ctfw2KywKQOdZVTj1ehd8nj5RUpDBS108gwgC4/rz+sU4ZAWm Nciw== X-Gm-Message-State: AOAM532UD08qgBZ+e40SnumPOn4PWbuhg5LvxBG4l7PKGquySaF0iOX6 iB8XFuEJaCr5H0L0iU2vJM2Zd5IZKcTiGn6IiDDvoWLHIxqWarmVG1duK40m6Pb2kGmpNE54Xq5 lEqDALOE18URa9hmCSJ19lkih5NMKNZAN0L6Ji+nQzA== X-Received: by 2002:a17:902:c404:b0:142:28c5:5416 with SMTP id k4-20020a170902c40400b0014228c55416mr17141342plk.62.1637749368011; Wed, 24 Nov 2021 02:22:48 -0800 (PST) X-Google-Smtp-Source: ABdhPJzI6B0a3CXVI/j4j+BBe1CCMrXc0WdZ9p6632h+tFYO48YwyO/5DAI94udwbbT9VhSBbFAchA== X-Received: by 2002:a17:902:c404:b0:142:28c5:5416 with SMTP id k4-20020a170902c40400b0014228c55416mr17141294plk.62.1637749367692; Wed, 24 Nov 2021 02:22:47 -0800 (PST) Received: from localhost.localdomain (111-240-133-170.dynamic-ip.hinet.net. [111.240.133.170]) by smtp.gmail.com with ESMTPSA id 13sm15064724pfp.216.2021.11.24.02.22.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 02:22:47 -0800 (PST) From: Chris Chiu To: kernel-team@lists.ubuntu.com Subject: [PATCH 09/12][SRU][U/OEM-5.14] drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking Date: Wed, 24 Nov 2021 18:22:32 +0800 Message-Id: <20211124102235.447553-10-chris.chiu@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211124102235.447553-1-chris.chiu@canonical.com> References: <20211124102235.447553-1-chris.chiu@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Imre Deak BugLink: https://bugs.launchpad.net/bugs/1952041 While a TypeC port mode is locked a DISPLAY_CORE power domain reference is held, which implies a runtime PM ref. By removing the ICL !legacy port special casing, a TC_COLD_OFF power domain reference will be taken for such ports, which also translates to a runtime PM ref on that platform. A follow-up change will stop holding the DISPLAY_CORE power domain while the port is locked. Cc: José Roberto de Souza Signed-off-by: Imre Deak Reviewed-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210921002313.1132357-11-imre.deak@intel.com (cherry picked from commit 38c393462d01d2746f9f91c1a6482fded2b1b8bb) Signed-off-by: Chris Chiu --- drivers/gpu/drm/i915/display/intel_tc.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 2df4d0beb636..9367770de5d7 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -71,9 +71,6 @@ tc_cold_block_in_mode(struct intel_digital_port *dig_port, enum tc_port_mode mod { struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port) - return 0; - *domain = tc_cold_get_power_domain(dig_port, mode); return intel_display_power_get(i915, *domain); @@ -108,9 +105,6 @@ assert_tc_cold_blocked(struct intel_digital_port *dig_port) struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); bool enabled; - if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port) - return; - enabled = intel_display_power_is_enabled(i915, tc_cold_get_power_domain(dig_port, dig_port->tc_mode)); From patchwork Wed Nov 24 10:22:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Chiu X-Patchwork-Id: 1559019 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=m0mW3D44; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HzcXm3VB1z9t25 for ; Wed, 24 Nov 2021 21:23:20 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1mppQi-0003b0-6i; Wed, 24 Nov 2021 10:23:08 +0000 Received: from smtp-relay-internal-1.internal ([10.131.114.114] helo=smtp-relay-internal-1.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1mppQT-0003Ff-1s for kernel-team@lists.ubuntu.com; Wed, 24 Nov 2021 10:22:53 +0000 Received: from mail-pg1-f199.google.com (mail-pg1-f199.google.com [209.85.215.199]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-1.canonical.com (Postfix) with ESMTPS id 6B7783F32E for ; Wed, 24 Nov 2021 10:22:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1637749371; bh=3eTULlF90l7HAw7/ZtPqcskwMiH5QyFLeXJ+0N8QMxQ=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=m0mW3D44SE0pcrhepE3Ss+8wJ8glcx9WyYD4ErE864I5quEfoED6B2RFPhbP5N6u1 mrMWm1ZqYYJ0yTDoaDCleFElIqLes9FtxiPQP/NcO+aN4/L85etSa8Iip2eorJfXHN VkwifAmbi1v/SB1FKrw1VUoEvb3jRZCHztzkVynvPRmnWhFR7hURXtdPd3q3Hvd4yk wQAaRbKrTzPgBxY64vGJUeYMEVXikP8q6iCMnqV212b4YkUFjE+/M9mD23G8PUSL5L ynoAGl5cqdLey+o8m2E/51Q2j/9p7EDSSI2jo9OClJZOL8FbqjdIdFrWN+k1zfZMVG kv9YpMcPNUsNA== Received: by mail-pg1-f199.google.com with SMTP id p13-20020a63c14d000000b002da483902b1so580619pgi.12 for ; Wed, 24 Nov 2021 02:22:51 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3eTULlF90l7HAw7/ZtPqcskwMiH5QyFLeXJ+0N8QMxQ=; b=NqiVP4ge237cGYdiB/vQQrX9kT239IKzXUbP2P0AkZXT/ysxg2To7SC6CP2ea9Jkuj IOq7+cPobJNpVdivhKwME8W2iO1MmdIEIsXid577SkGyVrQSA9yPiPgUuIqE77kjCsih zxKI9YX3o/aSjHwjDKoZvVpLf9NI+JPixycQI5ByvxNtip0ItIXeTIg/1IiteiXcXpla daWc2zwMBLoFgT1N2kLlNGNSi+8tRUL6Jo7DspMc7L1JQ3IckvZGyZoMI4UC6sKBu4eh QT5wzriaUKn39geZrZ/3lhy3GL2RIOHBMfa0wJgbDY2JPy73Cz/qOpeS+F6481HugAjC ugpg== X-Gm-Message-State: AOAM531OV9B4NKM2T3mDl/8TN097BGH8nndtZgNRorwtJ22lA0TjZmil Lv42cvRR3/SYhc29b4Y/iHtWlfJmdstng4e03IaJxfAXpsRLxS9XP77gg7VVLS5MLKeKBEkRbUU 5kY9lD9QaIldgoBvJsZ0q5R60e14Jk4wcKsi0EhAazA== X-Received: by 2002:a17:902:cecf:b0:141:e15d:4a2a with SMTP id d15-20020a170902cecf00b00141e15d4a2amr16224145plg.66.1637749369441; Wed, 24 Nov 2021 02:22:49 -0800 (PST) X-Google-Smtp-Source: ABdhPJzfXv0Cqo8FP2Pk2LgtNmW8qkjTEEPZDLvUMS5ET9/rGqPZJZMznX0WqHguD6sAa9/gHrqExg== X-Received: by 2002:a17:902:cecf:b0:141:e15d:4a2a with SMTP id d15-20020a170902cecf00b00141e15d4a2amr16224049plg.66.1637749368666; Wed, 24 Nov 2021 02:22:48 -0800 (PST) Received: from localhost.localdomain (111-240-133-170.dynamic-ip.hinet.net. [111.240.133.170]) by smtp.gmail.com with ESMTPSA id 13sm15064724pfp.216.2021.11.24.02.22.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 02:22:48 -0800 (PST) From: Chris Chiu To: kernel-team@lists.ubuntu.com Subject: [PATCH 10/12][SRU][U/OEM-5.14] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P Date: Wed, 24 Nov 2021 18:22:33 +0800 Message-Id: <20211124102235.447553-11-chris.chiu@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211124102235.447553-1-chris.chiu@canonical.com> References: <20211124102235.447553-1-chris.chiu@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Imre Deak BugLink: https://bugs.launchpad.net/bugs/1952041 So far TC-cold was blocked only for the duration of TypeC mode resets. The DP-alt and legacy modes require TC-cold to be blocked also whenever the port is in use (AUX transfers, enable modeset), and this was ensured by the held PHY ownership flag. On ADL-P this doesn't work, since the PHY ownership flag is in a register backed by the PW#2 power well. Whenever this power well is disabled the ownership flag is cleared by the HW under the driver. The only way to cleanly release and re-acquire the PHY ownership flag and also allow for power saving (by disabling the display power wells and reaching DC5/6 states) is to hold the TC-cold blocking power domains while the PHY is connected and disconnect/reconnect the PHY on-demand around AUX transfers and modeset enable/disables. Let's do that, disconnecting a PHY with a 1 sec delay after it becomes idle. For consistency do this on all platforms and TypeC modes. v2: Add tc_mode!=disconnected and phy_is_owned asserts to __intel_tc_port_lock(). Cc: José Roberto de Souza Signed-off-by: Imre Deak Reviewed-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210929132833.2253961-6-imre.deak@intel.com (cherry picked from commit 3e0abc7661c82266d3a3f27fbbadcc74cc4997e1) Signed-off-by: Chris Chiu --- drivers/gpu/drm/i915/display/intel_ddi.c | 7 +- .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_tc.c | 81 ++++++++++++------- drivers/gpu/drm/i915/display/intel_tc.h | 2 +- 4 files changed, 59 insertions(+), 32 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 485a74ae0545..0862963be82c 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4036,8 +4036,11 @@ static void intel_ddi_encoder_destroy(struct drm_encoder *encoder) { struct drm_i915_private *i915 = to_i915(encoder->dev); struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder)); + enum phy phy = intel_port_to_phy(i915, dig_port->base.port); intel_dp_encoder_flush_work(encoder); + if (intel_phy_is_tc(i915, phy)) + intel_tc_port_flush_work(dig_port); intel_display_power_flush_work(i915); drm_encoder_cleanup(encoder); @@ -4480,7 +4483,7 @@ static void intel_ddi_encoder_suspend(struct intel_encoder *encoder) if (!intel_phy_is_tc(i915, phy)) return; - intel_tc_port_disconnect_phy(dig_port); + intel_tc_port_flush_work(dig_port); } static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder) @@ -4496,7 +4499,7 @@ static void intel_ddi_encoder_shutdown(struct intel_encoder *encoder) if (!intel_phy_is_tc(i915, phy)) return; - intel_tc_port_disconnect_phy(dig_port); + intel_tc_port_flush_work(dig_port); } #define port_tc_name(port) ((port) - PORT_TC1 + '1') diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 025c58c2f47c..68fcb48f195a 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1655,6 +1655,7 @@ struct intel_digital_port { struct mutex tc_lock; /* protects the TypeC port mode */ intel_wakeref_t tc_lock_wakeref; enum intel_display_power_domain tc_lock_power_domain; + struct delayed_work tc_disconnect_phy_work; int tc_link_refcount; bool tc_legacy_port:1; char tc_port_name[8]; diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 9367770de5d7..66cb321a4488 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -666,6 +666,13 @@ static void intel_tc_port_update_mode(struct intel_digital_port *dig_port, intel_tc_port_reset_mode(dig_port, required_lanes, force_disconnect); + /* Get power domain matching the new mode after reset. */ + tc_cold_unblock(dig_port, dig_port->tc_lock_power_domain, + fetch_and_zero(&dig_port->tc_lock_wakeref)); + if (dig_port->tc_mode != TC_PORT_DISCONNECTED) + dig_port->tc_lock_wakeref = tc_cold_block(dig_port, + &dig_port->tc_lock_power_domain); + tc_cold_unblock(dig_port, domain, wref); } @@ -693,6 +700,7 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port) active_links = to_intel_crtc(encoder->base.crtc)->active; drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_DISCONNECTED); + drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref); if (active_links) { enum intel_display_power_domain domain; intel_wakeref_t tc_cold_wref = tc_cold_block(dig_port, &domain); @@ -705,6 +713,9 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port) dig_port->tc_port_name, active_links); intel_tc_port_link_init_refcount(dig_port, active_links); + dig_port->tc_lock_wakeref = tc_cold_block(dig_port, + &dig_port->tc_lock_power_domain); + tc_cold_unblock(dig_port, domain, tc_cold_wref); } @@ -745,56 +756,67 @@ bool intel_tc_port_connected(struct intel_encoder *encoder) } static void __intel_tc_port_lock(struct intel_digital_port *dig_port, - int required_lanes, bool force_disconnect) + int required_lanes) { struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - intel_wakeref_t wakeref; - - wakeref = intel_display_power_get(i915, POWER_DOMAIN_DISPLAY_CORE); mutex_lock(&dig_port->tc_lock); + cancel_delayed_work(&dig_port->tc_disconnect_phy_work); if (!dig_port->tc_link_refcount) intel_tc_port_update_mode(dig_port, required_lanes, - force_disconnect); + false); - drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref); - dig_port->tc_lock_wakeref = wakeref; + drm_WARN_ON(&i915->drm, dig_port->tc_mode == TC_PORT_DISCONNECTED); + drm_WARN_ON(&i915->drm, dig_port->tc_mode != TC_PORT_TBT_ALT && + !tc_phy_is_owned(dig_port)); } void intel_tc_port_lock(struct intel_digital_port *dig_port) { - __intel_tc_port_lock(dig_port, 1, false); + __intel_tc_port_lock(dig_port, 1); } -void intel_tc_port_unlock(struct intel_digital_port *dig_port) +/** + * intel_tc_port_disconnect_phy_work: disconnect TypeC PHY from display port + * @dig_port: digital port + * + * Disconnect the given digital port from its TypeC PHY (handing back the + * control of the PHY to the TypeC subsystem). This will happen in a delayed + * manner after each aux transactions and modeset disables. + */ +static void intel_tc_port_disconnect_phy_work(struct work_struct *work) { - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); - intel_wakeref_t wakeref = fetch_and_zero(&dig_port->tc_lock_wakeref); + struct intel_digital_port *dig_port = + container_of(work, struct intel_digital_port, tc_disconnect_phy_work.work); - mutex_unlock(&dig_port->tc_lock); + mutex_lock(&dig_port->tc_lock); - intel_display_power_put_async(i915, POWER_DOMAIN_DISPLAY_CORE, - wakeref); + if (!dig_port->tc_link_refcount) + intel_tc_port_update_mode(dig_port, 1, true); + + mutex_unlock(&dig_port->tc_lock); } /** - * intel_tc_port_disconnect_phy: disconnect TypeC PHY from display port + * intel_tc_port_flush_work: flush the work disconnecting the PHY * @dig_port: digital port * - * Disconnect the given digital port from its TypeC PHY (handing back the - * control of the PHY to the TypeC subsystem). The only purpose of this - * function is to force the disconnect even with a TypeC display output still - * plugged to the TypeC connector, which is required by the TypeC firmwares - * during system suspend and shutdown. Otherwise - during the unplug event - * handling - the PHY ownership is released automatically by - * intel_tc_port_reset_mode(), when calling this function is not required. + * Flush the delayed work disconnecting an idle PHY. */ -void intel_tc_port_disconnect_phy(struct intel_digital_port *dig_port) +void intel_tc_port_flush_work(struct intel_digital_port *dig_port) { - __intel_tc_port_lock(dig_port, 1, true); - intel_tc_port_unlock(dig_port); + flush_delayed_work(&dig_port->tc_disconnect_phy_work); +} + +void intel_tc_port_unlock(struct intel_digital_port *dig_port) +{ + if (!dig_port->tc_link_refcount && dig_port->tc_mode != TC_PORT_DISCONNECTED) + queue_delayed_work(system_unbound_wq, &dig_port->tc_disconnect_phy_work, + msecs_to_jiffies(1000)); + + mutex_unlock(&dig_port->tc_lock); } bool intel_tc_port_ref_held(struct intel_digital_port *dig_port) @@ -806,16 +828,16 @@ bool intel_tc_port_ref_held(struct intel_digital_port *dig_port) void intel_tc_port_get_link(struct intel_digital_port *dig_port, int required_lanes) { - __intel_tc_port_lock(dig_port, required_lanes, false); + __intel_tc_port_lock(dig_port, required_lanes); dig_port->tc_link_refcount++; intel_tc_port_unlock(dig_port); } void intel_tc_port_put_link(struct intel_digital_port *dig_port) { - mutex_lock(&dig_port->tc_lock); - dig_port->tc_link_refcount--; - mutex_unlock(&dig_port->tc_lock); + intel_tc_port_lock(dig_port); + --dig_port->tc_link_refcount; + intel_tc_port_unlock(dig_port); } static bool @@ -871,6 +893,7 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy) "%c/TC#%d", port_name(port), tc_port + 1); mutex_init(&dig_port->tc_lock); + INIT_DELAYED_WORK(&dig_port->tc_disconnect_phy_work, intel_tc_port_disconnect_phy_work); dig_port->tc_legacy_port = is_legacy; dig_port->tc_mode = TC_PORT_DISCONNECTED; dig_port->tc_link_refcount = 0; diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h index 0fdcddb4fc87..6b47b29f551c 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.h +++ b/drivers/gpu/drm/i915/display/intel_tc.h @@ -17,7 +17,6 @@ bool intel_tc_port_in_dp_alt_mode(struct intel_digital_port *dig_port); bool intel_tc_port_in_legacy_mode(struct intel_digital_port *dig_port); bool intel_tc_port_connected(struct intel_encoder *encoder); -void intel_tc_port_disconnect_phy(struct intel_digital_port *dig_port); u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port); u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port); @@ -28,6 +27,7 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port, void intel_tc_port_sanitize(struct intel_digital_port *dig_port); void intel_tc_port_lock(struct intel_digital_port *dig_port); void intel_tc_port_unlock(struct intel_digital_port *dig_port); +void intel_tc_port_flush_work(struct intel_digital_port *dig_port); void intel_tc_port_get_link(struct intel_digital_port *dig_port, int required_lanes); void intel_tc_port_put_link(struct intel_digital_port *dig_port); From patchwork Wed Nov 24 10:22:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Chiu X-Patchwork-Id: 1559018 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=h3Qj4kks; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HzcXl19wRz9t2p for ; Wed, 24 Nov 2021 21:23:19 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1mppQg-0003Wx-9K; Wed, 24 Nov 2021 10:23:06 +0000 Received: from smtp-relay-internal-0.internal ([10.131.114.225] helo=smtp-relay-internal-0.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1mppQS-0003G1-VY for kernel-team@lists.ubuntu.com; Wed, 24 Nov 2021 10:22:53 +0000 Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id C517B3F19E for ; Wed, 24 Nov 2021 10:22:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1637749371; bh=qqjZhlUpgsT8WaJTArt6cN2L78ZdSauZGZmb+t8V0WI=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=h3Qj4kks4JiaAVWdJeiycD+bx2je6DONVbTbQX+iAiF1BYGszM1fQLV/hAaUX9RmI 9hgEpXcvM18Ka/beTgTJdHSo+g6xhyQzGZY3DGHzR1RSJf+VsSt7C+Vc4huY6BA9H7 bR9S2dbDc85j4n1OQsL+nKz5b4+D7/ONW1gDlm1x1xO7zrJzj3KzATyTNN8SE9DBFX 4Jtf/CWvxaNJPx4PeJmMPpbrUrQ4VblQV9JDLTjXMhsucfVmrCmlGx4QiETYOJymmK drEBG/A7h/3lDoLNmTE4mNQfaduTU+iZ6YNgA7y6soBzjfrHW75VWCe+4llXTqJAet dqX3PWpchT/LQ== Received: by mail-pj1-f70.google.com with SMTP id lt10-20020a17090b354a00b001a649326aedso3109471pjb.5 for ; Wed, 24 Nov 2021 02:22:51 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qqjZhlUpgsT8WaJTArt6cN2L78ZdSauZGZmb+t8V0WI=; b=imWolv1X4Fc+6vaNSs/eIeyQY/w4w8t4m4OKkg8G5tBIS3zaS9WINVMyJ5edB8hVnI HTSDQfmXpsUWgRQg2McjQy1B6jxLQxCs2Bliw0zeAov+N4yXJv9I+yH6W/9BxMYWuMEh Bl2a+grNfC5zvBLIv41ksCfdcFTDU1pKixsbjpp3Si3cgclVGxfREu8h4mst16p/Uuxc qc0JeEQbxRM2RMvrs1uXR71roq/dq9bIOeUhjFVJpzgDwHLwz5MrOo1Jmjoalm4BiezB oeg0q3u0x80TY6b8vs5/jSS+xxLKcfGESZW1F6VCzaGBFKzoUshqjJZCG4xmKBwdXjyn jm7Q== X-Gm-Message-State: AOAM532kP7bybEBIDmLh9GXBd39sZ2mm3mGXvJIO2R763RSLCRQZsDBd U+ZvouwE3cj5D6++5FlxC04UD8e04wuYPs/O1G/8ZtKYySPQRoJKglEKzE6Na/hVrzr1n9nv6Fl IWP6kwffIR9BCqyIu0Zv+iHlpkkVkuOI9uInNxQzsnQ== X-Received: by 2002:a63:d08:: with SMTP id c8mr9171148pgl.232.1637749370256; Wed, 24 Nov 2021 02:22:50 -0800 (PST) X-Google-Smtp-Source: ABdhPJyjrmrFhJZc84NHTOPU03IVFqaGXJlayiN9mjHXBN63ZssVMRCECq86RFgnwzlW6ULJrspSVA== X-Received: by 2002:a63:d08:: with SMTP id c8mr9171105pgl.232.1637749369564; Wed, 24 Nov 2021 02:22:49 -0800 (PST) Received: from localhost.localdomain (111-240-133-170.dynamic-ip.hinet.net. [111.240.133.170]) by smtp.gmail.com with ESMTPSA id 13sm15064724pfp.216.2021.11.24.02.22.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 02:22:49 -0800 (PST) From: Chris Chiu To: kernel-team@lists.ubuntu.com Subject: [PATCH 11/12][SRU][U/OEM-5.14] drm/i915/tc: Drop extra TC cold blocking from intel_tc_port_connected() Date: Wed, 24 Nov 2021 18:22:34 +0800 Message-Id: <20211124102235.447553-12-chris.chiu@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211124102235.447553-1-chris.chiu@canonical.com> References: <20211124102235.447553-1-chris.chiu@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Imre Deak BugLink: https://bugs.launchpad.net/bugs/1952041 After the previous patch the driver holds a power domain blocking TC-cold whenever the port is locked, so we can remove the extra blocking around the lock/unlock sequence. Cc: José Roberto de Souza Signed-off-by: Imre Deak Reviewed-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210921002313.1132357-13-imre.deak@intel.com (cherry picked from commit ff67c4c0dd67b6dbb78a0d045100dd2f9dee88b0) Signed-off-by: Chris Chiu --- drivers/gpu/drm/i915/display/intel_tc.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 66cb321a4488..4a14db604cba 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -740,16 +740,12 @@ bool intel_tc_port_connected(struct intel_encoder *encoder) { struct intel_digital_port *dig_port = enc_to_dig_port(encoder); bool is_connected; - enum intel_display_power_domain domain; - intel_wakeref_t tc_cold_wref; intel_tc_port_lock(dig_port); - tc_cold_wref = tc_cold_block(dig_port, &domain); is_connected = tc_port_live_status_mask(dig_port) & BIT(dig_port->tc_mode); - tc_cold_unblock(dig_port, domain, tc_cold_wref); intel_tc_port_unlock(dig_port); return is_connected; From patchwork Wed Nov 24 10:22:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Chiu X-Patchwork-Id: 1559020 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=canonical.com header.i=@canonical.com header.a=rsa-sha256 header.s=20210705 header.b=NOC1dMLi; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.ubuntu.com (client-ip=91.189.94.19; helo=huckleberry.canonical.com; envelope-from=kernel-team-bounces@lists.ubuntu.com; receiver=) Received: from huckleberry.canonical.com (huckleberry.canonical.com [91.189.94.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HzcXp6FwKz9t25 for ; Wed, 24 Nov 2021 21:23:22 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=huckleberry.canonical.com) by huckleberry.canonical.com with esmtp (Exim 4.86_2) (envelope-from ) id 1mppQj-0003dw-BQ; Wed, 24 Nov 2021 10:23:09 +0000 Received: from smtp-relay-internal-0.internal ([10.131.114.225] helo=smtp-relay-internal-0.canonical.com) by huckleberry.canonical.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1mppQT-0003GW-Dj for kernel-team@lists.ubuntu.com; Wed, 24 Nov 2021 10:22:53 +0000 Received: from mail-pf1-f197.google.com (mail-pf1-f197.google.com [209.85.210.197]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 4CB573F225 for ; Wed, 24 Nov 2021 10:22:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1637749372; bh=qn++C5HdfToBwkg+3hetQMnvSTs3J7Xu/hZPgJVkP7I=; h=From:To:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=NOC1dMLi+HSjV9exW7CPA3PbVoVYrPddUrD7cMYAfLUIKMJ2RbuuLXgW0v6x/WYOh DBek0qf/9oLeO5rySQLniPp77WCX8PdZcTp2KaqoSkz0Z6lhXE3v0p/JaOS3w3FF0T tLQxBbQyryeE57BRYG/h0ZWCoOL3EWhuEHizD9Lysi5CAmXbS6rqalbh/QGVAb0Qvg v3zXA3uF9H5Y2J5JdfvDurKUhZWDbR+oFKZSAKm9nVpPE+7w4ziKY1TBix2ym6QCw8 daji+esk42pcgyll0LoS6BT0kTix8A4MEl+hVr71PvUKiMSs52RtqIuDbMJpeNr2fy 1SksYtgJSNMAA== Received: by mail-pf1-f197.google.com with SMTP id 4-20020a621604000000b004a4ab765028so1256421pfw.13 for ; Wed, 24 Nov 2021 02:22:52 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qn++C5HdfToBwkg+3hetQMnvSTs3J7Xu/hZPgJVkP7I=; b=TfBCuL6j5sqlM6LMKH4l8mlIh2qxM2VqZkrWzgUVudm2w9O6e2idPf6do1H3C8bm2c AS/gVx9Q4c3D8H0JqxQpo/kuZOfwnMZasNnex+XgWWrQLp+lfcihRDkY5cRB3SwnWqt8 nIQ59IF9FTmyC9oZv9a+LTkRGXBfkGkI/YGufRhKD7J9bFjDHNiHjs7deZotAe/HMYcy 2Bo6WmkD8HGgJXuSswDZNRkpqsNaQhdOrpz1tql6SFAOB4X5Evcm7JgE56i1b6pdRf4v /JiDPbVahSblaZZQRBqJvdKFzXsgUkZevF5SI/pn/MBeipm9GmUFpNVA9J54TnM+ujUg S0MQ== X-Gm-Message-State: AOAM531lr5RJn50aPhmIxHcnyTZRw7ME1EDRSYB4JEmAw85WC3luj2uL lAveSyGqXTxNe6Mi9ICvcSAQJd+fqu84aMiTxrkO8jo1f/QQPCmmJy3qD/EC2jbeI7WfNmhHx6R mCCWTaDTAWqL5yJz5QAvqjJPrYLzMq6r8Zg6RzMlCiQ== X-Received: by 2002:a63:8e:: with SMTP id 136mr8980300pga.424.1637749370794; Wed, 24 Nov 2021 02:22:50 -0800 (PST) X-Google-Smtp-Source: ABdhPJx8uI2JuVwixJ442XhFQFNR2/2bEbi8MEOWqsEYVKzTJAktFfgzxB2BvYObW4h5PCRbUARMiw== X-Received: by 2002:a63:8e:: with SMTP id 136mr8980285pga.424.1637749370483; Wed, 24 Nov 2021 02:22:50 -0800 (PST) Received: from localhost.localdomain (111-240-133-170.dynamic-ip.hinet.net. [111.240.133.170]) by smtp.gmail.com with ESMTPSA id 13sm15064724pfp.216.2021.11.24.02.22.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Nov 2021 02:22:50 -0800 (PST) From: Chris Chiu To: kernel-team@lists.ubuntu.com Subject: [PATCH 12/12][SRU][U/OEM-5.14] drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect Date: Wed, 24 Nov 2021 18:22:35 +0800 Message-Id: <20211124102235.447553-13-chris.chiu@canonical.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20211124102235.447553-1-chris.chiu@canonical.com> References: <20211124102235.447553-1-chris.chiu@canonical.com> MIME-Version: 1.0 X-BeenThere: kernel-team@lists.ubuntu.com X-Mailman-Version: 2.1.20 Precedence: list List-Id: Kernel team discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kernel-team-bounces@lists.ubuntu.com Sender: "kernel-team" From: Imre Deak BugLink: https://bugs.launchpad.net/bugs/1952041 The PHY ownership release->AUX PW disable steps during a modeset disable->PHY disconnect sequence can hang the system if the PHY disconnect happens after disabling the PHY's PLL. The spec doesn't require a specific order for these two steps, so this issue is still being root caused by HW/FW teams. Until that is found, let's make sure the disconnect happens before the PLL is disabled, and do this on all platforms for consistency. v2: Add a TODO comment to remove the w/a once the issue is root caused/fixed. (Jose) Cc: José Roberto de Souza Signed-off-by: Imre Deak Reviewed-by: José Roberto de Souza Link: https://patchwork.freedesktop.org/patch/msgid/20210929132833.2253961-7-imre.deak@intel.com (cherry picked from commit b58a88682093b3438dad66f2c3d3a4d0a20ee1e8) Signed-off-by: Chris Chiu --- drivers/gpu/drm/i915/display/intel_tc.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 4a14db604cba..40faa18947c9 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -834,6 +834,14 @@ void intel_tc_port_put_link(struct intel_digital_port *dig_port) intel_tc_port_lock(dig_port); --dig_port->tc_link_refcount; intel_tc_port_unlock(dig_port); + + /* + * Disconnecting the PHY after the PHY's PLL gets disabled may + * hang the system on ADL-P, so disconnect the PHY here synchronously. + * TODO: remove this once the root cause of the ordering requirement + * is found/fixed. + */ + intel_tc_port_flush_work(dig_port); } static bool