From patchwork Tue Nov 9 11:32:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 1552935 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sartura-hr.20210112.gappssmtp.com header.i=@sartura-hr.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=ViSy+Fuf; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HpQnt5Jrhz9s1l for ; Tue, 9 Nov 2021 22:32:50 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343508AbhKILfe (ORCPT ); Tue, 9 Nov 2021 06:35:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45072 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343500AbhKILfc (ORCPT ); Tue, 9 Nov 2021 06:35:32 -0500 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C0ADC061766 for ; Tue, 9 Nov 2021 03:32:46 -0800 (PST) Received: by mail-ed1-x52d.google.com with SMTP id r12so75160986edt.6 for ; Tue, 09 Nov 2021 03:32:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=I2HXZ8+wDuZAmky1+IX48MpvrAcOVGAjLZECYWXvvFM=; b=ViSy+Fuf4TSMwakL6ULaDuiyzgLb/xlPh6CWrWS4Yg46sX30ZKasxKUHL/S7PTP8ZF EIKx6pVrgbMGCFg15lP4tINltaXLunFXPXFHEcoQlJhTdNM5fV77MlkRrgivaINQtXNG yyaaCtzJvMPJpSNoih5S5cxJrDjr64G37yuY1/nAO0ZoYhgqmWhLDlVIYBzQHI3mmjzr cUYN5Fcd2usBURCMFjJhd8k8jLL54jNRc/3qADmgxM9vcSI3QLyeR0cszm9NznLQMo9E mNETJ4rKcTimbnuVkrRqU2Ghq383oixQU7n9f6j2JypL849JjXHDFYeDl1OGZF3Avp6J mPgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=I2HXZ8+wDuZAmky1+IX48MpvrAcOVGAjLZECYWXvvFM=; b=FGbPOm+LBljMItjcs5FjJE/D8FkI8LoP2OvZx3zw70hgTzTWTCxYEr1cvy1tmtb68F lvyWy/lFdIv9X6iDqNYZqJYj+O9eJgT9KHJVAIhE/jwM7CqyTlKHqwETsI1oF+zIc2TI XyskHtWQnaaROyWfR1L+dDvWZ1RFHCkWVFtvrd04zQmFtc0Bv90DIGyRddRRB8CQptRp GZg3IKGlWS/RkTcS3G7/jFmcNmPFYG5Lt2LnieIuTUGiwD96w4x/0Yj2sAQcAbrLKKHw u4iiDa8F6FyAtEKPQro6dD3uEHTPTYhMy1jPsg2AtmSKnbYXiFMDRIqD07RXvB5j7pWD /ntA== X-Gm-Message-State: AOAM5314rbbSXqjo3zR9zH3o12zXa4mKKfmOoRs7/lvxWrYfRyIqIGbb nH1FNKV7PIon2SG0wjjQB068Kg== X-Google-Smtp-Source: ABdhPJyXJsWxDdMlK8qVyawOOIGf8bugo+Tq3xhAkRb1RCQJ5v7PvXtFDeNS2rNN/QwT9gpxLHacxQ== X-Received: by 2002:a17:906:11ce:: with SMTP id o14mr8988544eja.457.1636457565031; Tue, 09 Nov 2021 03:32:45 -0800 (PST) Received: from fedora.. (cpezg-94-253-144-18-cbl.xnet.hr. [94.253.144.18]) by smtp.googlemail.com with ESMTPSA id s4sm6771167ejn.25.2021.11.09.03.32.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Nov 2021 03:32:44 -0800 (PST) From: Robert Marko To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, andy.shevchenko@gmail.com, michael@walle.cc, andrew@lunn.ch Cc: luka.perkov@sartura.hr, bruno.banelli@sartura.hr, Robert Marko Subject: [PATCH v9 1/6] mfd: simple-mfd-i2c: Add Delta TN48M CPLD support Date: Tue, 9 Nov 2021 12:32:34 +0100 Message-Id: <20211109113239.93493-1-robert.marko@sartura.hr> X-Mailer: git-send-email 2.33.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Delta TN48M switches have a Lattice CPLD that serves multiple purposes including being a GPIO expander. So, lets use the simple I2C MFD driver to provide the MFD core. Also add a virtual symbol which pulls in the simple-mfd-i2c driver and provide a common symbol on which the subdevice drivers can depend on. Signed-off-by: Robert Marko Acked-for-MFD-by: Lee Jones --- Changes in v9: * Depend on ARCH_MVEBU or COMPILE_TEST Changes in v2: * Drop the custom MFD driver and header * Use simple I2C MFD driver --- drivers/mfd/Kconfig | 11 +++++++++++ drivers/mfd/simple-mfd-i2c.c | 1 + 2 files changed, 12 insertions(+) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index ad15be6b86bc..35b917e583b0 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -297,6 +297,17 @@ config MFD_ASIC3 This driver supports the ASIC3 multifunction chip found on many PDAs (mainly iPAQ and HTC based ones) +config MFD_TN48M_CPLD + tristate "Delta Networks TN48M switch CPLD driver" + depends on I2C + depends on ARCH_MVEBU || COMPILE_TEST + select MFD_SIMPLE_MFD_I2C + help + Select this option to enable support for Delta Networks TN48M switch + CPLD. It consists of reset and GPIO drivers. CPLD provides GPIOS-s + for the SFP slots as well as power supply related information. + SFP support depends on the GPIO driver being selected. + config PMIC_DA903X bool "Dialog Semiconductor DA9030/DA9034 PMIC Support" depends on I2C=y diff --git a/drivers/mfd/simple-mfd-i2c.c b/drivers/mfd/simple-mfd-i2c.c index 87f684cff9a1..af8e91781417 100644 --- a/drivers/mfd/simple-mfd-i2c.c +++ b/drivers/mfd/simple-mfd-i2c.c @@ -39,6 +39,7 @@ static int simple_mfd_i2c_probe(struct i2c_client *i2c) static const struct of_device_id simple_mfd_i2c_of_match[] = { { .compatible = "kontron,sl28cpld" }, + { .compatible = "delta,tn48m-cpld" }, {} }; MODULE_DEVICE_TABLE(of, simple_mfd_i2c_of_match); From patchwork Tue Nov 9 11:32:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 1552936 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sartura-hr.20210112.gappssmtp.com header.i=@sartura-hr.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=CSBqvBY9; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HpQnv0njNz9sCD for ; Tue, 9 Nov 2021 22:32:51 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343512AbhKILff (ORCPT ); Tue, 9 Nov 2021 06:35:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45084 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343510AbhKILfe (ORCPT ); Tue, 9 Nov 2021 06:35:34 -0500 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D0A8C0613F5 for ; Tue, 9 Nov 2021 03:32:48 -0800 (PST) Received: by mail-ed1-x52c.google.com with SMTP id o8so75273847edc.3 for ; Tue, 09 Nov 2021 03:32:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Zrtwtw2r9OikwlQFHJNJj3GiBNDj9j6F3aHBsectFJw=; b=CSBqvBY9btSCKcnVRiQ4vHbgFrmAoY9QDieqIcHoYaWb2QEtW5vPT+py2NGWnDRPG9 CwvZWA4nQe1m+7wUsXOLOiovZtNz42fjlA330iIOfevzENUM2hwcIhtZ+g4KQZpT+DJZ 3aUuy9R1UTVqD2S8fmAjB9NRZyFuGQ32VF580A8MEOjNzlGhQCQb+TSyIjEd0hIIVD/g 9yFDUaygaPKBa6WB4E5M8NxlOjNL3ZfHPGK7c4Atkaq/43HeX7fks/wS/ofvE+ExMrUA S3DKOY795ONM/lV2LitD/lnBpHi359sN+TRh725//WHOycN6AVJKRj8+XSAtPgT+nYAI JAoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Zrtwtw2r9OikwlQFHJNJj3GiBNDj9j6F3aHBsectFJw=; b=ZBSXbTwFyOJW/kdcw4bdbvJO7fHGJ+GLcCauCvJuEIM9rrRu80ZpAS/7VSIC8R1Jx6 CaTn+91cZ+Ibz/qMmgKHQrmxuniDO4WJexaLtSsSh3XZxBeDjioU22oLhpaAJOGM/EIm +QxhC5CQcQmQt0Fh8tfweqs+6iO65YOLswlEWApuc+fR9mi5IXJtJntMSE7H0Wn6NiKs NCWxTzHEC8s4wSk9zSBWv9/5VD+uDG4JAc3V5xsv8aUSGr7dOPKipN2X5pBCi1VMxTSy HAIzPprqD6yPxqPmjsrotMU1aOOE5KGH29wyAMrtUiAULWJZXfY/6aLC/muetodkbTDc J0yg== X-Gm-Message-State: AOAM533Z7P+AUaFneWx+/P41kQL+cQTMrXIsLAU4YWNPPmDskdhv3KWx 8KWpZUCwgR5NJeMjUL/gTBxwdA== X-Google-Smtp-Source: ABdhPJy/GHPj5U4nDr9MspcobBmIRy/vKrnGZFPy/vpCfQ//H/RgyGwwkvC6SJL+QbgCtvTIyTOSPQ== X-Received: by 2002:a05:6402:4412:: with SMTP id y18mr8980593eda.103.1636457566925; Tue, 09 Nov 2021 03:32:46 -0800 (PST) Received: from fedora.. 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[94.253.144.18]) by smtp.googlemail.com with ESMTPSA id s4sm6771167ejn.25.2021.11.09.03.32.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Nov 2021 03:32:46 -0800 (PST) From: Robert Marko To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, andy.shevchenko@gmail.com, michael@walle.cc, andrew@lunn.ch Cc: luka.perkov@sartura.hr, bruno.banelli@sartura.hr, Robert Marko Subject: [PATCH v9 2/6] gpio: Add Delta TN48M CPLD GPIO driver Date: Tue, 9 Nov 2021 12:32:35 +0100 Message-Id: <20211109113239.93493-2-robert.marko@sartura.hr> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211109113239.93493-1-robert.marko@sartura.hr> References: <20211109113239.93493-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Delta TN48M switch has an onboard Lattice CPLD that is used as a GPIO expander. The CPLD provides 12 pins in total on the TN48M, but on more advanced switch models it provides up to 192 pins, so the driver is extendable to support more switches. Signed-off-by: Robert Marko Reviewed-by: Andy Shevchenko Reviewed-by: Michael Walle Reviewed-by: Linus Walleij --- Changes in v9: * Use {} instead of {0} for initialising the regmap config per Andys comment * Fix spelling mistake in KConfig Changes in v8: * No need to assing NULL to gpio_config per Andys comment Changes in v7: * Change compatibles, reduce their number * Rework the driver to be easily extendible to support more devices * Use match data to populate configuration * Drop reviews and ACK-s as the driver changed Changes in v6: * Drop unused header * Return the return value of device_property_read_u32() instead of a hardcoded return Changes in v2: * Rewrite to use simple I2C MFD and GPIO regmap * Drop DT bindings for pin numbering --- drivers/gpio/Kconfig | 12 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-tn48m.c | 100 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 113 insertions(+) create mode 100644 drivers/gpio/gpio-tn48m.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index fab571016adf..8f7dd207bd16 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1344,6 +1344,18 @@ config GPIO_TIMBERDALE help Add support for the GPIO IP in the timberdale FPGA. +config GPIO_TN48M_CPLD + tristate "Delta Networks TN48M switch CPLD GPIO driver" + depends on MFD_TN48M_CPLD + select GPIO_REGMAP + help + This enables support for the GPIOs found on the Delta + Networks TN48M switch Lattice CPLD. It provides 12 pins in total, + they are input-only or output-only type. + + This driver can also be built as a module. If so, the + module will be called gpio-tn48m. + config GPIO_TPS65086 tristate "TI TPS65086 GPO" depends on MFD_TPS65086 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 32a32659866a..93abc7461e45 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -148,6 +148,7 @@ obj-$(CONFIG_GPIO_TEGRA186) += gpio-tegra186.o obj-$(CONFIG_GPIO_TEGRA) += gpio-tegra.o obj-$(CONFIG_GPIO_THUNDERX) += gpio-thunderx.o obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o +obj-$(CONFIG_GPIO_TN48M_CPLD) += gpio-tn48m.o obj-$(CONFIG_GPIO_TPIC2810) += gpio-tpic2810.o obj-$(CONFIG_GPIO_TPS65086) += gpio-tps65086.o obj-$(CONFIG_GPIO_TPS65218) += gpio-tps65218.o diff --git a/drivers/gpio/gpio-tn48m.c b/drivers/gpio/gpio-tn48m.c new file mode 100644 index 000000000000..cd4a80b22794 --- /dev/null +++ b/drivers/gpio/gpio-tn48m.c @@ -0,0 +1,100 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Delta TN48M CPLD GPIO driver + * + * Copyright (C) 2021 Sartura Ltd. + * + * Author: Robert Marko + */ + +#include +#include +#include +#include +#include +#include +#include + +enum tn48m_gpio_type { + TN48M_GP0 = 1, + TN48M_GPI, +}; + +struct tn48m_gpio_config { + int ngpio; + int ngpio_per_reg; + enum tn48m_gpio_type type; +}; + +static const struct tn48m_gpio_config tn48m_gpo_config = { + .ngpio = 4, + .ngpio_per_reg = 4, + .type = TN48M_GP0, +}; + +static const struct tn48m_gpio_config tn48m_gpi_config = { + .ngpio = 4, + .ngpio_per_reg = 4, + .type = TN48M_GPI, +}; + +static int tn48m_gpio_probe(struct platform_device *pdev) +{ + const struct tn48m_gpio_config *gpio_config; + struct gpio_regmap_config config = {}; + struct regmap *regmap; + u32 base; + int ret; + + if (!pdev->dev.parent) + return -ENODEV; + + gpio_config = device_get_match_data(&pdev->dev); + if (!gpio_config) + return -ENODEV; + + ret = device_property_read_u32(&pdev->dev, "reg", &base); + if (ret) + return ret; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) + return -ENODEV; + + config.regmap = regmap; + config.parent = &pdev->dev; + config.ngpio = gpio_config->ngpio; + config.ngpio_per_reg = gpio_config->ngpio_per_reg; + switch (gpio_config->type) { + case TN48M_GP0: + config.reg_set_base = base; + break; + case TN48M_GPI: + config.reg_dat_base = base; + break; + default: + return -EINVAL; + } + + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(&pdev->dev, &config)); +} + +static const struct of_device_id tn48m_gpio_of_match[] = { + { .compatible = "delta,tn48m-gpo", .data = &tn48m_gpo_config }, + { .compatible = "delta,tn48m-gpi", .data = &tn48m_gpi_config }, + { } +}; +MODULE_DEVICE_TABLE(of, tn48m_gpio_of_match); + +static struct platform_driver tn48m_gpio_driver = { + .driver = { + .name = "delta-tn48m-gpio", + .of_match_table = tn48m_gpio_of_match, + }, + .probe = tn48m_gpio_probe, +}; +module_platform_driver(tn48m_gpio_driver); + +MODULE_AUTHOR("Robert Marko "); +MODULE_DESCRIPTION("Delta TN48M CPLD GPIO driver"); +MODULE_LICENSE("GPL"); From patchwork Tue Nov 9 11:32:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 1552937 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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[94.253.144.18]) by smtp.googlemail.com with ESMTPSA id s4sm6771167ejn.25.2021.11.09.03.32.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Nov 2021 03:32:48 -0800 (PST) From: Robert Marko To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, andy.shevchenko@gmail.com, michael@walle.cc, andrew@lunn.ch Cc: luka.perkov@sartura.hr, bruno.banelli@sartura.hr, Robert Marko Subject: [PATCH v9 3/6] dt-bindings: reset: Add Delta TN48M Date: Tue, 9 Nov 2021 12:32:36 +0100 Message-Id: <20211109113239.93493-3-robert.marko@sartura.hr> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211109113239.93493-1-robert.marko@sartura.hr> References: <20211109113239.93493-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add header for the Delta TN48M CPLD provided resets. Signed-off-by: Robert Marko Acked-by: Philipp Zabel --- include/dt-bindings/reset/delta,tn48m-reset.h | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 include/dt-bindings/reset/delta,tn48m-reset.h diff --git a/include/dt-bindings/reset/delta,tn48m-reset.h b/include/dt-bindings/reset/delta,tn48m-reset.h new file mode 100644 index 000000000000..d4e9ed12de3e --- /dev/null +++ b/include/dt-bindings/reset/delta,tn48m-reset.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Delta TN48M CPLD GPIO driver + * + * Copyright (C) 2021 Sartura Ltd. + * + * Author: Robert Marko + */ + +#ifndef _DT_BINDINGS_RESET_TN48M_H +#define _DT_BINDINGS_RESET_TN48M_H + +#define CPU_88F7040_RESET 0 +#define CPU_88F6820_RESET 1 +#define MAC_98DX3265_RESET 2 +#define PHY_88E1680_RESET 3 +#define PHY_88E1512_RESET 4 +#define POE_RESET 5 + +#endif /* _DT_BINDINGS_RESET_TN48M_H */ From patchwork Tue Nov 9 11:32:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 1552939 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sartura-hr.20210112.gappssmtp.com header.i=@sartura-hr.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=b//K1QxY; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HpQnz15Pvz9s1l for ; Tue, 9 Nov 2021 22:32:55 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343510AbhKILfi (ORCPT ); Tue, 9 Nov 2021 06:35:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343514AbhKILfi (ORCPT ); Tue, 9 Nov 2021 06:35:38 -0500 Received: from mail-ed1-x530.google.com (mail-ed1-x530.google.com [IPv6:2a00:1450:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0875AC061764 for ; Tue, 9 Nov 2021 03:32:52 -0800 (PST) Received: by mail-ed1-x530.google.com with SMTP id b15so55972839edd.7 for ; Tue, 09 Nov 2021 03:32:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=R0qlmA8b2Q34/jYfVqhc8zeHHttMkijpNR47IpgYF3I=; b=b//K1QxY7PPyHVUEBRjlr8a7rHYSPKy0qcyFoti9GrgJnkQwMfe21pQohM6awJFH1o 6zO9kJlkSUro6IaSJ+A/jeIsJaTBW50ytXL923yZVWKsNVSiaLTpej7j57fHzeetB3xw P/obxLfGnzbUld1fckZ13Tpb21TzO6i9eJ8c2ODjo0piBN26vb1mf0r3I6u839isO3c4 APJXRAhJRWPbhTZhSHvhELWrx+5ubnUApSvLMg5gEkp+VwBe55Z2tQWXG1F9enpcZsq+ CNSOxu3Kb+T14Hp4v3tuQCXk8s0E0D/wcIH4WcbGlJeMQZHZ9yD/uk2PzVYwb15BzcJV /Pqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=R0qlmA8b2Q34/jYfVqhc8zeHHttMkijpNR47IpgYF3I=; b=OMaSgsRFG1xbkCe5BuU9R0X59ncTLOL5xcWkvqAGf8ASwJOPvv9x9dWLefMk6uNpka 4xocGCp9NKQl53UsIEOCmbmfDQsiTBr52KwQ73qoPanluP+Hcj1KDT1K5RYt0I/qSm+s NBtcijwzI5p7zHjop++6TMAUIjX2LY72Ot1dE1PQt6/Rq7MUOoMAjMmHqBJbPOcsNkQU FcPlaq30A235DUxpVE29A5UIH6Icz0CQGverGLRt6n5Z6MtdMmfT0YpFoSd1je0qIQl1 qBdMhHXTCzq7NkbPgmIml0fIRYU4zr3dDN4n3UCHe4BaIg8CSwzNPiiBkHiS3w9Zugba YH4g== X-Gm-Message-State: AOAM5307t3Hec5zuXcv9tuRyLgK8tdNwabxao4jK/XqgsGce0uXWyjci I659SjFyEkF8tXi4+IU3tKWryg== X-Google-Smtp-Source: ABdhPJyrVpAdBF4tabZcr5BDMz/rwGVQ7ZFl0Bz0ZvxxzUxTh+ylyh8rId/7TyrGh2ZKuwUEmyxTIQ== X-Received: by 2002:a05:6402:3508:: with SMTP id b8mr9118693edd.347.1636457570540; Tue, 09 Nov 2021 03:32:50 -0800 (PST) Received: from fedora.. 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[94.253.144.18]) by smtp.googlemail.com with ESMTPSA id s4sm6771167ejn.25.2021.11.09.03.32.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Nov 2021 03:32:50 -0800 (PST) From: Robert Marko To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, andy.shevchenko@gmail.com, michael@walle.cc, andrew@lunn.ch Cc: luka.perkov@sartura.hr, bruno.banelli@sartura.hr, Robert Marko Subject: [PATCH v9 4/6] reset: Add Delta TN48M CPLD reset controller Date: Tue, 9 Nov 2021 12:32:37 +0100 Message-Id: <20211109113239.93493-4-robert.marko@sartura.hr> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211109113239.93493-1-robert.marko@sartura.hr> References: <20211109113239.93493-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Delta TN48M CPLD exposes resets for the following: * 88F7040 SoC * 88F6820 SoC * 98DX3265 switch MAC-s * 88E1680 PHY-s * 88E1512 PHY * PoE PSE controller Controller supports only self clearing resets. Signed-off-by: Robert Marko Reviewed-by: Philipp Zabel Reviewed-by: Andy Shevchenko --- Changes in v9: * Expand KConfig help per Andys comment * Drop the comma in of_device_id per Andys comment Changes in v8: * Drop of.h and include mod_devicetable.h per Andys comment * Mark the units used in timeout and sleep defines for the timeout poller Changes in v5: * Allow COMPILE_TEST as well * Default to MFD_TN48M_CPLD Changes in v4: * Drop assert and deassert as only self-clearing resets are support by the HW * Make sure that reset is cleared before returning from reset. reset --- drivers/reset/Kconfig | 13 ++++ drivers/reset/Makefile | 1 + drivers/reset/reset-tn48m.c | 128 ++++++++++++++++++++++++++++++++++++ 3 files changed, 142 insertions(+) create mode 100644 drivers/reset/reset-tn48m.c diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 5656cac04b4c..4f4e6d76c1f2 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -243,6 +243,19 @@ config RESET_TI_SYSCON you wish to use the reset framework for such memory-mapped devices, say Y here. Otherwise, say N. +config RESET_TN48M_CPLD + tristate "Delta Networks TN48M switch CPLD reset controller" + depends on MFD_TN48M_CPLD || COMPILE_TEST + default MFD_TN48M_CPLD + help + This enables the reset controller driver for the Delta TN48M CPLD. + It provides reset signals for Armada 7040 and 385 SoC-s, Alleycat 3X + switch MAC-s, Alaska OOB ethernet PHY, Quad Alaska ethernet PHY-s and + Microchip PD69200 PoE PSE controller. + + This driver can also be built as a module. If so, the module will be + called reset-tn48m. + config RESET_UNIPHIER tristate "Reset controller driver for UniPhier SoCs" depends on ARCH_UNIPHIER || COMPILE_TEST diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index ea8b8d9ca565..79beab92324f 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -31,6 +31,7 @@ obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o +obj-$(CONFIG_RESET_TN48M_CPLD) += reset-tn48m.o obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o obj-$(CONFIG_RESET_UNIPHIER_GLUE) += reset-uniphier-glue.o obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o diff --git a/drivers/reset/reset-tn48m.c b/drivers/reset/reset-tn48m.c new file mode 100644 index 000000000000..130027291b6e --- /dev/null +++ b/drivers/reset/reset-tn48m.c @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Delta TN48M CPLD reset driver + * + * Copyright (C) 2021 Sartura Ltd. + * + * Author: Robert Marko + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#define TN48M_RESET_REG 0x10 + +#define TN48M_RESET_TIMEOUT_US 125000 +#define TN48M_RESET_SLEEP_US 10 + +struct tn48_reset_map { + u8 bit; +}; + +struct tn48_reset_data { + struct reset_controller_dev rcdev; + struct regmap *regmap; +}; + +static const struct tn48_reset_map tn48m_resets[] = { + [CPU_88F7040_RESET] = {0}, + [CPU_88F6820_RESET] = {1}, + [MAC_98DX3265_RESET] = {2}, + [PHY_88E1680_RESET] = {4}, + [PHY_88E1512_RESET] = {6}, + [POE_RESET] = {7}, +}; + +static inline struct tn48_reset_data *to_tn48_reset_data( + struct reset_controller_dev *rcdev) +{ + return container_of(rcdev, struct tn48_reset_data, rcdev); +} + +static int tn48m_control_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct tn48_reset_data *data = to_tn48_reset_data(rcdev); + unsigned int val; + + regmap_update_bits(data->regmap, TN48M_RESET_REG, + BIT(tn48m_resets[id].bit), 0); + + return regmap_read_poll_timeout(data->regmap, + TN48M_RESET_REG, + val, + val & BIT(tn48m_resets[id].bit), + TN48M_RESET_SLEEP_US, + TN48M_RESET_TIMEOUT_US); +} + +static int tn48m_control_status(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct tn48_reset_data *data = to_tn48_reset_data(rcdev); + unsigned int regval; + int ret; + + ret = regmap_read(data->regmap, TN48M_RESET_REG, ®val); + if (ret < 0) + return ret; + + if (BIT(tn48m_resets[id].bit) & regval) + return 0; + else + return 1; +} + +static const struct reset_control_ops tn48_reset_ops = { + .reset = tn48m_control_reset, + .status = tn48m_control_status, +}; + +static int tn48m_reset_probe(struct platform_device *pdev) +{ + struct tn48_reset_data *data; + struct regmap *regmap; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) + return -ENODEV; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->regmap = regmap; + + data->rcdev.owner = THIS_MODULE; + data->rcdev.ops = &tn48_reset_ops; + data->rcdev.nr_resets = ARRAY_SIZE(tn48m_resets); + data->rcdev.of_node = pdev->dev.of_node; + + return devm_reset_controller_register(&pdev->dev, &data->rcdev); +} + +static const struct of_device_id tn48m_reset_of_match[] = { + { .compatible = "delta,tn48m-reset" }, + { } +}; +MODULE_DEVICE_TABLE(of, tn48m_reset_of_match); + +static struct platform_driver tn48m_reset_driver = { + .driver = { + .name = "delta-tn48m-reset", + .of_match_table = tn48m_reset_of_match, + }, + .probe = tn48m_reset_probe, +}; +module_platform_driver(tn48m_reset_driver); + +MODULE_AUTHOR("Robert Marko "); +MODULE_DESCRIPTION("Delta TN48M CPLD reset driver"); +MODULE_LICENSE("GPL"); From patchwork Tue Nov 9 11:32:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 1552940 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sartura-hr.20210112.gappssmtp.com header.i=@sartura-hr.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=4bgOxRQB; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; 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[94.253.144.18]) by smtp.googlemail.com with ESMTPSA id s4sm6771167ejn.25.2021.11.09.03.32.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Nov 2021 03:32:51 -0800 (PST) From: Robert Marko To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, andy.shevchenko@gmail.com, michael@walle.cc, andrew@lunn.ch Cc: luka.perkov@sartura.hr, bruno.banelli@sartura.hr, Robert Marko Subject: [PATCH v9 5/6] dt-bindings: mfd: Add Delta TN48M CPLD drivers bindings Date: Tue, 9 Nov 2021 12:32:38 +0100 Message-Id: <20211109113239.93493-5-robert.marko@sartura.hr> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211109113239.93493-1-robert.marko@sartura.hr> References: <20211109113239.93493-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add binding documents for the Delta TN48M CPLD drivers. Signed-off-by: Robert Marko --- Changes in v7: * Update bindings to reflect driver updates Changes in v3: * Include bindings for reset driver Changes in v2: * Implement MFD as a simple I2C MFD * Add GPIO bindings as separate --- .../bindings/gpio/delta,tn48m-gpio.yaml | 39 ++++++++ .../bindings/mfd/delta,tn48m-cpld.yaml | 90 +++++++++++++++++++ .../bindings/reset/delta,tn48m-reset.yaml | 35 ++++++++ 3 files changed, 164 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml create mode 100644 Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml create mode 100644 Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml diff --git a/Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml b/Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml new file mode 100644 index 000000000000..e3e668a12091 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/delta,tn48m-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Delta Networks TN48M CPLD GPIO controller + +maintainers: + - Robert Marko + +description: | + This module is part of the Delta TN48M multi-function device. For more + details see ../mfd/delta,tn48m-cpld.yaml. + + Delta TN48M has an onboard Lattice CPLD that is used as an GPIO expander. + It provides 12 pins in total, they are input-only or ouput-only type. + +properties: + compatible: + enum: + - delta,tn48m-gpo + - delta,tn48m-gpi + + reg: + maxItems: 1 + + "#gpio-cells": + const: 2 + + gpio-controller: true + +required: + - compatible + - reg + - "#gpio-cells" + - gpio-controller + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml b/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml new file mode 100644 index 000000000000..f6967c1f6235 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml @@ -0,0 +1,90 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/delta,tn48m-cpld.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Delta Networks TN48M CPLD controller + +maintainers: + - Robert Marko + +description: | + Lattice CPLD onboard the TN48M switches is used for system + management. + + It provides information about the hardware model, revision, + PSU status etc. + + It is also being used as a GPIO expander and reset controller + for the switch MAC-s and other peripherals. + +properties: + compatible: + const: delta,tn48m-cpld + + reg: + description: + I2C device address. + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +patternProperties: + "^gpio(@[0-9a-f]+)?$": + $ref: ../gpio/delta,tn48m-gpio.yaml + + "^reset-controller?$": + $ref: ../reset/delta,tn48m-reset.yaml + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + cpld@41 { + compatible = "delta,tn48m-cpld"; + reg = <0x41>; + #address-cells = <1>; + #size-cells = <0>; + + gpio@31 { + compatible = "delta,tn48m-gpo"; + reg = <0x31>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio@3a { + compatible = "delta,tn48m-gpi"; + reg = <0x3a>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio@40 { + compatible = "delta,tn48m-gpi"; + reg = <0x40>; + gpio-controller; + #gpio-cells = <2>; + }; + + reset-controller { + compatible = "delta,tn48m-reset"; + #reset-cells = <1>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml b/Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml new file mode 100644 index 000000000000..0e5ee8decc0d --- /dev/null +++ b/Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/delta,tn48m-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Delta Networks TN48M CPLD reset controller + +maintainers: + - Robert Marko + +description: | + This module is part of the Delta TN48M multi-function device. For more + details see ../mfd/delta,tn48m-cpld.yaml. + + Reset controller modules provides resets for the following: + * 88F7040 SoC + * 88F6820 SoC + * 98DX3265 switch MAC-s + * 88E1680 PHY-s + * 88E1512 PHY + * PoE PSE controller + +properties: + compatible: + const: delta,tn48m-reset + + "#reset-cells": + const: 1 + +required: + - compatible + - "#reset-cells" + +additionalProperties: false From patchwork Tue Nov 9 11:32:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 1552942 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=sartura-hr.20210112.gappssmtp.com header.i=@sartura-hr.20210112.gappssmtp.com header.a=rsa-sha256 header.s=20210112 header.b=ePCHlZ5s; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by bilbo.ozlabs.org (Postfix) with ESMTP id 4HpQp12cRDz9sCD for ; Tue, 9 Nov 2021 22:32:57 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343519AbhKILfl (ORCPT ); Tue, 9 Nov 2021 06:35:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45126 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343522AbhKILfl (ORCPT ); Tue, 9 Nov 2021 06:35:41 -0500 Received: from mail-ed1-x535.google.com (mail-ed1-x535.google.com [IPv6:2a00:1450:4864:20::535]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 552E4C0613F5 for ; Tue, 9 Nov 2021 03:32:55 -0800 (PST) Received: by mail-ed1-x535.google.com with SMTP id w1so75825005edd.10 for ; Tue, 09 Nov 2021 03:32:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6adjk580AwBpX7D5EH7ECcA7MO/6lGH/OQuhWqLcWr0=; b=ePCHlZ5s9Ca1lZx+Ue/zbqUXBWWK74DCtvcQBG3qSYUhBBYhK3Qifxqxd4eL841TER /tfx+DEQuyTCy6l0cW09Zc9/fu5rb7Pk2Z0RJM/hxWLiSlAxnkH73IQYYzBPOhju/5SA tPPj8nheYVRiKlO2tS7jVeVJdkbAgAqEp5ACRdF2OQ/vXre084Lx42Fi6tvDasc6RqP0 XcFuX0oUM5CI8FI5Hh9RLuyk2ERaDGGUJM0SFvYebuxUmXA4vHrrq92wx1ikzo4GIuMI ea9w3xaJPXYI4Ww+FQxdSutJ1nFHtaZ+qAZNPiVWmsM5GNscEqBuJfO+5BMUnGryXnQL H2MQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6adjk580AwBpX7D5EH7ECcA7MO/6lGH/OQuhWqLcWr0=; b=yjkfTdNc/KGWBiPgff5x8JAOY7ia/o0kZR96L/W938vM+eZj+Ce1QDO7FDCzueoo4p PYx+Xnkg51XvFWwhI7Vj+R67gQ7IFQZ2sp62fyK7JznesdnhKmq8d9CLdUvDBj/vwcFE LfOKBQcUkH7CJY/on1KHRRsubh2AfEaCbCuOVTmLq9tjPKk24M1LagfwgYjOzLNeQ2GU ebx5PItNGSWKySRDOiRz7NoHTQbjb6UaIahxBGc+Y247s2OKC0DrNReTHaHnMYmNHczg dELN+vM7TIEq9Far+2Liqh4mQIc3h7cN9sAka0hclFm4EZJ3reugUlj80l4CFsoUds0B WvwQ== X-Gm-Message-State: AOAM531iSuOL60qmQAcZ92RCOXaosdTJo+OQflLRqwP3uogjbKlJCagB 2vb43i1B3oAXVr3pANvRyMAwIA== X-Google-Smtp-Source: ABdhPJz9e6kGHWVTAn0UkguaWaO5ZH2j5n/zKug8t+61+ALHwQfJ1idBgI+P0ewSbsuC1WEMc1TYkQ== X-Received: by 2002:a17:907:7e83:: with SMTP id qb3mr8826860ejc.469.1636457573897; Tue, 09 Nov 2021 03:32:53 -0800 (PST) Received: from fedora.. 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[94.253.144.18]) by smtp.googlemail.com with ESMTPSA id s4sm6771167ejn.25.2021.11.09.03.32.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Nov 2021 03:32:53 -0800 (PST) From: Robert Marko To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, andy.shevchenko@gmail.com, michael@walle.cc, andrew@lunn.ch Cc: luka.perkov@sartura.hr, bruno.banelli@sartura.hr, Robert Marko Subject: [PATCH v9 6/6] MAINTAINERS: Add Delta Networks TN48M CPLD drivers Date: Tue, 9 Nov 2021 12:32:39 +0100 Message-Id: <20211109113239.93493-6-robert.marko@sartura.hr> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20211109113239.93493-1-robert.marko@sartura.hr> References: <20211109113239.93493-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add maintainers entry for the Delta Networks TN48M CPLD MFD drivers. Signed-off-by: Robert Marko --- Changes in v3: * Add reset driver documentation Changes in v2: * Drop no more existing files --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index d7b4f32875a9..92747bfc01db 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5289,6 +5289,15 @@ S: Maintained F: Documentation/hwmon/dps920ab.rst F: drivers/hwmon/pmbus/dps920ab.c +DELTA NETWORKS TN48M CPLD DRIVERS +M: Robert Marko +S: Maintained +F: Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml +F: Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml +F: Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml +F: drivers/gpio/gpio-tn48m.c +F: include/dt-bindings/reset/delta,tn48m-reset.h + DENALI NAND DRIVER L: linux-mtd@lists.infradead.org S: Orphan