From patchwork Mon Nov 1 23:37:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: jae.hyun.yoo@intel.com X-Patchwork-Id: 1549401 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HjqFF27LGz9sXM for ; Tue, 2 Nov 2021 10:37:05 +1100 (AEDT) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4HjqFF14XDz2yPT for ; Tue, 2 Nov 2021 10:37:05 +1100 (AEDT) X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=intel.com (client-ip=192.55.52.151; helo=mga17.intel.com; envelope-from=jae.hyun.yoo@intel.com; receiver=) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4Hjps35v6Kz2xCh for ; Tue, 2 Nov 2021 10:19:35 +1100 (AEDT) X-IronPort-AV: E=McAfee;i="6200,9189,10155"; a="211902790" X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="211902790" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Nov 2021 16:18:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="727670705" Received: from maru.jf.intel.com ([10.54.51.77]) by fmsmga005.fm.intel.com with ESMTP; 01 Nov 2021 16:18:23 -0700 From: jae.hyun.yoo@intel.com To: Rob Herring , Corey Minyard , Joel Stanley , Andrew Jeffery , Cedric Le Goater , Haiyue Wang , Jae Hyun Yoo Subject: [PATCH -next 1/4] ARM: dts: aspeed: add LCLK setting into LPC IBT node Date: Mon, 1 Nov 2021 16:37:48 -0700 Message-Id: <20211101233751.49222-2-jae.hyun.yoo@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101233751.49222-1-jae.hyun.yoo@intel.com> References: <20211101233751.49222-1-jae.hyun.yoo@intel.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 02 Nov 2021 10:37:01 +1100 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, openipmi-developer@lists.sourceforge.net, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" From: Jae Hyun Yoo Add LCLK clock setting into LPC IBT node to enable the LCLK by individual LPC sub drivers. Signed-off-by: Jae Hyun Yoo Reviewed-by: Andrew Jeffery --- arch/arm/boot/dts/aspeed-g4.dtsi | 1 + arch/arm/boot/dts/aspeed-g5.dtsi | 1 + arch/arm/boot/dts/aspeed-g6.dtsi | 1 + 3 files changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index b313a1cf5f73..f14dace34c5a 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -381,6 +381,7 @@ ibt: ibt@140 { compatible = "aspeed,ast2400-ibt-bmc"; reg = <0x140 0x18>; interrupts = <8>; + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index c7049454c7cb..d0cc4be2de59 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -507,6 +507,7 @@ ibt: ibt@140 { compatible = "aspeed,ast2500-ibt-bmc"; reg = <0x140 0x18>; interrupts = <8>; + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; status = "disabled"; }; }; diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index 5106a424f1ce..465c3549fdc3 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -581,6 +581,7 @@ ibt: ibt@140 { compatible = "aspeed,ast2600-ibt-bmc"; reg = <0x140 0x18>; interrupts = ; + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; status = "disabled"; }; }; From patchwork Mon Nov 1 23:37:49 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: jae.hyun.yoo@intel.com X-Patchwork-Id: 1549402 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HjqFH1w0sz9sXM for ; Tue, 2 Nov 2021 10:37:07 +1100 (AEDT) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4HjqFH0mBkz2yHX for ; Tue, 2 Nov 2021 10:37:07 +1100 (AEDT) X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=intel.com (client-ip=192.55.52.151; helo=mga17.intel.com; envelope-from=jae.hyun.yoo@intel.com; receiver=) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4Hjps44X1kz2xCh for ; Tue, 2 Nov 2021 10:19:36 +1100 (AEDT) X-IronPort-AV: E=McAfee;i="6200,9189,10155"; a="211902791" X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="211902791" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Nov 2021 16:18:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="727670708" Received: from maru.jf.intel.com ([10.54.51.77]) by fmsmga005.fm.intel.com with ESMTP; 01 Nov 2021 16:18:24 -0700 From: jae.hyun.yoo@intel.com To: Rob Herring , Corey Minyard , Joel Stanley , Andrew Jeffery , Cedric Le Goater , Haiyue Wang , Jae Hyun Yoo Subject: [PATCH -next 2/4] ipmi: bt: add clock control logic Date: Mon, 1 Nov 2021 16:37:49 -0700 Message-Id: <20211101233751.49222-3-jae.hyun.yoo@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101233751.49222-1-jae.hyun.yoo@intel.com> References: <20211101233751.49222-1-jae.hyun.yoo@intel.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 02 Nov 2021 10:37:01 +1100 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, openipmi-developer@lists.sourceforge.net, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" From: Jae Hyun Yoo If LPC BT driver is registered ahead of lpc-ctrl module, LPC BT hardware block will be enabled without heart beating of LCLK until lpc-ctrl enables the LCLK. This issue causes improper handling on host interrupts when the host sends interrupts in that time frame. Then kernel eventually forcibly disables the interrupt with dumping stack and printing a 'nobody cared this irq' message out. To prevent this issue, all LPC sub drivers should enable LCLK individually so this patch adds clock control logic into the LPC BT driver. Fixes: 54f9c4d0778b ("ipmi: add an Aspeed BT IPMI BMC driver") Signed-off-by: Jae Hyun Yoo Reviewed-by: Cédric Le Goater Reviewed-by: Andrew Jeffery --- drivers/char/ipmi/bt-bmc.c | 24 +++++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/drivers/char/ipmi/bt-bmc.c b/drivers/char/ipmi/bt-bmc.c index 7450904e330a..a20f92cc7b18 100644 --- a/drivers/char/ipmi/bt-bmc.c +++ b/drivers/char/ipmi/bt-bmc.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -62,6 +63,7 @@ struct bt_bmc { wait_queue_head_t queue; struct timer_list poll_timer; struct mutex mutex; + struct clk *clk; }; static atomic_t open_count = ATOMIC_INIT(0); @@ -423,6 +425,19 @@ static int bt_bmc_probe(struct platform_device *pdev) if (IS_ERR(bt_bmc->base)) return PTR_ERR(bt_bmc->base); + bt_bmc->clk = devm_clk_get(dev, NULL); + if (IS_ERR(bt_bmc->clk)) { + rc = PTR_ERR(bt_bmc->clk); + if (rc != -EPROBE_DEFER) + dev_err(dev, "Unable to get clock\n"); + return rc; + } + rc = clk_prepare_enable(bt_bmc->clk); + if (rc) { + dev_err(dev, "Unable to enable clock\n"); + return rc; + } + mutex_init(&bt_bmc->mutex); init_waitqueue_head(&bt_bmc->queue); @@ -433,7 +448,7 @@ static int bt_bmc_probe(struct platform_device *pdev) rc = misc_register(&bt_bmc->miscdev); if (rc) { dev_err(dev, "Unable to register misc device\n"); - return rc; + goto err; } bt_bmc_config_irq(bt_bmc, pdev); @@ -457,6 +472,11 @@ static int bt_bmc_probe(struct platform_device *pdev) clr_b_busy(bt_bmc); return 0; + +err: + clk_disable_unprepare(bt_bmc->clk); + + return rc; } static int bt_bmc_remove(struct platform_device *pdev) @@ -466,6 +486,8 @@ static int bt_bmc_remove(struct platform_device *pdev) misc_deregister(&bt_bmc->miscdev); if (bt_bmc->irq < 0) del_timer_sync(&bt_bmc->poll_timer); + clk_disable_unprepare(bt_bmc->clk); + return 0; } From patchwork Mon Nov 1 23:37:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: jae.hyun.yoo@intel.com X-Patchwork-Id: 1549403 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HjqFK1VGfz9sXM for ; Tue, 2 Nov 2021 10:37:09 +1100 (AEDT) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4HjqFK0SkSz2yHN for ; Tue, 2 Nov 2021 10:37:09 +1100 (AEDT) X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=intel.com (client-ip=192.55.52.151; helo=mga17.intel.com; envelope-from=jae.hyun.yoo@intel.com; receiver=) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4Hjps537vtz2xCh for ; Tue, 2 Nov 2021 10:19:37 +1100 (AEDT) X-IronPort-AV: E=McAfee;i="6200,9189,10155"; a="211902792" X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="211902792" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Nov 2021 16:18:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="727670711" Received: from maru.jf.intel.com ([10.54.51.77]) by fmsmga005.fm.intel.com with ESMTP; 01 Nov 2021 16:18:24 -0700 From: jae.hyun.yoo@intel.com To: Rob Herring , Corey Minyard , Joel Stanley , Andrew Jeffery , Cedric Le Goater , Haiyue Wang , Jae Hyun Yoo Subject: [PATCH -next 3/4] ARM: dts: aspeed: add LCLK setting into LPC KCS nodes Date: Mon, 1 Nov 2021 16:37:50 -0700 Message-Id: <20211101233751.49222-4-jae.hyun.yoo@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101233751.49222-1-jae.hyun.yoo@intel.com> References: <20211101233751.49222-1-jae.hyun.yoo@intel.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 02 Nov 2021 10:37:01 +1100 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, openipmi-developer@lists.sourceforge.net, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" From: Jae Hyun Yoo Add LCLK clock setting into LPC KCS nodes to enable the LCLK by individual LPC sub drivers. Signed-off-by: Jae Hyun Yoo Reviewed-by: Andrew Jeffery --- arch/arm/boot/dts/aspeed-g5.dtsi | 4 ++++ arch/arm/boot/dts/aspeed-g6.dtsi | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index d0cc4be2de59..7495f93c5069 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -446,6 +446,7 @@ kcs1: kcs@24 { compatible = "aspeed,ast2500-kcs-bmc-v2"; reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>; interrupts = <8>; + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; status = "disabled"; }; @@ -453,6 +454,7 @@ kcs2: kcs@28 { compatible = "aspeed,ast2500-kcs-bmc-v2"; reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>; interrupts = <8>; + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; status = "disabled"; }; @@ -460,6 +462,7 @@ kcs3: kcs@2c { compatible = "aspeed,ast2500-kcs-bmc-v2"; reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>; interrupts = <8>; + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; status = "disabled"; }; @@ -467,6 +470,7 @@ kcs4: kcs@114 { compatible = "aspeed,ast2500-kcs-bmc-v2"; reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>; interrupts = <8>; + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi index 465c3549fdc3..891b862363a7 100644 --- a/arch/arm/boot/dts/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed-g6.dtsi @@ -520,6 +520,7 @@ kcs1: kcs@24 { compatible = "aspeed,ast2500-kcs-bmc-v2"; reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>; interrupts = ; + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; kcs_chan = <1>; status = "disabled"; }; @@ -528,6 +529,7 @@ kcs2: kcs@28 { compatible = "aspeed,ast2500-kcs-bmc-v2"; reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>; interrupts = ; + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; status = "disabled"; }; @@ -535,6 +537,7 @@ kcs3: kcs@2c { compatible = "aspeed,ast2500-kcs-bmc-v2"; reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>; interrupts = ; + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; status = "disabled"; }; @@ -542,6 +545,7 @@ kcs4: kcs@114 { compatible = "aspeed,ast2500-kcs-bmc-v2"; reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>; interrupts = ; + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; status = "disabled"; }; From patchwork Mon Nov 1 23:37:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: jae.hyun.yoo@intel.com X-Patchwork-Id: 1549404 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HjqFL6pm6z9sXM for ; Tue, 2 Nov 2021 10:37:10 +1100 (AEDT) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4HjqFL5zShz2xv2 for ; Tue, 2 Nov 2021 10:37:10 +1100 (AEDT) X-Original-To: linux-aspeed@lists.ozlabs.org Delivered-To: linux-aspeed@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=intel.com (client-ip=192.55.52.151; helo=mga17.intel.com; envelope-from=jae.hyun.yoo@intel.com; receiver=) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4Hjps61pZfz2xCh for ; Tue, 2 Nov 2021 10:19:38 +1100 (AEDT) X-IronPort-AV: E=McAfee;i="6200,9189,10155"; a="211902795" X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="211902795" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Nov 2021 16:18:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,201,1631602800"; d="scan'208";a="727670714" Received: from maru.jf.intel.com ([10.54.51.77]) by fmsmga005.fm.intel.com with ESMTP; 01 Nov 2021 16:18:24 -0700 From: jae.hyun.yoo@intel.com To: Rob Herring , Corey Minyard , Joel Stanley , Andrew Jeffery , Cedric Le Goater , Haiyue Wang , Jae Hyun Yoo Subject: [PATCH -next 4/4] ipmi: kcs_bmc_aspeed: add clock control logic Date: Mon, 1 Nov 2021 16:37:51 -0700 Message-Id: <20211101233751.49222-5-jae.hyun.yoo@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211101233751.49222-1-jae.hyun.yoo@intel.com> References: <20211101233751.49222-1-jae.hyun.yoo@intel.com> MIME-Version: 1.0 X-Mailman-Approved-At: Tue, 02 Nov 2021 10:37:01 +1100 X-BeenThere: linux-aspeed@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux ASPEED SoC development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, openipmi-developer@lists.sourceforge.net, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org Errors-To: linux-aspeed-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linux-aspeed" From: Jae Hyun Yoo If LPC KCS driver is registered ahead of lpc-ctrl module, LPC KCS block will be enabled without heart beating of LCLK until lpc-ctrl enables the LCLK. This issue causes improper handling on host interrupts when the host sends interrupts in that time frame. Then kernel eventually forcibly disables the interrupt with dumping stack and printing a 'nobody cared this irq' message out. To prevent this issue, all LPC sub drivers should enable LCLK individually so this patch adds clock control logic into the LPC KCS driver. Fixes: be2ed207e374 ("ipmi: add an Aspeed KCS IPMI BMC driver") Signed-off-by: Jae Hyun Yoo --- drivers/char/ipmi/kcs_bmc_aspeed.c | 31 ++++++++++++++++++++++++++---- 1 file changed, 27 insertions(+), 4 deletions(-) diff --git a/drivers/char/ipmi/kcs_bmc_aspeed.c b/drivers/char/ipmi/kcs_bmc_aspeed.c index 92a37b33494c..00706472cc4d 100644 --- a/drivers/char/ipmi/kcs_bmc_aspeed.c +++ b/drivers/char/ipmi/kcs_bmc_aspeed.c @@ -6,6 +6,7 @@ #define pr_fmt(fmt) "aspeed-kcs-bmc: " fmt #include +#include #include #include #include @@ -126,6 +127,8 @@ struct aspeed_kcs_bmc { bool remove; struct timer_list timer; } obe; + + struct clk *clk; }; struct aspeed_kcs_of_ops { @@ -620,24 +623,37 @@ static int aspeed_kcs_probe(struct platform_device *pdev) return -ENODEV; } + priv->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(priv->clk)) { + rc = PTR_ERR(priv->clk); + if (rc != -EPROBE_DEFER) + dev_err(&pdev->dev, "Couldn't get clock\n"); + return rc; + } + rc = clk_prepare_enable(priv->clk); + if (rc) { + dev_err(&pdev->dev, "Couldn't enable clock\n"); + return rc; + } + spin_lock_init(&priv->obe.lock); priv->obe.remove = false; timer_setup(&priv->obe.timer, aspeed_kcs_check_obe, 0); rc = aspeed_kcs_set_address(kcs_bmc, addrs, nr_addrs); if (rc) - return rc; + goto err; /* Host to BMC IRQ */ rc = aspeed_kcs_config_downstream_irq(kcs_bmc, pdev); if (rc) - return rc; + goto err; /* BMC to Host IRQ */ if (have_upstream_irq) { rc = aspeed_kcs_config_upstream_irq(priv, upstream_irq[0], upstream_irq[1]); if (rc < 0) - return rc; + goto err; } else { priv->upstream_irq.mode = aspeed_kcs_irq_none; } @@ -650,13 +666,19 @@ static int aspeed_kcs_probe(struct platform_device *pdev) rc = kcs_bmc_add_device(&priv->kcs_bmc); if (rc) { dev_warn(&pdev->dev, "Failed to register channel %d: %d\n", kcs_bmc->channel, rc); - return rc; + goto err; } dev_info(&pdev->dev, "Initialised channel %d at 0x%x\n", kcs_bmc->channel, addrs[0]); return 0; + +err: + aspeed_kcs_enable_channel(kcs_bmc, false); + clk_disable_unprepare(priv->clk); + + return rc; } static int aspeed_kcs_remove(struct platform_device *pdev) @@ -664,6 +686,7 @@ static int aspeed_kcs_remove(struct platform_device *pdev) struct aspeed_kcs_bmc *priv = platform_get_drvdata(pdev); struct kcs_bmc_device *kcs_bmc = &priv->kcs_bmc; + clk_disable_unprepare(priv->clk); kcs_bmc_remove_device(kcs_bmc); aspeed_kcs_enable_channel(kcs_bmc, false);