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[83.57.168.62]) by smtp.gmail.com with ESMTPSA id r10sm6894065wrl.92.2021.10.29.16.18.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Oct 2021 16:18:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v3 1/5] target/arm: Use tcg_constant_i32() in op_smlad() Date: Sat, 30 Oct 2021 01:18:30 +0200 Message-Id: <20211029231834.2476117-2-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211029231834.2476117-1-f4bug@amsat.org> References: <20211029231834.2476117-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x42f.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Avoid using a TCG temporary for a read-only constant. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/arm/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index d6af5b1b039..083a6d6ed77 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7849,10 +7849,9 @@ static bool op_smlad(DisasContext *s, arg_rrrr *a, bool m_swap, bool sub) t3 = tcg_temp_new_i32(); tcg_gen_sari_i32(t3, t1, 31); qf = load_cpu_field(QF); - one = tcg_const_i32(1); + one = tcg_constant_i32(1); tcg_gen_movcond_i32(TCG_COND_NE, qf, t2, t3, one, qf); store_cpu_field(qf, QF); - tcg_temp_free_i32(one); tcg_temp_free_i32(t3); tcg_temp_free_i32(t2); } From patchwork Fri Oct 29 23:18:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1548425 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=n5bGVif8; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Hgz466nzWz9ssP for ; Sat, 30 Oct 2021 10:22:46 +1100 (AEDT) Received: from localhost ([::1]:49276 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mgbCu-0006jI-OG for incoming@patchwork.ozlabs.org; Fri, 29 Oct 2021 19:22:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48108) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mgb9A-0001TM-Ci; Fri, 29 Oct 2021 19:18:52 -0400 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]:34616) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mgb98-0006hV-Ih; Fri, 29 Oct 2021 19:18:52 -0400 Received: by mail-wr1-x436.google.com with SMTP id d5so3860593wrc.1; Fri, 29 Oct 2021 16:18:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3IMxeujrA9pkHzGmlQQ3ZftEGFPf6+T20rNX3ir1Ss0=; b=n5bGVif8D3yLen/dDyF0GTte3SsTHLjO/RYMesICC77h7js6EO8LEuedJ4dN5ufOLa XzJoWryiZ77TmEbbH2eM/S+tDsBJ2LHj6Takv6D9oasyzki5uGc1VSb1l+acrtFh01L+ jSK5yEHMrjBuiWfxsLTOI0muJQOdQmpsFYVkv0HIU5qXDh3wLMgTFUTAt9NrLGi+AqRD 5wZaIl4ak/A+lHmkG9NWglqrJiffy19vZ2gYFbmpPzxzM8ArPZrdqs3XJjNXIBZHXXCN 0lv7dKcMOKZYM026zZeLUHmuoTglPMLeIFwSV3k67Lt0EICcUbQ/3f8GoPONPh/9Grg9 X0tQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=3IMxeujrA9pkHzGmlQQ3ZftEGFPf6+T20rNX3ir1Ss0=; b=G1ho52l+saz+o+leznp+nO4HOF1/JLnGY+QSaY8RxU3J24LcBE48osjsr3A0fRUh3m 585CbxQXFKkZeO2x7S5uG8V6RoRl8pIRkJsVXvv1OqRfkeXO5B9SvtYBf8eMmIkk0ndl BtOxzICZYYIVthO59PnWXKoPcDoj+Lb2JgBS5uQh9VF8XtOpRB6JrB6HUlu2z0ULFeHq PFQ49GRiKNguji2aaniRXY0zkJbj/FDu43ZSEmPVuSLaS4ONjtlthK86ywodNt6kscsE 78GdAM6XDKjuztjUgu+ZMv0Oleuefa9fZAqseTfpRk5JZHXTkV28ZVjB538JHZ1QpRqF d0iQ== X-Gm-Message-State: AOAM5304fQrR8I75JlgtPCfdorR0khFdZbAWh4wnrppbgpayKNUk/leu d9kMlo+pJksP7tdvesBYHb0THlY8Gj8= X-Google-Smtp-Source: ABdhPJyP2Dnck145zvnW0eMTZy1ceYVCl2Mdd2RyPC6uRZ//52TA1tmnAjfnhU99jsDmRsOwtJydkQ== X-Received: by 2002:a05:600c:2505:: with SMTP id d5mr14526418wma.194.1635549526879; Fri, 29 Oct 2021 16:18:46 -0700 (PDT) Received: from x1w.redhat.com (62.red-83-57-168.dynamicip.rima-tde.net. [83.57.168.62]) by smtp.gmail.com with ESMTPSA id i7sm2023213wmb.20.2021.10.29.16.18.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Oct 2021 16:18:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v3 2/5] target/arm: Introduce store_cpu_field_constant() helper Date: Sat, 30 Oct 2021 01:18:31 +0200 Message-Id: <20211029231834.2476117-3-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211029231834.2476117-1-f4bug@amsat.org> References: <20211029231834.2476117-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x436.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Similarly to the store_cpu_field() helper which takes a TCG temporary, store its value to the CPUState, introduce the store_cpu_field_constant() helper which store a constant to CPUState (without using any TCG temporary). Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/translate-a32.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/arm/translate-a32.h b/target/arm/translate-a32.h index 88f15df60e8..17af8dc95a8 100644 --- a/target/arm/translate-a32.h +++ b/target/arm/translate-a32.h @@ -70,6 +70,9 @@ static inline void store_cpu_offset(TCGv_i32 var, int offset) #define store_cpu_field(var, name) \ store_cpu_offset(var, offsetof(CPUARMState, name)) +#define store_cpu_field_constant(val, name) \ + tcg_gen_st_i32(tcg_constant_i32(val), cpu_env, offsetof(CPUARMState, name)) + /* Create a new temporary and set it to the value of a CPU register. */ static inline TCGv_i32 load_reg(DisasContext *s, int reg) { From patchwork Fri Oct 29 23:18:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1548424 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=hBLWTMcI; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Hgz1r3yFpz9ssP for ; Sat, 30 Oct 2021 10:20:48 +1100 (AEDT) Received: from localhost ([::1]:43004 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mgbB0-0002RR-9D for incoming@patchwork.ozlabs.org; Fri, 29 Oct 2021 19:20:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48126) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mgb9G-0001X8-Oj; Fri, 29 Oct 2021 19:18:58 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]:41516) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mgb9B-0006iW-QC; Fri, 29 Oct 2021 19:18:55 -0400 Received: by mail-wr1-x42f.google.com with SMTP id d3so19118048wrh.8; Fri, 29 Oct 2021 16:18:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=swq+ujz87mpmAn8eQLeFpgy6KxnzzsPRpEtfSs0XAHY=; b=hBLWTMcI9nGwK869dA11CYAtPpX7tsO3zpRct5cSs1OAGg4mI9sPnC7hiOv15E8+0P YpEGuMk4+7mMyGTXCWxQEDZlVPeoachUvsIcc5eRPQyxAU6QeW3Ie51MjLgTuaa9e/cl B+3apkTZG9JVkg3Gl/NbgXiL9yot5MZjnVlD6LCZ+Bn08Vx1DXO8pl+j2vGAGHlKInE7 FfyjnuH+Z9AEl7ozyt07sXw9Fiu2k9PSHFlW0RzPxJakRN9JkpiM56bZmc4lh0wZRNFl owQcymVFrpZwY4FdEi12x8KtknEADMzaSKfGOtSUs7VfCNuhYLh9tropkN18kRqpaj55 hb0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=swq+ujz87mpmAn8eQLeFpgy6KxnzzsPRpEtfSs0XAHY=; b=dSRmK8UEWnRLSIcgxYitkz03r4pN7VpsbVxb02weZRXX0wlyo7InfV4iN0JCC3pNM3 SYs+Wmm4T0zcw9LIK6naX5tF5YA+Qx6vjojN40QWR5ISjkzezmtP/TJjLTITCNeLyqVk oGUnQ6JaOMSmingrnyFeNTB87d6wZc/37R89YbodVYnpNyE6TNd6nEO+CT73R8zmMUyG JeSWal+XayFnOo9IGW8w1Og3sHICDPy22pqOTO8cQTw0xTRlWgV58a9T9D5pVBAWkINo Ro0z5XxnNB8f9LrNT1aFsc5zi/VO8bPBP1CRtaOiIcetWgVZWifDWUsuX9wh7WmJLicW sAEQ== X-Gm-Message-State: AOAM532Df3GZA9vhwANIyIR6pno9Y5KHaxqScCxPPD5PpWwQlAI9UzG4 5pwa4nEy36Eoftdi3MesAFLeXdjvDl4= X-Google-Smtp-Source: ABdhPJxCl3XpP87KaeIVEvRLEHoA72YYpRjrhrob7D/Ucv602WXdrEeEPaHhToi/vsY39ImcqsEuiw== X-Received: by 2002:a7b:c5d9:: with SMTP id n25mr23034500wmk.139.1635549531585; Fri, 29 Oct 2021 16:18:51 -0700 (PDT) Received: from x1w.redhat.com (62.red-83-57-168.dynamicip.rima-tde.net. [83.57.168.62]) by smtp.gmail.com with ESMTPSA id m31sm6100870wms.25.2021.10.29.16.18.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Oct 2021 16:18:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v3 3/5] target/arm: Use the constant variant of store_cpu_field() when possible Date: Sat, 30 Oct 2021 01:18:32 +0200 Message-Id: <20211029231834.2476117-4-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211029231834.2476117-1-f4bug@amsat.org> References: <20211029231834.2476117-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x42f.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" When using a constant variable, we can replace the store_cpu_field() call by store_cpu_field_constant() which avoid using TCG temporaries. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/arm/translate.c | 21 ++++++--------------- 1 file changed, 6 insertions(+), 15 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index 083a6d6ed77..52ba562c96b 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -364,8 +364,7 @@ void clear_eci_state(DisasContext *s) * multiple insn executes. */ if (s->eci) { - TCGv_i32 tmp = tcg_const_i32(0); - store_cpu_field(tmp, condexec_bits); + store_cpu_field_constant(0, condexec_bits); s->eci = 0; } } @@ -740,9 +739,8 @@ void gen_set_condexec(DisasContext *s) { if (s->condexec_mask) { uint32_t val = (s->condexec_cond << 4) | (s->condexec_mask >> 1); - TCGv_i32 tmp = tcg_temp_new_i32(); - tcg_gen_movi_i32(tmp, val); - store_cpu_field(tmp, condexec_bits); + + store_cpu_field_constant(val, condexec_bits); } } @@ -8362,8 +8360,6 @@ static bool trans_BL(DisasContext *s, arg_i *a) static bool trans_BLX_i(DisasContext *s, arg_BLX_i *a) { - TCGv_i32 tmp; - /* * BLX would be useless on M-profile; the encoding space * is used for other insns from v8.1M onward, and UNDEFs before that. @@ -8377,8 +8373,7 @@ static bool trans_BLX_i(DisasContext *s, arg_BLX_i *a) return false; } tcg_gen_movi_i32(cpu_R[14], s->base.pc_next | s->thumb); - tmp = tcg_const_i32(!s->thumb); - store_cpu_field(tmp, thumb); + store_cpu_field_constant(!s->thumb, thumb); gen_jmp(s, (read_pc(s) & ~3) + a->imm); return true; } @@ -8677,7 +8672,6 @@ static bool trans_LCTP(DisasContext *s, arg_LCTP *a) * doesn't cache branch information, all we need to do is reset * FPSCR.LTPSIZE to 4. */ - TCGv_i32 ltpsize; if (!dc_isar_feature(aa32_lob, s) || !dc_isar_feature(aa32_mve, s)) { @@ -8688,8 +8682,7 @@ static bool trans_LCTP(DisasContext *s, arg_LCTP *a) return true; } - ltpsize = tcg_const_i32(4); - store_cpu_field(ltpsize, v7m.ltpsize); + store_cpu_field_constant(4, v7m.ltpsize); return true; } @@ -9487,9 +9480,7 @@ static void arm_tr_tb_start(DisasContextBase *dcbase, CPUState *cpu) /* Reset the conditional execution bits immediately. This avoids complications trying to do it at the end of the block. */ if (dc->condexec_mask || dc->condexec_cond) { - TCGv_i32 tmp = tcg_temp_new_i32(); - tcg_gen_movi_i32(tmp, 0); - store_cpu_field(tmp, condexec_bits); + store_cpu_field_constant(0, condexec_bits); } } From patchwork Fri Oct 29 23:18:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1548426 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20210112 header.b=lNarN3wu; dkim-atps=neutral Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4Hgz5F12pVz9ssP for ; Sat, 30 Oct 2021 10:23:45 +1100 (AEDT) Received: from localhost ([::1]:53360 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mgbDq-00010M-VE for incoming@patchwork.ozlabs.org; Fri, 29 Oct 2021 19:23:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48144) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mgb9I-0001ZG-7y; Fri, 29 Oct 2021 19:19:00 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]:35350) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mgb9G-0006iz-Ea; Fri, 29 Oct 2021 19:18:59 -0400 Received: by mail-wr1-x42e.google.com with SMTP id i5so11481418wrb.2; Fri, 29 Oct 2021 16:18:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MY9quCqJ/2Bz6tK8Zx9ZzguPdmzXrHRSyEOAkDlUTqE=; b=lNarN3wuSC4YDnLa0xvKEKXbmxO4J9zrq2P/0W6YJbryUerWu8qlqhlSGRTFcyP06W CFTa4WivDsVZgdaovZoPE5vpYn0KGfszueFmDEk/OX5BKYCy5+LNq2hTCLLcy8gBKW7/ feSmeASjMW2B+gfhgrNcQAGvaGHRv9gXm0c2pzXzfvGCshrtRM+i8fXGki3709iq79c9 d69uv6zvGVtFQ2v8Rkdcxs7Wy8eoMqdtna7CIgq0O13CBoTQKlUFkmb5JN4a2c8DNG5a lYl5u6l9/SJIA5iHFeNgW79S8mOYxhEpDkLIK44U8KIYPJqUWmcmmdEHQmt2afUmFW4o 6rbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=MY9quCqJ/2Bz6tK8Zx9ZzguPdmzXrHRSyEOAkDlUTqE=; b=eYPsnHZ03/UsE5XgTFfPQ1Zwe+cWwSDFVfotqsbxrPBI0KvgMbaP/K2Ve4x8d+DN90 +V5i21GaOm5jfGsO+fcnM1KtNP+OO2vXWHzxlslnpd4QRmLDf3vXZ5a8SbrZ9efPN08v jev6txNZHpTJ3G04OFtiEdn1PpFGKmQ4rJVYmga8SvGeCUvrxS4LHs1Zbb/P7FD+UIEJ JstXQlchGLDSZFgcb1Yz34/dMwl16BgJeHwVNJHgTqYvf0F2fJB0Tc45hJZE9XbuuFLx zrTcIrKDDnt0215U2PLY7Tikb6lqzG+O9rYbWk/sQnx/BzWNRU8AF5U/mGurMd2Xu1V0 FQyg== X-Gm-Message-State: AOAM533kUGNryD+hhBaRaRPDHb03TwI/qsVglBa+wDbJkXqniKXNH5sz gNetss3KOZl2WcsRvkWO052Kczx54lM= X-Google-Smtp-Source: ABdhPJxebAJZSh5pCFFKXlC5/mX/OX+LffRnk4wyXHnV6YlCZS0gKMGb27L8ekma7Wean/5+MznR4g== X-Received: by 2002:a5d:6e91:: with SMTP id k17mr17735855wrz.260.1635549536702; Fri, 29 Oct 2021 16:18:56 -0700 (PDT) Received: from x1w.redhat.com (62.red-83-57-168.dynamicip.rima-tde.net. [83.57.168.62]) by smtp.gmail.com with ESMTPSA id r11sm6588586wrt.42.2021.10.29.16.18.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Oct 2021 16:18:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v3 4/5] target/arm: Use tcg_constant_i64() in do_sat_addsub_64() Date: Sat, 30 Oct 2021 01:18:33 +0200 Message-Id: <20211029231834.2476117-5-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211029231834.2476117-1-f4bug@amsat.org> References: <20211029231834.2476117-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x42e.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The immediate value used for comparison is constant and read-only. Move it to the constant pool. This frees a TCG temporary for unsigned saturation opcodes. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/arm/translate-sve.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index bc91a641711..76b5fe9f313 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -1943,20 +1943,20 @@ static void do_sat_addsub_32(TCGv_i64 reg, TCGv_i64 val, bool u, bool d) static void do_sat_addsub_64(TCGv_i64 reg, TCGv_i64 val, bool u, bool d) { TCGv_i64 t0 = tcg_temp_new_i64(); - TCGv_i64 t1 = tcg_temp_new_i64(); TCGv_i64 t2; if (u) { if (d) { tcg_gen_sub_i64(t0, reg, val); - tcg_gen_movi_i64(t1, 0); - tcg_gen_movcond_i64(TCG_COND_LTU, reg, reg, val, t1, t0); + t2 = tcg_constant_i64(0); + tcg_gen_movcond_i64(TCG_COND_LTU, reg, reg, val, t2, t0); } else { tcg_gen_add_i64(t0, reg, val); - tcg_gen_movi_i64(t1, -1); - tcg_gen_movcond_i64(TCG_COND_LTU, reg, t0, reg, t1, t0); + t2 = tcg_constant_i64(-1); + tcg_gen_movcond_i64(TCG_COND_LTU, reg, t0, reg, t2, t0); } } else { + TCGv_i64 t1 = tcg_temp_new_i64(); if (d) { /* Detect signed overflow for subtraction. */ tcg_gen_xor_i64(t0, reg, val); @@ -1966,7 +1966,7 @@ static void do_sat_addsub_64(TCGv_i64 reg, TCGv_i64 val, bool u, bool d) /* Bound the result. */ tcg_gen_movi_i64(reg, INT64_MIN); - t2 = tcg_const_i64(0); + t2 = tcg_constant_i64(0); tcg_gen_movcond_i64(TCG_COND_LT, reg, t0, t2, reg, t1); } else { /* Detect signed overflow for addition. */ @@ -1977,13 +1977,12 @@ static void do_sat_addsub_64(TCGv_i64 reg, TCGv_i64 val, bool u, bool d) /* Bound the result. */ tcg_gen_movi_i64(t1, INT64_MAX); - t2 = tcg_const_i64(0); + t2 = tcg_constant_i64(0); tcg_gen_movcond_i64(TCG_COND_LT, reg, t0, t2, t1, reg); } - tcg_temp_free_i64(t2); + tcg_temp_free_i64(t1); } tcg_temp_free_i64(t0); - tcg_temp_free_i64(t1); } /* Similarly with a vector and a scalar operand. */ From patchwork Fri Oct 29 23:18:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1548423 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: bilbo.ozlabs.org; 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[83.57.168.62]) by smtp.gmail.com with ESMTPSA id m31sm6101077wms.25.2021.10.29.16.19.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Oct 2021 16:19:00 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v3 5/5] target/arm: Use tcg_constant_i32() in gen_rev16() Date: Sat, 30 Oct 2021 01:18:34 +0200 Message-Id: <20211029231834.2476117-6-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211029231834.2476117-1-f4bug@amsat.org> References: <20211029231834.2476117-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x42e.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Since the mask is a constant value, use tcg_constant_i32() instead of a TCG temporary. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/translate.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index 52ba562c96b..98f59259284 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -388,13 +388,12 @@ static void gen_smul_dual(TCGv_i32 a, TCGv_i32 b) void gen_rev16(TCGv_i32 dest, TCGv_i32 var) { TCGv_i32 tmp = tcg_temp_new_i32(); - TCGv_i32 mask = tcg_const_i32(0x00ff00ff); + TCGv_i32 mask = tcg_constant_i32(0x00ff00ff); tcg_gen_shri_i32(tmp, var, 8); tcg_gen_and_i32(tmp, tmp, mask); tcg_gen_and_i32(var, var, mask); tcg_gen_shli_i32(var, var, 8); tcg_gen_or_i32(dest, var, tmp); - tcg_temp_free_i32(mask); tcg_temp_free_i32(tmp); }