From patchwork Thu Oct 21 19:45:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544568 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZyp14jHDz9sPB for ; Fri, 22 Oct 2021 06:53:13 +1100 (AEDT) Received: from localhost ([::1]:42168 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde7j-0001Tz-Df for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 15:53:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33484) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde1p-0002r3-76; Thu, 21 Oct 2021 15:47:05 -0400 Received: from [201.28.113.2] (port=45000 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde1n-00078b-DP; Thu, 21 Oct 2021 15:47:04 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:46:54 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id BAF49800145; Thu, 21 Oct 2021 16:46:53 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 01/33] target/ppc: introduce do_ea_calc Date: Thu, 21 Oct 2021 16:45:15 -0300 Message-Id: <20211021194547.672988-2-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:46:54.0274 (UTC) FILETIME=[66421A20:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pherde , lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: pherde The do_ea_calc function will calculate the effective address(EA) according to PowerIsa 3.1. With that, it was replaced part of do_ldst() that calculates the EA by this new function. Signed-off-by: Fernando Eckhardt Valle (pherde) Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/translate.c | 12 ++++++++++++ target/ppc/translate/fixedpoint-impl.c.inc | 9 +-------- 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 62414adb75..bb8edd9d8f 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -3197,6 +3197,18 @@ static inline void gen_align_no_le(DisasContext *ctx) (ctx->opcode & 0x03FF0000) | POWERPC_EXCP_ALIGN_LE); } +static inline void do_ea_calc(DisasContext *ctx, int ra, TCGv displ, TCGv ea) +{ + if (ra) { + tcg_gen_add_tl(ea, cpu_gpr[ra], displ); + } else { + tcg_gen_mov_tl(ea, displ); + } + if (NARROW_MODE(ctx)) { + tcg_gen_ext32u_tl(ea, ea); + } +} + /*** Integer load ***/ #define DEF_MEMOP(op) ((op) | ctx->default_tcg_memop_mask) #define BSWAP_MEMOP(op) ((op) | (ctx->default_tcg_memop_mask ^ MO_BSWAP)) diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 2e2518ee15..53d8fbdcfe 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -52,14 +52,7 @@ static bool do_ldst(DisasContext *ctx, int rt, int ra, TCGv displ, bool update, gen_set_access_type(ctx, ACCESS_INT); ea = tcg_temp_new(); - if (ra) { - tcg_gen_add_tl(ea, cpu_gpr[ra], displ); - } else { - tcg_gen_mov_tl(ea, displ); - } - if (NARROW_MODE(ctx)) { - tcg_gen_ext32u_tl(ea, ea); - } + do_ea_calc(ctx, ra, displ, ea); mop ^= ctx->default_tcg_memop_mask; if (store) { tcg_gen_qemu_st_tl(cpu_gpr[rt], ea, ctx->mem_idx, mop); From patchwork Thu Oct 21 19:45:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544563 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZyk61JLlz9sPB for ; Fri, 22 Oct 2021 06:49:49 +1100 (AEDT) Received: from localhost ([::1]:35918 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde4R-0005Ut-L6 for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 15:49:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33510) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde1t-00031C-VG; Thu, 21 Oct 2021 15:47:09 -0400 Received: from [201.28.113.2] (port=45000 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde1q-00078b-Tw; Thu, 21 Oct 2021 15:47:09 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:46:54 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 2E55E80012A; Thu, 21 Oct 2021 16:46:54 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 02/33] target/ppc: move resolve_PLS_D to translate.c Date: Thu, 21 Oct 2021 16:45:16 -0300 Message-Id: <20211021194547.672988-3-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:46:54.0731 (UTC) FILETIME=[6687D5B0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pherde , lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: pherde Move resolve_PLS_D from fixedpoint-impl.c.inc to translate.c because this way the function can be used not only by fixed point instructions. Signed-off-by: Fernando Eckhardt Valle (pherde) Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/translate.c | 19 +++++++++++++++++++ target/ppc/translate/fixedpoint-impl.c.inc | 19 ------------------- 2 files changed, 19 insertions(+), 19 deletions(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index bb8edd9d8f..39f03ac658 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7521,6 +7521,25 @@ static int times_4(DisasContext *ctx, int x) #include "decode-insn64.c.inc" #include "power8-pmu-regs.c.inc" +/* + * Incorporate CIA into the constant when R=1. + * Validate that when R=1, RA=0. + */ +static bool resolve_PLS_D(DisasContext *ctx, arg_D *d, arg_PLS_D *a) +{ + d->rt = a->rt; + d->ra = a->ra; + d->si = a->si; + if (a->r) { + if (unlikely(a->ra != 0)) { + gen_invalid(ctx); + return false; + } + d->si += ctx->cia; + } + return true; +} + #include "translate/fixedpoint-impl.c.inc" #include "translate/fp-impl.c.inc" diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 53d8fbdcfe..1c35b60eb4 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -17,25 +17,6 @@ * License along with this library; if not, see . */ -/* - * Incorporate CIA into the constant when R=1. - * Validate that when R=1, RA=0. - */ -static bool resolve_PLS_D(DisasContext *ctx, arg_D *d, arg_PLS_D *a) -{ - d->rt = a->rt; - d->ra = a->ra; - d->si = a->si; - if (a->r) { - if (unlikely(a->ra != 0)) { - gen_invalid(ctx); - return false; - } - d->si += ctx->cia; - } - return true; -} - /* * Fixed-Point Load/Store Instructions */ From patchwork Thu Oct 21 19:45:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544574 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZyth5kVyz9sNH for ; Fri, 22 Oct 2021 06:57:16 +1100 (AEDT) Received: from localhost ([::1]:50628 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeBe-0007Mb-HK for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 15:57:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33524) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde1y-0003Bi-BF; Thu, 21 Oct 2021 15:47:14 -0400 Received: from [201.28.113.2] (port=54417 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde1v-0007P8-Ff; Thu, 21 Oct 2021 15:47:14 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:46:55 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 9F31B800145; Thu, 21 Oct 2021 16:46:54 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 03/33] target/ppc: Move load and store floating point instructions to decodetree Date: Thu, 21 Oct 2021 16:45:17 -0300 Message-Id: <20211021194547.672988-4-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:46:55.0265 (UTC) FILETIME=[66D95110:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pherde , lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, Fernando Eckhardt Valle , matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: pherde Move load floating point instructions (lfs, lfsu, lfsx, lfsux, lfd, lfdu, lfdx, lfdux) and store floating point instructions(stfs, stfsu, stfsx, stfsux, stfd, stfdu, stfdx, stfdux) from legacy system to decodetree. Signed-off-by: Fernando Eckhardt Valle Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn32.decode | 24 +++ target/ppc/translate/fp-impl.c.inc | 240 ++++++++--------------------- target/ppc/translate/fp-ops.c.inc | 29 ---- 3 files changed, 88 insertions(+), 205 deletions(-) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 6aec1c0728..3837b799c8 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -193,6 +193,30 @@ ADDPCIS 010011 ..... ..... .......... 00010 . @DX CFUGED 011111 ..... ..... ..... 0011011100 - @X +### Float-Point Load Instructions + +LFS 110000 ..... ..... ................ @D +LFSU 110001 ..... ..... ................ @D +LFSX 011111 ..... ..... ..... 1000010111 - @X +LFSUX 011111 ..... ..... ..... 1000110111 - @X + +LFD 110010 ..... ..... ................ @D +LFDU 110011 ..... ..... ................ @D +LFDX 011111 ..... ..... ..... 1001010111 - @X +LFDUX 011111 ..... ..... ..... 1001110111 - @X + +### Float-Point Store Instructions + +STFS 110100 ..... ...... ............... @D +STFSU 110101 ..... ...... ............... @D +STFSX 011111 ..... ...... .... 1010010111 - @X +STFSUX 011111 ..... ...... .... 1010110111 - @X + +STFD 110110 ..... ...... ............... @D +STFDU 110111 ..... ...... ............... @D +STFDX 011111 ..... ...... .... 1011010111 - @X +STFDUX 011111 ..... ...... .... 1011110111 - @X + ### Move To/From System Register Instructions SETBC 011111 ..... ..... ----- 0110000000 - @X_bi diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc index 9f7868ee28..76b382ebe5 100644 --- a/target/ppc/translate/fp-impl.c.inc +++ b/target/ppc/translate/fp-impl.c.inc @@ -854,99 +854,6 @@ static void gen_mtfsfi(DisasContext *ctx) gen_helper_float_check_status(cpu_env); } -/*** Floating-point load ***/ -#define GEN_LDF(name, ldop, opc, type) \ -static void glue(gen_, name)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - TCGv_i64 t0; \ - if (unlikely(!ctx->fpu_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_FPU); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_FLOAT); \ - EA = tcg_temp_new(); \ - t0 = tcg_temp_new_i64(); \ - gen_addr_imm_index(ctx, EA, 0); \ - gen_qemu_##ldop(ctx, t0, EA); \ - set_fpr(rD(ctx->opcode), t0); \ - tcg_temp_free(EA); \ - tcg_temp_free_i64(t0); \ -} - -#define GEN_LDUF(name, ldop, opc, type) \ -static void glue(gen_, name##u)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - TCGv_i64 t0; \ - if (unlikely(!ctx->fpu_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_FPU); \ - return; \ - } \ - if (unlikely(rA(ctx->opcode) == 0)) { \ - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_FLOAT); \ - EA = tcg_temp_new(); \ - t0 = tcg_temp_new_i64(); \ - gen_addr_imm_index(ctx, EA, 0); \ - gen_qemu_##ldop(ctx, t0, EA); \ - set_fpr(rD(ctx->opcode), t0); \ - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ - tcg_temp_free_i64(t0); \ -} - -#define GEN_LDUXF(name, ldop, opc, type) \ -static void glue(gen_, name##ux)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - TCGv_i64 t0; \ - if (unlikely(!ctx->fpu_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_FPU); \ - return; \ - } \ - t0 = tcg_temp_new_i64(); \ - if (unlikely(rA(ctx->opcode) == 0)) { \ - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_FLOAT); \ - EA = tcg_temp_new(); \ - gen_addr_reg_index(ctx, EA); \ - gen_qemu_##ldop(ctx, t0, EA); \ - set_fpr(rD(ctx->opcode), t0); \ - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ - tcg_temp_free_i64(t0); \ -} - -#define GEN_LDXF(name, ldop, opc2, opc3, type) \ -static void glue(gen_, name##x)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - TCGv_i64 t0; \ - if (unlikely(!ctx->fpu_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_FPU); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_FLOAT); \ - EA = tcg_temp_new(); \ - t0 = tcg_temp_new_i64(); \ - gen_addr_reg_index(ctx, EA); \ - gen_qemu_##ldop(ctx, t0, EA); \ - set_fpr(rD(ctx->opcode), t0); \ - tcg_temp_free(EA); \ - tcg_temp_free_i64(t0); \ -} - -#define GEN_LDFS(name, ldop, op, type) \ -GEN_LDF(name, ldop, op | 0x20, type); \ -GEN_LDUF(name, ldop, op | 0x21, type); \ -GEN_LDUXF(name, ldop, op | 0x01, type); \ -GEN_LDXF(name, ldop, 0x17, op | 0x00, type) - static void gen_qemu_ld32fs(DisasContext *ctx, TCGv_i64 dest, TCGv addr) { TCGv_i32 tmp = tcg_temp_new_i32(); @@ -955,11 +862,6 @@ static void gen_qemu_ld32fs(DisasContext *ctx, TCGv_i64 dest, TCGv addr) tcg_temp_free_i32(tmp); } - /* lfd lfdu lfdux lfdx */ -GEN_LDFS(lfd, ld64_i64, 0x12, PPC_FLOAT); - /* lfs lfsu lfsux lfsx */ -GEN_LDFS(lfs, ld32fs, 0x10, PPC_FLOAT); - /* lfdepx (external PID lfdx) */ static void gen_lfdepx(DisasContext *ctx) { @@ -1089,73 +991,6 @@ static void gen_lfiwzx(DisasContext *ctx) tcg_temp_free(EA); tcg_temp_free_i64(t0); } -/*** Floating-point store ***/ -#define GEN_STF(name, stop, opc, type) \ -static void glue(gen_, name)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - TCGv_i64 t0; \ - if (unlikely(!ctx->fpu_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_FPU); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_FLOAT); \ - EA = tcg_temp_new(); \ - t0 = tcg_temp_new_i64(); \ - gen_addr_imm_index(ctx, EA, 0); \ - get_fpr(t0, rS(ctx->opcode)); \ - gen_qemu_##stop(ctx, t0, EA); \ - tcg_temp_free(EA); \ - tcg_temp_free_i64(t0); \ -} - -#define GEN_STUF(name, stop, opc, type) \ -static void glue(gen_, name##u)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - TCGv_i64 t0; \ - if (unlikely(!ctx->fpu_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_FPU); \ - return; \ - } \ - if (unlikely(rA(ctx->opcode) == 0)) { \ - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_FLOAT); \ - EA = tcg_temp_new(); \ - t0 = tcg_temp_new_i64(); \ - gen_addr_imm_index(ctx, EA, 0); \ - get_fpr(t0, rS(ctx->opcode)); \ - gen_qemu_##stop(ctx, t0, EA); \ - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ - tcg_temp_free_i64(t0); \ -} - -#define GEN_STUXF(name, stop, opc, type) \ -static void glue(gen_, name##ux)(DisasContext *ctx) \ -{ \ - TCGv EA; \ - TCGv_i64 t0; \ - if (unlikely(!ctx->fpu_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_FPU); \ - return; \ - } \ - if (unlikely(rA(ctx->opcode) == 0)) { \ - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); \ - return; \ - } \ - gen_set_access_type(ctx, ACCESS_FLOAT); \ - EA = tcg_temp_new(); \ - t0 = tcg_temp_new_i64(); \ - gen_addr_reg_index(ctx, EA); \ - get_fpr(t0, rS(ctx->opcode)); \ - gen_qemu_##stop(ctx, t0, EA); \ - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ - tcg_temp_free(EA); \ - tcg_temp_free_i64(t0); \ -} #define GEN_STXF(name, stop, opc2, opc3, type) \ static void glue(gen_, name##x)(DisasContext *ctx) \ @@ -1176,12 +1011,6 @@ static void glue(gen_, name##x)(DisasContext *ctx) \ tcg_temp_free_i64(t0); \ } -#define GEN_STFS(name, stop, op, type) \ -GEN_STF(name, stop, op | 0x20, type); \ -GEN_STUF(name, stop, op | 0x21, type); \ -GEN_STUXF(name, stop, op | 0x01, type); \ -GEN_STXF(name, stop, 0x17, op | 0x00, type) - static void gen_qemu_st32fs(DisasContext *ctx, TCGv_i64 src, TCGv addr) { TCGv_i32 tmp = tcg_temp_new_i32(); @@ -1190,11 +1019,6 @@ static void gen_qemu_st32fs(DisasContext *ctx, TCGv_i64 src, TCGv addr) tcg_temp_free_i32(tmp); } -/* stfd stfdu stfdux stfdx */ -GEN_STFS(stfd, st64_i64, 0x16, PPC_FLOAT); -/* stfs stfsu stfsux stfsx */ -GEN_STFS(stfs, st32fs, 0x14, PPC_FLOAT); - /* stfdepx (external PID lfdx) */ static void gen_stfdepx(DisasContext *ctx) { @@ -1473,6 +1297,70 @@ static void gen_stfqx(DisasContext *ctx) tcg_temp_free_i64(t1); } +/* Floating-point Load/Store Instructions */ +static bool do_lsfpsd(DisasContext *ctx, int rt, int ra, TCGv displ, + bool update, bool store, bool single) +{ + TCGv ea; + TCGv_i64 t0; + REQUIRE_INSNS_FLAGS(ctx, FLOAT); + REQUIRE_FPU(ctx); + if (update && ra == 0) { + gen_invalid(ctx); + return true; + } + gen_set_access_type(ctx, ACCESS_FLOAT); + t0 = tcg_temp_new_i64(); + ea = tcg_temp_new(); + do_ea_calc(ctx, ra, displ, ea); + if (store) { + get_fpr(t0, rt); + single ? gen_qemu_st32fs(ctx, t0, ea) : gen_qemu_st64_i64(ctx, t0, ea); + } else { + single ? gen_qemu_ld32fs(ctx, t0, ea) : gen_qemu_ld64_i64(ctx, t0, ea); + set_fpr(rt, t0); + } + if (update) { + tcg_gen_mov_tl(cpu_gpr[rt], ea); + } + tcg_temp_free_i64(t0); + tcg_temp_free(ea); + return true; +} + +static bool do_lsfp_D(DisasContext *ctx, arg_D *a, bool update, bool store, + bool single) +{ + return do_lsfpsd(ctx, a->rt, a->ra, tcg_constant_tl(a->si), update, store, + single); +} + +static bool do_lsfp_X(DisasContext *ctx, arg_X *a, bool update, + bool store, bool single) +{ + return do_lsfpsd(ctx, a->rt, a->ra, cpu_gpr[a->rb], update, store, single); +} + +TRANS(LFS, do_lsfp_D, false, false, true) +TRANS(LFSU, do_lsfp_D, true, false, true) +TRANS(LFSX, do_lsfp_X, false, false, true) +TRANS(LFSUX, do_lsfp_X, true, false, true) + +TRANS(LFD, do_lsfp_D, false, false, false) +TRANS(LFDU, do_lsfp_D, true, false, false) +TRANS(LFDX, do_lsfp_X, false, false, false) +TRANS(LFDUX, do_lsfp_X, true, false, false) + +TRANS(STFS, do_lsfp_D, false, true, true) +TRANS(STFSU, do_lsfp_D, true, true, true) +TRANS(STFSX, do_lsfp_X, false, true, true) +TRANS(STFSUX, do_lsfp_X, true, true, true) + +TRANS(STFD, do_lsfp_D, false, true, false) +TRANS(STFDU, do_lsfp_D, true, true, false) +TRANS(STFDX, do_lsfp_X, false, true, false) +TRANS(STFDUX, do_lsfp_X, true, true, false) + #undef _GEN_FLOAT_ACB #undef GEN_FLOAT_ACB #undef _GEN_FLOAT_AB diff --git a/target/ppc/translate/fp-ops.c.inc b/target/ppc/translate/fp-ops.c.inc index 88fab65628..4260635a12 100644 --- a/target/ppc/translate/fp-ops.c.inc +++ b/target/ppc/translate/fp-ops.c.inc @@ -50,43 +50,14 @@ GEN_FLOAT_B(riz, 0x08, 0x0D, 1, PPC_FLOAT_EXT), GEN_FLOAT_B(rip, 0x08, 0x0E, 1, PPC_FLOAT_EXT), GEN_FLOAT_B(rim, 0x08, 0x0F, 1, PPC_FLOAT_EXT), -#define GEN_LDF(name, ldop, opc, type) \ -GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type), -#define GEN_LDUF(name, ldop, opc, type) \ -GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type), -#define GEN_LDUXF(name, ldop, opc, type) \ -GEN_HANDLER(name##ux, 0x1F, 0x17, opc, 0x00000001, type), -#define GEN_LDXF(name, ldop, opc2, opc3, type) \ -GEN_HANDLER(name##x, 0x1F, opc2, opc3, 0x00000001, type), -#define GEN_LDFS(name, ldop, op, type) \ -GEN_LDF(name, ldop, op | 0x20, type) \ -GEN_LDUF(name, ldop, op | 0x21, type) \ -GEN_LDUXF(name, ldop, op | 0x01, type) \ -GEN_LDXF(name, ldop, 0x17, op | 0x00, type) - -GEN_LDFS(lfd, ld64, 0x12, PPC_FLOAT) -GEN_LDFS(lfs, ld32fs, 0x10, PPC_FLOAT) GEN_HANDLER_E(lfdepx, 0x1F, 0x1F, 0x12, 0x00000001, PPC_NONE, PPC2_BOOKE206), GEN_HANDLER_E(lfiwax, 0x1f, 0x17, 0x1a, 0x00000001, PPC_NONE, PPC2_ISA205), GEN_HANDLER_E(lfiwzx, 0x1f, 0x17, 0x1b, 0x1, PPC_NONE, PPC2_FP_CVT_ISA206), GEN_HANDLER_E(lfdpx, 0x1F, 0x17, 0x18, 0x00200001, PPC_NONE, PPC2_ISA205), -#define GEN_STF(name, stop, opc, type) \ -GEN_HANDLER(name, opc, 0xFF, 0xFF, 0x00000000, type), -#define GEN_STUF(name, stop, opc, type) \ -GEN_HANDLER(name##u, opc, 0xFF, 0xFF, 0x00000000, type), -#define GEN_STUXF(name, stop, opc, type) \ -GEN_HANDLER(name##ux, 0x1F, 0x17, opc, 0x00000001, type), #define GEN_STXF(name, stop, opc2, opc3, type) \ GEN_HANDLER(name##x, 0x1F, opc2, opc3, 0x00000001, type), -#define GEN_STFS(name, stop, op, type) \ -GEN_STF(name, stop, op | 0x20, type) \ -GEN_STUF(name, stop, op | 0x21, type) \ -GEN_STUXF(name, stop, op | 0x01, type) \ -GEN_STXF(name, stop, 0x17, op | 0x00, type) -GEN_STFS(stfd, st64_i64, 0x16, PPC_FLOAT) -GEN_STFS(stfs, st32fs, 0x14, PPC_FLOAT) GEN_STXF(stfiw, st32fiw, 0x17, 0x1E, PPC_FLOAT_STFIWX) GEN_HANDLER_E(stfdepx, 0x1F, 0x1F, 0x16, 0x00000001, PPC_NONE, PPC2_BOOKE206), GEN_HANDLER_E(stfdpx, 0x1F, 0x17, 0x1C, 0x00200001, PPC_NONE, PPC2_ISA205), From patchwork Thu Oct 21 19:45:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544562 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZyj84Gkzz9sPB for ; Fri, 22 Oct 2021 06:49:00 +1100 (AEDT) Received: from localhost ([::1]:32944 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde3e-0003NG-9Z for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 15:48:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33540) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde22-0003Iz-Tk; Thu, 21 Oct 2021 15:47:19 -0400 Received: from [201.28.113.2] (port=10704 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde1z-0007UN-Vm; Thu, 21 Oct 2021 15:47:18 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:46:55 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 2F7F780012A; Thu, 21 Oct 2021 16:46:55 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 04/33] target/ppc: Implement PLFS, PLFD, PSTFS and PSTFD instructions Date: Thu, 21 Oct 2021 16:45:18 -0300 Message-Id: <20211021194547.672988-5-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:46:55.0737 (UTC) FILETIME=[67215690:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pherde , lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, Fernando Eckhardt Valle , matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: pherde Signed-off-by: Fernando Eckhardt Valle Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn64.decode | 11 +++++++++++ target/ppc/translate/fp-impl.c.inc | 14 ++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 72c5944a53..11e5ea81d6 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -56,6 +56,17 @@ PSTD 000001 00 0--.-- .................. \ PADDI 000001 10 0--.-- .................. \ 001110 ..... ..... ................ @PLS_D +### Float-Point Load and Store Instructions + +PLFS 000001 10 0--.-- .................. \ + 110000 ..... ..... ................ @PLS_D +PLFD 000001 10 0--.-- .................. \ + 110010 ..... ..... ................ @PLS_D +PSTFS 000001 10 0--.-- .................. \ + 110100 ..... ..... ................ @PLS_D +PSTFD 000001 10 0--.-- .................. \ + 110110 ..... ..... ................ @PLS_D + ### Prefixed No-operation Instruction @PNOP 000001 11 0000-- 000000000000000000 \ diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc index 76b382ebe5..b9ced292df 100644 --- a/target/ppc/translate/fp-impl.c.inc +++ b/target/ppc/translate/fp-impl.c.inc @@ -1335,6 +1335,16 @@ static bool do_lsfp_D(DisasContext *ctx, arg_D *a, bool update, bool store, single); } +static bool do_lsfp_PLS_D(DisasContext *ctx, arg_PLS_D *a, bool update, + bool store, bool single) +{ + arg_D d; + if (!resolve_PLS_D(ctx, &d, a)) { + return true; + } + return do_lsfp_D(ctx, &d, update, store, single); +} + static bool do_lsfp_X(DisasContext *ctx, arg_X *a, bool update, bool store, bool single) { @@ -1345,21 +1355,25 @@ TRANS(LFS, do_lsfp_D, false, false, true) TRANS(LFSU, do_lsfp_D, true, false, true) TRANS(LFSX, do_lsfp_X, false, false, true) TRANS(LFSUX, do_lsfp_X, true, false, true) +TRANS(PLFS, do_lsfp_PLS_D, false, false, true) TRANS(LFD, do_lsfp_D, false, false, false) TRANS(LFDU, do_lsfp_D, true, false, false) TRANS(LFDX, do_lsfp_X, false, false, false) TRANS(LFDUX, do_lsfp_X, true, false, false) +TRANS(PLFD, do_lsfp_PLS_D, false, false, false) TRANS(STFS, do_lsfp_D, false, true, true) TRANS(STFSU, do_lsfp_D, true, true, true) TRANS(STFSX, do_lsfp_X, false, true, true) TRANS(STFSUX, do_lsfp_X, true, true, true) +TRANS(PSTFS, do_lsfp_PLS_D, false, true, true) TRANS(STFD, do_lsfp_D, false, true, false) TRANS(STFDU, do_lsfp_D, true, true, false) TRANS(STFDX, do_lsfp_X, false, true, false) TRANS(STFDUX, do_lsfp_X, true, true, false) +TRANS(PSTFD, do_lsfp_PLS_D, false, true, false) #undef _GEN_FLOAT_ACB #undef GEN_FLOAT_ACB From patchwork Thu Oct 21 19:45:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544569 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZypG0172z9sPB for ; Fri, 22 Oct 2021 06:53:25 +1100 (AEDT) Received: from localhost ([::1]:42964 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde7v-000208-O7 for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 15:53:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33552) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde26-0003SG-EP; Thu, 21 Oct 2021 15:47:22 -0400 Received: from [201.28.113.2] (port=10704 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde23-0007UN-VE; Thu, 21 Oct 2021 15:47:22 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:46:56 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id A30B180012A; Thu, 21 Oct 2021 16:46:55 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 05/33] target/ppc: Move LQ and STQ to decodetree Date: Thu, 21 Oct 2021 16:45:19 -0300 Message-Id: <20211021194547.672988-6-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:46:56.0224 (UTC) FILETIME=[676BA600:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn32.decode | 11 ++ target/ppc/translate.c | 156 +-------------------- target/ppc/translate/fixedpoint-impl.c.inc | 98 +++++++++++++ 3 files changed, 114 insertions(+), 151 deletions(-) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 3837b799c8..9cb9fc00b8 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -24,9 +24,16 @@ @D_bfs ...... bf:3 - l:1 ra:5 imm:s16 &D_bf @D_bfu ...... bf:3 - l:1 ra:5 imm:16 &D_bf +%dq_si 4:s12 !function=times_16 +%dq_rtp 22:4 !function=times_2 +@DQ_rtp ...... ....0 ra:5 ............ .... &D rt=%dq_rtp si=%dq_si + %ds_si 2:s14 !function=times_4 @DS ...... rt:5 ra:5 .............. .. &D si=%ds_si +%ds_rtp 22:4 !function=times_2 +@DS_rtp ...... ....0 ra:5 .............. .. &D rt=%ds_rtp si=%ds_si + &DX rt d %dx_d 6:s10 16:5 0:1 @DX ...... rt:5 ..... .......... ..... . &DX d=%dx_d @@ -153,6 +160,8 @@ LDU 111010 ..... ..... ..............01 @DS LDX 011111 ..... ..... ..... 0000010101 - @X LDUX 011111 ..... ..... ..... 0000110101 - @X +LQ 111000 ..... ..... ............ ---- @DQ_rtp + ### Fixed-Point Store Instructions STB 100110 ..... ..... ................ @D @@ -175,6 +184,8 @@ STDU 111110 ..... ..... ..............01 @DS STDX 011111 ..... ..... ..... 0010010101 - @X STDUX 011111 ..... ..... ..... 0010110101 - @X +STQ 111110 ..... ..... ..............10 @DS_rtp + ### Fixed-Point Compare Instructions CMP 011111 ... - . ..... ..... 0000000000 - @X_bfl diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 39f03ac658..738101088e 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -3325,69 +3325,6 @@ GEN_LDX_HVRM(ldcix, ld64_i64, 0x15, 0x1b, PPC_CILDST) GEN_LDX_HVRM(lwzcix, ld32u, 0x15, 0x15, PPC_CILDST) GEN_LDX_HVRM(lhzcix, ld16u, 0x15, 0x19, PPC_CILDST) GEN_LDX_HVRM(lbzcix, ld8u, 0x15, 0x1a, PPC_CILDST) - -/* lq */ -static void gen_lq(DisasContext *ctx) -{ - int ra, rd; - TCGv EA, hi, lo; - - /* lq is a legal user mode instruction starting in ISA 2.07 */ - bool legal_in_user_mode = (ctx->insns_flags2 & PPC2_LSQ_ISA207) != 0; - bool le_is_supported = (ctx->insns_flags2 & PPC2_LSQ_ISA207) != 0; - - if (!legal_in_user_mode && ctx->pr) { - gen_priv_exception(ctx, POWERPC_EXCP_PRIV_OPC); - return; - } - - if (!le_is_supported && ctx->le_mode) { - gen_align_no_le(ctx); - return; - } - ra = rA(ctx->opcode); - rd = rD(ctx->opcode); - if (unlikely((rd & 1) || rd == ra)) { - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); - return; - } - - gen_set_access_type(ctx, ACCESS_INT); - EA = tcg_temp_new(); - gen_addr_imm_index(ctx, EA, 0x0F); - - /* Note that the low part is always in RD+1, even in LE mode. */ - lo = cpu_gpr[rd + 1]; - hi = cpu_gpr[rd]; - - if (tb_cflags(ctx->base.tb) & CF_PARALLEL) { - if (HAVE_ATOMIC128) { - TCGv_i32 oi = tcg_temp_new_i32(); - if (ctx->le_mode) { - tcg_gen_movi_i32(oi, make_memop_idx(MO_LEQ, ctx->mem_idx)); - gen_helper_lq_le_parallel(lo, cpu_env, EA, oi); - } else { - tcg_gen_movi_i32(oi, make_memop_idx(MO_BEQ, ctx->mem_idx)); - gen_helper_lq_be_parallel(lo, cpu_env, EA, oi); - } - tcg_temp_free_i32(oi); - tcg_gen_ld_i64(hi, cpu_env, offsetof(CPUPPCState, retxh)); - } else { - /* Restart with exclusive lock. */ - gen_helper_exit_atomic(cpu_env); - ctx->base.is_jmp = DISAS_NORETURN; - } - } else if (ctx->le_mode) { - tcg_gen_qemu_ld_i64(lo, EA, ctx->mem_idx, MO_LEQ); - gen_addr_add(ctx, EA, EA, 8); - tcg_gen_qemu_ld_i64(hi, EA, ctx->mem_idx, MO_LEQ); - } else { - tcg_gen_qemu_ld_i64(hi, EA, ctx->mem_idx, MO_BEQ); - gen_addr_add(ctx, EA, EA, 8); - tcg_gen_qemu_ld_i64(lo, EA, ctx->mem_idx, MO_BEQ); - } - tcg_temp_free(EA); -} #endif /*** Integer store ***/ @@ -3433,90 +3370,6 @@ GEN_STX_HVRM(stdcix, st64_i64, 0x15, 0x1f, PPC_CILDST) GEN_STX_HVRM(stwcix, st32, 0x15, 0x1c, PPC_CILDST) GEN_STX_HVRM(sthcix, st16, 0x15, 0x1d, PPC_CILDST) GEN_STX_HVRM(stbcix, st8, 0x15, 0x1e, PPC_CILDST) - -static void gen_std(DisasContext *ctx) -{ - int rs; - TCGv EA; - - rs = rS(ctx->opcode); - if ((ctx->opcode & 0x3) == 0x2) { /* stq */ - bool legal_in_user_mode = (ctx->insns_flags2 & PPC2_LSQ_ISA207) != 0; - bool le_is_supported = (ctx->insns_flags2 & PPC2_LSQ_ISA207) != 0; - TCGv hi, lo; - - if (!(ctx->insns_flags & PPC_64BX)) { - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); - } - - if (!legal_in_user_mode && ctx->pr) { - gen_priv_exception(ctx, POWERPC_EXCP_PRIV_OPC); - return; - } - - if (!le_is_supported && ctx->le_mode) { - gen_align_no_le(ctx); - return; - } - - if (unlikely(rs & 1)) { - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); - return; - } - gen_set_access_type(ctx, ACCESS_INT); - EA = tcg_temp_new(); - gen_addr_imm_index(ctx, EA, 0x03); - - /* Note that the low part is always in RS+1, even in LE mode. */ - lo = cpu_gpr[rs + 1]; - hi = cpu_gpr[rs]; - - if (tb_cflags(ctx->base.tb) & CF_PARALLEL) { - if (HAVE_ATOMIC128) { - TCGv_i32 oi = tcg_temp_new_i32(); - if (ctx->le_mode) { - tcg_gen_movi_i32(oi, make_memop_idx(MO_LE | MO_128, - ctx->mem_idx)); - gen_helper_stq_le_parallel(cpu_env, EA, lo, hi, oi); - } else { - tcg_gen_movi_i32(oi, make_memop_idx(MO_BE | MO_128, - ctx->mem_idx)); - gen_helper_stq_be_parallel(cpu_env, EA, lo, hi, oi); - } - tcg_temp_free_i32(oi); - } else { - /* Restart with exclusive lock. */ - gen_helper_exit_atomic(cpu_env); - ctx->base.is_jmp = DISAS_NORETURN; - } - } else if (ctx->le_mode) { - tcg_gen_qemu_st_i64(lo, EA, ctx->mem_idx, MO_LEQ); - gen_addr_add(ctx, EA, EA, 8); - tcg_gen_qemu_st_i64(hi, EA, ctx->mem_idx, MO_LEQ); - } else { - tcg_gen_qemu_st_i64(hi, EA, ctx->mem_idx, MO_BEQ); - gen_addr_add(ctx, EA, EA, 8); - tcg_gen_qemu_st_i64(lo, EA, ctx->mem_idx, MO_BEQ); - } - tcg_temp_free(EA); - } else { - /* std / stdu */ - if (Rc(ctx->opcode)) { - if (unlikely(rA(ctx->opcode) == 0)) { - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); - return; - } - } - gen_set_access_type(ctx, ACCESS_INT); - EA = tcg_temp_new(); - gen_addr_imm_index(ctx, EA, 0x03); - gen_qemu_st64_i64(ctx, cpu_gpr[rs], EA); - if (Rc(ctx->opcode)) { - tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); - } - tcg_temp_free(EA); - } -} #endif /*** Integer load and store with byte reverse ***/ @@ -7460,6 +7313,11 @@ static int times_4(DisasContext *ctx, int x) return x * 4; } +static int times_16(DisasContext *ctx, int x) +{ + return x * 16; +} + /* * Helpers for trans_* functions to check for specific insns flags. * Use token pasting to ensure that we use the proper flag with the @@ -7715,10 +7573,6 @@ GEN_HANDLER2_E(extswsli0, "extswsli", 0x1F, 0x1A, 0x1B, 0x00000000, GEN_HANDLER2_E(extswsli1, "extswsli", 0x1F, 0x1B, 0x1B, 0x00000000, PPC_NONE, PPC2_ISA300), #endif -#if defined(TARGET_PPC64) -GEN_HANDLER(lq, 0x38, 0xFF, 0xFF, 0x00000000, PPC_64BX), -GEN_HANDLER(std, 0x3E, 0xFF, 0xFF, 0x00000000, PPC_64B), -#endif /* handles lfdp, lxsd, lxssp */ GEN_HANDLER_E(dform39, 0x39, 0xFF, 0xFF, 0x00000000, PPC_NONE, PPC2_ISA205), /* handles stfdp, lxv, stxsd, stxssp, stxv */ diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 1c35b60eb4..61d129fb5d 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -70,6 +70,98 @@ static bool do_ldst_X(DisasContext *ctx, arg_X *a, bool update, return do_ldst(ctx, a->rt, a->ra, cpu_gpr[a->rb], update, store, mop); } +static bool do_ldst_quad(DisasContext *ctx, arg_D *a, bool store, bool prefixed) +{ +#if defined(TARGET_PPC64) + TCGv ea; + TCGv_i64 low_addr_gpr, high_addr_gpr; + MemOp mop; + + REQUIRE_INSNS_FLAGS(ctx, 64BX); + + if (!prefixed && !(ctx->insns_flags2 & PPC2_LSQ_ISA207)) { + if (ctx->pr) { + /* lq and stq were privileged prior to V. 2.07 */ + gen_priv_exception(ctx, POWERPC_EXCP_PRIV_OPC); + return true; + } + + if (ctx->le_mode) { + gen_align_no_le(ctx); + return true; + } + } + + if (!store && unlikely(a->ra == a->rt)) { + gen_invalid(ctx); + return true; + } + + gen_set_access_type(ctx, ACCESS_INT); + ea = tcg_temp_new(); + do_ea_calc(ctx, a->ra, tcg_constant_tl(a->si), ea); + + if (prefixed || !ctx->le_mode) { + low_addr_gpr = cpu_gpr[a->rt]; + high_addr_gpr = cpu_gpr[a->rt + 1]; + } else { + low_addr_gpr = cpu_gpr[a->rt + 1]; + high_addr_gpr = cpu_gpr[a->rt]; + } + + if (tb_cflags(ctx->base.tb) & CF_PARALLEL) { + if (HAVE_ATOMIC128) { + mop = DEF_MEMOP(MO_128); + TCGv_i32 oi = tcg_constant_i32(make_memop_idx(mop, ctx->mem_idx)); + if (store) { + if (ctx->le_mode) { + gen_helper_stq_le_parallel(cpu_env, ea, low_addr_gpr, + high_addr_gpr, oi); + } else { + gen_helper_stq_be_parallel(cpu_env, ea, high_addr_gpr, + low_addr_gpr, oi); + + } + } else { + if (ctx->le_mode) { + gen_helper_lq_le_parallel(low_addr_gpr, cpu_env, ea, oi); + tcg_gen_ld_i64(high_addr_gpr, cpu_env, + offsetof(CPUPPCState, retxh)); + } else { + gen_helper_lq_be_parallel(high_addr_gpr, cpu_env, ea, oi); + tcg_gen_ld_i64(low_addr_gpr, cpu_env, + offsetof(CPUPPCState, retxh)); + } + } + } else { + /* Restart with exclusive lock. */ + gen_helper_exit_atomic(cpu_env); + ctx->base.is_jmp = DISAS_NORETURN; + } + } else { + mop = DEF_MEMOP(MO_Q); + if (store) { + tcg_gen_qemu_st_i64(low_addr_gpr, ea, ctx->mem_idx, mop); + } else { + tcg_gen_qemu_ld_i64(low_addr_gpr, ea, ctx->mem_idx, mop); + } + + gen_addr_add(ctx, ea, ea, 8); + + if (store) { + tcg_gen_qemu_st_i64(high_addr_gpr, ea, ctx->mem_idx, mop); + } else { + tcg_gen_qemu_ld_i64(high_addr_gpr, ea, ctx->mem_idx, mop); + } + } + tcg_temp_free(ea); +#else + qemu_build_not_reached(); +#endif + + return true; +} + /* Load Byte and Zero */ TRANS(LBZ, do_ldst_D, false, false, MO_UB) TRANS(LBZX, do_ldst_X, false, false, MO_UB) @@ -111,6 +203,9 @@ TRANS64(LDU, do_ldst_D, true, false, MO_Q) TRANS64(LDUX, do_ldst_X, true, false, MO_Q) TRANS64(PLD, do_ldst_PLS_D, false, false, MO_Q) +/* Load Quadword */ +TRANS64(LQ, do_ldst_quad, false, false); + /* Store Byte */ TRANS(STB, do_ldst_D, false, true, MO_UB) TRANS(STBX, do_ldst_X, false, true, MO_UB) @@ -139,6 +234,9 @@ TRANS64(STDU, do_ldst_D, true, true, MO_Q) TRANS64(STDUX, do_ldst_X, true, true, MO_Q) TRANS64(PSTD, do_ldst_PLS_D, false, true, MO_Q) +/* Store Quadword */ +TRANS64(STQ, do_ldst_quad, true, false); + /* * Fixed-Point Compare Instructions */ From patchwork Thu Oct 21 19:45:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544572 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZyrR68kcz9sPB for ; Fri, 22 Oct 2021 06:55:19 +1100 (AEDT) Received: from localhost ([::1]:46432 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde9l-0004Q5-IX for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 15:55:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33566) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde2A-0003d4-F7; Thu, 21 Oct 2021 15:47:26 -0400 Received: from [201.28.113.2] (port=10704 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde28-0007UN-1b; Thu, 21 Oct 2021 15:47:25 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:46:56 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 21263800145; Thu, 21 Oct 2021 16:46:56 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 06/33] target/ppc: Implement PLQ and PSTQ Date: Thu, 21 Oct 2021 16:45:20 -0300 Message-Id: <20211021194547.672988-7-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:46:56.0650 (UTC) FILETIME=[67ACA6A0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn64.decode | 4 ++++ target/ppc/translate/fixedpoint-impl.c.inc | 12 ++++++++++++ 2 files changed, 16 insertions(+) diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 11e5ea81d6..48756cd4ca 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -38,6 +38,8 @@ PLWA 000001 00 0--.-- .................. \ 101001 ..... ..... ................ @PLS_D PLD 000001 00 0--.-- .................. \ 111001 ..... ..... ................ @PLS_D +PLQ 000001 00 0--.-- .................. \ + 111000 ..... ..... ................ @PLS_D ### Fixed-Point Store Instructions @@ -50,6 +52,8 @@ PSTH 000001 10 0--.-- .................. \ PSTD 000001 00 0--.-- .................. \ 111101 ..... ..... ................ @PLS_D +PSTQ 000001 00 0--.-- .................. \ + 111100 ..... ..... ................ @PLS_D ### Fixed-Point Arithmetic Instructions diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 61d129fb5d..0a6b3d61d1 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -162,6 +162,16 @@ static bool do_ldst_quad(DisasContext *ctx, arg_D *a, bool store, bool prefixed) return true; } +static bool do_ldst_quad_PLS_D(DisasContext *ctx, arg_PLS_D *a, bool store) +{ + arg_D d; + if (!resolve_PLS_D(ctx, &d, a)) { + return true; + } + + return do_ldst_quad(ctx, &d, store, true); +} + /* Load Byte and Zero */ TRANS(LBZ, do_ldst_D, false, false, MO_UB) TRANS(LBZX, do_ldst_X, false, false, MO_UB) @@ -205,6 +215,7 @@ TRANS64(PLD, do_ldst_PLS_D, false, false, MO_Q) /* Load Quadword */ TRANS64(LQ, do_ldst_quad, false, false); +TRANS64(PLQ, do_ldst_quad_PLS_D, false); /* Store Byte */ TRANS(STB, do_ldst_D, false, true, MO_UB) @@ -236,6 +247,7 @@ TRANS64(PSTD, do_ldst_PLS_D, false, true, MO_Q) /* Store Quadword */ TRANS64(STQ, do_ldst_quad, true, false); +TRANS64(PSTQ, do_ldst_quad_PLS_D, true); /* * Fixed-Point Compare Instructions From patchwork Thu Oct 21 19:45:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544579 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZz0K2zxqz9sNH for ; Fri, 22 Oct 2021 07:02:09 +1100 (AEDT) Received: from localhost ([::1]:59280 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeGN-0004sX-3k for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:02:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33580) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde2G-0003gr-1n; Thu, 21 Oct 2021 15:47:33 -0400 Received: from [201.28.113.2] (port=10704 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde2B-0007UN-IH; Thu, 21 Oct 2021 15:47:30 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:46:57 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 8B03380012A; Thu, 21 Oct 2021 16:46:56 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 07/33] target/ppc: Implement cntlzdm Date: Thu, 21 Oct 2021 16:45:21 -0300 Message-Id: <20211021194547.672988-8-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:46:57.0073 (UTC) FILETIME=[67ED3210:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Luis Pires Implement the following PowerISA v3.1 instruction: cntlzdm: Count Leading Zeros Doubleword Under Bit Mask Signed-off-by: Luis Pires Signed-off-by: Matheus Ferst --- target/ppc/helper.h | 1 + target/ppc/insn32.decode | 1 + target/ppc/int_helper.c | 18 ++++++++++++++++++ target/ppc/translate/fixedpoint-impl.c.inc | 12 ++++++++++++ 4 files changed, 32 insertions(+) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 6fa3e15fe9..ee7c82fb60 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -47,6 +47,7 @@ DEF_HELPER_FLAGS_1(popcntb, TCG_CALL_NO_RWG_SE, tl, tl) DEF_HELPER_FLAGS_2(cmpb, TCG_CALL_NO_RWG_SE, tl, tl, tl) DEF_HELPER_3(sraw, tl, env, tl, tl) DEF_HELPER_FLAGS_2(cfuged, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_2(CNTLZDM, TCG_CALL_NO_RWG_SE, i64, i64, i64) #if defined(TARGET_PPC64) DEF_HELPER_FLAGS_2(cmpeqb, TCG_CALL_NO_RWG_SE, i32, tl, tl) DEF_HELPER_FLAGS_1(popcntw, TCG_CALL_NO_RWG_SE, tl, tl) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 9cb9fc00b8..221cb00dd6 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -203,6 +203,7 @@ ADDPCIS 010011 ..... ..... .......... 00010 . @DX ## Fixed-Point Logical Instructions CFUGED 011111 ..... ..... ..... 0011011100 - @X +CNTLZDM 011111 ..... ..... ..... 0000111011 - @X ### Float-Point Load Instructions diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index b3d302390a..dcef356034 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -386,6 +386,24 @@ uint64_t helper_cfuged(uint64_t src, uint64_t mask) return left | (right >> n); } +uint64_t helper_CNTLZDM(uint64_t src, uint64_t mask) +{ + uint64_t sel_bit, count = 0; + + while (mask != 0) { + sel_bit = 0x8000000000000000ULL >> clz64(mask); + + if (src & sel_bit) { + break; + } + + count++; + mask &= ~sel_bit; + } + + return count; +} + /*****************************************************************************/ /* PowerPC 601 specific instructions (POWER bridge) */ target_ulong helper_div(CPUPPCState *env, target_ulong arg1, target_ulong arg2) diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 0a6b3d61d1..814fef2782 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -415,3 +415,15 @@ static bool trans_CFUGED(DisasContext *ctx, arg_X *a) #endif return true; } + +static bool trans_CNTLZDM(DisasContext *ctx, arg_X *a) +{ + REQUIRE_64BIT(ctx); + REQUIRE_INSNS_FLAGS2(ctx, ISA310); +#if defined(TARGET_PPC64) + gen_helper_CNTLZDM(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]); +#else + qemu_build_not_reached(); +#endif + return true; +} From patchwork Thu Oct 21 19:45:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544578 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZyxS0bRpz9sNH for ; Fri, 22 Oct 2021 06:59:40 +1100 (AEDT) Received: from localhost ([::1]:54928 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeDx-0001qN-Q1 for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 15:59:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33596) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde2J-0003jh-Pa; Thu, 21 Oct 2021 15:47:36 -0400 Received: from [201.28.113.2] (port=10704 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde2H-0007UN-4j; Thu, 21 Oct 2021 15:47:35 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:46:57 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id F326B800145; Thu, 21 Oct 2021 16:46:56 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 08/33] target/ppc: Implement cnttzdm Date: Thu, 21 Oct 2021 16:45:22 -0300 Message-Id: <20211021194547.672988-9-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:46:57.0467 (UTC) FILETIME=[682950B0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Luis Pires Implement the following PowerISA v3.1 instruction: cnttzdm: Count Trailing Zeros Doubleword Under Bit Mask Signed-off-by: Luis Pires Signed-off-by: Matheus Ferst --- target/ppc/helper.h | 1 + target/ppc/insn32.decode | 1 + target/ppc/int_helper.c | 16 ++++++++++++++++ target/ppc/translate/fixedpoint-impl.c.inc | 12 ++++++++++++ 4 files changed, 30 insertions(+) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index ee7c82fb60..115bdf474a 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -48,6 +48,7 @@ DEF_HELPER_FLAGS_2(cmpb, TCG_CALL_NO_RWG_SE, tl, tl, tl) DEF_HELPER_3(sraw, tl, env, tl, tl) DEF_HELPER_FLAGS_2(cfuged, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(CNTLZDM, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_2(CNTTZDM, TCG_CALL_NO_RWG_SE, i64, i64, i64) #if defined(TARGET_PPC64) DEF_HELPER_FLAGS_2(cmpeqb, TCG_CALL_NO_RWG_SE, i32, tl, tl) DEF_HELPER_FLAGS_1(popcntw, TCG_CALL_NO_RWG_SE, tl, tl) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 221cb00dd6..3d692e9e6a 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -204,6 +204,7 @@ ADDPCIS 010011 ..... ..... .......... 00010 . @DX CFUGED 011111 ..... ..... ..... 0011011100 - @X CNTLZDM 011111 ..... ..... ..... 0000111011 - @X +CNTTZDM 011111 ..... ..... ..... 1000111011 - @X ### Float-Point Load Instructions diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index dcef356034..efda78ed8e 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -404,6 +404,22 @@ uint64_t helper_CNTLZDM(uint64_t src, uint64_t mask) return count; } +uint64_t helper_CNTTZDM(uint64_t src, uint64_t mask) +{ + uint64_t count = 0; + + while (mask != 0) { + if ((src >> ctz64(mask)) & 1) { + break; + } + + count++; + mask &= mask - 1; + } + + return count; +} + /*****************************************************************************/ /* PowerPC 601 specific instructions (POWER bridge) */ target_ulong helper_div(CPUPPCState *env, target_ulong arg1, target_ulong arg2) diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 814fef2782..8c66fca96a 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -427,3 +427,15 @@ static bool trans_CNTLZDM(DisasContext *ctx, arg_X *a) #endif return true; } + +static bool trans_CNTTZDM(DisasContext *ctx, arg_X *a) +{ + REQUIRE_64BIT(ctx); + REQUIRE_INSNS_FLAGS2(ctx, ISA310); +#if defined(TARGET_PPC64) + gen_helper_CNTTZDM(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]); +#else + qemu_build_not_reached(); +#endif + return true; +} From patchwork Thu Oct 21 19:45:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544576 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZyvx3lZRz9sNH for ; Fri, 22 Oct 2021 06:58:21 +1100 (AEDT) Received: from localhost ([::1]:52472 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeCh-00009Y-9A for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 15:58:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33622) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde2N-0003lU-Qc; Thu, 21 Oct 2021 15:47:41 -0400 Received: from [201.28.113.2] (port=10704 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde2K-0007UN-S7; Thu, 21 Oct 2021 15:47:39 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:46:57 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 5EA0A80012A; Thu, 21 Oct 2021 16:46:57 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 09/33] target/ppc: Implement pdepd instruction Date: Thu, 21 Oct 2021 16:45:23 -0300 Message-Id: <20211021194547.672988-10-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:46:57.0860 (UTC) FILETIME=[68654840:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/helper.h | 1 + target/ppc/insn32.decode | 1 + target/ppc/int_helper.c | 18 ++++++++++++++++++ target/ppc/translate/fixedpoint-impl.c.inc | 12 ++++++++++++ 4 files changed, 32 insertions(+) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 115bdf474a..4a87e1258b 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -49,6 +49,7 @@ DEF_HELPER_3(sraw, tl, env, tl, tl) DEF_HELPER_FLAGS_2(cfuged, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(CNTLZDM, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(CNTTZDM, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_2(PDEPD, TCG_CALL_NO_RWG_SE, i64, i64, i64) #if defined(TARGET_PPC64) DEF_HELPER_FLAGS_2(cmpeqb, TCG_CALL_NO_RWG_SE, i32, tl, tl) DEF_HELPER_FLAGS_1(popcntw, TCG_CALL_NO_RWG_SE, tl, tl) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 3d692e9e6a..ff70b3e863 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -205,6 +205,7 @@ ADDPCIS 010011 ..... ..... .......... 00010 . @DX CFUGED 011111 ..... ..... ..... 0011011100 - @X CNTLZDM 011111 ..... ..... ..... 0000111011 - @X CNTTZDM 011111 ..... ..... ..... 1000111011 - @X +PDEPD 011111 ..... ..... ..... 0010011100 - @X ### Float-Point Load Instructions diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index efda78ed8e..ba8ff1a475 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -420,6 +420,24 @@ uint64_t helper_CNTTZDM(uint64_t src, uint64_t mask) return count; } +uint64_t helper_PDEPD(uint64_t src, uint64_t mask) +{ + int i, o; + uint64_t result = 0; + + if (mask == -1) { + return src; + } + + for (i = 0; mask != 0; i++) { + o = ctz64(mask); + mask &= mask - 1; + result |= ((src >> i) & 1) << o; + } + + return result; +} + /*****************************************************************************/ /* PowerPC 601 specific instructions (POWER bridge) */ target_ulong helper_div(CPUPPCState *env, target_ulong arg1, target_ulong arg2) diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 8c66fca96a..c86b4621b8 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -439,3 +439,15 @@ static bool trans_CNTTZDM(DisasContext *ctx, arg_X *a) #endif return true; } + +static bool trans_PDEPD(DisasContext *ctx, arg_X *a) +{ + REQUIRE_64BIT(ctx); + REQUIRE_INSNS_FLAGS2(ctx, ISA310); +#if defined(TARGET_PPC64) + gen_helper_PDEPD(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]); +#else + qemu_build_not_reached(); +#endif + return true; +} From patchwork Thu Oct 21 19:45:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544564 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZykL6Ffjz9sPB for ; Fri, 22 Oct 2021 06:50:02 +1100 (AEDT) Received: from localhost ([::1]:36436 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde4e-0005sR-LG for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 15:50:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33832) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde3P-00055r-KF; Thu, 21 Oct 2021 15:48:43 -0400 Received: from [201.28.113.2] (port=47716 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde3N-0001rY-M5; Thu, 21 Oct 2021 15:48:43 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:46:58 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id BE72380012A; Thu, 21 Oct 2021 16:46:57 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 10/33] target/ppc: Implement pextd instruction Date: Thu, 21 Oct 2021 16:45:24 -0300 Message-Id: <20211021194547.672988-11-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:46:58.0315 (UTC) FILETIME=[68AAB5B0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/helper.h | 1 + target/ppc/insn32.decode | 1 + target/ppc/int_helper.c | 18 ++++++++++++++++++ target/ppc/translate/fixedpoint-impl.c.inc | 12 ++++++++++++ 4 files changed, 32 insertions(+) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 4a87e1258b..3c4a01fd65 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -50,6 +50,7 @@ DEF_HELPER_FLAGS_2(cfuged, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(CNTLZDM, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(CNTTZDM, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(PDEPD, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_2(PEXTD, TCG_CALL_NO_RWG_SE, i64, i64, i64) #if defined(TARGET_PPC64) DEF_HELPER_FLAGS_2(cmpeqb, TCG_CALL_NO_RWG_SE, i32, tl, tl) DEF_HELPER_FLAGS_1(popcntw, TCG_CALL_NO_RWG_SE, tl, tl) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index ff70b3e863..65075f0d03 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -206,6 +206,7 @@ CFUGED 011111 ..... ..... ..... 0011011100 - @X CNTLZDM 011111 ..... ..... ..... 0000111011 - @X CNTTZDM 011111 ..... ..... ..... 1000111011 - @X PDEPD 011111 ..... ..... ..... 0010011100 - @X +PEXTD 011111 ..... ..... ..... 0010111100 - @X ### Float-Point Load Instructions diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index ba8ff1a475..8994e68068 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -438,6 +438,24 @@ uint64_t helper_PDEPD(uint64_t src, uint64_t mask) return result; } +uint64_t helper_PEXTD(uint64_t src, uint64_t mask) +{ + int i, o; + uint64_t result = 0; + + if (mask == -1) { + return src; + } + + for (o = 0; mask != 0; o++) { + i = ctz64(mask); + mask &= mask - 1; + result |= ((src >> i) & 1) << o; + } + + return result; +} + /*****************************************************************************/ /* PowerPC 601 specific instructions (POWER bridge) */ target_ulong helper_div(CPUPPCState *env, target_ulong arg1, target_ulong arg2) diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index c86b4621b8..37806396f2 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -451,3 +451,15 @@ static bool trans_PDEPD(DisasContext *ctx, arg_X *a) #endif return true; } + +static bool trans_PEXTD(DisasContext *ctx, arg_X *a) +{ + REQUIRE_64BIT(ctx); + REQUIRE_INSNS_FLAGS2(ctx, ISA310); +#if defined(TARGET_PPC64) + gen_helper_PEXTD(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]); +#else + qemu_build_not_reached(); +#endif + return true; +} From patchwork Thu Oct 21 19:45:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544585 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZz4L6C8Vz9sNH for ; Fri, 22 Oct 2021 07:05:38 +1100 (AEDT) Received: from localhost ([::1]:37390 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeJk-0000lC-K0 for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:05:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33844) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde3T-0005AB-7H; Thu, 21 Oct 2021 15:48:47 -0400 Received: from [201.28.113.2] (port=47716 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde3Q-0001rY-KQ; Thu, 21 Oct 2021 15:48:46 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:46:58 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 386FA80012A; Thu, 21 Oct 2021 16:46:58 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 11/33] target/ppc: Move vcfuged to vmx-impl.c.inc Date: Thu, 21 Oct 2021 16:45:25 -0300 Message-Id: <20211021194547.672988-12-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:46:58.0690 (UTC) FILETIME=[68E3EE20:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst There's no reason to keep vector-impl.c.inc separate from vmx-impl.c.inc. Additionally, let GVec handle the multiple calls to helper_cfuged for us. Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/helper.h | 2 +- target/ppc/int_helper.c | 2 +- target/ppc/translate.c | 1 - target/ppc/translate/fixedpoint-impl.c.inc | 2 +- target/ppc/translate/vector-impl.c.inc | 48 ---------------------- target/ppc/translate/vmx-impl.c.inc | 18 ++++++++ 6 files changed, 21 insertions(+), 52 deletions(-) delete mode 100644 target/ppc/translate/vector-impl.c.inc diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 3c4a01fd65..86715c491e 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -46,7 +46,7 @@ DEF_HELPER_4(divwe, tl, env, tl, tl, i32) DEF_HELPER_FLAGS_1(popcntb, TCG_CALL_NO_RWG_SE, tl, tl) DEF_HELPER_FLAGS_2(cmpb, TCG_CALL_NO_RWG_SE, tl, tl, tl) DEF_HELPER_3(sraw, tl, env, tl, tl) -DEF_HELPER_FLAGS_2(cfuged, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_2(CFUGED, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(CNTLZDM, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(CNTTZDM, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(PDEPD, TCG_CALL_NO_RWG_SE, i64, i64, i64) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 8994e68068..d90a397bca 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -324,7 +324,7 @@ target_ulong helper_popcntb(target_ulong val) } #endif -uint64_t helper_cfuged(uint64_t src, uint64_t mask) +uint64_t helper_CFUGED(uint64_t src, uint64_t mask) { /* * Instead of processing the mask bit-by-bit from the most significant to diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 738101088e..e7ea15f703 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7405,7 +7405,6 @@ static bool resolve_PLS_D(DisasContext *ctx, arg_D *d, arg_PLS_D *a) #include "translate/vmx-impl.c.inc" #include "translate/vsx-impl.c.inc" -#include "translate/vector-impl.c.inc" #include "translate/dfp-impl.c.inc" diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc index 37806396f2..78388794b1 100644 --- a/target/ppc/translate/fixedpoint-impl.c.inc +++ b/target/ppc/translate/fixedpoint-impl.c.inc @@ -409,7 +409,7 @@ static bool trans_CFUGED(DisasContext *ctx, arg_X *a) REQUIRE_64BIT(ctx); REQUIRE_INSNS_FLAGS2(ctx, ISA310); #if defined(TARGET_PPC64) - gen_helper_cfuged(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]); + gen_helper_CFUGED(cpu_gpr[a->ra], cpu_gpr[a->rt], cpu_gpr[a->rb]); #else qemu_build_not_reached(); #endif diff --git a/target/ppc/translate/vector-impl.c.inc b/target/ppc/translate/vector-impl.c.inc deleted file mode 100644 index 197e903337..0000000000 --- a/target/ppc/translate/vector-impl.c.inc +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Power ISA decode for Vector Facility instructions - * - * Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br) - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ - -static bool trans_VCFUGED(DisasContext *ctx, arg_VX *a) -{ - TCGv_i64 tgt, src, mask; - - REQUIRE_INSNS_FLAGS2(ctx, ISA310); - REQUIRE_VECTOR(ctx); - - tgt = tcg_temp_new_i64(); - src = tcg_temp_new_i64(); - mask = tcg_temp_new_i64(); - - /* centrifuge lower double word */ - get_cpu_vsrl(src, a->vra + 32); - get_cpu_vsrl(mask, a->vrb + 32); - gen_helper_cfuged(tgt, src, mask); - set_cpu_vsrl(a->vrt + 32, tgt); - - /* centrifuge higher double word */ - get_cpu_vsrh(src, a->vra + 32); - get_cpu_vsrh(mask, a->vrb + 32); - gen_helper_cfuged(tgt, src, mask); - set_cpu_vsrh(a->vrt + 32, tgt); - - tcg_temp_free_i64(tgt); - tcg_temp_free_i64(src); - tcg_temp_free_i64(mask); - - return true; -} diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index 92b9527aff..f0f6d561e1 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1559,6 +1559,24 @@ GEN_VXFORM3(vpermxor, 22, 0xFF) GEN_VXFORM_DUAL(vsldoi, PPC_ALTIVEC, PPC_NONE, vpermxor, PPC_NONE, PPC2_ALTIVEC_207) +static bool trans_VCFUGED(DisasContext *ctx, arg_VX *a) +{ + static const TCGOpcode vecop_list[] = { 0 }; + static const GVecGen3 g = { + .fni8 = gen_helper_CFUGED, + .opt_opc = vecop_list, + .vece = MO_64, + }; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + tcg_gen_gvec_3(avr_full_offset(a->vrt), avr_full_offset(a->vra), + avr_full_offset(a->vrb), 16, 16, &g); + + return true; +} + #undef GEN_VR_LDX #undef GEN_VR_STX #undef GEN_VR_LVE From patchwork Thu Oct 21 19:45:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544581 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZz1H0m1gz9sNH for ; Fri, 22 Oct 2021 07:02:59 +1100 (AEDT) Received: from localhost ([::1]:60976 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeHA-00063m-Ro for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:02:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33864) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde3W-0005It-Lb; Thu, 21 Oct 2021 15:48:50 -0400 Received: from [201.28.113.2] (port=47716 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde3U-0001rY-4s; Thu, 21 Oct 2021 15:48:50 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:46:59 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 95EFD80012A; Thu, 21 Oct 2021 16:46:58 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 12/33] target/ppc: Implement vclzdm/vctzdm instructions Date: Thu, 21 Oct 2021 16:45:26 -0300 Message-Id: <20211021194547.672988-13-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:46:59.0144 (UTC) FILETIME=[69293480:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Signed-off-by: Luis Pires Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn32.decode | 2 ++ target/ppc/translate/vmx-impl.c.inc | 36 +++++++++++++++++++++++++++++ 2 files changed, 38 insertions(+) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 65075f0d03..6ce06b231d 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -334,3 +334,5 @@ DSCRIQ 111111 ..... ..... ...... 001100010 . @Z22_tap_sh_rc ## Vector Bit Manipulation Instruction VCFUGED 000100 ..... ..... ..... 10101001101 @VX +VCLZDM 000100 ..... ..... ..... 11110000100 @VX +VCTZDM 000100 ..... ..... ..... 11111000100 @VX diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index f0f6d561e1..ee9426862c 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1577,6 +1577,42 @@ static bool trans_VCFUGED(DisasContext *ctx, arg_VX *a) return true; } +static bool trans_VCLZDM(DisasContext *ctx, arg_VX *a) +{ + static const TCGOpcode vecop_list[] = { 0 }; + static const GVecGen3 g = { + .fni8 = gen_helper_CNTLZDM, + .opt_opc = vecop_list, + .vece = MO_64, + }; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + tcg_gen_gvec_3(avr_full_offset(a->vrt), avr_full_offset(a->vra), + avr_full_offset(a->vrb), 16, 16, &g); + + return true; +} + +static bool trans_VCTZDM(DisasContext *ctx, arg_VX *a) +{ + static const TCGOpcode vecop_list[] = { 0 }; + static const GVecGen3 g = { + .fni8 = gen_helper_CNTTZDM, + .opt_opc = vecop_list, + .vece = MO_64, + }; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + tcg_gen_gvec_3(avr_full_offset(a->vrt), avr_full_offset(a->vra), + avr_full_offset(a->vrb), 16, 16, &g); + + return true; +} + #undef GEN_VR_LDX #undef GEN_VR_STX #undef GEN_VR_LVE From patchwork Thu Oct 21 19:45:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544595 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzBh2l0hz9sNH for ; Fri, 22 Oct 2021 07:11:06 +1100 (AEDT) Received: from localhost ([::1]:47324 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeP1-0007b1-Fq for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:11:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33878) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde3a-0005Ru-1W; Thu, 21 Oct 2021 15:48:54 -0400 Received: from [201.28.113.2] (port=47716 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde3X-0001rY-LQ; Thu, 21 Oct 2021 15:48:53 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:46:59 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 0F6A980012A; Thu, 21 Oct 2021 16:46:59 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 13/33] target/ppc: Implement vpdepd/vpextd instruction Date: Thu, 21 Oct 2021 16:45:27 -0300 Message-Id: <20211021194547.672988-14-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:46:59.0534 (UTC) FILETIME=[6964B6E0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Signed-off-by: Luis Pires Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn32.decode | 2 ++ target/ppc/translate/vmx-impl.c.inc | 36 +++++++++++++++++++++++++++++ 2 files changed, 38 insertions(+) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 6ce06b231d..4666c06f55 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -336,3 +336,5 @@ DSCRIQ 111111 ..... ..... ...... 001100010 . @Z22_tap_sh_rc VCFUGED 000100 ..... ..... ..... 10101001101 @VX VCLZDM 000100 ..... ..... ..... 11110000100 @VX VCTZDM 000100 ..... ..... ..... 11111000100 @VX +VPDEPD 000100 ..... ..... ..... 10111001101 @VX +VPEXTD 000100 ..... ..... ..... 10110001101 @VX diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index ee9426862c..b240fd5fc6 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1613,6 +1613,42 @@ static bool trans_VCTZDM(DisasContext *ctx, arg_VX *a) return true; } +static bool trans_VPDEPD(DisasContext *ctx, arg_VX *a) +{ + static const TCGOpcode vecop_list[] = { 0 }; + static const GVecGen3 g = { + .fni8 = gen_helper_PDEPD, + .opt_opc = vecop_list, + .vece = MO_64, + }; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + tcg_gen_gvec_3(avr_full_offset(a->vrt), avr_full_offset(a->vra), + avr_full_offset(a->vrb), 16, 16, &g); + + return true; +} + +static bool trans_VPEXTD(DisasContext *ctx, arg_VX *a) +{ + static const TCGOpcode vecop_list[] = { 0 }; + static const GVecGen3 g = { + .fni8 = gen_helper_PEXTD, + .opt_opc = vecop_list, + .vece = MO_64, + }; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + tcg_gen_gvec_3(avr_full_offset(a->vrt), avr_full_offset(a->vra), + avr_full_offset(a->vrb), 16, 16, &g); + + return true; +} + #undef GEN_VR_LDX #undef GEN_VR_STX #undef GEN_VR_LVE From patchwork Thu Oct 21 19:45:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544571 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZyqN0dnVz9sPB for ; Fri, 22 Oct 2021 06:54:22 +1100 (AEDT) Received: from localhost ([::1]:45118 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde8p-0003XO-76 for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 15:54:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33904) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde3e-0005am-2B; Thu, 21 Oct 2021 15:48:58 -0400 Received: from [201.28.113.2] (port=47716 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde3b-0001rY-3j; Thu, 21 Oct 2021 15:48:57 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:46:59 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 6D9F0800145; Thu, 21 Oct 2021 16:46:59 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 14/33] target/ppc: Implement vsldbi/vsrdbi instructions Date: Thu, 21 Oct 2021 16:45:28 -0300 Message-Id: <20211021194547.672988-15-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:46:59.0925 (UTC) FILETIME=[69A06050:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Signed-off-by: Matheus Ferst --- target/ppc/insn32.decode | 8 +++ target/ppc/translate/vmx-impl.c.inc | 78 +++++++++++++++++++++++++++++ 2 files changed, 86 insertions(+) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 4666c06f55..257b11113d 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -38,6 +38,9 @@ %dx_d 6:s10 16:5 0:1 @DX ...... rt:5 ..... .......... ..... . &DX d=%dx_d +&VN vrt vra vrb sh +@VN ...... vrt:5 vra:5 vrb:5 .. sh:3 ...... &VN + &VX vrt vra vrb @VX ...... vrt:5 vra:5 vrb:5 .......... . &VX @@ -338,3 +341,8 @@ VCLZDM 000100 ..... ..... ..... 11110000100 @VX VCTZDM 000100 ..... ..... ..... 11111000100 @VX VPDEPD 000100 ..... ..... ..... 10111001101 @VX VPEXTD 000100 ..... ..... ..... 10110001101 @VX + +## Vector Permute and Formatting Instruction + +VSLDBI 000100 ..... ..... ..... 00 ... 010110 @VN +VSRDBI 000100 ..... ..... ..... 01 ... 010110 @VN diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index b240fd5fc6..e19793f295 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1257,6 +1257,84 @@ static void gen_vsldoi(DisasContext *ctx) tcg_temp_free_i32(sh); } +static bool trans_VSLDBI(DisasContext *ctx, arg_VN *a) +{ + TCGv_i64 t0, t1, t2; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + + get_avr64(t0, a->vra, true); + get_avr64(t1, a->vra, false); + + if (a->sh != 0) { + t2 = tcg_temp_new_i64(); + + /* vrt.h = (vra.h << sh) | (vra.l >> (64 - sh)) */ + tcg_gen_shli_i64(t0, t0, a->sh); + tcg_gen_shri_i64(t2, t1, 64 - a->sh); + tcg_gen_or_i64(t0, t0, t2); + + /* vrt.l = (vra.l << sh) | (vrb.h >> (64 - sh)) */ + get_avr64(t2, a->vrb, true); + tcg_gen_shli_i64(t1, t1, a->sh); + tcg_gen_shri_i64(t2, t2, 64 - a->sh); + tcg_gen_or_i64(t1, t1, t2); + + tcg_temp_free_i64(t2); + } + + set_avr64(a->vrt, t0, true); + set_avr64(a->vrt, t1, false); + + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + + return true; +} + +static bool trans_VSRDBI(DisasContext *ctx, arg_VN *a) +{ + TCGv_i64 t2, t1, t0; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + + get_avr64(t0, a->vrb, false); + get_avr64(t1, a->vrb, true); + + if (a->sh != 0) { + t2 = tcg_temp_new_i64(); + + /* vrt.l = (vrb.l >> sh) | (vrb.h << (64 - sh)) */ + tcg_gen_shri_i64(t0, t0, a->sh); + tcg_gen_shli_i64(t2, t1, 64 - a->sh); + tcg_gen_or_i64(t0, t0, t2); + + /* vrt.h = (vrb.h >> sh) | (vra.l << (64 - sh)) */ + get_avr64(t2, a->vra, false); + tcg_gen_shri_i64(t1, t1, a->sh); + tcg_gen_shli_i64(t2, t2, 64 - a->sh); + tcg_gen_or_i64(t1, t1, t2); + + tcg_temp_free_i64(t2); + } + + set_avr64(a->vrt, t0, false); + set_avr64(a->vrt, t1, true); + + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + + return true; +} + #define GEN_VAFORM_PAIRED(name0, name1, opc2) \ static void glue(gen_, name0##_##name1)(DisasContext *ctx) \ { \ From patchwork Thu Oct 21 19:45:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544577 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZyxK1vmpz9sNH for ; Fri, 22 Oct 2021 06:59:31 +1100 (AEDT) Received: from localhost ([::1]:54430 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeDo-0001Vj-60 for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 15:59:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33920) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde3h-0005jC-6v; Thu, 21 Oct 2021 15:49:01 -0400 Received: from [201.28.113.2] (port=47716 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde3f-0001rY-3h; Thu, 21 Oct 2021 15:49:00 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:00 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id CD61C80012A; Thu, 21 Oct 2021 16:46:59 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 15/33] target/ppc: Implement Vector Insert from GPR using GPR index insns Date: Thu, 21 Oct 2021 16:45:29 -0300 Message-Id: <20211021194547.672988-16-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:00.0347 (UTC) FILETIME=[69E0C4B0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Implements the following PowerISA v3.1 instructions: vinsblx: Vector Insert Byte from GPR using GPR-specified Left-Index vinshlx: Vector Insert Halfword from GPR using GPR-specified Left-Index vinswlx: Vector Insert Word from GPR using GPR-specified Left-Index vinsdlx: Vector Insert Doubleword from GPR using GPR-specified Left-Index vinsbrx: Vector Insert Byte from GPR using GPR-specified Right-Index vinshrx: Vector Insert Halfword from GPR using GPR-specified Right-Index vinswrx: Vector Insert Word from GPR using GPR-specified Right-Index vinsdrx: Vector Insert Doubleword from GPR using GPR-specified Right-Index Signed-off-by: Matheus Ferst --- target/ppc/helper.h | 4 +++ target/ppc/insn32.decode | 9 +++++ target/ppc/int_helper.c | 30 ++++++++++++++++ target/ppc/translate/vmx-impl.c.inc | 55 +++++++++++++++++++++++++++++ 4 files changed, 98 insertions(+) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 86715c491e..45c74b540f 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -230,6 +230,10 @@ DEF_HELPER_3(vinsertb, void, avr, avr, i32) DEF_HELPER_3(vinserth, void, avr, avr, i32) DEF_HELPER_3(vinsertw, void, avr, avr, i32) DEF_HELPER_3(vinsertd, void, avr, avr, i32) +DEF_HELPER_4(VINSBLX, void, env, avr, i64, tl) +DEF_HELPER_4(VINSHLX, void, env, avr, i64, tl) +DEF_HELPER_4(VINSWLX, void, env, avr, i64, tl) +DEF_HELPER_4(VINSDLX, void, env, avr, i64, tl) DEF_HELPER_2(vextsb2w, void, avr, avr) DEF_HELPER_2(vextsh2w, void, avr, avr) DEF_HELPER_2(vextsb2d, void, avr, avr) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 257b11113d..b794424496 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -344,5 +344,14 @@ VPEXTD 000100 ..... ..... ..... 10110001101 @VX ## Vector Permute and Formatting Instruction +VINSBLX 000100 ..... ..... ..... 01000001111 @VX +VINSBRX 000100 ..... ..... ..... 01100001111 @VX +VINSHLX 000100 ..... ..... ..... 01001001111 @VX +VINSHRX 000100 ..... ..... ..... 01101001111 @VX +VINSWLX 000100 ..... ..... ..... 01010001111 @VX +VINSWRX 000100 ..... ..... ..... 01110001111 @VX +VINSDLX 000100 ..... ..... ..... 01011001111 @VX +VINSDRX 000100 ..... ..... ..... 01111001111 @VX + VSLDBI 000100 ..... ..... ..... 00 ... 010110 @VN VSRDBI 000100 ..... ..... ..... 01 ... 010110 @VN diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index d90a397bca..63263dd912 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -1666,6 +1666,36 @@ VINSERT(h, u16) VINSERT(w, u32) VINSERT(d, u64) #undef VINSERT + +#if defined(HOST_WORDS_BIGENDIAN) +#define ELEM_ADDR(VEC, IDX, SIZE) (&(VEC)->VsrB(IDX)) +#else +#define ELEM_ADDR(VEC, IDX, SIZE) (&(VEC)->VsrB(IDX) - (SIZE) + 1) +#endif + +#define VINSX(SUFFIX, TYPE) \ +void glue(glue(helper_VINS, SUFFIX), LX)(CPUPPCState *env, ppc_avr_t *t, \ + uint64_t val, target_ulong index) \ +{ \ + const int maxidx = ARRAY_SIZE(t->u8) - sizeof(TYPE); \ + target_long idx = index; \ + \ + if (idx < 0 || idx > maxidx) { \ + char c = idx < 0 ? 'R' : 'L'; \ + idx = idx < 0 ? sizeof(TYPE) - idx : idx; \ + qemu_log_mask(LOG_GUEST_ERROR, "Invalid index for VINS" #SUFFIX "%cX" \ + " at 0x" TARGET_FMT_lx ", RA = " TARGET_FMT_ld " > %d\n",\ + c, env->nip, idx, maxidx); \ + } else { \ + *(TYPE *)ELEM_ADDR(t, idx, sizeof(TYPE)) = (TYPE)val; \ + } \ +} +VINSX(B, uint8_t) +VINSX(H, uint16_t) +VINSX(W, uint32_t) +VINSX(D, uint64_t) +#undef ELEM_ADDR +#undef VINSX #if defined(HOST_WORDS_BIGENDIAN) #define VEXTRACT(suffix, element) \ void helper_vextract##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t index) \ diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index e19793f295..0c5f0dcf32 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1238,6 +1238,61 @@ GEN_VXFORM_DUAL(vspltish, PPC_ALTIVEC, PPC_NONE, GEN_VXFORM_DUAL(vspltisw, PPC_ALTIVEC, PPC_NONE, vinsertw, PPC_NONE, PPC2_ISA300); +static bool do_vinsx(DisasContext *ctx, int vrt, int size, bool right, TCGv ra, + TCGv_i64 rb, void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv)) +{ + TCGv_ptr t; + TCGv idx; + + t = gen_avr_ptr(vrt); + idx = tcg_temp_new(); + + tcg_gen_andi_tl(idx, ra, 0xF); + if (right) { + tcg_gen_subfi_tl(idx, 16 - size, idx); + } + + gen_helper(cpu_env, t, rb, idx); + + tcg_temp_free_ptr(t); + tcg_temp_free(idx); + + return true; +} + +static bool do_vinsx_VX(DisasContext *ctx, arg_VX *a, int size, bool right, + void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv)) +{ + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + +#if defined(TARGET_PPC64) + return do_vinsx(ctx, a->vrt, size, right, cpu_gpr[a->vra], cpu_gpr[a->vrb], + gen_helper); +#else + bool ok; + TCGv_i64 val; + + val = tcg_temp_new_i64(); + tcg_gen_extu_tl_i64(val, cpu_gpr[a->vrb]); + + ok = do_vinsx(ctx, a->vrt, size, right, cpu_gpr[a->vra], val, gen_helper); + + tcg_temp_free_i64(val); + return ok; +#endif +} + +TRANS(VINSBLX, do_vinsx_VX, 1, false, gen_helper_VINSBLX) +TRANS(VINSHLX, do_vinsx_VX, 2, false, gen_helper_VINSHLX) +TRANS(VINSWLX, do_vinsx_VX, 4, false, gen_helper_VINSWLX) +TRANS(VINSDLX, do_vinsx_VX, 8, false, gen_helper_VINSDLX) + +TRANS(VINSBRX, do_vinsx_VX, 1, true, gen_helper_VINSBLX) +TRANS(VINSHRX, do_vinsx_VX, 2, true, gen_helper_VINSHLX) +TRANS(VINSWRX, do_vinsx_VX, 4, true, gen_helper_VINSWLX) +TRANS(VINSDRX, do_vinsx_VX, 8, true, gen_helper_VINSDLX) + static void gen_vsldoi(DisasContext *ctx) { TCGv_ptr ra, rb, rd; From patchwork Thu Oct 21 19:45:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544600 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzLk5Lnmz9sNH for ; Fri, 22 Oct 2021 07:18:06 +1100 (AEDT) Received: from localhost ([::1]:59786 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeVo-0008A6-Fc for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:18:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33950) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde3l-0005rr-5L; Thu, 21 Oct 2021 15:49:05 -0400 Received: from [201.28.113.2] (port=47716 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde3i-0001rY-QT; Thu, 21 Oct 2021 15:49:04 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:00 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 3CCA1800145; Thu, 21 Oct 2021 16:47:00 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 16/33] target/ppc: Implement Vector Insert Word from GPR using Immediate insns Date: Thu, 21 Oct 2021 16:45:30 -0300 Message-Id: <20211021194547.672988-17-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:00.0925 (UTC) FILETIME=[6A38F6D0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Implements the following PowerISA v3.1 instructions: vinsw: Vector Insert Word from GPR using immediate-specified index vinsd: Vector Insert Doubleword from GPR using immediate-specified index Signed-off-by: Matheus Ferst --- target/ppc/insn32.decode | 6 +++++ target/ppc/translate/vmx-impl.c.inc | 34 +++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index b794424496..e1f76aac34 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -44,6 +44,9 @@ &VX vrt vra vrb @VX ...... vrt:5 vra:5 vrb:5 .......... . &VX +&VX_uim4 vrt uim vrb +@VX_uim4 ...... vrt:5 . uim:4 vrb:5 ........... &VX_uim4 + &X rt ra rb @X ...... rt:5 ra:5 rb:5 .......... . &X @@ -353,5 +356,8 @@ VINSWRX 000100 ..... ..... ..... 01110001111 @VX VINSDLX 000100 ..... ..... ..... 01011001111 @VX VINSDRX 000100 ..... ..... ..... 01111001111 @VX +VINSW 000100 ..... - .... ..... 00011001111 @VX_uim4 +VINSD 000100 ..... - .... ..... 00111001111 @VX_uim4 + VSLDBI 000100 ..... ..... ..... 00 ... 010110 @VN VSRDBI 000100 ..... ..... ..... 01 ... 010110 @VN diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index 0c5f0dcf32..3b526977e4 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1283,6 +1283,37 @@ static bool do_vinsx_VX(DisasContext *ctx, arg_VX *a, int size, bool right, #endif } +static bool do_vins_VX_uim4(DisasContext *ctx, arg_VX_uim4 *a, int size, + void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv)) +{ + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + if (a->uim > (16 - size)) { + qemu_log_mask(LOG_GUEST_ERROR, "Invalid index for VINS* at" + " 0x" TARGET_FMT_lx ", UIM = %d > %d\n", ctx->cia, a->uim, + 16 - size); + return true; + } + +#if defined(TARGET_PPC64) + return do_vinsx(ctx, a->vrt, size, false, tcg_constant_tl(a->uim), + cpu_gpr[a->vrb], gen_helper); +#else + bool ok; + TCGv_i64 val; + + val = tcg_temp_new_i64(); + tcg_gen_extu_tl_i64(val, cpu_gpr[a->vrb]); + + ok = do_vinsx(ctx, a->vrt, size, false, tcg_constant_tl(a->uim), val, + gen_helper); + + tcg_temp_free_i64(val); + return ok; +#endif +} + TRANS(VINSBLX, do_vinsx_VX, 1, false, gen_helper_VINSBLX) TRANS(VINSHLX, do_vinsx_VX, 2, false, gen_helper_VINSHLX) TRANS(VINSWLX, do_vinsx_VX, 4, false, gen_helper_VINSWLX) @@ -1293,6 +1324,9 @@ TRANS(VINSHRX, do_vinsx_VX, 2, true, gen_helper_VINSHLX) TRANS(VINSWRX, do_vinsx_VX, 4, true, gen_helper_VINSWLX) TRANS(VINSDRX, do_vinsx_VX, 8, true, gen_helper_VINSDLX) +TRANS(VINSW, do_vins_VX_uim4, 4, gen_helper_VINSWLX) +TRANS(VINSD, do_vins_VX_uim4, 8, gen_helper_VINSDLX) + static void gen_vsldoi(DisasContext *ctx) { TCGv_ptr ra, rb, rd; From patchwork Thu Oct 21 19:45:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544594 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZz8g0TWLz9sNH for ; Fri, 22 Oct 2021 07:09:23 +1100 (AEDT) Received: from localhost ([::1]:43932 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeNM-0005Jt-Ok for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:09:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33966) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde3o-00060T-HP; Thu, 21 Oct 2021 15:49:08 -0400 Received: from [201.28.113.2] (port=47716 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde3m-0001rY-5n; Thu, 21 Oct 2021 15:49:08 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:01 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id CB98280012A; Thu, 21 Oct 2021 16:47:00 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 17/33] target/ppc: Implement Vector Insert from VSR using GPR index insns Date: Thu, 21 Oct 2021 16:45:31 -0300 Message-Id: <20211021194547.672988-18-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:01.0342 (UTC) FILETIME=[6A7897E0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Implements the following PowerISA v3.1 instructions: vinsbvlx: Vector Insert Byte from VSR using GPR-specified Left-Index vinshvlx: Vector Insert Halfword from VSR using GPR-specified Left-Index vinswvlx: Vector Insert Word from VSR using GPR-specified Left-Index vinsbvrx: Vector Insert Byte from VSR using GPR-specified Right-Index vinshvrx: Vector Insert Halfword from VSR using GPR-specified Right-Index vinswvrx: Vector Insert Word from VSR using GPR-specified Right-Index Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn32.decode | 7 +++++++ target/ppc/int_helper.c | 6 +++--- target/ppc/translate/vmx-impl.c.inc | 32 +++++++++++++++++++++++++++++ 3 files changed, 42 insertions(+), 3 deletions(-) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index e1f76aac34..de410abf7d 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -359,5 +359,12 @@ VINSDRX 000100 ..... ..... ..... 01111001111 @VX VINSW 000100 ..... - .... ..... 00011001111 @VX_uim4 VINSD 000100 ..... - .... ..... 00111001111 @VX_uim4 +VINSBVLX 000100 ..... ..... ..... 00000001111 @VX +VINSBVRX 000100 ..... ..... ..... 00100001111 @VX +VINSHVLX 000100 ..... ..... ..... 00001001111 @VX +VINSHVRX 000100 ..... ..... ..... 00101001111 @VX +VINSWVLX 000100 ..... ..... ..... 00010001111 @VX +VINSWVRX 000100 ..... ..... ..... 00110001111 @VX + VSLDBI 000100 ..... ..... ..... 00 ... 010110 @VN VSRDBI 000100 ..... ..... ..... 01 ... 010110 @VN diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 63263dd912..0506358ad8 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -1683,9 +1683,9 @@ void glue(glue(helper_VINS, SUFFIX), LX)(CPUPPCState *env, ppc_avr_t *t, \ if (idx < 0 || idx > maxidx) { \ char c = idx < 0 ? 'R' : 'L'; \ idx = idx < 0 ? sizeof(TYPE) - idx : idx; \ - qemu_log_mask(LOG_GUEST_ERROR, "Invalid index for VINS" #SUFFIX "%cX" \ - " at 0x" TARGET_FMT_lx ", RA = " TARGET_FMT_ld " > %d\n",\ - c, env->nip, idx, maxidx); \ + qemu_log_mask(LOG_GUEST_ERROR, "Invalid index for VINS" #SUFFIX "%cX/" \ + "VINS" #SUFFIX "V%cX at 0x" TARGET_FMT_lx ", RA = " \ + TARGET_FMT_ld " > %d\n", c, c, env->nip, idx, maxidx); \ } else { \ *(TYPE *)ELEM_ADDR(t, idx, sizeof(TYPE)) = (TYPE)val; \ } \ diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index 3b526977e4..03327d3fe4 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1260,6 +1260,20 @@ static bool do_vinsx(DisasContext *ctx, int vrt, int size, bool right, TCGv ra, return true; } +static bool do_vinsvx(DisasContext *ctx, int vrt, int size, bool right, TCGv ra, + int vrb, void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv)) +{ + bool ok; + TCGv_i64 val; + + val = tcg_temp_new_i64(); + get_avr64(val, vrb, true); + ok = do_vinsx(ctx, vrt, size, right, ra, val, gen_helper); + + tcg_temp_free_i64(val); + return ok; +} + static bool do_vinsx_VX(DisasContext *ctx, arg_VX *a, int size, bool right, void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv)) { @@ -1283,6 +1297,16 @@ static bool do_vinsx_VX(DisasContext *ctx, arg_VX *a, int size, bool right, #endif } +static bool do_vinsvx_VX(DisasContext *ctx, arg_VX *a, int size, bool right, + void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv)) +{ + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + return do_vinsvx(ctx, a->vrt, size, right, cpu_gpr[a->vra], a->vrb, + gen_helper); +} + static bool do_vins_VX_uim4(DisasContext *ctx, arg_VX_uim4 *a, int size, void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv)) { @@ -1327,6 +1351,14 @@ TRANS(VINSDRX, do_vinsx_VX, 8, true, gen_helper_VINSDLX) TRANS(VINSW, do_vins_VX_uim4, 4, gen_helper_VINSWLX) TRANS(VINSD, do_vins_VX_uim4, 8, gen_helper_VINSDLX) +TRANS(VINSBVLX, do_vinsvx_VX, 1, false, gen_helper_VINSBLX) +TRANS(VINSHVLX, do_vinsvx_VX, 2, false, gen_helper_VINSHLX) +TRANS(VINSWVLX, do_vinsvx_VX, 4, false, gen_helper_VINSWLX) + +TRANS(VINSBVRX, do_vinsvx_VX, 1, true, gen_helper_VINSBLX) +TRANS(VINSHVRX, do_vinsvx_VX, 2, true, gen_helper_VINSHLX) +TRANS(VINSWVRX, do_vinsvx_VX, 4, true, gen_helper_VINSWLX) + static void gen_vsldoi(DisasContext *ctx) { TCGv_ptr ra, rb, rd; From patchwork Thu Oct 21 19:45:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544631 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzpS27fKz9sNH for ; Fri, 22 Oct 2021 07:38:40 +1100 (AEDT) Received: from localhost ([::1]:36708 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeph-0006LG-PK for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:38:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34774) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde8o-0005As-87; Thu, 21 Oct 2021 15:54:18 -0400 Received: from [201.28.113.2] (port=19044 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde8l-0006WJ-9e; Thu, 21 Oct 2021 15:54:17 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:01 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 3FC9380012A; Thu, 21 Oct 2021 16:47:01 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 18/33] target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree Date: Thu, 21 Oct 2021 16:45:32 -0300 Message-Id: <20211021194547.672988-19-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:01.0772 (UTC) FILETIME=[6ABA34C0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/helper.h | 4 ---- target/ppc/insn32.decode | 5 +++++ target/ppc/int_helper.c | 21 ------------------- target/ppc/translate/vmx-impl.c.inc | 32 ++++++++++++++++++++--------- target/ppc/translate/vmx-ops.c.inc | 10 +++------ 5 files changed, 30 insertions(+), 42 deletions(-) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 45c74b540f..53c65ca1c7 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -226,10 +226,6 @@ DEF_HELPER_3(vextractub, void, avr, avr, i32) DEF_HELPER_3(vextractuh, void, avr, avr, i32) DEF_HELPER_3(vextractuw, void, avr, avr, i32) DEF_HELPER_3(vextractd, void, avr, avr, i32) -DEF_HELPER_3(vinsertb, void, avr, avr, i32) -DEF_HELPER_3(vinserth, void, avr, avr, i32) -DEF_HELPER_3(vinsertw, void, avr, avr, i32) -DEF_HELPER_3(vinsertd, void, avr, avr, i32) DEF_HELPER_4(VINSBLX, void, env, avr, i64, tl) DEF_HELPER_4(VINSHLX, void, env, avr, i64, tl) DEF_HELPER_4(VINSWLX, void, env, avr, i64, tl) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index de410abf7d..2eb7fb4e92 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -347,6 +347,11 @@ VPEXTD 000100 ..... ..... ..... 10110001101 @VX ## Vector Permute and Formatting Instruction +VINSERTB 000100 ..... - .... ..... 01100001101 @VX_uim4 +VINSERTH 000100 ..... - .... ..... 01101001101 @VX_uim4 +VINSERTW 000100 ..... - .... ..... 01110001101 @VX_uim4 +VINSERTD 000100 ..... - .... ..... 01111001101 @VX_uim4 + VINSBLX 000100 ..... ..... ..... 01000001111 @VX VINSBRX 000100 ..... ..... ..... 01100001111 @VX VINSHLX 000100 ..... ..... ..... 01001001111 @VX diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 0506358ad8..5a925a564d 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -1646,27 +1646,6 @@ void helper_vslo(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) #endif } -#if defined(HOST_WORDS_BIGENDIAN) -#define VINSERT(suffix, element) \ - void helper_vinsert##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t index) \ - { \ - memmove(&r->u8[index], &b->u8[8 - sizeof(r->element[0])], \ - sizeof(r->element[0])); \ - } -#else -#define VINSERT(suffix, element) \ - void helper_vinsert##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t index) \ - { \ - uint32_t d = (16 - index) - sizeof(r->element[0]); \ - memmove(&r->u8[d], &b->u8[8], sizeof(r->element[0])); \ - } -#endif -VINSERT(b, u8) -VINSERT(h, u16) -VINSERT(w, u32) -VINSERT(d, u64) -#undef VINSERT - #if defined(HOST_WORDS_BIGENDIAN) #define ELEM_ADDR(VEC, IDX, SIZE) (&(VEC)->VsrB(IDX)) #else diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index 03327d3fe4..7f98875192 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1217,10 +1217,6 @@ GEN_VXFORM_UIMM_SPLAT(vextractub, 6, 8, 15); GEN_VXFORM_UIMM_SPLAT(vextractuh, 6, 9, 14); GEN_VXFORM_UIMM_SPLAT(vextractuw, 6, 10, 12); GEN_VXFORM_UIMM_SPLAT(vextractd, 6, 11, 8); -GEN_VXFORM_UIMM_SPLAT(vinsertb, 6, 12, 15); -GEN_VXFORM_UIMM_SPLAT(vinserth, 6, 13, 14); -GEN_VXFORM_UIMM_SPLAT(vinsertw, 6, 14, 12); -GEN_VXFORM_UIMM_SPLAT(vinsertd, 6, 15, 8); GEN_VXFORM_UIMM_ENV(vcfux, 5, 12); GEN_VXFORM_UIMM_ENV(vcfsx, 5, 13); GEN_VXFORM_UIMM_ENV(vctuxs, 5, 14); @@ -1231,12 +1227,6 @@ GEN_VXFORM_DUAL(vsplth, PPC_ALTIVEC, PPC_NONE, vextractuh, PPC_NONE, PPC2_ISA300); GEN_VXFORM_DUAL(vspltw, PPC_ALTIVEC, PPC_NONE, vextractuw, PPC_NONE, PPC2_ISA300); -GEN_VXFORM_DUAL(vspltisb, PPC_ALTIVEC, PPC_NONE, - vinsertb, PPC_NONE, PPC2_ISA300); -GEN_VXFORM_DUAL(vspltish, PPC_ALTIVEC, PPC_NONE, - vinserth, PPC_NONE, PPC2_ISA300); -GEN_VXFORM_DUAL(vspltisw, PPC_ALTIVEC, PPC_NONE, - vinsertw, PPC_NONE, PPC2_ISA300); static bool do_vinsx(DisasContext *ctx, int vrt, int size, bool right, TCGv ra, TCGv_i64 rb, void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv)) @@ -1338,6 +1328,23 @@ static bool do_vins_VX_uim4(DisasContext *ctx, arg_VX_uim4 *a, int size, #endif } +static bool do_vinsert_VX_uim4(DisasContext *ctx, arg_VX_uim4 *a, int size, + void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv)) +{ + REQUIRE_INSNS_FLAGS2(ctx, ISA300); + REQUIRE_VECTOR(ctx); + + if (a->uim > (16 - size)) { + qemu_log_mask(LOG_GUEST_ERROR, "Invalid index for VINSERT* at" + " 0x" TARGET_FMT_lx ", UIM = %d > %d\n", ctx->cia, a->uim, + 16 - size); + return true; + } + + return do_vinsvx(ctx, a->vrt, size, false, tcg_constant_tl(a->uim), a->vrb, + gen_helper); +} + TRANS(VINSBLX, do_vinsx_VX, 1, false, gen_helper_VINSBLX) TRANS(VINSHLX, do_vinsx_VX, 2, false, gen_helper_VINSHLX) TRANS(VINSWLX, do_vinsx_VX, 4, false, gen_helper_VINSWLX) @@ -1359,6 +1366,11 @@ TRANS(VINSBVRX, do_vinsvx_VX, 1, true, gen_helper_VINSBLX) TRANS(VINSHVRX, do_vinsvx_VX, 2, true, gen_helper_VINSHLX) TRANS(VINSWVRX, do_vinsvx_VX, 4, true, gen_helper_VINSWLX) +TRANS(VINSERTB, do_vinsert_VX_uim4, 1, gen_helper_VINSBLX) +TRANS(VINSERTH, do_vinsert_VX_uim4, 2, gen_helper_VINSHLX) +TRANS(VINSERTW, do_vinsert_VX_uim4, 4, gen_helper_VINSWLX) +TRANS(VINSERTD, do_vinsert_VX_uim4, 8, gen_helper_VINSDLX) + static void gen_vsldoi(DisasContext *ctx) { TCGv_ptr ra, rb, rd; diff --git a/target/ppc/translate/vmx-ops.c.inc b/target/ppc/translate/vmx-ops.c.inc index f3f4855111..25ee715b43 100644 --- a/target/ppc/translate/vmx-ops.c.inc +++ b/target/ppc/translate/vmx-ops.c.inc @@ -225,13 +225,9 @@ GEN_VXFORM_DUAL_INV(vsplth, vextractuh, 6, 9, 0x00000000, 0x100000, GEN_VXFORM_DUAL_INV(vspltw, vextractuw, 6, 10, 0x00000000, 0x100000, PPC_ALTIVEC), GEN_VXFORM_300_EXT(vextractd, 6, 11, 0x100000), -GEN_VXFORM_DUAL_INV(vspltisb, vinsertb, 6, 12, 0x00000000, 0x100000, - PPC_ALTIVEC), -GEN_VXFORM_DUAL_INV(vspltish, vinserth, 6, 13, 0x00000000, 0x100000, - PPC_ALTIVEC), -GEN_VXFORM_DUAL_INV(vspltisw, vinsertw, 6, 14, 0x00000000, 0x100000, - PPC_ALTIVEC), -GEN_VXFORM_300_EXT(vinsertd, 6, 15, 0x100000), +GEN_VXFORM(vspltisb, 6, 12), +GEN_VXFORM(vspltish, 6, 13), +GEN_VXFORM(vspltisw, 6, 14), GEN_VXFORM_300_EO(vnegw, 0x01, 0x18, 0x06), GEN_VXFORM_300_EO(vnegd, 0x01, 0x18, 0x07), GEN_VXFORM_300_EO(vextsb2w, 0x01, 0x18, 0x10), From patchwork Thu Oct 21 19:45:33 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544592 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZz8G14Ppz9sNH for ; Fri, 22 Oct 2021 07:09:02 +1100 (AEDT) Received: from localhost ([::1]:43178 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeN1-0004pJ-Sx for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:08:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34208) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde5s-0000JS-Hn; Thu, 21 Oct 2021 15:51:16 -0400 Received: from [201.28.113.2] (port=62474 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde5n-0003ye-St; Thu, 21 Oct 2021 15:51:16 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:02 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id AC63980012A; Thu, 21 Oct 2021 16:47:01 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 19/33] target/ppc: Implement Vector Extract Double to VSR using GPR index insns Date: Thu, 21 Oct 2021 16:45:33 -0300 Message-Id: <20211021194547.672988-20-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:02.0195 (UTC) FILETIME=[6AFAC030:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Implement the following PowerISA v3.1 instructions: vextdubvlx: Vector Extract Double Unsigned Byte to VSR using GPR-specified Left-Index vextduhvlx: Vector Extract Double Unsigned Halfword to VSR using GPR-specified Left-Index vextduwvlx: Vector Extract Double Unsigned Word to VSR using GPR-specified Left-Index vextddvlx: Vector Extract Double Unsigned Doubleword to VSR using GPR-specified Left-Index vextdubvrx: Vector Extract Double Unsigned Byte to VSR using GPR-specified Right-Index vextduhvrx: Vector Extract Double Unsigned Halfword to VSR using GPR-specified Right-Index vextduwvrx: Vector Extract Double Unsigned Word to VSR using GPR-specified Right-Index vextddvrx: Vector Extract Double Unsigned Doubleword to VSR using GPR-specified Right-Index Signed-off-by: Luis Pires Signed-off-by: Matheus Ferst --- target/ppc/helper.h | 4 +++ target/ppc/insn32.decode | 12 +++++++++ target/ppc/int_helper.c | 41 ++++++++++++++++++++++++++++- target/ppc/translate/vmx-impl.c.inc | 37 ++++++++++++++++++++++++++ 4 files changed, 93 insertions(+), 1 deletion(-) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 53c65ca1c7..ac8ab7e436 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -336,6 +336,10 @@ DEF_HELPER_2(vextuwlx, tl, tl, avr) DEF_HELPER_2(vextubrx, tl, tl, avr) DEF_HELPER_2(vextuhrx, tl, tl, avr) DEF_HELPER_2(vextuwrx, tl, tl, avr) +DEF_HELPER_5(VEXTDUBVLX, void, env, avr, avr, avr, tl) +DEF_HELPER_5(VEXTDUHVLX, void, env, avr, avr, avr, tl) +DEF_HELPER_5(VEXTDUWVLX, void, env, avr, avr, avr, tl) +DEF_HELPER_5(VEXTDDVLX, void, env, avr, avr, avr, tl) DEF_HELPER_2(vsbox, void, avr, avr) DEF_HELPER_3(vcipher, void, avr, avr, avr) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 2eb7fb4e92..e438177b32 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -38,6 +38,9 @@ %dx_d 6:s10 16:5 0:1 @DX ...... rt:5 ..... .......... ..... . &DX d=%dx_d +&VA vrt vra vrb rc +@VA ...... vrt:5 vra:5 vrb:5 rc:5 ...... &VA + &VN vrt vra vrb sh @VN ...... vrt:5 vra:5 vrb:5 .. sh:3 ...... &VN @@ -347,6 +350,15 @@ VPEXTD 000100 ..... ..... ..... 10110001101 @VX ## Vector Permute and Formatting Instruction +VEXTDUBVLX 000100 ..... ..... ..... ..... 011000 @VA +VEXTDUBVRX 000100 ..... ..... ..... ..... 011001 @VA +VEXTDUHVLX 000100 ..... ..... ..... ..... 011010 @VA +VEXTDUHVRX 000100 ..... ..... ..... ..... 011011 @VA +VEXTDUWVLX 000100 ..... ..... ..... ..... 011100 @VA +VEXTDUWVRX 000100 ..... ..... ..... ..... 011101 @VA +VEXTDDVLX 000100 ..... ..... ..... ..... 011110 @VA +VEXTDDVRX 000100 ..... ..... ..... ..... 011111 @VA + VINSERTB 000100 ..... - .... ..... 01100001101 @VX_uim4 VINSERTH 000100 ..... - .... ..... 01101001101 @VX_uim4 VINSERTW 000100 ..... - .... ..... 01110001101 @VX_uim4 diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 5a925a564d..1577ea8788 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -1673,8 +1673,47 @@ VINSX(B, uint8_t) VINSX(H, uint16_t) VINSX(W, uint32_t) VINSX(D, uint64_t) -#undef ELEM_ADDR #undef VINSX +#define VEXTDVLX(NAME, TYPE) \ +void glue(glue(helper_VEXTD, NAME), VLX)(CPUPPCState *env, ppc_avr_t *t, \ + ppc_avr_t *a, ppc_avr_t *b, \ + target_ulong index) \ +{ \ + const int array_size = ARRAY_SIZE(t->u8), elem_size = sizeof(TYPE); \ + const target_long idx = index; \ + \ + if (idx < 0) { \ + qemu_log_mask(LOG_GUEST_ERROR, "Invalid index for VEXTD" #NAME "VRX at"\ + " 0x" TARGET_FMT_lx ", RC = " TARGET_FMT_ld " > %d\n", env->nip, \ + 32 - elem_size - idx, 32 - elem_size); \ + } else if (idx + elem_size <= array_size) { \ + t->VsrD(0) = *(TYPE *)ELEM_ADDR(a, idx, elem_size); \ + t->VsrD(1) = 0; \ + } else if (idx < array_size) { \ + ppc_avr_t tmp = { .u64 = { 0, 0 } }; \ + const int len_a = array_size - idx, len_b = elem_size - len_a; \ + \ + memmove(ELEM_ADDR(&tmp, array_size / 2 - elem_size, len_a), \ + ELEM_ADDR(a, idx, len_a), len_a); \ + memmove(ELEM_ADDR(&tmp, array_size / 2 - len_b, len_b), \ + ELEM_ADDR(b, 0, len_b), len_b); \ + \ + *t = tmp; \ + } else if (idx + elem_size <= 2 * array_size) { \ + t->VsrD(0) = *(TYPE *)ELEM_ADDR(b, idx - array_size, elem_size); \ + t->VsrD(1) = 0; \ + } else { \ + qemu_log_mask(LOG_GUEST_ERROR, "Invalid index for VEXTD" #NAME "VLX at"\ + " 0x" TARGET_FMT_lx ", RC = " TARGET_FMT_ld " > %d\n", env->nip, \ + idx, 32 - elem_size); \ + } \ +} +VEXTDVLX(UB, uint8_t) +VEXTDVLX(UH, uint16_t) +VEXTDVLX(UW, uint32_t) +VEXTDVLX(D, uint64_t) +#undef ELEM_ADDR +#undef VEXTDVLX #if defined(HOST_WORDS_BIGENDIAN) #define VEXTRACT(suffix, element) \ void helper_vextract##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t index) \ diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index 7f98875192..b361f73a67 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1228,6 +1228,43 @@ GEN_VXFORM_DUAL(vsplth, PPC_ALTIVEC, PPC_NONE, GEN_VXFORM_DUAL(vspltw, PPC_ALTIVEC, PPC_NONE, vextractuw, PPC_NONE, PPC2_ISA300); +static bool do_vextdx(DisasContext *ctx, arg_VA *a, int size, bool right, + void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv)) +{ + TCGv_ptr vrt, vra, vrb; + TCGv rc; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + vrt = gen_avr_ptr(a->vrt); + vra = gen_avr_ptr(a->vra); + vrb = gen_avr_ptr(a->vrb); + rc = tcg_temp_new(); + + tcg_gen_andi_tl(rc, cpu_gpr[a->rc], 0x1F); + if (right) { + tcg_gen_subfi_tl(rc, 32 - size, rc); + } + gen_helper(cpu_env, vrt, vra, vrb, rc); + + tcg_temp_free_ptr(vrt); + tcg_temp_free_ptr(vra); + tcg_temp_free_ptr(vrb); + tcg_temp_free(rc); + return true; +} + +TRANS(VEXTDUBVLX, do_vextdx, 1, false, gen_helper_VEXTDUBVLX) +TRANS(VEXTDUHVLX, do_vextdx, 2, false, gen_helper_VEXTDUHVLX) +TRANS(VEXTDUWVLX, do_vextdx, 4, false, gen_helper_VEXTDUWVLX) +TRANS(VEXTDDVLX, do_vextdx, 8, false, gen_helper_VEXTDDVLX) + +TRANS(VEXTDUBVRX, do_vextdx, 1, true, gen_helper_VEXTDUBVLX) +TRANS(VEXTDUHVRX, do_vextdx, 2, true, gen_helper_VEXTDUHVLX) +TRANS(VEXTDUWVRX, do_vextdx, 4, true, gen_helper_VEXTDUWVLX) +TRANS(VEXTDDVRX, do_vextdx, 8, true, gen_helper_VEXTDDVLX) + static bool do_vinsx(DisasContext *ctx, int vrt, int size, bool right, TCGv ra, TCGv_i64 rb, void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv)) { From patchwork Thu Oct 21 19:45:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544596 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzFW1W4Jz9sNH for ; Fri, 22 Oct 2021 07:13:35 +1100 (AEDT) Received: from localhost ([::1]:52366 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeRQ-0002iY-Rc for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:13:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34242) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde5x-0000T1-Dq; Thu, 21 Oct 2021 15:51:21 -0400 Received: from [201.28.113.2] (port=62474 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde5u-0003ye-9i; Thu, 21 Oct 2021 15:51:21 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:02 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 193EF800145; Thu, 21 Oct 2021 16:47:02 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 20/33] target/ppc: Introduce REQUIRE_VSX macro Date: Thu, 21 Oct 2021 16:45:34 -0300 Message-Id: <20211021194547.672988-21-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:02.0586 (UTC) FILETIME=[6B3669A0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, "Bruno Larsen \(billionai\)" , matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Bruno Larsen (billionai)" Introduce the macro to centralize checking if the VSX facility is enabled and handle it correctly. Signed-off-by: Bruno Larsen (billionai) Signed-off-by: Luis Pires Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/translate.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index e7ea15f703..d11029d03a 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7352,6 +7352,14 @@ static int times_16(DisasContext *ctx, int x) } \ } while (0) +#define REQUIRE_VSX(CTX) \ + do { \ + if (unlikely(!(CTX)->vsx_enabled)) { \ + gen_exception((CTX), POWERPC_EXCP_VSXU); \ + return true; \ + } \ + } while (0) + #define REQUIRE_FPU(ctx) \ do { \ if (unlikely(!(ctx)->fpu_enabled)) { \ From patchwork Thu Oct 21 19:45:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544597 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzG04G04z9sNH for ; Fri, 22 Oct 2021 07:14:00 +1100 (AEDT) Received: from localhost ([::1]:53482 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeRq-0003Z2-9r for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:13:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34256) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde61-0000Xi-M1; Thu, 21 Oct 2021 15:51:25 -0400 Received: from [201.28.113.2] (port=62474 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde5y-0003ye-Ni; Thu, 21 Oct 2021 15:51:24 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:02 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 7D31380012A; Thu, 21 Oct 2021 16:47:02 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 21/33] target/ppc: moved stxv and lxv from legacy to decodtree Date: Thu, 21 Oct 2021 16:45:35 -0300 Message-Id: <20211021194547.672988-22-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:02.0978 (UTC) FILETIME=[6B723A20:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Lucas Mateus Castro (alqotel)" Moved stxv and lxv implementation from the legacy system to decodetree. Signed-off-by: Luis Pires Signed-off-by: Lucas Mateus Castro (alqotel) Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn32.decode | 8 ++++ target/ppc/translate.c | 17 +------- target/ppc/translate/vsx-impl.c.inc | 60 ++++++++++++++++++++++++++++- 3 files changed, 68 insertions(+), 17 deletions(-) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index e438177b32..296d6d6c5a 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -28,6 +28,9 @@ %dq_rtp 22:4 !function=times_2 @DQ_rtp ...... ....0 ra:5 ............ .... &D rt=%dq_rtp si=%dq_si +%dq_rt_tsx 3:1 21:5 +@DQ_TSX ...... ..... ra:5 ............ .... &D si=%dq_si rt=%dq_rt_tsx + %ds_si 2:s14 !function=times_4 @DS ...... rt:5 ra:5 .............. .. &D si=%ds_si @@ -385,3 +388,8 @@ VINSWVRX 000100 ..... ..... ..... 00110001111 @VX VSLDBI 000100 ..... ..... ..... 00 ... 010110 @VN VSRDBI 000100 ..... ..... ..... 01 ... 010110 @VN + +# VSX Load/Store Instructions + +LXV 111101 ..... ..... ............ . 001 @DQ_TSX +STXV 111101 ..... ..... ............ . 101 @DQ_TSX diff --git a/target/ppc/translate.c b/target/ppc/translate.c index d11029d03a..f109830207 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7444,20 +7444,7 @@ static void gen_dform39(DisasContext *ctx) /* handles stfdp, lxv, stxsd, stxssp lxvx */ static void gen_dform3D(DisasContext *ctx) { - if ((ctx->opcode & 3) == 1) { /* DQ-FORM */ - switch (ctx->opcode & 0x7) { - case 1: /* lxv */ - if (ctx->insns_flags2 & PPC2_ISA300) { - return gen_lxv(ctx); - } - break; - case 5: /* stxv */ - if (ctx->insns_flags2 & PPC2_ISA300) { - return gen_stxv(ctx); - } - break; - } - } else { /* DS-FORM */ + if ((ctx->opcode & 3) != 1) { /* DS-FORM */ switch (ctx->opcode & 0x3) { case 0: /* stfdp */ if (ctx->insns_flags2 & PPC2_ISA205) { @@ -7582,7 +7569,7 @@ GEN_HANDLER2_E(extswsli1, "extswsli", 0x1F, 0x1B, 0x1B, 0x00000000, #endif /* handles lfdp, lxsd, lxssp */ GEN_HANDLER_E(dform39, 0x39, 0xFF, 0xFF, 0x00000000, PPC_NONE, PPC2_ISA205), -/* handles stfdp, lxv, stxsd, stxssp, stxv */ +/* handles stfdp, stxsd, stxssp */ GEN_HANDLER_E(dform3D, 0x3D, 0xFF, 0xFF, 0x00000000, PPC_NONE, PPC2_ISA205), GEN_HANDLER(lmw, 0x2E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), GEN_HANDLER(stmw, 0x2F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER), diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index 57a7f73bba..dd14be6ee5 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -317,7 +317,6 @@ static void gen_##name(DisasContext *ctx) \ tcg_temp_free_i64(xtl); \ } -VSX_VECTOR_LOAD(lxv, ld_i64, 0) VSX_VECTOR_LOAD(lxvx, ld_i64, 1) #define VSX_VECTOR_STORE(name, op, indexed) \ @@ -370,7 +369,6 @@ static void gen_##name(DisasContext *ctx) \ tcg_temp_free_i64(xtl); \ } -VSX_VECTOR_STORE(stxv, st_i64, 0) VSX_VECTOR_STORE(stxvx, st_i64, 1) #ifdef TARGET_PPC64 @@ -2077,6 +2075,64 @@ static void gen_xvxsigdp(DisasContext *ctx) tcg_temp_free_i64(xbl); } +static bool do_lstxv(DisasContext *ctx, int ra, int displ, + int rt, bool store) +{ + TCGv ea; + TCGv_i64 xt; + MemOp mop; + int offset; + + ea = tcg_temp_new(); + xt = tcg_temp_new_i64(); + + mop = DEF_MEMOP(MO_Q); + + gen_set_access_type(ctx, ACCESS_INT); + do_ea_calc(ctx, ra, tcg_const_tl(displ), ea); + + if (ctx->le_mode) { + gen_addr_add(ctx, ea, ea, 8); + offset = -8; + } else { + offset = 8; + } + + if (store) { + get_cpu_vsrh(xt, rt); + tcg_gen_qemu_st_i64(xt, ea, ctx->mem_idx, mop); + gen_addr_add(ctx, ea, ea, offset); + get_cpu_vsrl(xt, rt); + tcg_gen_qemu_st_i64(xt, ea, ctx->mem_idx, mop); + } else { + tcg_gen_qemu_ld_i64(xt, ea, ctx->mem_idx, mop); + set_cpu_vsrh(rt, xt); + gen_addr_add(ctx, ea, ea, offset); + tcg_gen_qemu_ld_i64(xt, ea, ctx->mem_idx, mop); + set_cpu_vsrl(rt, xt); + } + + tcg_temp_free(ea); + tcg_temp_free_i64(xt); + return true; +} + +static bool do_lstxv_D(DisasContext *ctx, arg_D *a, bool store) +{ + REQUIRE_INSNS_FLAGS2(ctx, ISA300); + + if (a->rt >= 32) { + REQUIRE_VSX(ctx); + } else { + REQUIRE_VECTOR(ctx); + } + + return do_lstxv(ctx, a->ra, a->si, a->rt, store); +} + +TRANS(STXV, do_lstxv_D, true) +TRANS(LXV, do_lstxv_D, false) + #undef GEN_XX2FORM #undef GEN_XX3FORM #undef GEN_XX2IFORM From patchwork Thu Oct 21 19:45:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544602 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzQD6sMDz9sNH for ; Fri, 22 Oct 2021 07:21:08 +1100 (AEDT) Received: from localhost ([::1]:35522 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeYk-0002Y7-LY for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:21:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34268) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde65-0000db-IC; Thu, 21 Oct 2021 15:51:29 -0400 Received: from [201.28.113.2] (port=62474 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde62-0003ye-Q1; Thu, 21 Oct 2021 15:51:29 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:03 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id DCD8480012A; Thu, 21 Oct 2021 16:47:02 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 22/33] target/ppc: moved stxvx and lxvx from legacy to decodtree Date: Thu, 21 Oct 2021 16:45:36 -0300 Message-Id: <20211021194547.672988-23-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:03.0371 (UTC) FILETIME=[6BAE31B0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Lucas Mateus Castro (alqotel)" Moved stxvx and lxvx implementation from the legacy system to decodetree. Signed-off-by: Lucas Mateus Castro (alqotel) Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn32.decode | 5 ++ target/ppc/translate/vsx-impl.c.inc | 127 ++++------------------------ target/ppc/translate/vsx-ops.c.inc | 2 - 3 files changed, 23 insertions(+), 111 deletions(-) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 296d6d6c5a..3ce26b2e6e 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -103,6 +103,9 @@ @X_tbp_s_rc ...... ....0 s:1 .... ....0 .......... rc:1 &X_tb_s_rc rt=%x_frtp rb=%x_frbp +%x_rt_tsx 0:1 21:5 +@X_TSX ...... ..... ra:5 rb:5 .......... . &X rt=%x_rt_tsx + &X_frtp_vrb frtp vrb @X_frtp_vrb ...... ....0 ..... vrb:5 .......... . &X_frtp_vrb frtp=%x_frtp @@ -393,3 +396,5 @@ VSRDBI 000100 ..... ..... ..... 01 ... 010110 @VN LXV 111101 ..... ..... ............ . 001 @DQ_TSX STXV 111101 ..... ..... ............ . 101 @DQ_TSX +LXVX 011111 ..... ..... ..... 0100 - 01100 . @X_TSX +STXVX 011111 ..... ..... ..... 0110001100 . @X_TSX diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index dd14be6ee5..6fdcf936ce 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -265,112 +265,6 @@ static void gen_lxvb16x(DisasContext *ctx) tcg_temp_free_i64(xtl); } -#define VSX_VECTOR_LOAD(name, op, indexed) \ -static void gen_##name(DisasContext *ctx) \ -{ \ - int xt; \ - TCGv EA; \ - TCGv_i64 xth; \ - TCGv_i64 xtl; \ - \ - if (indexed) { \ - xt = xT(ctx->opcode); \ - } else { \ - xt = DQxT(ctx->opcode); \ - } \ - \ - if (xt < 32) { \ - if (unlikely(!ctx->vsx_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_VSXU); \ - return; \ - } \ - } else { \ - if (unlikely(!ctx->altivec_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_VPU); \ - return; \ - } \ - } \ - xth = tcg_temp_new_i64(); \ - xtl = tcg_temp_new_i64(); \ - gen_set_access_type(ctx, ACCESS_INT); \ - EA = tcg_temp_new(); \ - if (indexed) { \ - gen_addr_reg_index(ctx, EA); \ - } else { \ - gen_addr_imm_index(ctx, EA, 0x0F); \ - } \ - if (ctx->le_mode) { \ - tcg_gen_qemu_##op(xtl, EA, ctx->mem_idx, MO_LEQ); \ - set_cpu_vsrl(xt, xtl); \ - tcg_gen_addi_tl(EA, EA, 8); \ - tcg_gen_qemu_##op(xth, EA, ctx->mem_idx, MO_LEQ); \ - set_cpu_vsrh(xt, xth); \ - } else { \ - tcg_gen_qemu_##op(xth, EA, ctx->mem_idx, MO_BEQ); \ - set_cpu_vsrh(xt, xth); \ - tcg_gen_addi_tl(EA, EA, 8); \ - tcg_gen_qemu_##op(xtl, EA, ctx->mem_idx, MO_BEQ); \ - set_cpu_vsrl(xt, xtl); \ - } \ - tcg_temp_free(EA); \ - tcg_temp_free_i64(xth); \ - tcg_temp_free_i64(xtl); \ -} - -VSX_VECTOR_LOAD(lxvx, ld_i64, 1) - -#define VSX_VECTOR_STORE(name, op, indexed) \ -static void gen_##name(DisasContext *ctx) \ -{ \ - int xt; \ - TCGv EA; \ - TCGv_i64 xth; \ - TCGv_i64 xtl; \ - \ - if (indexed) { \ - xt = xT(ctx->opcode); \ - } else { \ - xt = DQxT(ctx->opcode); \ - } \ - \ - if (xt < 32) { \ - if (unlikely(!ctx->vsx_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_VSXU); \ - return; \ - } \ - } else { \ - if (unlikely(!ctx->altivec_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_VPU); \ - return; \ - } \ - } \ - xth = tcg_temp_new_i64(); \ - xtl = tcg_temp_new_i64(); \ - get_cpu_vsrh(xth, xt); \ - get_cpu_vsrl(xtl, xt); \ - gen_set_access_type(ctx, ACCESS_INT); \ - EA = tcg_temp_new(); \ - if (indexed) { \ - gen_addr_reg_index(ctx, EA); \ - } else { \ - gen_addr_imm_index(ctx, EA, 0x0F); \ - } \ - if (ctx->le_mode) { \ - tcg_gen_qemu_##op(xtl, EA, ctx->mem_idx, MO_LEQ); \ - tcg_gen_addi_tl(EA, EA, 8); \ - tcg_gen_qemu_##op(xth, EA, ctx->mem_idx, MO_LEQ); \ - } else { \ - tcg_gen_qemu_##op(xth, EA, ctx->mem_idx, MO_BEQ); \ - tcg_gen_addi_tl(EA, EA, 8); \ - tcg_gen_qemu_##op(xtl, EA, ctx->mem_idx, MO_BEQ); \ - } \ - tcg_temp_free(EA); \ - tcg_temp_free_i64(xth); \ - tcg_temp_free_i64(xtl); \ -} - -VSX_VECTOR_STORE(stxvx, st_i64, 1) - #ifdef TARGET_PPC64 #define VSX_VECTOR_LOAD_STORE_LENGTH(name) \ static void gen_##name(DisasContext *ctx) \ @@ -2075,7 +1969,7 @@ static void gen_xvxsigdp(DisasContext *ctx) tcg_temp_free_i64(xbl); } -static bool do_lstxv(DisasContext *ctx, int ra, int displ, +static bool do_lstxv(DisasContext *ctx, int ra, TCGv displ, int rt, bool store) { TCGv ea; @@ -2089,7 +1983,7 @@ static bool do_lstxv(DisasContext *ctx, int ra, int displ, mop = DEF_MEMOP(MO_Q); gen_set_access_type(ctx, ACCESS_INT); - do_ea_calc(ctx, ra, tcg_const_tl(displ), ea); + do_ea_calc(ctx, ra, displ, ea); if (ctx->le_mode) { gen_addr_add(ctx, ea, ea, 8); @@ -2127,11 +2021,26 @@ static bool do_lstxv_D(DisasContext *ctx, arg_D *a, bool store) REQUIRE_VECTOR(ctx); } - return do_lstxv(ctx, a->ra, a->si, a->rt, store); + return do_lstxv(ctx, a->ra, tcg_constant_tl(a->si), a->rt, store); +} + +static bool do_lstxv_X(DisasContext *ctx, arg_X *a, bool store) +{ + REQUIRE_INSNS_FLAGS2(ctx, ISA300); + + if (a->rt >= 32) { + REQUIRE_VSX(ctx); + } else { + REQUIRE_VECTOR(ctx); + } + + return do_lstxv(ctx, a->ra, cpu_gpr[a->rb], a->rt, store); } TRANS(STXV, do_lstxv_D, true) TRANS(LXV, do_lstxv_D, false) +TRANS(STXVX, do_lstxv_X, true) +TRANS(LXVX, do_lstxv_X, false) #undef GEN_XX2FORM #undef GEN_XX3FORM diff --git a/target/ppc/translate/vsx-ops.c.inc b/target/ppc/translate/vsx-ops.c.inc index 1d41beef26..b94f3fa4e0 100644 --- a/target/ppc/translate/vsx-ops.c.inc +++ b/target/ppc/translate/vsx-ops.c.inc @@ -10,7 +10,6 @@ GEN_HANDLER_E(lxvdsx, 0x1F, 0x0C, 0x0A, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(lxvw4x, 0x1F, 0x0C, 0x18, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(lxvh8x, 0x1F, 0x0C, 0x19, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(lxvb16x, 0x1F, 0x0C, 0x1B, 0, PPC_NONE, PPC2_ISA300), -GEN_HANDLER_E(lxvx, 0x1F, 0x0C, 0x08, 0x00000040, PPC_NONE, PPC2_ISA300), #if defined(TARGET_PPC64) GEN_HANDLER_E(lxvl, 0x1F, 0x0D, 0x08, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(lxvll, 0x1F, 0x0D, 0x09, 0, PPC_NONE, PPC2_ISA300), @@ -25,7 +24,6 @@ GEN_HANDLER_E(stxvd2x, 0x1F, 0xC, 0x1E, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(stxvw4x, 0x1F, 0xC, 0x1C, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(stxvh8x, 0x1F, 0x0C, 0x1D, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(stxvb16x, 0x1F, 0x0C, 0x1F, 0, PPC_NONE, PPC2_ISA300), -GEN_HANDLER_E(stxvx, 0x1F, 0x0C, 0x0C, 0, PPC_NONE, PPC2_ISA300), #if defined(TARGET_PPC64) GEN_HANDLER_E(stxvl, 0x1F, 0x0D, 0x0C, 0, PPC_NONE, PPC2_ISA300), GEN_HANDLER_E(stxvll, 0x1F, 0x0D, 0x0D, 0, PPC_NONE, PPC2_ISA300), From patchwork Thu Oct 21 19:45:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544603 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzQM1lKDz9sNH for ; Fri, 22 Oct 2021 07:21:15 +1100 (AEDT) Received: from localhost ([::1]:35668 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeYq-0002hC-Uw for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:21:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34282) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde69-0000mE-KF; Thu, 21 Oct 2021 15:51:33 -0400 Received: from [201.28.113.2] (port=62474 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde67-0003ye-LN; Thu, 21 Oct 2021 15:51:33 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:03 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 481F480012A; Thu, 21 Oct 2021 16:47:03 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 23/33] target/ppc: added the instructions LXVP and STXVP Date: Thu, 21 Oct 2021 16:45:37 -0300 Message-Id: <20211021194547.672988-24-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:03.0795 (UTC) FILETIME=[6BEEE430:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Lucas Mateus Castro (alqotel)" Implemented the instructions lxvp and stxvp using decodetree Signed-off-by: Luis Pires Signed-off-by: Lucas Mateus Castro (alqotel) Signed-off-by: Matheus Ferst --- target/ppc/insn32.decode | 5 ++++ target/ppc/translate/vsx-impl.c.inc | 40 ++++++++++++++++++++++------- 2 files changed, 36 insertions(+), 9 deletions(-) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 3ce26b2e6e..c252dec02f 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -31,6 +31,9 @@ %dq_rt_tsx 3:1 21:5 @DQ_TSX ...... ..... ra:5 ............ .... &D si=%dq_si rt=%dq_rt_tsx +%rt_tsxp 21:1 22:4 !function=times_2 +@DQ_TSXP ...... ..... ra:5 ............ .... &D si=%dq_si rt=%rt_tsxp + %ds_si 2:s14 !function=times_4 @DS ...... rt:5 ra:5 .............. .. &D si=%ds_si @@ -396,5 +399,7 @@ VSRDBI 000100 ..... ..... ..... 01 ... 010110 @VN LXV 111101 ..... ..... ............ . 001 @DQ_TSX STXV 111101 ..... ..... ............ . 101 @DQ_TSX +LXVP 000110 ..... ..... ............ 0000 @DQ_TSXP +STXVP 000110 ..... ..... ............ 0001 @DQ_TSXP LXVX 011111 ..... ..... ..... 0100 - 01100 . @X_TSX STXVX 011111 ..... ..... ..... 0110001100 . @X_TSX diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index 6fdcf936ce..46dd5a1bea 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -1970,7 +1970,7 @@ static void gen_xvxsigdp(DisasContext *ctx) } static bool do_lstxv(DisasContext *ctx, int ra, TCGv displ, - int rt, bool store) + int rt, bool store, bool paired) { TCGv ea; TCGv_i64 xt; @@ -1986,7 +1986,7 @@ static bool do_lstxv(DisasContext *ctx, int ra, TCGv displ, do_ea_calc(ctx, ra, displ, ea); if (ctx->le_mode) { - gen_addr_add(ctx, ea, ea, 8); + gen_addr_add(ctx, ea, ea, paired ? 24 : 8); offset = -8; } else { offset = 8; @@ -1998,12 +1998,28 @@ static bool do_lstxv(DisasContext *ctx, int ra, TCGv displ, gen_addr_add(ctx, ea, ea, offset); get_cpu_vsrl(xt, rt); tcg_gen_qemu_st_i64(xt, ea, ctx->mem_idx, mop); + if (paired) { + gen_addr_add(ctx, ea, ea, offset); + get_cpu_vsrh(xt, rt + 1); + tcg_gen_qemu_st_i64(xt, ea, ctx->mem_idx, mop); + gen_addr_add(ctx, ea, ea, offset); + get_cpu_vsrl(xt, rt + 1); + tcg_gen_qemu_st_i64(xt, ea, ctx->mem_idx, mop); + } } else { tcg_gen_qemu_ld_i64(xt, ea, ctx->mem_idx, mop); set_cpu_vsrh(rt, xt); gen_addr_add(ctx, ea, ea, offset); tcg_gen_qemu_ld_i64(xt, ea, ctx->mem_idx, mop); set_cpu_vsrl(rt, xt); + if (paired) { + gen_addr_add(ctx, ea, ea, offset); + tcg_gen_qemu_ld_i64(xt, ea, ctx->mem_idx, mop); + set_cpu_vsrh(rt + 1, xt); + gen_addr_add(ctx, ea, ea, offset); + tcg_gen_qemu_ld_i64(xt, ea, ctx->mem_idx, mop); + set_cpu_vsrl(rt + 1, xt); + } } tcg_temp_free(ea); @@ -2011,17 +2027,21 @@ static bool do_lstxv(DisasContext *ctx, int ra, TCGv displ, return true; } -static bool do_lstxv_D(DisasContext *ctx, arg_D *a, bool store) +static bool do_lstxv_D(DisasContext *ctx, arg_D *a, bool store, bool paired) { - REQUIRE_INSNS_FLAGS2(ctx, ISA300); + if (paired) { + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + } else { + REQUIRE_INSNS_FLAGS2(ctx, ISA300); + } - if (a->rt >= 32) { + if (paired || a->rt >= 32) { REQUIRE_VSX(ctx); } else { REQUIRE_VECTOR(ctx); } - return do_lstxv(ctx, a->ra, tcg_constant_tl(a->si), a->rt, store); + return do_lstxv(ctx, a->ra, tcg_constant_tl(a->si), a->rt, store, paired); } static bool do_lstxv_X(DisasContext *ctx, arg_X *a, bool store) @@ -2034,11 +2054,13 @@ static bool do_lstxv_X(DisasContext *ctx, arg_X *a, bool store) REQUIRE_VECTOR(ctx); } - return do_lstxv(ctx, a->ra, cpu_gpr[a->rb], a->rt, store); + return do_lstxv(ctx, a->ra, cpu_gpr[a->rb], a->rt, store, false); } -TRANS(STXV, do_lstxv_D, true) -TRANS(LXV, do_lstxv_D, false) +TRANS(STXV, do_lstxv_D, true, false) +TRANS(LXV, do_lstxv_D, false, false) +TRANS(STXVP, do_lstxv_D, true, true) +TRANS(LXVP, do_lstxv_D, false, true) TRANS(STXVX, do_lstxv_X, true) TRANS(LXVX, do_lstxv_X, false) From patchwork Thu Oct 21 19:45:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544613 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzX12BM5z9sNH for ; Fri, 22 Oct 2021 07:26:09 +1100 (AEDT) Received: from localhost ([::1]:44352 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdedZ-0000Jr-Gp for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:26:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34294) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde6C-0000tP-Nv; Thu, 21 Oct 2021 15:51:36 -0400 Received: from [201.28.113.2] (port=62474 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde6A-0003ye-Ne; Thu, 21 Oct 2021 15:51:36 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:04 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id AE27280012A; Thu, 21 Oct 2021 16:47:03 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 24/33] target/ppc: added the instructions LXVPX and STXVPX Date: Thu, 21 Oct 2021 16:45:38 -0300 Message-Id: <20211021194547.672988-25-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:04.0188 (UTC) FILETIME=[6C2ADBC0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Lucas Mateus Castro (alqotel)" Implemented the instructions lxvpx and stxvpx using decodetree Signed-off-by: Lucas Mateus Castro (alqotel) Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn32.decode | 3 +++ target/ppc/translate/vsx-impl.c.inc | 18 ++++++++++++------ 2 files changed, 15 insertions(+), 6 deletions(-) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index c252dec02f..e4508631b0 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -108,6 +108,7 @@ %x_rt_tsx 0:1 21:5 @X_TSX ...... ..... ra:5 rb:5 .......... . &X rt=%x_rt_tsx +@X_TSXP ...... ..... ra:5 rb:5 .......... . &X rt=%rt_tsxp &X_frtp_vrb frtp vrb @X_frtp_vrb ...... ....0 ..... vrb:5 .......... . &X_frtp_vrb frtp=%x_frtp @@ -403,3 +404,5 @@ LXVP 000110 ..... ..... ............ 0000 @DQ_TSXP STXVP 000110 ..... ..... ............ 0001 @DQ_TSXP LXVX 011111 ..... ..... ..... 0100 - 01100 . @X_TSX STXVX 011111 ..... ..... ..... 0110001100 . @X_TSX +LXVPX 011111 ..... ..... ..... 0101001101 - @X_TSXP +STXVPX 011111 ..... ..... ..... 0111001101 - @X_TSXP diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index 46dd5a1bea..d3e2e4ff8e 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -2044,25 +2044,31 @@ static bool do_lstxv_D(DisasContext *ctx, arg_D *a, bool store, bool paired) return do_lstxv(ctx, a->ra, tcg_constant_tl(a->si), a->rt, store, paired); } -static bool do_lstxv_X(DisasContext *ctx, arg_X *a, bool store) +static bool do_lstxv_X(DisasContext *ctx, arg_X *a, bool store, bool paired) { - REQUIRE_INSNS_FLAGS2(ctx, ISA300); + if (paired) { + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + } else { + REQUIRE_INSNS_FLAGS2(ctx, ISA300); + } - if (a->rt >= 32) { + if (paired || a->rt >= 32) { REQUIRE_VSX(ctx); } else { REQUIRE_VECTOR(ctx); } - return do_lstxv(ctx, a->ra, cpu_gpr[a->rb], a->rt, store, false); + return do_lstxv(ctx, a->ra, cpu_gpr[a->rb], a->rt, store, paired); } TRANS(STXV, do_lstxv_D, true, false) TRANS(LXV, do_lstxv_D, false, false) TRANS(STXVP, do_lstxv_D, true, true) TRANS(LXVP, do_lstxv_D, false, true) -TRANS(STXVX, do_lstxv_X, true) -TRANS(LXVX, do_lstxv_X, false) +TRANS(STXVX, do_lstxv_X, true, false) +TRANS(LXVX, do_lstxv_X, false, false) +TRANS(STXVPX, do_lstxv_X, true, true) +TRANS(LXVPX, do_lstxv_X, false, true) #undef GEN_XX2FORM #undef GEN_XX3FORM From patchwork Thu Oct 21 19:45:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544611 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzV12xDWz9sNH for ; Fri, 22 Oct 2021 07:24:25 +1100 (AEDT) Received: from localhost ([::1]:42354 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdebu-0007MG-T0 for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:24:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34498) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde7H-0002fU-6r; Thu, 21 Oct 2021 15:52:43 -0400 Received: from [201.28.113.2] (port=46784 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde7F-0005Hb-Bn; Thu, 21 Oct 2021 15:52:42 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:04 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 17B6A800145; Thu, 21 Oct 2021 16:47:04 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 25/33] target/ppc: added the instructions PLXV and PSTXV Date: Thu, 21 Oct 2021 16:45:39 -0300 Message-Id: <20211021194547.672988-26-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:04.0625 (UTC) FILETIME=[6C6D8A10:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Lucas Mateus Castro (alqotel)" Implemented the instructions plxv and pstxv using decodetree Signed-off-by: Lucas Mateus Castro (alqotel) Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn64.decode | 10 ++++++++++ target/ppc/translate/vsx-impl.c.inc | 16 ++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 48756cd4ca..093439b370 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -23,6 +23,9 @@ @PLS_D ...... .. ... r:1 .. .................. \ ...... rt:5 ra:5 ................ \ &PLS_D si=%pls_si +@8LS_D_TSX ...... .. . .. r:1 .. .................. \ + ..... rt:6 ra:5 ................ \ + &PLS_D si=%pls_si ### Fixed-Point Load Instructions @@ -137,3 +140,10 @@ PSTFD 000001 10 0--.-- .................. \ PNOP ................................ \ -------------------------------- @PNOP } + +### VSX instructions + +PLXV 000001 00 0--.-- .................. \ + 11001 ...... ..... ................ @8LS_D_TSX +PSTXV 000001 00 0--.-- .................. \ + 11011 ...... ..... ................ @8LS_D_TSX diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index d3e2e4ff8e..64c452ee24 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -2044,6 +2044,20 @@ static bool do_lstxv_D(DisasContext *ctx, arg_D *a, bool store, bool paired) return do_lstxv(ctx, a->ra, tcg_constant_tl(a->si), a->rt, store, paired); } +static bool do_lstxv_PLS_D(DisasContext *ctx, arg_PLS_D *a, + bool store, bool paired) +{ + arg_D d; + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VSX(ctx); + + if (!resolve_PLS_D(ctx, &d, a)) { + return true; + } + + return do_lstxv(ctx, d.ra, tcg_constant_tl(d.si), d.rt, store, paired); +} + static bool do_lstxv_X(DisasContext *ctx, arg_X *a, bool store, bool paired) { if (paired) { @@ -2069,6 +2083,8 @@ TRANS(STXVX, do_lstxv_X, true, false) TRANS(LXVX, do_lstxv_X, false, false) TRANS(STXVPX, do_lstxv_X, true, true) TRANS(LXVPX, do_lstxv_X, false, true) +TRANS64(PSTXV, do_lstxv_PLS_D, true, false) +TRANS64(PLXV, do_lstxv_PLS_D, false, false) #undef GEN_XX2FORM #undef GEN_XX3FORM From patchwork Thu Oct 21 19:45:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544612 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzVr5Kt2z9sNH for ; Fri, 22 Oct 2021 07:25:08 +1100 (AEDT) Received: from localhost ([::1]:43678 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdecc-0008It-FG for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:25:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34524) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde7K-0002gf-EC; Thu, 21 Oct 2021 15:52:47 -0400 Received: from [201.28.113.2] (port=46784 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde7I-0005Hb-AR; Thu, 21 Oct 2021 15:52:46 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:05 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 99C7880012A; Thu, 21 Oct 2021 16:47:04 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 26/33] target/ppc: added the instructions PLXVP and PSTXVP Date: Thu, 21 Oct 2021 16:45:40 -0300 Message-Id: <20211021194547.672988-27-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:05.0158 (UTC) FILETIME=[6CBEDE60:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Lucas Mateus Castro (alqotel)" Implemented the instructions plxvp and pstxvp using decodetree Signed-off-by: Lucas Mateus Castro (alqotel) Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn64.decode | 9 +++++++++ target/ppc/translate/vsx-impl.c.inc | 2 ++ 2 files changed, 11 insertions(+) diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 093439b370..880ac3edc7 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -27,6 +27,11 @@ ..... rt:6 ra:5 ................ \ &PLS_D si=%pls_si +%rt_tsxp 21:1 22:4 !function=times_2 +@8LS_D_TSXP ...... .. . .. r:1 .. .................. \ + ...... ..... ra:5 ................ \ + &PLS_D si=%pls_si rt=%rt_tsxp + ### Fixed-Point Load Instructions PLBZ 000001 10 0--.-- .................. \ @@ -147,3 +152,7 @@ PLXV 000001 00 0--.-- .................. \ 11001 ...... ..... ................ @8LS_D_TSX PSTXV 000001 00 0--.-- .................. \ 11011 ...... ..... ................ @8LS_D_TSX +PLXVP 000001 00 0--.-- .................. \ + 111010 ..... ..... ................ @8LS_D_TSXP +PSTXVP 000001 00 0--.-- .................. \ + 111110 ..... ..... ................ @8LS_D_TSXP diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index 64c452ee24..4b40d2dbe0 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -2085,6 +2085,8 @@ TRANS(STXVPX, do_lstxv_X, true, true) TRANS(LXVPX, do_lstxv_X, false, true) TRANS64(PSTXV, do_lstxv_PLS_D, true, false) TRANS64(PLXV, do_lstxv_PLS_D, false, false) +TRANS64(PSTXVP, do_lstxv_PLS_D, true, true) +TRANS64(PLXVP, do_lstxv_PLS_D, false, true) #undef GEN_XX2FORM #undef GEN_XX3FORM From patchwork Thu Oct 21 19:45:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544622 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzcf5mfdz9sNH for ; Fri, 22 Oct 2021 07:30:10 +1100 (AEDT) Received: from localhost ([::1]:51582 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdehU-0005Sn-I0 for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:30:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34546) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde7N-0002hz-Lp; Thu, 21 Oct 2021 15:52:51 -0400 Received: from [201.28.113.2] (port=46784 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde7L-0005Hb-GQ; Thu, 21 Oct 2021 15:52:49 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:05 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 1477E80012A; Thu, 21 Oct 2021 16:47:05 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 27/33] target/ppc: moved XXSPLTW to using decodetree Date: Thu, 21 Oct 2021 16:45:41 -0300 Message-Id: <20211021194547.672988-28-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:05.0582 (UTC) FILETIME=[6CFF90E0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, "Bruno Larsen \(billionai\)" , matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Bruno Larsen (billionai)" Changed the function that handles XXSPLTW emulation to using decodetree, but still using the same logic. Signed-off-by: Bruno Larsen (billionai) Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn32.decode | 9 +++++++++ target/ppc/translate/vsx-impl.c.inc | 17 ++++++----------- target/ppc/translate/vsx-ops.c.inc | 1 - 3 files changed, 15 insertions(+), 12 deletions(-) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index e4508631b0..5d425ec076 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -116,6 +116,11 @@ &X_vrt_frbp vrt frbp @X_vrt_frbp ...... vrt:5 ..... ....0 .......... . &X_vrt_frbp frbp=%x_frbp +&XX2 xt xb uim:uint8_t +%xx2_xt 0:1 21:5 +%xx2_xb 1:1 11:5 +@XX2 ...... ..... ... uim:2 ..... ......... .. &XX2 xt=%xx2_xt xb=%xx2_xb + &Z22_bf_fra bf fra dm @Z22_bf_fra ...... bf:3 .. fra:5 dm:6 ......... . &Z22_bf_fra @@ -406,3 +411,7 @@ LXVX 011111 ..... ..... ..... 0100 - 01100 . @X_TSX STXVX 011111 ..... ..... ..... 0110001100 . @X_TSX LXVPX 011111 ..... ..... ..... 0101001101 - @X_TSXP STXVPX 011111 ..... ..... ..... 0111001101 - @X_TSXP + +## VSX splat instruction + +XXSPLTW 111100 ..... ---.. ..... 010100100 . . @XX2 diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index 4b40d2dbe0..a35e290f16 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -1461,26 +1461,21 @@ static void gen_xxsel(DisasContext *ctx) vsr_full_offset(rb), vsr_full_offset(ra), 16, 16); } -static void gen_xxspltw(DisasContext *ctx) +static bool trans_XXSPLTW(DisasContext *ctx, arg_XX2 *a) { - int rt = xT(ctx->opcode); - int rb = xB(ctx->opcode); - int uim = UIM(ctx->opcode); int tofs, bofs; - if (unlikely(!ctx->vsx_enabled)) { - gen_exception(ctx, POWERPC_EXCP_VSXU); - return; - } + REQUIRE_VSX(ctx); - tofs = vsr_full_offset(rt); - bofs = vsr_full_offset(rb); - bofs += uim << MO_32; + tofs = vsr_full_offset(a->xt); + bofs = vsr_full_offset(a->xb); + bofs += a->uim << MO_32; #ifndef HOST_WORDS_BIG_ENDIAN bofs ^= 8 | 4; #endif tcg_gen_gvec_dup_mem(MO_32, tofs, bofs, 16, 16); + return true; } #define pattern(x) (((x) & 0xff) * (~(uint64_t)0 / 0xff)) diff --git a/target/ppc/translate/vsx-ops.c.inc b/target/ppc/translate/vsx-ops.c.inc index b94f3fa4e0..b669b64d35 100644 --- a/target/ppc/translate/vsx-ops.c.inc +++ b/target/ppc/translate/vsx-ops.c.inc @@ -348,7 +348,6 @@ GEN_XX3FORM(xxmrghw, 0x08, 0x02, PPC2_VSX), GEN_XX3FORM(xxmrglw, 0x08, 0x06, PPC2_VSX), GEN_XX3FORM(xxperm, 0x08, 0x03, PPC2_ISA300), GEN_XX3FORM(xxpermr, 0x08, 0x07, PPC2_ISA300), -GEN_XX2FORM(xxspltw, 0x08, 0x0A, PPC2_VSX), GEN_XX1FORM(xxspltib, 0x08, 0x0B, PPC2_ISA300), GEN_XX3FORM_DM(xxsldwi, 0x08, 0x00), GEN_XX2FORM_EXT(xxextractuw, 0x0A, 0x0A, PPC2_ISA300), From patchwork Thu Oct 21 19:45:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544619 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzbb1yq3z9sNH for ; Fri, 22 Oct 2021 07:29:15 +1100 (AEDT) Received: from localhost ([::1]:49684 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdegb-0004B3-1t for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:29:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34570) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde7S-0002kZ-3Z; Thu, 21 Oct 2021 15:52:55 -0400 Received: from [201.28.113.2] (port=46784 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde7O-0005Hb-Ra; Thu, 21 Oct 2021 15:52:53 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:05 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 79EE0800145; Thu, 21 Oct 2021 16:47:05 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 28/33] target/ppc: moved XXSPLTIB to using decodetree Date: Thu, 21 Oct 2021 16:45:42 -0300 Message-Id: <20211021194547.672988-29-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:06.0035 (UTC) FILETIME=[6D44B030:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, "Bruno Larsen \(billionai\)" , matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Bruno Larsen (billionai)" Changed the function that handles XXSPLTIB emulation to using decodetree, but still use the same logic as before Signed-off-by: Bruno Larsen (billionai) Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn32.decode | 5 +++++ target/ppc/translate/vsx-impl.c.inc | 20 ++++++-------------- target/ppc/translate/vsx-ops.c.inc | 1 - 3 files changed, 11 insertions(+), 15 deletions(-) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 5d425ec076..fd73946122 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -96,6 +96,10 @@ &X_bfl bf l:bool ra rb @X_bfl ...... bf:3 - l:1 ra:5 rb:5 ..........- &X_bfl +%x_xt 0:1 21:5 +&X_imm8 xt imm:uint8_t +@X_imm8 ...... ..... .. imm:8 .......... . &X_imm8 xt=%x_xt + &X_tb_sp_rc rt rb sp rc:bool @X_tb_sp_rc ...... rt:5 sp:2 ... rb:5 .......... rc:1 &X_tb_sp_rc @@ -414,4 +418,5 @@ STXVPX 011111 ..... ..... ..... 0111001101 - @X_TSXP ## VSX splat instruction +XXSPLTIB 111100 ..... 00 ........ 0101101000 . @X_imm8 XXSPLTW 111100 ..... ---.. ..... 010100100 . . @XX2 diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index a35e290f16..3dbdfc2539 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -1480,23 +1480,15 @@ static bool trans_XXSPLTW(DisasContext *ctx, arg_XX2 *a) #define pattern(x) (((x) & 0xff) * (~(uint64_t)0 / 0xff)) -static void gen_xxspltib(DisasContext *ctx) +static bool trans_XXSPLTIB(DisasContext *ctx, arg_X_imm8 *a) { - uint8_t uim8 = IMM8(ctx->opcode); - int rt = xT(ctx->opcode); - - if (rt < 32) { - if (unlikely(!ctx->vsx_enabled)) { - gen_exception(ctx, POWERPC_EXCP_VSXU); - return; - } + if (a->xt < 32) { + REQUIRE_VSX(ctx); } else { - if (unlikely(!ctx->altivec_enabled)) { - gen_exception(ctx, POWERPC_EXCP_VPU); - return; - } + REQUIRE_VECTOR(ctx); } - tcg_gen_gvec_dup_imm(MO_8, vsr_full_offset(rt), 16, 16, uim8); + tcg_gen_gvec_dup_imm(MO_8, vsr_full_offset(a->xt), 16, 16, a->imm); + return true; } static void gen_xxsldwi(DisasContext *ctx) diff --git a/target/ppc/translate/vsx-ops.c.inc b/target/ppc/translate/vsx-ops.c.inc index b669b64d35..152d1e5c3b 100644 --- a/target/ppc/translate/vsx-ops.c.inc +++ b/target/ppc/translate/vsx-ops.c.inc @@ -348,7 +348,6 @@ GEN_XX3FORM(xxmrghw, 0x08, 0x02, PPC2_VSX), GEN_XX3FORM(xxmrglw, 0x08, 0x06, PPC2_VSX), GEN_XX3FORM(xxperm, 0x08, 0x03, PPC2_ISA300), GEN_XX3FORM(xxpermr, 0x08, 0x07, PPC2_ISA300), -GEN_XX1FORM(xxspltib, 0x08, 0x0B, PPC2_ISA300), GEN_XX3FORM_DM(xxsldwi, 0x08, 0x00), GEN_XX2FORM_EXT(xxextractuw, 0x0A, 0x0A, PPC2_ISA300), GEN_XX2FORM_EXT(xxinsertw, 0x0A, 0x0B, PPC2_ISA300), From patchwork Thu Oct 21 19:45:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544628 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzkH6DXJz9sNH for ; Fri, 22 Oct 2021 07:35:03 +1100 (AEDT) Received: from localhost ([::1]:59684 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdemD-0002hf-KP for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:35:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34590) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde7V-0002lM-58; Thu, 21 Oct 2021 15:52:57 -0400 Received: from [201.28.113.2] (port=46784 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde7T-0005Hb-85; Thu, 21 Oct 2021 15:52:56 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:06 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id E83E080012A; Thu, 21 Oct 2021 16:47:05 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 29/33] target/ppc: implemented XXSPLTI32DX Date: Thu, 21 Oct 2021 16:45:43 -0300 Message-Id: <20211021194547.672988-30-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:06.0426 (UTC) FILETIME=[6D8059A0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, "Bruno Larsen \(billionai\)" , matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Bruno Larsen (billionai)" Implemented XXSPLTI32DX emulation using decodetree Signed-off-by: Bruno Larsen (billionai) Signed-off-by: Matheus Ferst --- target/ppc/insn64.decode | 11 ++++++++ target/ppc/translate/vsx-impl.c.inc | 41 +++++++++++++++++++++++++++++ 2 files changed, 52 insertions(+) diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 880ac3edc7..8d8d5d5729 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -32,6 +32,14 @@ ...... ..... ra:5 ................ \ &PLS_D si=%pls_si rt=%rt_tsxp +# Format 8RR:D +%8rr_si 32:s16 0:16 +%8rr_xt 16:1 21:5 +&8RR_D_IX xt ix si:int32_t +@8RR_D_IX ...... .. .... .. .. ................ \ + ...... ..... ... ix:1 . ................ \ + &8RR_D_IX si=%8rr_si xt=%8rr_xt + ### Fixed-Point Load Instructions PLBZ 000001 10 0--.-- .................. \ @@ -156,3 +164,6 @@ PLXVP 000001 00 0--.-- .................. \ 111010 ..... ..... ................ @8LS_D_TSXP PSTXVP 000001 00 0--.-- .................. \ 111110 ..... ..... ................ @8LS_D_TSXP + +XXSPLTI32DX 000001 01 0000 -- -- ................ \ + 100000 ..... 000 .. ................ @8RR_D_IX diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index 3dbdfc2539..17cbe2dc15 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -1491,6 +1491,47 @@ static bool trans_XXSPLTIB(DisasContext *ctx, arg_X_imm8 *a) return true; } +static bool trans_XXSPLTI32DX(DisasContext *ctx, arg_8RR_D_IX *a) +{ + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VSX(ctx); + + TCGv_i64 new_val; + TCGv_i64 mask; + TCGv_i64 t0; + TCGv_i64 t1; + new_val = tcg_temp_new_i64(); + mask = tcg_temp_new_i64(); + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + + get_cpu_vsrh(t0, a->xt); + get_cpu_vsrl(t1, a->xt); + + tcg_gen_movi_i64(new_val, a->si); + if (a->ix) { + tcg_gen_movi_i64(mask, 0x00000000ffffffff); + tcg_gen_shli_i64(new_val, new_val, 32); + } else { + tcg_gen_movi_i64(mask, 0xffffffff00000000); + } + tcg_gen_and_i64(t0, t0, mask); + tcg_gen_or_i64(t0, t0, new_val); + tcg_gen_and_i64(t1, t1, mask); + tcg_gen_or_i64(t1, t1, new_val); + + set_cpu_vsrh(a->xt, t0); + set_cpu_vsrl(a->xt, t1); + + + tcg_temp_free_i64(mask); + tcg_temp_free_i64(new_val); + tcg_temp_free_i64(t1); + tcg_temp_free_i64(t0); + + return true; +} + static void gen_xxsldwi(DisasContext *ctx) { TCGv_i64 xth, xtl; From patchwork Thu Oct 21 19:45:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544632 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzq34TZyz9sNH for ; Fri, 22 Oct 2021 07:39:11 +1100 (AEDT) Received: from localhost ([::1]:38604 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeqD-0007ea-Bu for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:39:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34604) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde7Z-0002pn-5k; Thu, 21 Oct 2021 15:53:01 -0400 Received: from [201.28.113.2] (port=46784 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde7W-0005Hb-BM; Thu, 21 Oct 2021 15:53:00 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:06 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 55D9280012A; Thu, 21 Oct 2021 16:47:06 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 30/33] target/ppc: Implemented XXSPLTIW using decodetree Date: Thu, 21 Oct 2021 16:45:44 -0300 Message-Id: <20211021194547.672988-31-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:06.0868 (UTC) FILETIME=[6DC3CB40:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, "Bruno Larsen \(billionai\)" , matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Bruno Larsen (billionai)" Implemented the XXSPLTIW instruction, using decodetree. Signed-off-by: Bruno Larsen (billionai) Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn64.decode | 6 ++++++ target/ppc/translate/vsx-impl.c.inc | 10 ++++++++++ 2 files changed, 16 insertions(+) diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 8d8d5d5729..64c73354ac 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -39,6 +39,10 @@ @8RR_D_IX ...... .. .... .. .. ................ \ ...... ..... ... ix:1 . ................ \ &8RR_D_IX si=%8rr_si xt=%8rr_xt +&8RR_D xt si:int32_t +@8RR_D ...... .. .... .. .. ................ \ + ...... ..... .... . ................ \ + &8RR_D si=%8rr_si xt=%8rr_xt ### Fixed-Point Load Instructions @@ -165,5 +169,7 @@ PLXVP 000001 00 0--.-- .................. \ PSTXVP 000001 00 0--.-- .................. \ 111110 ..... ..... ................ @8LS_D_TSXP +XXSPLTIW 000001 01 0000 -- -- ................ \ + 100000 ..... 0011 . ................ @8RR_D XXSPLTI32DX 000001 01 0000 -- -- ................ \ 100000 ..... 000 .. ................ @8RR_D_IX diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index 17cbe2dc15..d9533367c1 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -1491,6 +1491,16 @@ static bool trans_XXSPLTIB(DisasContext *ctx, arg_X_imm8 *a) return true; } +static bool trans_XXSPLTIW(DisasContext *ctx, arg_8RR_D *a) +{ + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VSX(ctx); + + tcg_gen_gvec_dup_imm(MO_32, vsr_full_offset(a->xt), 16, 16, a->si); + + return true; +} + static bool trans_XXSPLTI32DX(DisasContext *ctx, arg_8RR_D_IX *a) { REQUIRE_INSNS_FLAGS2(ctx, ISA310); From patchwork Thu Oct 21 19:45:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544626 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzh93vRjz9sNH for ; Fri, 22 Oct 2021 07:33:13 +1100 (AEDT) Received: from localhost ([::1]:55066 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdekQ-0007xZ-Rd for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:33:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34616) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde7c-0002yy-It; Thu, 21 Oct 2021 15:53:04 -0400 Received: from [201.28.113.2] (port=46784 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde7a-0005Hb-Ap; Thu, 21 Oct 2021 15:53:04 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:07 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id D672A80012A; Thu, 21 Oct 2021 16:47:06 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 31/33] target/ppc: implemented XXSPLTIDP instruction Date: Thu, 21 Oct 2021 16:45:45 -0300 Message-Id: <20211021194547.672988-32-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:07.0403 (UTC) FILETIME=[6E156DB0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, "Bruno Larsen \(billionai\)" , matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: "Bruno Larsen (billionai)" Implemented the instruction XXSPLTIDP using decodetree. Signed-off-by: Bruno Larsen (billionai) Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn64.decode | 2 ++ target/ppc/translate/vsx-impl.c.inc | 10 ++++++++++ 2 files changed, 12 insertions(+) diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index 64c73354ac..e2cdaadcd3 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -169,6 +169,8 @@ PLXVP 000001 00 0--.-- .................. \ PSTXVP 000001 00 0--.-- .................. \ 111110 ..... ..... ................ @8LS_D_TSXP +XXSPLTIDP 000001 01 0000 -- -- ................ \ + 100000 ..... 0010 . ................ @8RR_D XXSPLTIW 000001 01 0000 -- -- ................ \ 100000 ..... 0011 . ................ @8RR_D XXSPLTI32DX 000001 01 0000 -- -- ................ \ diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index d9533367c1..f953a597c7 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -1501,6 +1501,16 @@ static bool trans_XXSPLTIW(DisasContext *ctx, arg_8RR_D *a) return true; } +static bool trans_XXSPLTIDP(DisasContext *ctx, arg_8RR_D *a) +{ + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VSX(ctx); + + tcg_gen_gvec_dup_imm(MO_64, vsr_full_offset(a->xt), 16, 16, + helper_todouble(a->si)); + return true; +} + static bool trans_XXSPLTI32DX(DisasContext *ctx, arg_8RR_D_IX *a) { REQUIRE_INSNS_FLAGS2(ctx, ISA310); From patchwork Thu Oct 21 19:45:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544591 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZz6z1YMdz9sNH for ; Fri, 22 Oct 2021 07:07:55 +1100 (AEDT) Received: from localhost ([::1]:40912 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdeLw-0003GO-QX for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:07:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34634) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde7f-00037S-Vd; Thu, 21 Oct 2021 15:53:07 -0400 Received: from [201.28.113.2] (port=46784 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde7d-0005Hb-M5; Thu, 21 Oct 2021 15:53:07 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:07 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id 504C9800145; Thu, 21 Oct 2021 16:47:07 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 32/33] target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions Date: Thu, 21 Oct 2021 16:45:46 -0300 Message-Id: <20211021194547.672988-33-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:07.0858 (UTC) FILETIME=[6E5ADB20:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, Bruno Larsen , matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Signed-off-by: Bruno Larsen (billionai) Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/helper.h | 4 +++ target/ppc/insn64.decode | 19 ++++++++++ target/ppc/int_helper.c | 15 ++++++++ target/ppc/translate/vsx-impl.c.inc | 55 +++++++++++++++++++++++++++++ 4 files changed, 93 insertions(+) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index ac8ab7e436..67c639ada7 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -522,6 +522,10 @@ DEF_HELPER_4(xxpermr, void, env, vsr, vsr, vsr) DEF_HELPER_4(xxextractuw, void, env, vsr, vsr, i32) DEF_HELPER_4(xxinsertw, void, env, vsr, vsr, i32) DEF_HELPER_3(xvxsigsp, void, env, vsr, vsr) +DEF_HELPER_5(XXBLENDVB, void, vsr, vsr, vsr, vsr, i32) +DEF_HELPER_5(XXBLENDVH, void, vsr, vsr, vsr, vsr, i32) +DEF_HELPER_5(XXBLENDVW, void, vsr, vsr, vsr, vsr, i32) +DEF_HELPER_5(XXBLENDVD, void, vsr, vsr, vsr, vsr, i32) DEF_HELPER_2(efscfsi, i32, env, i32) DEF_HELPER_2(efscfui, i32, env, i32) diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode index e2cdaadcd3..c1965dca17 100644 --- a/target/ppc/insn64.decode +++ b/target/ppc/insn64.decode @@ -44,6 +44,16 @@ ...... ..... .... . ................ \ &8RR_D si=%8rr_si xt=%8rr_xt +# Format XX4 +&XX4 xt xa xb xc +%xx4_xt 0:1 21:5 +%xx4_xa 2:1 16:5 +%xx4_xb 1:1 11:5 +%xx4_xc 3:1 6:5 +@XX4 ........ ........ ........ ........ \ + ...... ..... ..... ..... ..... .. .... \ + &XX4 xt=%xx4_xt xa=%xx4_xa xb=%xx4_xb xc=%xx4_xc + ### Fixed-Point Load Instructions PLBZ 000001 10 0--.-- .................. \ @@ -175,3 +185,12 @@ XXSPLTIW 000001 01 0000 -- -- ................ \ 100000 ..... 0011 . ................ @8RR_D XXSPLTI32DX 000001 01 0000 -- -- ................ \ 100000 ..... 000 .. ................ @8RR_D_IX + +XXBLENDVD 000001 01 0000 -- ------------------ \ + 100001 ..... ..... ..... ..... 11 .... @XX4 +XXBLENDVW 000001 01 0000 -- ------------------ \ + 100001 ..... ..... ..... ..... 10 .... @XX4 +XXBLENDVH 000001 01 0000 -- ------------------ \ + 100001 ..... ..... ..... ..... 01 .... @XX4 +XXBLENDVB 000001 01 0000 -- ------------------ \ + 100001 ..... ..... ..... ..... 00 .... @XX4 diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 1577ea8788..4f56e83d46 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -1771,6 +1771,21 @@ void helper_xxinsertw(CPUPPCState *env, ppc_vsr_t *xt, *xt = t; } +#define XXBLEND(name, sz) \ +void glue(helper_XXBLENDV, name)(ppc_avr_t *t, ppc_avr_t *a, ppc_avr_t *b, \ + ppc_avr_t *c, uint32_t desc) \ +{ \ + for (int i = 0; i < ARRAY_SIZE(t->glue(u, sz)); i++) { \ + t->glue(u, sz)[i] = (c->glue(s, sz)[i] >> (sz - 1)) ? \ + b->glue(u, sz)[i] : a->glue(u, sz)[i]; \ + } \ +} +XXBLEND(B, 8) +XXBLEND(H, 16) +XXBLEND(W, 32) +XXBLEND(D, 64) +#undef XXBLEND + #define VEXT_SIGNED(name, element, cast) \ void helper_##name(ppc_avr_t *r, ppc_avr_t *b) \ { \ diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index f953a597c7..4619d7f238 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -2136,6 +2136,61 @@ TRANS64(PLXV, do_lstxv_PLS_D, false, false) TRANS64(PSTXVP, do_lstxv_PLS_D, true, true) TRANS64(PLXVP, do_lstxv_PLS_D, false, true) +static void gen_xxblendv_vec(unsigned vece, TCGv_vec t, TCGv_vec a, TCGv_vec b, + TCGv_vec c) +{ + TCGv_vec tmp = tcg_temp_new_vec_matching(c); + tcg_gen_sari_vec(vece, tmp, c, (8 << vece) - 1); + tcg_gen_bitsel_vec(vece, t, tmp, b, a); + tcg_temp_free_vec(tmp); +} + +static bool do_xxblendv(DisasContext *ctx, arg_XX4 *a, unsigned vece) +{ + static const TCGOpcode vecop_list[] = { + INDEX_op_sari_vec, 0 + }; + static const GVecGen4 ops[4] = { + { + .fniv = gen_xxblendv_vec, + .fno = gen_helper_XXBLENDVB, + .opt_opc = vecop_list, + .vece = MO_8 + }, + { + .fniv = gen_xxblendv_vec, + .fno = gen_helper_XXBLENDVH, + .opt_opc = vecop_list, + .vece = MO_16 + }, + { + .fniv = gen_xxblendv_vec, + .fno = gen_helper_XXBLENDVW, + .opt_opc = vecop_list, + .vece = MO_32 + }, + { + .fniv = gen_xxblendv_vec, + .fno = gen_helper_XXBLENDVD, + .opt_opc = vecop_list, + .vece = MO_64 + } + }; + + REQUIRE_VSX(ctx); + + tcg_gen_gvec_4(vsr_full_offset(a->xt), vsr_full_offset(a->xa), + vsr_full_offset(a->xb), vsr_full_offset(a->xc), + 16, 16, &ops[vece]); + + return true; +} + +TRANS(XXBLENDVB, do_xxblendv, MO_8) +TRANS(XXBLENDVH, do_xxblendv, MO_16) +TRANS(XXBLENDVW, do_xxblendv, MO_32) +TRANS(XXBLENDVD, do_xxblendv, MO_64) + #undef GEN_XX2FORM #undef GEN_XX3FORM #undef GEN_XX2IFORM From patchwork Thu Oct 21 19:45:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1544627 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4HZzjX70jpz9sNH for ; Fri, 22 Oct 2021 07:34:23 +1100 (AEDT) Received: from localhost ([::1]:58294 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mdelY-0001kH-Af for incoming@patchwork.ozlabs.org; Thu, 21 Oct 2021 16:34:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34748) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mde8k-00051m-6k; Thu, 21 Oct 2021 15:54:14 -0400 Received: from [201.28.113.2] (port=19044 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mde8i-0006WJ-Ah; Thu, 21 Oct 2021 15:54:13 -0400 Received: from power9a ([10.10.71.235]) by outlook.eldorado.org.br with Microsoft SMTPSVC(8.5.9600.16384); Thu, 21 Oct 2021 16:47:08 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by power9a (Postfix) with ESMTP id BE76080012A; Thu, 21 Oct 2021 16:47:07 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 33/33] target/ppc: Implement lxvkq instruction Date: Thu, 21 Oct 2021 16:45:47 -0300 Message-Id: <20211021194547.672988-34-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> References: <20211021194547.672988-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 21 Oct 2021 19:47:08.0251 (UTC) FILETIME=[6E96D2B0:01D7C6B4] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, PDS_HP_HELO_NORDNS=0.001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.castro@eldorado.org.br, richard.henderson@linaro.org, groug@kaod.org, luis.pires@eldorado.org.br, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Signed-off-by: Luis Pires Signed-off-by: Matheus Ferst Reviewed-by: Richard Henderson --- target/ppc/insn32.decode | 7 +++++ target/ppc/translate/vsx-impl.c.inc | 44 +++++++++++++++++++++++++++++ 2 files changed, 51 insertions(+) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index fd73946122..e135b8aba4 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -100,6 +100,9 @@ &X_imm8 xt imm:uint8_t @X_imm8 ...... ..... .. imm:8 .......... . &X_imm8 xt=%x_xt +&X_uim5 xt uim:uint8_t +@X_uim5 ...... ..... ..... uim:5 .......... . &X_uim5 xt=%x_xt + &X_tb_sp_rc rt rb sp rc:bool @X_tb_sp_rc ...... rt:5 sp:2 ... rb:5 .......... rc:1 &X_tb_sp_rc @@ -420,3 +423,7 @@ STXVPX 011111 ..... ..... ..... 0111001101 - @X_TSXP XXSPLTIB 111100 ..... 00 ........ 0101101000 . @X_imm8 XXSPLTW 111100 ..... ---.. ..... 010100100 . . @XX2 + +## VSX Vector Load Special Value Instruction + +LXVKQ 111100 ..... 11111 ..... 0101101000 . @X_uim5 diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc index 4619d7f238..badf70cb01 100644 --- a/target/ppc/translate/vsx-impl.c.inc +++ b/target/ppc/translate/vsx-impl.c.inc @@ -1552,6 +1552,50 @@ static bool trans_XXSPLTI32DX(DisasContext *ctx, arg_8RR_D_IX *a) return true; } +static bool trans_LXVKQ(DisasContext *ctx, arg_X_uim5 *a) +{ + static const uint32_t valid_values = 0b00000001111111110000001111111110; + static const uint64_t values[32] = { + 0, /* Unspecified */ + 0x3FFF000000000000llu, /* QP +1.0 */ + 0x4000000000000000llu, /* QP +2.0 */ + 0x4000800000000000llu, /* QP +3.0 */ + 0x4001000000000000llu, /* QP +4.0 */ + 0x4001400000000000llu, /* QP +5.0 */ + 0x4001800000000000llu, /* QP +6.0 */ + 0x4001C00000000000llu, /* QP +7.0 */ + 0x7FFF000000000000llu, /* QP +Inf */ + 0x7FFF800000000000llu, /* QP dQNaN */ + 0, /* Unspecified */ + 0, /* Unspecified */ + 0, /* Unspecified */ + 0, /* Unspecified */ + 0, /* Unspecified */ + 0, /* Unspecified */ + 0x8000000000000000llu, /* QP -0.0 */ + 0xBFFF000000000000llu, /* QP -1.0 */ + 0xC000000000000000llu, /* QP -2.0 */ + 0xC000800000000000llu, /* QP -3.0 */ + 0xC001000000000000llu, /* QP -4.0 */ + 0xC001400000000000llu, /* QP -5.0 */ + 0xC001800000000000llu, /* QP -6.0 */ + 0xC001C00000000000llu, /* QP -7.0 */ + 0xFFFF000000000000llu, /* QP -Inf */ + }; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VSX(ctx); + + if (!(valid_values & (1 << a->uim))) { + gen_invalid(ctx); + } else { + set_cpu_vsrl(a->xt, tcg_constant_i64(0x0)); + set_cpu_vsrh(a->xt, tcg_constant_i64(values[a->uim])); + } + + return true; +} + static void gen_xxsldwi(DisasContext *ctx) { TCGv_i64 xth, xtl;