From patchwork Tue Sep 21 22:04:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 1530954 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4HDbkV5Y01z9sRN for ; Wed, 22 Sep 2021 08:31:30 +1000 (AEST) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4HDbkV4fl8z2yLV for ; Wed, 22 Sep 2021 08:31:30 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=intel.com (client-ip=192.55.52.151; helo=mga17.intel.com; envelope-from=ben.widawsky@intel.com; receiver=) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4HDb9H71n4z2xKJ for ; Wed, 22 Sep 2021 08:06:10 +1000 (AEST) X-IronPort-AV: E=McAfee;i="6200,9189,10114"; a="203629534" X-IronPort-AV: E=Sophos;i="5.85,311,1624345200"; d="scan'208";a="203629534" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Sep 2021 15:05:06 -0700 X-IronPort-AV: E=Sophos;i="5.85,311,1624345200"; d="scan'208";a="557114687" Received: from ksankar-mobl2.amr.corp.intel.com (HELO bad-guy.kumite) ([10.252.132.1]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Sep 2021 15:05:06 -0700 From: Ben Widawsky To: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH 5/7] PCI: Add pci_find_dvsec_capability to find designated VSEC Date: Tue, 21 Sep 2021 15:04:57 -0700 Message-Id: <20210921220459.2437386-6-ben.widawsky@intel.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210921220459.2437386-1-ben.widawsky@intel.com> References: <20210921220459.2437386-1-ben.widawsky@intel.com> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 22 Sep 2021 08:31:11 +1000 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vishal Verma , Alison Schofield , Ben Widawsky , Andrew Donnellan , Ira Weiny , Frederic Barrat , "David E . Box" , Jonathan Cameron , Bjorn Helgaas , Dan Williams , linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Add pci_find_dvsec_capability to locate a Designated Vendor-Specific Extended Capability with the specified DVSEC ID. The Designated Vendor-Specific Extended Capability (DVSEC) allows one or more vendor specific capabilities that aren't tied to the vendor ID of the PCI component. DVSEC is critical for both the Compute Express Link (CXL) driver as well as the driver for OpenCAPI coherent accelerator (OCXL). Cc: David E. Box Cc: Jonathan Cameron Cc: Bjorn Helgaas Cc: Dan Williams Cc: linux-pci@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org Cc: Frederic Barrat Cc: Andrew Donnellan Signed-off-by: Ben Widawsky Reviewed-by: Frederic Barrat --- drivers/pci/pci.c | 32 ++++++++++++++++++++++++++++++++ include/linux/pci.h | 1 + 2 files changed, 33 insertions(+) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index ce2ab62b64cf..94ac86ff28b0 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -732,6 +732,38 @@ u16 pci_find_vsec_capability(struct pci_dev *dev, u16 vendor, int cap) } EXPORT_SYMBOL_GPL(pci_find_vsec_capability); +/** + * pci_find_dvsec_capability - Find DVSEC for vendor + * @dev: PCI device to query + * @vendor: Vendor ID to match for the DVSEC + * @dvsec: Designated Vendor-specific capability ID + * + * If DVSEC has Vendor ID @vendor and DVSEC ID @dvsec return the capability + * offset in config space; otherwise return 0. + */ +u16 pci_find_dvsec_capability(struct pci_dev *dev, u16 vendor, u16 dvsec) +{ + int pos; + + pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DVSEC); + if (!pos) + return 0; + + while (pos) { + u16 v, id; + + pci_read_config_word(dev, pos + PCI_DVSEC_HEADER1, &v); + pci_read_config_word(dev, pos + PCI_DVSEC_HEADER2, &id); + if (vendor == v && dvsec == id) + return pos; + + pos = pci_find_next_ext_capability(dev, pos, PCI_EXT_CAP_ID_DVSEC); + } + + return 0; +} +EXPORT_SYMBOL_GPL(pci_find_dvsec_capability); + /** * pci_find_parent_resource - return resource region of parent bus of given * region diff --git a/include/linux/pci.h b/include/linux/pci.h index cd8aa6fce204..c93ccfa4571b 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1130,6 +1130,7 @@ u16 pci_find_ext_capability(struct pci_dev *dev, int cap); u16 pci_find_next_ext_capability(struct pci_dev *dev, u16 pos, int cap); struct pci_bus *pci_find_next_bus(const struct pci_bus *from); u16 pci_find_vsec_capability(struct pci_dev *dev, u16 vendor, int cap); +u16 pci_find_dvsec_capability(struct pci_dev *dev, u16 vendor, u16 dvsec); u64 pci_get_dsn(struct pci_dev *dev); From patchwork Tue Sep 21 22:04:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 1530955 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org; receiver=) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4HDbky51Dfz9sRN for ; Wed, 22 Sep 2021 08:31:54 +1000 (AEST) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4HDbky3rDfz3c6f for ; Wed, 22 Sep 2021 08:31:54 +1000 (AEST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=intel.com (client-ip=192.55.52.151; helo=mga17.intel.com; envelope-from=ben.widawsky@intel.com; receiver=) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4HDb9J5kNrz2xKJ for ; Wed, 22 Sep 2021 08:06:12 +1000 (AEST) X-IronPort-AV: E=McAfee;i="6200,9189,10114"; a="203629538" X-IronPort-AV: E=Sophos;i="5.85,311,1624345200"; d="scan'208";a="203629538" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Sep 2021 15:05:07 -0700 X-IronPort-AV: E=Sophos;i="5.85,311,1624345200"; d="scan'208";a="557114700" Received: from ksankar-mobl2.amr.corp.intel.com (HELO bad-guy.kumite) ([10.252.132.1]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Sep 2021 15:05:07 -0700 From: Ben Widawsky To: linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH 7/7] ocxl: Use pci core's DVSEC functionality Date: Tue, 21 Sep 2021 15:04:59 -0700 Message-Id: <20210921220459.2437386-8-ben.widawsky@intel.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210921220459.2437386-1-ben.widawsky@intel.com> References: <20210921220459.2437386-1-ben.widawsky@intel.com> MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 22 Sep 2021 08:31:11 +1000 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alison Schofield , Ben Widawsky , Andrew Donnellan , Ira Weiny , Vishal Verma , Jonathan Cameron , Frederic Barrat , Dan Williams , linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Reduce maintenance burden of DVSEC query implementation by using the centralized PCI core implementation. Cc: linuxppc-dev@lists.ozlabs.org Cc: Frederic Barrat Cc: Andrew Donnellan Signed-off-by: Ben Widawsky Acked-by: Frederic Barrat --- drivers/misc/ocxl/config.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/drivers/misc/ocxl/config.c b/drivers/misc/ocxl/config.c index a68738f38252..e401a51596b9 100644 --- a/drivers/misc/ocxl/config.c +++ b/drivers/misc/ocxl/config.c @@ -33,18 +33,7 @@ static int find_dvsec(struct pci_dev *dev, int dvsec_id) { - int vsec = 0; - u16 vendor, id; - - while ((vsec = pci_find_next_ext_capability(dev, vsec, - OCXL_EXT_CAP_ID_DVSEC))) { - pci_read_config_word(dev, vsec + OCXL_DVSEC_VENDOR_OFFSET, - &vendor); - pci_read_config_word(dev, vsec + OCXL_DVSEC_ID_OFFSET, &id); - if (vendor == PCI_VENDOR_ID_IBM && id == dvsec_id) - return vsec; - } - return 0; + return pci_find_dvsec_capability(dev, PCI_VENDOR_ID_IBM, dvsec_id); } static int find_dvsec_afu_ctrl(struct pci_dev *dev, u8 afu_idx)