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Tue, 24 Aug 2021 06:25:27 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Cc: Ashok Reddy Soma , Ilias Apalodimas , Michal Simek , T Karthik Reddy Subject: [PATCH] xilinx: zynqmp: Enable stack relocation to DDR Date: Tue, 24 Aug 2021 15:25:23 +0200 Message-Id: X-Mailer: git-send-email 2.33.0 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean There is no space in OCM for SPL stack because the space in OCM is occupied by TF-A. That's why move relocate stack to DDR to 0x18000000 address and also enable SPL_SIZE_LIMIT not to be more then 0xfffea000 which is default address for TFA. It is good to summarize current DDR usage in SPL flow. 0-0x80000 is used for BSS (CONFIG_SPL_BSS_START_ADDR, CONFIG_SPL_BSS_MAX_SIZE) 0x100000 is used for DTB passing address (CONFIG_XILINX_OF_BOARD_DTB_ADDR) 0x17fffe70 - CONFIG_SPL_STACK_R_ADDR - is used for GD 0x18000000 is used for SPL stack (CONFIG_SPL_STACK_R_ADDR) 0x20000000-0x21000000 is used for SPL malloc area (CONFIG_SYS_SPL_MALLOC_START, CONFIG_SYS_SPL_MALLOC_SIZE) Signed-off-by: Michal Simek --- configs/xilinx_zynqmp_virt_defconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 8d82fe918a60..00f7133d775a 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -8,6 +8,9 @@ CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC" +CONFIG_SPL_STACK_R_ADDR=0x18000000 +CONFIG_SPL_SIZE_LIMIT=0x2a000 +CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x0 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y @@ -28,6 +31,7 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run scsi_init;usb start" CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_SPL_STACK_R=y CONFIG_SPL_FPGA=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_RAM_SUPPORT=y