From patchwork Thu Aug 12 04:05:32 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 1516086 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=Ywg6WT/q; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GlY623Rrxz9t0p for ; Thu, 12 Aug 2021 14:06:33 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 74B99399E03E for ; Thu, 12 Aug 2021 04:06:30 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 74B99399E03E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1628741190; bh=mF2MXS+iyxIoB8Lq7KaI0Bp/L1PTu8TOk0/08oODMhQ=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=Ywg6WT/qQYOBWiB9RS6N+jkGSnRBN8rgtze2v5eXy0USUtNCEY+4pN9BM61+TafIZ 89TRCwZlpZZa6JPFyxNXDzRMZWefBiWB9JpulrugVDeb9GLrn8LrmPXXV5zSbMN+dq WoNdvGCgOMcC4U37ZDVDj7sdqd8LhEzVlZf1mSKw= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by sourceware.org (Postfix) with ESMTPS id 875673847805 for ; Thu, 12 Aug 2021 04:05:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 875673847805 X-IronPort-AV: E=McAfee;i="6200,9189,10073"; a="194859081" X-IronPort-AV: E=Sophos;i="5.84,314,1620716400"; d="scan'208";a="194859081" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Aug 2021 21:05:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,314,1620716400"; d="scan'208";a="439923301" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga002.jf.intel.com with ESMTP; 11 Aug 2021 21:05:35 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.236.50]) by scymds01.sc.intel.com with ESMTP id 17C45WoG031106; Wed, 11 Aug 2021 21:05:33 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH] [i386] Introduce a scalar version of avx512f_vmscalef and adjust ldexp3 for it. Date: Thu, 12 Aug 2021 12:05:32 +0800 Message-Id: <20210812040532.25854-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: References: X-Spam-Status: No, score=-11.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_PASS, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: liuhongt Reply-To: liuhongt Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Hi: This is the patch i'm going to checkin. Bootstrapped and regtested on x86_64-linux-gnu{-m32,}; 2021-08-12 Uros Bizjak gcc/ChangeLog: PR target/98309 * config/i386/i386.md (avx512f_scalef2): New define_insn. (ldexp3): Adjust for new define_insn. (UNSPEC_SCALEF): Move from sse.md. * config/i386/sse.md (UNSPEC_SCALEF): Move to i386.md. --- gcc/config/i386/i386.md | 27 +++++++++++++++++++-------- gcc/config/i386/sse.md | 1 - 2 files changed, 19 insertions(+), 9 deletions(-) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 56b09c566ed..4a8e8fea290 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -125,6 +125,9 @@ (define_c_enum "unspec" [ UNSPEC_RSQRT UNSPEC_PSADBW + ;; For AVX512F support + UNSPEC_SCALEF + ;; Generic math support UNSPEC_COPYSIGN UNSPEC_XORSIGN @@ -17894,6 +17897,17 @@ (define_expand "expm12" DONE; }) +(define_insn "avx512f_scalef2" + [(set (match_operand:MODEF 0 "register_operand" "=v") + (unspec:MODEF + [(match_operand:MODEF 1 "register_operand" "v") + (match_operand:MODEF 2 "nonimmediate_operand" "vm")] + UNSPEC_SCALEF))] + "TARGET_AVX512F" + "vscalef\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "prefix" "evex") + (set_attr "mode" "")]) + (define_expand "ldexpxf3" [(match_operand:XF 0 "register_operand") (match_operand:XF 1 "register_operand") @@ -17924,15 +17938,12 @@ (define_expand "ldexp3" if (TARGET_AVX512F && TARGET_SSE_MATH) { rtx op2 = gen_reg_rtx (mode); - emit_insn (gen_floatsi2 (op2, operands[2])); - operands[0] = lowpart_subreg (mode, operands[0], mode); - if (MEM_P (operands[1])) + + if (!nonimmediate_operand (operands[1], mode)) operands[1] = force_reg (mode, operands[1]); - operands[1] = lowpart_subreg (mode, operands[1], mode); - op2 = lowpart_subreg (mode, op2, mode); - emit_insn (gen_avx512f_vmscalef (operands[0], - operands[1], - op2)); + + emit_insn (gen_floatsi2 (op2, operands[2])); + emit_insn (gen_avx512f_scalef2 (operands[0], operands[1], op2)); } else { diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 3957c86c3df..9233dfc6150 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -92,7 +92,6 @@ (define_c_enum "unspec" [ UNSPEC_RCP14 UNSPEC_RSQRT14 UNSPEC_FIXUPIMM - UNSPEC_SCALEF UNSPEC_VTERNLOG UNSPEC_GETEXP UNSPEC_GETMANT