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[76.183.134.35]) by smtp.gmail.com with ESMTPSA id u126sm885461ooa.23.2021.08.05.09.48.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Aug 2021 09:48:51 -0700 (PDT) From: Chris Morgan To: u-boot@lists.denx.de Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, kever.yang@rock-chips.com, lukma@denx.de, jon.lin@rock-chips.com, Chris Morgan Subject: [PATCH 1/2] rockchip: px30: add support for setting cpll clock Date: Thu, 5 Aug 2021 11:48:47 -0500 Message-Id: <20210805164848.21001-2-macroalpha82@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210805164848.21001-1-macroalpha82@gmail.com> References: <20210805164848.21001-1-macroalpha82@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: Chris Morgan Starting with commit 92f1e9a4b31c ("clk: Detect failure to set defaults") the clk driver for the PX30 for the Odroid Go Advance would no longer probe correctly, because setting the cpll and gpu clocks are not supported with the clk_px30 U-Boot driver. This adds support for setting the cpll clock to the clk_px30 driver. Another patch will update the U-Boot specific device-tree to remove the GPU clock which is not used by U-Boot. Signed-off-by: Chris Morgan Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_px30.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c index 6b746f4c65..89784f9aa1 100644 --- a/drivers/clk/rockchip/clk_px30.c +++ b/drivers/clk/rockchip/clk_px30.c @@ -1262,6 +1262,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate) case PLL_NPLL: ret = px30_clk_set_pll_rate(priv, NPLL, rate); break; + case PLL_CPLL: + ret = px30_clk_set_pll_rate(priv, CPLL, rate); + break; case ARMCLK: ret = px30_armclk_set_clk(priv, rate); break; From patchwork Thu Aug 5 16:48:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Morgan X-Patchwork-Id: 1514023 X-Patchwork-Delegate: ykai007@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=tykbDKsS; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GgZMG3C8Lz9sRK for ; Fri, 6 Aug 2021 02:49:14 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6507B82E05; Thu, 5 Aug 2021 18:49:01 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="tykbDKsS"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 8FB7282E05; Thu, 5 Aug 2021 18:48:58 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ot1-x32a.google.com (mail-ot1-x32a.google.com [IPv6:2607:f8b0:4864:20::32a]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 421F982E15 for ; Thu, 5 Aug 2021 18:48:54 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=macroalpha82@gmail.com Received: by mail-ot1-x32a.google.com with SMTP id v8-20020a0568301bc8b02904d5b4e5ca3aso5747670ota.13 for ; Thu, 05 Aug 2021 09:48:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Gnx3ogA8zJEzWeeCGk8axD6isLPc3FALeb4DToJVSnI=; b=tykbDKsS14+uT9lbB1iKCkQXmB+9xcsda493zXr03h1r+BsBV/Pye5miAKBvmStqlt Klvoz2lwswN/OB20gWtsxJVKbVnMOYZ+bNQn31usiE/P+ubc5f6sR7uZxTvHTCmntzKj vke1QqJ2w/rfiNasIFAD+UwpEkQMyQygn2aJirRxpwL/Xo9+nLerbQCsE17GOiMWxi7K 6qU8LSOb7uWm60iJ08Par369m+T3y8UYYwB6PftVV2kM04bqx2oN4XA0jUlp9uEc2YSn /4bv2Vlj5nbf1/yycnPqnEbFV9xzJVTCZkK0ddByMF5aEbKOBp1livG1Yst0OFPKI+iF cx+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Gnx3ogA8zJEzWeeCGk8axD6isLPc3FALeb4DToJVSnI=; b=YARfGHNX7sqR3UzrMgtRCFOCJruVmaKZelDLfqpGLlx6ZoZ2kZXgLOtkEJSMM3HjGp eXd7/jcKhqaJJBvu383GHWqvAlxOzR2zuPwPSNBDIhMZceIMDCWQjXRtV4w2G9pkc+hb Z81Tjv9aKYOZIGuHRdxswvh6BcAjlWT95EY+EKhNa+llAcc0aL//g3z9PUlRF1txQZRJ FqiEGf3k7VCw3+ydIpeUI3UqCHegFIRQ4cxRJBfL1Mp68WO+U2om5FQUfSXMotyxjMXt xUlVXTbj0HPeVCbaXIo0f0zQTet8X23gLSoyF0Er1AUjC9nWtMhR48ueJQ2IE4oQXozZ bJwg== X-Gm-Message-State: AOAM531ghWMD5Nwn1n+rq5Phvz5DixanSDYLaUYXNp23V07KV3gOv2eg 3Bb5fCoIwTk1Kt8dl8mApEmhgc42J8g= X-Google-Smtp-Source: ABdhPJzcnw1YfBghuz29scpr38zqLMpfNF7gTMyrjCC0+dXlfgDfBH3sLHydYCXSm7RkcLQDKi9BJg== X-Received: by 2002:a9d:3a1:: with SMTP id f30mr4466993otf.195.1628182132636; Thu, 05 Aug 2021 09:48:52 -0700 (PDT) Received: from wintermute.localdomain (cpe-76-183-134-35.tx.res.rr.com. [76.183.134.35]) by smtp.gmail.com with ESMTPSA id u126sm885461ooa.23.2021.08.05.09.48.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Aug 2021 09:48:52 -0700 (PDT) From: Chris Morgan To: u-boot@lists.denx.de Cc: sjg@chromium.org, philipp.tomsich@vrull.eu, kever.yang@rock-chips.com, lukma@denx.de, jon.lin@rock-chips.com, Chris Morgan Subject: [PATCH 2/2] rockchip: board: remove SCLK_GPU from U-Boot DT Date: Thu, 5 Aug 2021 11:48:48 -0500 Message-Id: <20210805164848.21001-3-macroalpha82@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210805164848.21001-1-macroalpha82@gmail.com> References: <20210805164848.21001-1-macroalpha82@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean From: Chris Morgan Starting with commit 92f1e9a4b31c ("clk: Detect failure to set defaults") the clk driver for the PX30 would fail to probe for the Odroid Go Advance. This patch is to remove the clock for the GPU from the U-Boot specific devicetree, as that clock is not supported by the U-Boot clk_px30 driver. Signed-off-by: Chris Morgan Reviewed-by: Kever Yang --- arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi b/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi index 00767d2abd..c330286bc5 100644 --- a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi +++ b/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi @@ -9,8 +9,18 @@ }; }; +/* U-Boot clk driver for px30 cannot set GPU_CLK */ &cru { u-boot,dm-pre-reloc; + assigned-clocks = <&cru PLL_NPLL>, + <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, + <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>, + <&cru PCLK_BUS_PRE>, <&cru PLL_CPLL>; + + assigned-clock-rates = <1188000000>, + <200000000>, <200000000>, + <150000000>, <150000000>, + <100000000>, <17000000>; }; &dmc {