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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id 189sm1741852pfx.135.2021.08.01.22.41.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:41:28 -0700 (PDT) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Mon, 2 Aug 2021 15:41:01 +1000 Message-Id: <20210802054112.461728-2-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802054112.461728-1-jniethe5@gmail.com> References: <20210802054112.461728-1-jniethe5@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 02 Aug 2021 16:56:28 +1000 Subject: [Pdbg] [PATCH 01/12] libpdbg: Enable p10 host backend X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Niethe Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Jordan Niethe --- Makefile.am | 2 +- libpdbg/dtb.c | 16 +++++++++++++++- p10-host.dts.m4 | 25 +++++++++++++++++++++++++ src/main.c | 7 +++++++ 4 files changed, 48 insertions(+), 2 deletions(-) create mode 100644 p10-host.dts.m4 diff --git a/Makefile.am b/Makefile.am index 5ae4cba00848..fafc43eaa47e 100644 --- a/Makefile.am +++ b/Makefile.am @@ -63,7 +63,7 @@ DT = fake.dts fake-backend.dts fake2.dts fake2-backend.dts \ p8-fsi.dts p8-i2c.dts p8-kernel.dts \ p9w-fsi.dts p9r-fsi.dts p9z-fsi.dts bmc-kernel.dts \ bmc-sbefifo.dts \ - p8-host.dts p9-host.dts p8.dts p9.dts p10.dts + p8-host.dts p9-host.dts p10-host.dts p8.dts p9.dts p10.dts DT_sources = $(DT:.dts=.dtb.S) DT_headers = $(DT:.dts=.dt.h) diff --git a/libpdbg/dtb.c b/libpdbg/dtb.c index 1ab6791ce13b..331bd2cabbb2 100644 --- a/libpdbg/dtb.c +++ b/libpdbg/dtb.c @@ -42,6 +42,7 @@ #include "bmc-kernel.dt.h" #include "p8-host.dt.h" #include "p9-host.dt.h" +#include "p10-host.dt.h" #include "p8-cronus.dt.h" #include "cronus.dt.h" #include "bmc-sbefifo.dt.h" @@ -170,9 +171,15 @@ static void ppc_target(struct pdbg_dtb *dtb) dtb->backend.fdt = &_binary_p9_host_dtb_o_start; if (!dtb->system.fdt) dtb->system.fdt = &_binary_p9_dtb_o_start; + } else if (!strcmp(pdbg_backend_option, "p10")) { + pdbg_proc = PDBG_PROC_P10; + if (!dtb->backend.fdt) + dtb->backend.fdt = &_binary_p10_host_dtb_o_start; + if (!dtb->system.fdt) + dtb->system.fdt = &_binary_p10_dtb_o_start; } else { pdbg_log(PDBG_ERROR, "Invalid system type %s\n", pdbg_backend_option); - pdbg_log(PDBG_ERROR, "Use 'p8' or 'p9'\n"); + pdbg_log(PDBG_ERROR, "Use 'p8' or 'p9' or 'p10'\n"); } return; @@ -215,6 +222,13 @@ static void ppc_target(struct pdbg_dtb *dtb) dtb->backend.fdt = &_binary_p9_host_dtb_o_start; if (!dtb->system.fdt) dtb->system.fdt = &_binary_p9_dtb_o_start; + } else if (strncmp(pos, "POWER10", 7) == 0) { + pdbg_proc = PDBG_PROC_P10; + pdbg_log(PDBG_INFO, "Found a POWER10 PPC host system\n"); + if (!dtb->backend.fdt) + dtb->backend.fdt = &_binary_p10_host_dtb_o_start; + if (!dtb->system.fdt) + dtb->system.fdt = &_binary_p10_dtb_o_start; } else { pdbg_log(PDBG_ERROR, "Unsupported CPU type '%s'\n", pos); } diff --git a/p10-host.dts.m4 b/p10-host.dts.m4 new file mode 100644 index 000000000000..3b4c2b267e1b --- /dev/null +++ b/p10-host.dts.m4 @@ -0,0 +1,25 @@ +/dts-v1/; + +/ { + #address-cells = <0x1>; + #size-cells = <0x0>; + + /* Host based debugfs access */ + pib@0 { + #address-cells = <0x2>; + #size-cells = <0x1>; + compatible = "ibm,host-pib"; + reg = <0x0>; + index = <0x0>; + system-path = "/proc0/pib"; + }; + + pib@8 { + #address-cells = <0x2>; + #size-cells = <0x1>; + compatible = "ibm,host-pib"; + reg = <0x8>; + index = <0x8>; + system-path = "/proc1/pib"; + }; +}; diff --git a/src/main.c b/src/main.c index 1ecf3daf253a..5d16a7dbac18 100644 --- a/src/main.c +++ b/src/main.c @@ -195,6 +195,9 @@ out2: } /* Stolen from skiboot */ +#define P10_PIR2GCID(pir) (((pir) >> 8) & 0xf) +#define P10_PIR2COREID(pir) (((pir) >> 2) & 0x3f) +#define P10_PIR2THREADID(pir) ((pir) & 0x3) #define P9_PIR2GCID(pir) (((pir) >> 8) & 0x7f) #define P9_PIR2COREID(pir) (((pir) >> 2) & 0x3f) #define P9_PIR2THREADID(pir) ((pir) & 0x3) @@ -214,6 +217,10 @@ void pir_map(int pir, int *chip, int *core, int *thread) *chip = P8_PIR2GCID(pir); *core = P8_PIR2COREID(pir); *thread = P8_PIR2THREADID(pir); + } else if (!strncmp(device_node, "p10", 2)) { + *chip = P10_PIR2GCID(pir); + *core = P10_PIR2COREID(pir); + *thread = P10_PIR2THREADID(pir); } else assert(0); From patchwork Mon Aug 2 05:41:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1512286 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=SArTyCrV; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GdTLl3yZYz9t0p for ; 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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id 189sm1741852pfx.135.2021.08.01.22.41.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:41:30 -0700 (PDT) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Mon, 2 Aug 2021 15:41:02 +1000 Message-Id: <20210802054112.461728-3-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802054112.461728-1-jniethe5@gmail.com> References: <20210802054112.461728-1-jniethe5@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 02 Aug 2021 16:56:28 +1000 Subject: [Pdbg] [PATCH 02/12] libpdbg: Add nhtm hardware unit for p10 X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Niethe Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" p10 also has a Nest HTM. The biggest change is that on p10 there are two nhtm units. Add support for it. Signed-off-by: Jordan Niethe --- libpdbg/htm.c | 238 ++++++++++++++++++++++++++++++++++++++++++++++---- p10.dts.m4 | 12 +-- 2 files changed, 226 insertions(+), 24 deletions(-) diff --git a/libpdbg/htm.c b/libpdbg/htm.c index 43cef84522ef..ded46d2987a1 100644 --- a/libpdbg/htm.c +++ b/libpdbg/htm.c @@ -35,6 +35,7 @@ rc;}) #define MIN(x,y) ((x < y) ? x : y) +#define MAX(a, b) ((a) > (b) ? (a) : (b)) #define DEBUGFS_POWERPC "/sys/kernel/debug/powerpc" #define DEBUGFS_SCOM DEBUGFS_POWERPC"/scom" @@ -75,10 +76,34 @@ #define HTM_MEM_SCOPE PPC_BITMASK(1,3) /* Note: the next 3 change on P9 */ #define HTM_MEM_PRIORITY PPC_BITMASK(4,5) +#define HTM_MEM_PRIORITY_P10 PPC_BITMASK(4) #define HTM_MEM_SIZE_SMALL PPC_BIT(13) +#define HTM_MEM_SIZE_SMALL_P10 PPC_BIT(5) #define HTM_MEM_BASE PPC_BITMASK(14,39) +#define HTM_MEM_BASE_P10 PPC_BITMASK(8,39) #define HTM_MEM_SIZE PPC_BITMASK(40,48) #define HTM_STATUS 2 +#define HTM1_STATUS_MASK PPC_BITMASK(22,39) +#define HTM1_STATUS_CRESP_OV PPC_BIT(22) +#define HTM1_STATUS_REPAIR PPC_BIT(23) +#define HTM1_STATUS_BUF_WAIT PPC_BIT(24) +#define HTM1_STATUS_TRIG_DROPPED PPC_BIT(25) +#define HTM1_STATUS_ADDR_ERROR PPC_BIT(26) +#define HTM1_STATUS_REC_DROPPED PPC_BIT(27) +#define HTM1_STATUS_INIT PPC_BIT(28) +#define HTM1_STATUS_PREREQ PPC_BIT(29) +#define HTM1_STATUS_READY PPC_BIT(30) +#define HTM1_STATUS_TRACING PPC_BIT(31) +#define HTM1_STATUS_PAUSED PPC_BIT(32) +#define HTM1_STATUS_FLUSH PPC_BIT(33) +#define HTM1_STATUS_COMPLETE PPC_BIT(34) +#define HTM1_STATUS_ENABLE PPC_BIT(35) +#define HTM1_STATUS_STAMP PPC_BIT(36) +#define HTM1_STATUS_SCOM_ERROR PPC_BIT(37) +#define HTM1_STATUS_PARITY_ERROR PPC_BIT(38) +#define HTM1_STATUS_INVALID_CRESP PPC_BIT(39) +#define HTM1_STATUS_STATE_MASK (PPC_BITMASK(28,36) | HTM_STATUS_REPAIR) +#define HTM1_STATUS_ERROR_MASK (HTM_STATUS_CRESP_OV | PPC_BITMASK(24,27) | PPC_BITMASK(37,39)) #define HTM_STATUS_MASK PPC_BITMASK(2,19) #define HTM_STATUS_CRESP_OV PPC_BIT(2) #define HTM_STATUS_REPAIR PPC_BIT(3) @@ -102,6 +127,8 @@ #define HTM_STATUS_ERROR_MASK (HTM_STATUS_CRESP_OV | PPC_BITMASK(4,7) | PPC_BITMASK(17,19)) #define HTM_LAST_ADDRESS 3 #define HTM_LAST_ADDRESS_MASK PPC_BITMASK(8,56) +#define HTM1_LAST_ADDRESS 4 +#define HTM1_LAST_ADDRESS_MASK PPC_BITMASK(8,56) #define HTM_SCOM_TRIGGER 4 #define HTM_TRIG_START PPC_BIT(0) #define HTM_TRIG_STOP PPC_BIT(1) @@ -132,6 +159,24 @@ #define NHTM_FLEX_MUX 9 #define NHTM_FLEX_MUX_MASK PPC_BITMASK(0,35) #define NHTM_FLEX_DEFAULT 0xCB3456129 +#define NHTM_FLEX_MUX_MASK_P10 PPC_BITMASK(0,39) +#define NHTM_FLEX_DEFAULT_P10 0xCB34561567 +#define NHTM_ADDR_PAT 0xb +#define NHTM_ADDR_PAT_MASK PPC_BITMASK(0, 55) +#define NHTM_ADDR_MASK 0xc +#define NHTM_ADDR_MASK_MASK PPC_BITMASK(0, 55) +#define NHTM_STOP_FILTER 0xd +#define NHTM_STOP_FILTER_TTAG_PAT PPC_BITMASK(0, 14) +#define NHTM_STOP_FILTER_TTAG_MASK PPC_BITMASK(15, 29) +#define NHTM_STOP_FILTER_TTYPE_PAT PPC_BITMASK(30, 36) +#define NHTM_STOP_FILTER_TTYPE_MASK PPC_BITMASK(37, 43) +#define NHTM_STOP_FILTER_CRESP_PAT PPC_BITMASK(44, 48) +#define NHTM_STOP_FILTER_CRESP_MASK PPC_BITMASK(49, 53) +#define NHTM_STOP_CYCLES PPC_BITMASK(54, 60) +#define NHTM_STOP_FILT_ADDR_PAT 0xe +#define NHTM_STOP_FILT_ADDR_PAT_MASK PPC_BITMASK(0, 55) +#define NHTM_STOP_FILT_ADDR_MASK 0xf +#define NHTM_STOP_FILT_ADDR_MASK_MASK PPC_BITMASK(0, 55) enum htm_state { INIT, @@ -161,14 +206,25 @@ enum htm_error { struct htm_status { enum htm_state state; + enum htm_state state1; enum htm_error error; + enum htm_error error1; bool mem_size_select; uint16_t mem_size; uint64_t mem_base; uint64_t mem_last; + uint64_t mem_last1; uint64_t raw; }; +/* Some of the nhtm registers on P10 have moved address slightly */ +static unsigned long reg_off(struct htm *htm, unsigned long reg) +{ + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) + return reg + 1; + return reg; +} + static struct htm *check_and_convert(struct pdbg_target *target) { if (!pdbg_target_is_class(target, "nhtm") && @@ -292,6 +348,37 @@ static int get_status(struct htm *htm, struct htm_status *status) status->error = NONE; } + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { + switch (status->raw & HTM1_STATUS_ERROR_MASK) { + case HTM1_STATUS_CRESP_OV: + status->error1 = CRESP_OV; + break; + case HTM1_STATUS_BUF_WAIT: + status->error1 = BUF_WAIT; + break; + case HTM1_STATUS_TRIG_DROPPED: + status->error1 = TRIGGER_DROPPED; + break; + case HTM1_STATUS_ADDR_ERROR: + status->error1 = ADDR_ERROR; + break; + case HTM1_STATUS_REC_DROPPED: + status->error1 = RECORD_DROPPED; + break; + case HTM1_STATUS_SCOM_ERROR: + status->error1 = SCOM_ERROR; + break; + case HTM1_STATUS_PARITY_ERROR: + status->error1 = PARITY_ERROR; + break; + case HTM1_STATUS_INVALID_CRESP: + status->error1 = INVALID_CRESP; + break; + default: + status->error1 = NONE; + } + } + switch (status->raw & HTM_STATUS_STATE_MASK) { case HTM_STATUS_REPAIR: status->state = REPAIR; @@ -327,16 +414,63 @@ static int get_status(struct htm *htm, struct htm_status *status) status->state = UNINITIALIZED; } + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { + switch (status->raw & HTM1_STATUS_STATE_MASK) { + case HTM1_STATUS_REPAIR: + status->state1 = REPAIR; + break; + case HTM1_STATUS_INIT: + status->state1 = INIT; + break; + case HTM1_STATUS_PREREQ: + status->state1 = PREREQ; + break; + case HTM1_STATUS_READY: + status->state1 = READY; + break; + case HTM1_STATUS_TRACING: + status->state1 = TRACING; + break; + case HTM1_STATUS_PAUSED: + status->state1 = PAUSED; + break; + case HTM1_STATUS_FLUSH: + status->state1 = FLUSH; + break; + case HTM1_STATUS_COMPLETE: + status->state1 = COMPLETE; + break; + case HTM1_STATUS_ENABLE: + status->state1 = ENABLE; + break; + case HTM1_STATUS_STAMP: + status->state1 = STAMP; + break; + default: + status->state1 = UNINITIALIZED; + } + } + if (HTM_ERR(pib_read(&htm->target, HTM_MEMORY_CONF, &val))) return -1; - status->mem_size_select = val & HTM_MEM_SIZE_SMALL; + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { + status->mem_size_select = val & HTM_MEM_SIZE_SMALL_P10; + status->mem_base = val & HTM_MEM_BASE_P10; + } else { + status->mem_size_select = val & HTM_MEM_SIZE_SMALL; + status->mem_base = val & HTM_MEM_BASE; + } status->mem_size = GETFIELD(HTM_MEM_SIZE,val); - status->mem_base = val & HTM_MEM_BASE; if (HTM_ERR(pib_read(&htm->target, HTM_LAST_ADDRESS, &status->mem_last))) return -1; + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { + if (HTM_ERR(pib_read(&htm->target, HTM1_LAST_ADDRESS, &status->mem_last1))) + return -1; + } + return 0; } @@ -540,18 +674,19 @@ static int configure_nhtm(struct htm *htm, bool wrap) return -1; /* Stop on core xstop */ - if (HTM_ERR(pib_write(&htm->target, HTM_TRIGGER_CONTROL, HTM_CTRL_XSTOP_STOP))) + if (HTM_ERR(pib_write(&htm->target, reg_off(htm, HTM_TRIGGER_CONTROL), + HTM_CTRL_XSTOP_STOP))) return -1;; /* * These values are taken from a cronus booted system. */ - if (HTM_ERR(pib_write(&htm->target, NHTM_FILTER_CONTROL, + if (HTM_ERR(pib_write(&htm->target, reg_off(htm, NHTM_FILTER_CONTROL), NHTM_FILTER_MASK | /* no pattern matching */ NHTM_FILTER_CRESP_MASK))) /* no pattern matching */ return -1; - if (HTM_ERR(pib_write(&htm->target, NHTM_TTYPE_FILTER_CONTROL, + if (HTM_ERR(pib_write(&htm->target, reg_off(htm, NHTM_TTYPE_FILTER_CONTROL), NHTM_TTYPE_TYPE_MASK | /* no pattern matching */ NHTM_TTYPE_SIZE_MASK ))) /* no pattern matching */ return -1; @@ -566,6 +701,35 @@ static int configure_nhtm(struct htm *htm, bool wrap) } } + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { + if (HTM_ERR(pib_read(&htm->target, reg_off(htm, NHTM_FLEX_MUX), &val))) + return -1; + + if (GETFIELD(NHTM_FLEX_MUX_MASK_P10, val) != NHTM_FLEX_DEFAULT_P10) { + PR_ERROR("The HTM Flex wasn't default value\n"); + return -1; + } + + if (HTM_ERR(pib_write(&htm->target, NHTM_ADDR_PAT, 0))) + return -1; + + if (HTM_ERR(pib_write(&htm->target, NHTM_ADDR_MASK, NHTM_ADDR_MASK_MASK))) + return -1; + + if (HTM_ERR(pib_write(&htm->target, NHTM_STOP_FILTER, + NHTM_STOP_FILTER_TTAG_MASK | + NHTM_STOP_FILTER_TTYPE_MASK | + NHTM_STOP_FILTER_CRESP_MASK))) + return -1; + + if (HTM_ERR(pib_write(&htm->target, NHTM_STOP_FILT_ADDR_PAT, 0))) + return -1; + + if (HTM_ERR(pib_write(&htm->target, NHTM_STOP_FILT_ADDR_MASK, + NHTM_STOP_FILT_ADDR_MASK_MASK))) + return -1; + } + return 0; } @@ -577,9 +741,13 @@ static int deconfigure_nhtm(struct htm *htm) return 0; } -static int is_startable(struct htm_status *status) +static int is_startable(struct htm *htm, struct htm_status *status) { - return (status->state == READY || status->state == PAUSED); + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) + return ((status->state == READY || status->state == PAUSED) && + (status->state1 == READY || status->state1 == PAUSED)); + else + return (status->state == READY || status->state == PAUSED); } static char *get_debugfs_file(struct htm *htm, const char *file) @@ -715,7 +883,10 @@ static int configure_memory(struct htm *htm) small = 0; if (size < 512*1024*1024) small = 1; - val = SETFIELD(HTM_MEM_SIZE_SMALL, val, small); + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) + val = SETFIELD(HTM_MEM_SIZE_SMALL_P10, val, small); + else + val = SETFIELD(HTM_MEM_SIZE_SMALL, val, small); shift = 29; /* large */ if (small) shift = 24; @@ -728,13 +899,16 @@ static int configure_memory(struct htm *htm) * already shifted correct as read from the kernel, or'ing it * in works fine. */ - val = SETFIELD(HTM_MEM_BASE, val, 0); + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) + val = SETFIELD(HTM_MEM_BASE_P10, val, 0); + else + val = SETFIELD(HTM_MEM_BASE, val, 0); val |= base; if (HTM_ERR(pib_write(&htm->target, HTM_MEMORY_CONF, val))) return -1; - if (HTM_ERR(pib_write(&htm->target, HTM_SCOM_TRIGGER, HTM_TRIG_RESET))) + if (HTM_ERR(pib_write(&htm->target, reg_off(htm, HTM_SCOM_TRIGGER), HTM_TRIG_RESET))) return -1; return 0; @@ -800,16 +974,16 @@ static int __do_htm_start(struct htm *htm, bool wrap) if (HTM_ERR(get_status(htm, &status))) return -1; - if (!is_startable(&status)) { + if (!is_startable(htm, &status)) { PR_ERROR("HTM not in a startable state!\n"); return -1; } PR_INFO("* Sending START trigger to HTM\n"); - if (HTM_ERR(pib_write(&htm->target, HTM_SCOM_TRIGGER, HTM_TRIG_MARK_VALID))) + if (HTM_ERR(pib_write(&htm->target, reg_off(htm, HTM_SCOM_TRIGGER), HTM_TRIG_MARK_VALID))) return -1; - if (HTM_ERR(pib_write(&htm->target, HTM_SCOM_TRIGGER, HTM_TRIG_START))) + if (HTM_ERR(pib_write(&htm->target, reg_off(htm, HTM_SCOM_TRIGGER), HTM_TRIG_START))) return -1; if (htm_toggle_debug_bit(htm)) @@ -843,7 +1017,7 @@ static int do_htm_stop(struct htm *htm) } if (status.state == TRACING) { PR_INFO("* Sending STOP trigger to HTM\n"); - if (HTM_ERR(pib_write(&htm->target, HTM_SCOM_TRIGGER, HTM_TRIG_STOP))) + if (HTM_ERR(pib_write(&htm->target, reg_off(htm, HTM_SCOM_TRIGGER), HTM_TRIG_STOP))) return -1; } else { PR_INFO("* Skipping STOP trigger, HTM is not running\n"); @@ -1008,9 +1182,9 @@ static int do_htm_dump(struct htm *htm, char *filename) { char *trace_file; struct htm_status status; - uint64_t last, end, trace_size; + uint64_t last, end, trace_size, last1 = 0; int trace_fd, dump_fd; - uint32_t eyecatcher; + uint64_t eyecatcher; size_t r; bool wrapped; @@ -1025,6 +1199,11 @@ static int do_htm_dump(struct htm *htm, char *filename) return -1; } + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm") && status.state1 != COMPLETE) { + PR_INFO("* Skipping DUMP tigger, HTM1 is not in complete state\n"); + return -1; + } + trace_file = get_debugfs_file(htm, "trace"); if (!trace_file) return -1; @@ -1036,7 +1215,12 @@ static int do_htm_dump(struct htm *htm, char *filename) goto out3; } - r = read(trace_fd, &eyecatcher, 4); + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { + lseek(trace_fd, 8, SEEK_SET); + r = read(trace_fd, &eyecatcher, 8); + } else { + r = read(trace_fd, &eyecatcher, 4); + } if (r == -1) { PR_ERROR("Failed to read from %s: %m\n", trace_file); goto out2; @@ -1045,6 +1229,8 @@ static int do_htm_dump(struct htm *htm, char *filename) if (eyecatcher == 0x00f0efac) wrapped = false; last = status.mem_last - status.mem_base; + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) + last1 = status.mem_last1 - status.mem_base; end = htm_trace_size(&status); trace_size = wrapped ? end : last; @@ -1083,7 +1269,7 @@ static int do_htm_dump(struct htm *htm, char *filename) r = lseek(trace_fd, 0, SEEK_SET); if (r == -1) goto out1; - r = copy_file(dump_fd, trace_fd, last); + r = copy_file(dump_fd, trace_fd, MAX(last1, last)); if (r) goto out1; r = 1; @@ -1193,10 +1379,26 @@ static struct htm p8_chtm = { }; DECLARE_HW_UNIT(p8_chtm); +static struct htm p10_nhtm = { + .target = { + .name = "POWER10 Nest HTM", + .compatible = "ibm,power10-nhtm", + .class = "nhtm", + .probe = nhtm_probe, + }, + .start = do_htm_start, + .stop = do_htm_stop, + .record = do_htm_record, + .status = do_htm_status, + .dump = do_htm_dump, +}; +DECLARE_HW_UNIT(p10_nhtm); + __attribute__((constructor)) static void register_htm(void) { pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_nhtm_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_nhtm_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_nhtm_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_chtm_hw_unit); } diff --git a/p10.dts.m4 b/p10.dts.m4 index 52e62f017106..d58086962bfb 100644 --- a/p10.dts.m4 +++ b/p10.dts.m4 @@ -316,21 +316,21 @@ define(`CHIP', #size-cells = < 0x01 >; index = < 0x$1 >; - adu@90000 { + adu@3001C00 { compatible = "ibm,power10-adu"; - reg = < 0x00 0x90000 0x50 >; + reg = < 0x00 0x3001C00 0x50 >; system-path = "/mem$1"; }; - htm@5012880 { + htm@3011C80 { compatible = "ibm,power10-nhtm"; - reg = < 0x00 0x5012880 0x40 >; + reg = < 0x00 0x3011C80 0x40 >; index = < 0x$1 >; }; - htm@50128C0 { + htm@30120C0 { compatible = "ibm,power10-nhtm"; - reg = < 0x00 0x50128c0 0x40 >; + reg = < 0x00 0x30120C0 0x40 >; index = < 0x$1 >; }; From patchwork Mon Aug 2 05:41:03 2021 Content-Type: text/plain; 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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id 189sm1741852pfx.135.2021.08.01.22.41.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:41:32 -0700 (PDT) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Mon, 2 Aug 2021 15:41:03 +1000 Message-Id: <20210802054112.461728-4-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802054112.461728-1-jniethe5@gmail.com> References: <20210802054112.461728-1-jniethe5@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 02 Aug 2021 16:56:28 +1000 Subject: [Pdbg] [PATCH 03/12] libpdbg: Fix some bit definitions for P9 X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Niethe Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Jordan Niethe --- libpdbg/htm.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/libpdbg/htm.c b/libpdbg/htm.c index ded46d2987a1..ac0668631001 100644 --- a/libpdbg/htm.c +++ b/libpdbg/htm.c @@ -76,10 +76,13 @@ #define HTM_MEM_SCOPE PPC_BITMASK(1,3) /* Note: the next 3 change on P9 */ #define HTM_MEM_PRIORITY PPC_BITMASK(4,5) +#define HTM_MEM_PRIORITY_P9 PPC_BITMASK(4) #define HTM_MEM_PRIORITY_P10 PPC_BITMASK(4) #define HTM_MEM_SIZE_SMALL PPC_BIT(13) +#define HTM_MEM_SIZE_SMALL_P9 PPC_BIT(5) #define HTM_MEM_SIZE_SMALL_P10 PPC_BIT(5) #define HTM_MEM_BASE PPC_BITMASK(14,39) +#define HTM_MEM_BASE_P9 PPC_BITMASK(8,39) #define HTM_MEM_BASE_P10 PPC_BITMASK(8,39) #define HTM_MEM_SIZE PPC_BITMASK(40,48) #define HTM_STATUS 2 @@ -457,6 +460,9 @@ static int get_status(struct htm *htm, struct htm_status *status) if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { status->mem_size_select = val & HTM_MEM_SIZE_SMALL_P10; status->mem_base = val & HTM_MEM_BASE_P10; + } else if (pdbg_target_compatible(&htm->target, "ibm,power9-nhtm")) { + status->mem_size_select = val & HTM_MEM_SIZE_SMALL_P9; + status->mem_base = val & HTM_MEM_BASE_P9; } else { status->mem_size_select = val & HTM_MEM_SIZE_SMALL; status->mem_base = val & HTM_MEM_BASE; @@ -885,6 +891,8 @@ static int configure_memory(struct htm *htm) small = 1; if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) val = SETFIELD(HTM_MEM_SIZE_SMALL_P10, val, small); + else if (pdbg_target_compatible(&htm->target, "ibm,power9-nhtm")) + val = SETFIELD(HTM_MEM_SIZE_SMALL_P9, val, small); else val = SETFIELD(HTM_MEM_SIZE_SMALL, val, small); shift = 29; /* large */ @@ -901,6 +909,8 @@ static int configure_memory(struct htm *htm) */ if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) val = SETFIELD(HTM_MEM_BASE_P10, val, 0); + else if (pdbg_target_compatible(&htm->target, "ibm,power9-nhtm")) + val = SETFIELD(HTM_MEM_BASE_P9, val, 0); else val = SETFIELD(HTM_MEM_BASE, val, 0); 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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id 189sm1741852pfx.135.2021.08.01.22.41.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:41:34 -0700 (PDT) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Mon, 2 Aug 2021 15:41:04 +1000 Message-Id: <20210802054112.461728-5-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802054112.461728-1-jniethe5@gmail.com> References: <20210802054112.461728-1-jniethe5@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 02 Aug 2021 16:56:28 +1000 Subject: [Pdbg] [PATCH 04/12] libpdbg: Prepare to add chtm for p10 X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Niethe Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Break some p8 specific functionality into helper functions to make things cleaner when adding support for chtm on p10. Signed-off-by: Jordan Niethe --- libpdbg/htm.c | 74 ++++++++++++++++++++++++++++++++++++--------------- 1 file changed, 52 insertions(+), 22 deletions(-) diff --git a/libpdbg/htm.c b/libpdbg/htm.c index ac0668631001..6a6ffeca12a5 100644 --- a/libpdbg/htm.c +++ b/libpdbg/htm.c @@ -595,11 +595,33 @@ static int configure_debugfs_memtrace(struct htm *htm) return 0; } -static int configure_chtm(struct htm *htm, bool wrap) +static int configure_chtm_p8(struct htm *htm) { - uint64_t hid0, ncu, val; + uint64_t hid0, ncu; struct pdbg_target *core; + core = pdbg_target_require_parent("core", &htm->target); + + if (pdbg_target_compatible(&htm->target, "ibm,power8-chtm")) { + if (HTM_ERR(pib_read(core, HID0_REGISTER, &hid0))) + return -1; + hid0 |= HID0_TRACE_BITS; + if (HTM_ERR(pib_write(core, HID0_REGISTER, hid0))) + return -1; + + if (HTM_ERR(pib_read(core, NCU_MODE_REGISTER, &ncu))) + return -1; + ncu |= NCU_MODE_HTM_ENABLE; + if (HTM_ERR(pib_write(core, NCU_MODE_REGISTER, ncu))) + return -1; + } + + return 0; +} +static int configure_chtm(struct htm *htm, bool wrap) +{ + uint64_t val; + if (!pdbg_target_is_class(&htm->target, "chtm")) return 0; @@ -611,11 +633,7 @@ static int configure_chtm(struct htm *htm, bool wrap) HTM_MODE_ENABLE | val))) return -1; - core = pdbg_target_require_parent("core", &htm->target); - if (HTM_ERR(pib_read(core, HID0_REGISTER, &hid0))) - return -1; - hid0 |= HID0_TRACE_BITS; - if (HTM_ERR(pib_write(core, HID0_REGISTER, hid0))) + if (configure_chtm_p8(htm) < 0) return -1; if (HTM_ERR(pib_read(core, NCU_MODE_REGISTER, &ncu))) @@ -627,25 +645,38 @@ static int configure_chtm(struct htm *htm, bool wrap) return 0; } -static int deconfigure_chtm(struct htm *htm) +static int deconfigure_chtm_p8(struct htm *htm) { - uint64_t hid0, ncu; struct pdbg_target *core; + uint64_t ncu, hid0; + + if (pdbg_target_compatible(&htm->target, "ibm,power8-chtm")) { + core = pdbg_target_require_parent("core", &htm->target); + if (HTM_ERR(pib_read(core, NCU_MODE_REGISTER, &ncu))) + return -1; + ncu &= ~NCU_MODE_HTM_ENABLE; + if (HTM_ERR(pib_write(core, NCU_MODE_REGISTER, ncu))) + return -1; + + if (HTM_ERR(pib_read(core, HID0_REGISTER, &hid0))) + return -1; + hid0 &= ~(HID0_TRACE_BITS); + if (HTM_ERR(pib_write(core, HID0_REGISTER, hid0))) + return -1; + } + + return 0; +} + +static int deconfigure_chtm(struct htm *htm) +{ if (!pdbg_target_is_class(&htm->target, "chtm")) return 0; - core = pdbg_target_require_parent("core", &htm->target); - if (HTM_ERR(pib_read(core, NCU_MODE_REGISTER, &ncu))) - return -1; - ncu &= ~NCU_MODE_HTM_ENABLE; - if (HTM_ERR(pib_write(core, NCU_MODE_REGISTER, ncu))) + if (deconfigure_chtm_p8(htm) < 0) return -1; - if (HTM_ERR(pib_read(core, HID0_REGISTER, &hid0))) - return -1; - hid0 &= ~(HID0_TRACE_BITS); - if (HTM_ERR(pib_write(core, HID0_REGISTER, hid0))) return -1; if (HTM_ERR(pib_write(&htm->target, HTM_COLLECTION_MODE,0))) @@ -945,7 +976,7 @@ static int do_htm_reset(struct htm *htm, bool wrap) /* Stolen from p8chip.c */ #define RAS_MODE_REG 0x1 #define MR_THREAD_IN_DEBUG PPC_BIT(43) -static int htm_toggle_debug_bit(struct htm *htm) +static int post_configure_chtm_p8(struct htm *htm) { struct pdbg_target *target; struct pdbg_target *core; @@ -959,8 +990,7 @@ static int htm_toggle_debug_bit(struct htm *htm) /* FIXME: this is a hack for P8 */ if (!pdbg_target_compatible(core, "ibm,power8-core")) { - PR_ERROR("HTM is POWER8 only currently\n"); - return -1; + return 0; } pdbg_for_each_target("thread", core, target) { @@ -996,7 +1026,7 @@ static int __do_htm_start(struct htm *htm, bool wrap) if (HTM_ERR(pib_write(&htm->target, reg_off(htm, HTM_SCOM_TRIGGER), HTM_TRIG_START))) return -1; - if (htm_toggle_debug_bit(htm)) + if (post_configure_chtm_p8(htm)) return -1; /* From patchwork Mon Aug 2 05:41:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1512291 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; 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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id 189sm1741852pfx.135.2021.08.01.22.41.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:41:36 -0700 (PDT) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Mon, 2 Aug 2021 15:41:05 +1000 Message-Id: <20210802054112.461728-6-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802054112.461728-1-jniethe5@gmail.com> References: <20210802054112.461728-1-jniethe5@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 02 Aug 2021 16:56:28 +1000 Subject: [Pdbg] [PATCH 05/12] libpdbg: Add chtm hardware unit for p10 X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Niethe Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" p10 adds a Core HTM again. There is a hardware issue when the chtm is in non-wrapping mode and changes to the stopped state the machine will checkstop. Work around this by masking the FIR bit that is raised. Add support for the p10 chtm. Signed-off-by: Jordan Niethe --- libpdbg/htm.c | 150 ++++++++++++++++++++++++++++++++++++++++++++++++-- p10.dts.m4 | 7 +++ 2 files changed, 151 insertions(+), 6 deletions(-) diff --git a/libpdbg/htm.c b/libpdbg/htm.c index 6a6ffeca12a5..a2c548487ac9 100644 --- a/libpdbg/htm.c +++ b/libpdbg/htm.c @@ -56,6 +56,17 @@ HID0_SINGLE_DECODE | HID0_EN_INST_TRACE |\ HID0_TRACE_EN) +#define HIDQ_REGISTER 0x20028415 +#define HIDQ_ONE_PPC PPC_BIT(0) +#define HIDQ_EN_INST_TRACE PPC_BIT(1) +#define HIDQ_HILE PPC_BIT(4) +#define HIDQ_DIS_PROC_REC PPC_BIT(5) +#define HIDQ_TRACE_BITS (HIDQ_ONE_PPC | HIDQ_EN_INST_TRACE) + +#define CORE_FIR 0x20028440 +#define CORE_FIR_PC_LOGIC PPC_BIT(45) +#define CORE_FIR_AND 0x20028441 +#define CORE_FIR_MASK 0x20028443 /* * This is a CORE register not a HTM register, don't pass the HTM * target to it. @@ -63,14 +74,22 @@ #define NCU_MODE_REGISTER 0x10C0A #define NCU_MODE_HTM_ENABLE PPC_BIT(0) +#define IMA_EVENT_MASK 0x20020400 + #define HTM_COLLECTION_MODE 0 #define HTM_MODE_ENABLE PPC_BIT(0) #define HTM_MODE_CONTENT_SEL PPC_BITMASK(1,2) +#define HTM_MODE_CORE_TRACE_EN PPC_BIT(1) +#define HTM_MODE_LLAT_TRACE_EN PPC_BIT(2) +#define HTM_MODE_DMW_TRACE_EN PPC_BIT(3) #define NHTM_MODE_CAPTURE PPC_BITMASK(4,12) #define NHTM_MODE_CAPTURE_PMISC PPC_BIT(5) #define NHTM_MODE_CRESP_PRECISE PPC_BIT(6) #define CHTM_MODE_NO_ASSERT_LLAT_L3 PPC_BIT(6) #define HTM_MODE_WRAP PPC_BIT(13) +#define HTM_MODE_DIS_TIMESTAMP PPC_BIT(14) +#define HTM_MODE_FULL_ON_ERR PPC_BIT(8) +#define HTM_MODE_DISABLE_STALL PPC_BIT(16) #define HTM_MEMORY_CONF 1 #define HTM_MEM_ALLOC PPC_BIT(0) #define HTM_MEM_SCOPE PPC_BITMASK(1,3) @@ -108,6 +127,8 @@ #define HTM1_STATUS_STATE_MASK (PPC_BITMASK(28,36) | HTM_STATUS_REPAIR) #define HTM1_STATUS_ERROR_MASK (HTM_STATUS_CRESP_OV | PPC_BITMASK(24,27) | PPC_BITMASK(37,39)) #define HTM_STATUS_MASK PPC_BITMASK(2,19) +#define HTM_STATUS_PURGING PPC_BIT(0) +#define HTM_STATUS_PURGED PPC_BIT(1) #define HTM_STATUS_CRESP_OV PPC_BIT(2) #define HTM_STATUS_REPAIR PPC_BIT(3) #define HTM_STATUS_BUF_WAIT PPC_BIT(4) @@ -142,7 +163,11 @@ #define HTM_TRIG_MARK_TYPE PPC_BITMASK(6,15) #define HTM_TRIGGER_CONTROL 5 #define HTM_CTRL_TRIG PPC_BITMASK(0,1) +#define HTM_CTRL_MTSPR_TRIG PPC_BIT(2) +#define HTM_CTRL_MTSPR_MARKER PPC_BIT(3) #define HTM_CTRL_MASK PPC_BITMASK(4,5) +#define HTM_CTRL_DBG_TRIG0 PPC_BIT(6) +#define HTM_CTRL_DBG_TRIG1 PPC_BIT(7) #define HTM_CTRL_XSTOP_STOP PPC_BIT(13) #define NHTM_FILTER_CONTROL 6 #define NHTM_FILTER_RCMD_SCOPE PPC_BITMASK(17,19) @@ -166,6 +191,10 @@ #define NHTM_FLEX_DEFAULT_P10 0xCB34561567 #define NHTM_ADDR_PAT 0xb #define NHTM_ADDR_PAT_MASK PPC_BITMASK(0, 55) +#define CHTM_PDBAR 0x0b +#define CHTM_PDBAR_PARITY PPC_BIT(0) +#define CHTM_PDBAR_SCOPE PPC_BITMASK(5, 7) +#define CHTM_PDBAR_ADDR PPC_BITMASK(12, 52) #define NHTM_ADDR_MASK 0xc #define NHTM_ADDR_MASK_MASK PPC_BITMASK(0, 55) #define NHTM_STOP_FILTER 0xd @@ -460,6 +489,9 @@ static int get_status(struct htm *htm, struct htm_status *status) if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { status->mem_size_select = val & HTM_MEM_SIZE_SMALL_P10; status->mem_base = val & HTM_MEM_BASE_P10; + } else if (pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) { + status->mem_size_select = val & HTM_MEM_SIZE_SMALL_P10; + status->mem_base = val & HTM_MEM_BASE_P10; } else if (pdbg_target_compatible(&htm->target, "ibm,power9-nhtm")) { status->mem_size_select = val & HTM_MEM_SIZE_SMALL_P9; status->mem_base = val & HTM_MEM_BASE_P9; @@ -618,6 +650,23 @@ static int configure_chtm_p8(struct htm *htm) return 0; } + +static int configure_chtm_p10(struct htm *htm) +{ + struct pdbg_target *core; + uint64_t mask; + + /* P10 only: mask PC Logic checkstop in wrapping mode */ + if (pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) { + core = pdbg_target_require_parent("core", &htm->target); + if (HTM_ERR(pib_read(core, CORE_FIR_MASK, &mask))) + return -1; + if (HTM_ERR(pib_write(core, CORE_FIR_MASK, mask | CORE_FIR_PC_LOGIC))) + return -1; + } + return 0; +} + static int configure_chtm(struct htm *htm, bool wrap) { uint64_t val; @@ -630,16 +679,14 @@ static int configure_chtm(struct htm *htm, bool wrap) val = wrap ? HTM_MODE_WRAP : 0; if (HTM_ERR(pib_write(&htm->target, HTM_COLLECTION_MODE, - HTM_MODE_ENABLE | val))) + HTM_MODE_ENABLE | HTM_MODE_DIS_TIMESTAMP | + HTM_MODE_CORE_TRACE_EN | val))) return -1; if (configure_chtm_p8(htm) < 0) return -1; - if (HTM_ERR(pib_read(core, NCU_MODE_REGISTER, &ncu))) - return -1; - ncu |= NCU_MODE_HTM_ENABLE; - if (HTM_ERR(pib_write(core, NCU_MODE_REGISTER, ncu))) + if (configure_chtm_p10(htm) < 0) return -1; return 0; @@ -668,6 +715,25 @@ static int deconfigure_chtm_p8(struct htm *htm) return 0; } +static int deconfigure_chtm_p10(struct htm *htm) +{ + struct pdbg_target *core; + uint64_t mask; + + if (pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) { + core = pdbg_target_require_parent("core", &htm->target); + /* clear fir first before unmasking it */ + if (HTM_ERR(pib_write(core, CORE_FIR_AND, ~CORE_FIR_PC_LOGIC))) + return -1; + if (HTM_ERR(pib_read(core, CORE_FIR_MASK, &mask))) + return -1; + if (HTM_ERR(pib_write(core, CORE_FIR_MASK, mask & ~CORE_FIR_PC_LOGIC))) + return -1; + } + + return 0; +} + static int deconfigure_chtm(struct htm *htm) { @@ -677,6 +743,7 @@ static int deconfigure_chtm(struct htm *htm) if (deconfigure_chtm_p8(htm) < 0) return -1; + if (deconfigure_chtm_p10(htm) < 0) return -1; if (HTM_ERR(pib_write(&htm->target, HTM_COLLECTION_MODE,0))) @@ -922,6 +989,8 @@ static int configure_memory(struct htm *htm) small = 1; if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) val = SETFIELD(HTM_MEM_SIZE_SMALL_P10, val, small); + else if (pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) + val = SETFIELD(HTM_MEM_SIZE_SMALL_P10, val, small); else if (pdbg_target_compatible(&htm->target, "ibm,power9-nhtm")) val = SETFIELD(HTM_MEM_SIZE_SMALL_P9, val, small); else @@ -940,6 +1009,8 @@ static int configure_memory(struct htm *htm) */ if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) val = SETFIELD(HTM_MEM_BASE_P10, val, 0); + else if (pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) + val = SETFIELD(HTM_MEM_BASE_P10, val, 0); else if (pdbg_target_compatible(&htm->target, "ibm,power9-nhtm")) val = SETFIELD(HTM_MEM_BASE_P9, val, 0); else @@ -1004,6 +1075,41 @@ static int post_configure_chtm_p8(struct htm *htm) return 0; } +static int post_configure_chtm_p10(struct htm *htm) +{ + struct pdbg_target *core; + uint64_t hid0; + + if (pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) { + core = pdbg_target_require_parent("core", &htm->target); + if (HTM_ERR(pib_read(core, HIDQ_REGISTER, &hid0))) + return -1; + hid0 = HIDQ_ONE_PPC | HIDQ_DIS_PROC_REC | HIDQ_HILE; + if (HTM_ERR(pib_write(core, HIDQ_REGISTER, hid0))) + return -1; + hid0 |= HIDQ_EN_INST_TRACE; + if (HTM_ERR(pib_write(core, HIDQ_REGISTER, hid0))) + return -1; + } + + return 0; +} + +static int pre_deconfigure_chtm_p10(struct htm *htm) +{ + struct pdbg_target *core; + uint64_t hid0; + + if (pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) { + core = pdbg_target_require_parent("core", &htm->target); + hid0 = HIDQ_DIS_PROC_REC | HIDQ_HILE; + if (HTM_ERR(pib_write(core, HIDQ_REGISTER, hid0))) + return -1; + } + + return 0; +} + static int __do_htm_start(struct htm *htm, bool wrap) { struct htm_status status; @@ -1026,9 +1132,19 @@ static int __do_htm_start(struct htm *htm, bool wrap) if (HTM_ERR(pib_write(&htm->target, reg_off(htm, HTM_SCOM_TRIGGER), HTM_TRIG_START))) return -1; + while (1) { + if (HTM_ERR(get_status(htm, &status))) + return -1; + if (status.state == TRACING) + break; + } + if (post_configure_chtm_p8(htm)) return -1; + if (post_configure_chtm_p10(htm)) + return -1; + /* * Instead of the HTM_TRIG_START, this is where you might want * to call do_adu_magic() @@ -1047,6 +1163,7 @@ static int do_htm_start(struct htm *htm) static int do_htm_stop(struct htm *htm) { struct htm_status status; + get_status(htm, &status); if (HTM_ERR(get_status(htm, &status))) return -1; @@ -1055,6 +1172,10 @@ static int do_htm_stop(struct htm *htm) PR_INFO("* Skipping STOP trigger, HTM appears uninitialized\n"); return -1; } + + if (pre_deconfigure_chtm_p10(htm) < 0) + return -1; + if (status.state == TRACING) { PR_INFO("* Sending STOP trigger to HTM\n"); if (HTM_ERR(pib_write(&htm->target, reg_off(htm, HTM_SCOM_TRIGGER), HTM_TRIG_STOP))) @@ -1255,7 +1376,8 @@ static int do_htm_dump(struct htm *htm, char *filename) goto out3; } - if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm")) { + if (pdbg_target_compatible(&htm->target, "ibm,power10-nhtm") || + pdbg_target_compatible(&htm->target, "ibm,power10-chtm")) { lseek(trace_fd, 8, SEEK_SET); r = read(trace_fd, &eyecatcher, 8); } else { @@ -1434,6 +1556,21 @@ static struct htm p10_nhtm = { }; DECLARE_HW_UNIT(p10_nhtm); +static struct htm p10_chtm = { + .target = { + .name = "POWER10 Core HTM", + .compatible = "ibm,power10-chtm", + .class = "chtm", + .probe = chtm_probe, + }, + .start = do_htm_start, + .stop = do_htm_stop, + .record = do_htm_record, + .status = do_htm_status, + .dump = do_htm_dump, +}; +DECLARE_HW_UNIT(p10_chtm); + __attribute__((constructor)) static void register_htm(void) { @@ -1441,4 +1578,5 @@ static void register_htm(void) pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p9_nhtm_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_nhtm_hw_unit); pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p8_chtm_hw_unit); + pdbg_hwunit_register(PDBG_DEFAULT_BACKEND, &p10_chtm_hw_unit); } diff --git a/p10.dts.m4 b/p10.dts.m4 index d58086962bfb..492bae638bfc 100644 --- a/p10.dts.m4 +++ b/p10.dts.m4 @@ -29,6 +29,13 @@ define(`CORE', THREAD(1) THREAD(2) THREAD(3) + + htm@20010680 { + compatible = "ibm,power10-chtm"; + reg = < 0x20010680 >; + index = < 0x$1 >; + }; + }; ')dnl From patchwork Mon Aug 2 05:41:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1512292 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; 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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id 189sm1741852pfx.135.2021.08.01.22.41.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:41:38 -0700 (PDT) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Mon, 2 Aug 2021 15:41:06 +1000 Message-Id: <20210802054112.461728-7-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802054112.461728-1-jniethe5@gmail.com> References: <20210802054112.461728-1-jniethe5@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 02 Aug 2021 16:56:28 +1000 Subject: [Pdbg] [PATCH 06/12] main: cpus_parse() should fail if get_pir() fails X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Niethe Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Jordan Niethe --- src/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/main.c b/src/main.c index 5d16a7dbac18..b2474d87135a 100644 --- a/src/main.c +++ b/src/main.c @@ -499,7 +499,7 @@ static bool parse_options(int argc, char *argv[]) if (l_list[i] == 1) { pir = get_pir(i); if (pir < 0) - return true; + return false; pir_map(pir, &chip, &core, &thread); From patchwork Mon Aug 2 05:41:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1512293 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=Xagd0ljz; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GdTLp5sZ5z9sfG for ; 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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id 189sm1741852pfx.135.2021.08.01.22.41.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:41:40 -0700 (PDT) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Mon, 2 Aug 2021 15:41:07 +1000 Message-Id: <20210802054112.461728-8-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802054112.461728-1-jniethe5@gmail.com> References: <20210802054112.461728-1-jniethe5@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 02 Aug 2021 16:56:28 +1000 Subject: [Pdbg] [PATCH 07/12] main: Use pdbg_get_proc() for mapping to linux CPUs X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Niethe Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Use pdbg_get_proc() instead of device_node for mapping to linux CPUs. Now it is not required to use device (-d) when using the -l option. Signed-off-by: Jordan Niethe --- src/main.c | 67 ++++++++++++++++++++++++++++++++---------------------- 1 file changed, 40 insertions(+), 27 deletions(-) diff --git a/src/main.c b/src/main.c index b2474d87135a..4c117f68bab5 100644 --- a/src/main.c +++ b/src/main.c @@ -59,6 +59,8 @@ static int i2c_addr = 0x50; static const char *pathsel[MAX_PATH_ARGS]; static int pathsel_count; +static int l_list[MAX_LINUX_CPUS]; +static int l_count; static int probe(void); @@ -131,7 +133,6 @@ static void print_usage(void) printf("\t-t, --thread=<0-%d>||\n", MAX_THREADS-1); #ifdef TARGET_PPC printf("\t-l, --cpu=<0-%d>||\n", MAX_PROCESSORS-1); - printf("\t\tRequires device (-d) to be set to p8|p9\n"); #endif printf("\t-P, --path=\n"); printf("\t-a, --all\n"); @@ -205,25 +206,32 @@ out2: #define P8_PIR2COREID(pir) (((pir) >> 3) & 0xf) #define P8_PIR2THREADID(pir) ((pir) & 0x7) -void pir_map(int pir, int *chip, int *core, int *thread) +bool pir_map(int pir, int *chip, int *core, int *thread) { assert(chip && core && thread); - if (!strncmp(device_node, "p9", 2)) { + switch (pdbg_get_proc()) { + case PDBG_PROC_P9: *chip = P9_PIR2GCID(pir); *core = P9_PIR2COREID(pir); *thread = P9_PIR2THREADID(pir); - } else if (!strncmp(device_node, "p8", 2)) { + break; + case PDBG_PROC_P8: *chip = P8_PIR2GCID(pir); *core = P8_PIR2COREID(pir); *thread = P8_PIR2THREADID(pir); - } else if (!strncmp(device_node, "p10", 2)) { + break; + case PDBG_PROC_P10: *chip = P10_PIR2GCID(pir); *core = P10_PIR2COREID(pir); *thread = P10_PIR2THREADID(pir); - } else - assert(0); + break; + default: + PR_ERROR("Unable to determine processor type for mapping to Linux CPU number\n"); + return false; + } + return true; } #define PPC_OPTS "l:" @@ -290,8 +298,7 @@ static bool parse_options(int argc, char *argv[]) int p_list[MAX_PROCESSORS]; int c_list[MAX_CHIPS]; int t_list[MAX_THREADS]; - int l_list[MAX_LINUX_CPUS]; - int p_count = 0, c_count = 0, t_count = 0, l_count = 0; + int p_count = 0, c_count = 0, t_count = 0; int i; struct option long_opts[] = { {"all", no_argument, NULL, 'a'}, @@ -489,33 +496,34 @@ static bool parse_options(int argc, char *argv[]) return false; } - if (l_count) { - int pir = -1, i, chip, core, thread; + return true; +} - if (!device_node) - return false; +bool cpus_parse(int args[], int arg_count) +{ + int pir = -1, i, chip, core, thread; - for (i = 0; i < MAX_LINUX_CPUS; i++) { - if (l_list[i] == 1) { - pir = get_pir(i); - if (pir < 0) - return false; + for (i = 0; i < MAX_LINUX_CPUS; i++) { + if (args[i] == 1) { + pir = get_pir(i); + if (pir < 0) + return false; - pir_map(pir, &chip, &core, &thread); + if (!pir_map(pir, &chip, &core, &thread)) + return false; - if (!pathsel_add("pib%d", chip)) - return false; - if (!pathsel_add("pib%d/core%d", chip, core)) - return false; - if (!pathsel_add("pib%d/core%d/thread%d", chip, core, thread)) - return false; - } + if (!pathsel_add("pib%d", chip)) + return false; + if (!pathsel_add("pib%d/core%d", chip, core)) + return false; + if (!pathsel_add("pib%d/core%d/thread%d", chip, core, thread)) + return false; } } - return true; } + static void print_target(struct pdbg_target *target, int level) { int i; @@ -587,6 +595,11 @@ int main(int argc, char *argv[]) if (!pdbg_targets_init(NULL)) return 1; + if (l_count) { + if (!cpus_parse(l_list, l_count)) + return 1; + } + if (pathsel_count) { if (!path_target_parse(pathsel, pathsel_count)) return 1; From patchwork Mon Aug 2 05:41:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1512294 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=csSiVEtx; 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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id 189sm1741852pfx.135.2021.08.01.22.41.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:41:42 -0700 (PDT) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Mon, 2 Aug 2021 15:41:08 +1000 Message-Id: <20210802054112.461728-9-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802054112.461728-1-jniethe5@gmail.com> References: <20210802054112.461728-1-jniethe5@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 02 Aug 2021 16:56:28 +1000 Subject: [Pdbg] [PATCH 08/12] htm: Only check threads for smt1 on target core X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Niethe Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Targeting every thread is not necessary, instead only target the threads of the targeted core. Signed-off-by: Jordan Niethe --- src/htm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/htm.c b/src/htm.c index e0c746d810d2..a08f244b2a3c 100644 --- a/src/htm.c +++ b/src/htm.c @@ -291,7 +291,7 @@ int run_htm(int optind, int argc, char *argv[]) } /* Check that powersave is off */ - pdbg_for_each_class_target("thread", target) { + pdbg_for_each_target("thread", core_target, target) { status = pdbg_target_probe(target); if (status == PDBG_TARGET_NONEXISTENT) continue; From patchwork Mon Aug 2 05:41:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1512295 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=vdeteCAj; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GdTLr08NVz9t23 for ; Mon, 2 Aug 2021 16:56:36 +1000 (AEST) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4GdTLq6WYPz30C6 for ; Mon, 2 Aug 2021 16:56:35 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=vdeteCAj; dkim-atps=neutral X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::102d; helo=mail-pj1-x102d.google.com; envelope-from=jniethe5@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=vdeteCAj; dkim-atps=neutral Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4GdRhW44Gvz3022 for ; Mon, 2 Aug 2021 15:41:47 +1000 (AEST) Received: by mail-pj1-x102d.google.com with SMTP id ca5so23669999pjb.5 for ; Sun, 01 Aug 2021 22:41:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cUlxtdxmiJ77kEISjPwWSLLGRMWsA8qzaVVp2qn1j/4=; b=vdeteCAjvpSzXcUK5b5l0dZbyNzz20PrzbEyKez4pRHHh+891fdswDDX1Nbi7EpsnE buRxiWmLReB1A9XCm2J0GSwGjLBYbKEflsMmUxaOb+E8WhXaBgsRdZoaIeBy7adiPY37 vwyLweNlHYpDe546JSPcu9ay1JWAWAnauwGJAgRxIbJX9Tl9Ll2tuqeHBlVqcEoK3IM+ 4/qSvDzQV6KaBO8zy96L8EOl2cxnn5RWnzFA8834EQhe6oOSL61OK7JyiiVeeZai883l I2T0qs3xhxyUe/n3sWiLuwNJBHyjtoMHM9aAHLjU93y7rtwqeY0NDB2GokfzLzqjjXTM Iggg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cUlxtdxmiJ77kEISjPwWSLLGRMWsA8qzaVVp2qn1j/4=; b=QLEEA6ioZdqZ9Tm01478SfIjhEpRaLLhGZB4a8tW6w/FjqrqltGuN4bXXh1o7v2HsT VAY3anA57fIb//+0UR7OmVJVz7gDo8xuJ0bw8rlB5D3v1+q8mPAbG2Q1ipLiWL+Ilb4O oEpQ1fvnnBJAQvNRJAwCunsaqYMQFXzhmusgRDrNnpBrRGd6dXnpIcVIsVTk1JIw2Snp 1Ybwxu56Y4OZlXPUloORSRozGfwOJy80QaVGZNnPi727SvB2yM8rUdUZEEQZzg2zXnB/ ezOj+JU+TiDPhTquWjs9/gZVElYdU2QOJ1zE/EHL8dRtLhNBQrTokV2D1ZqhyPYgaixD xBJw== X-Gm-Message-State: AOAM5338hUhMKaG5NYqTwu5nLmIkmAo8348dvBSp3400wBEJoESnq7Dm V4OdS46opf/n5HVWTZgTajmo/KVlnpc= X-Google-Smtp-Source: ABdhPJxgmNIflc4qbJRGgbCmNtrV8EiVX3DVCX2h3k29ELk8bSkjdPgfFIoc+h2afClhViLHR6KPWQ== X-Received: by 2002:a17:902:7c8d:b029:12b:793e:9f26 with SMTP id y13-20020a1709027c8db029012b793e9f26mr146812pll.84.1627882904912; Sun, 01 Aug 2021 22:41:44 -0700 (PDT) Received: from tee480.ozlabs.ibm.com (159-196-117-139.9fc475.syd.nbn.aussiebb.net. [159.196.117.139]) by smtp.gmail.com with ESMTPSA id 189sm1741852pfx.135.2021.08.01.22.41.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:41:44 -0700 (PDT) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Mon, 2 Aug 2021 15:41:09 +1000 Message-Id: <20210802054112.461728-10-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802054112.461728-1-jniethe5@gmail.com> References: <20210802054112.461728-1-jniethe5@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 02 Aug 2021 16:56:28 +1000 Subject: [Pdbg] [PATCH 09/12] main: Improve get_pir() error message X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Niethe Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" The error message from get_pir() can be misleading if not ran as root. That is you may be using a valid linux CPU number but simply lack the required permissions. Indicate this possiblity in the error message. Signed-off-by: Jordan Niethe --- src/main.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/src/main.c b/src/main.c index 4c117f68bab5..70e7b05b4321 100644 --- a/src/main.c +++ b/src/main.c @@ -178,8 +178,15 @@ int get_pir(int linux_cpu) file = fopen(filename, "r"); if (!file) { - PR_ERROR("Invalid Linux CPU number %" PRIi32 "\n", linux_cpu); - goto out2; + switch (errno) { + case ENOENT: + PR_ERROR("Invalid Linux CPU number %" PRIi32 "\n", linux_cpu); + goto out2; + case EACCES: + default: + PR_ERROR("Can't access %s. Try running as root\n", filename); + goto out2; + } } if(fscanf(file, "%" PRIx32 "\n", &pir) != 1) { From patchwork Mon Aug 2 05:41:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1512296 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=aiBIn2VR; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GdTLr5gQSz9sfG for ; Mon, 2 Aug 2021 16:56:36 +1000 (AEST) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4GdTLr4d9Gz308t for ; Mon, 2 Aug 2021 16:56:36 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=aiBIn2VR; dkim-atps=neutral X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::102f; helo=mail-pj1-x102f.google.com; envelope-from=jniethe5@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=aiBIn2VR; dkim-atps=neutral Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4GdRhY6QCYz3022 for ; Mon, 2 Aug 2021 15:41:49 +1000 (AEST) Received: by mail-pj1-x102f.google.com with SMTP id o44-20020a17090a0a2fb0290176ca3e5a2fso23137760pjo.1 for ; Sun, 01 Aug 2021 22:41:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=B6+K/wWcQ98QT35LNxhOd1ZaRzyCLW3hczTnMXZrkRE=; b=aiBIn2VRBnr+VLkpdVRvuO84oJvIcLNjG9/n7zIGGitZnsBKkG0H6QrQ4rWf0QuK7w HIPlcziJJXTsGY4IVA3ikK6z2d4BOmx511nJ6o61uMqKxhWlRyErTDIovynToNfXXZos LWjs5ACZ41Hv0RqVLWQmQuubREGBh9zW6FwfzMafUp6oQ1dTXO7fHI5o3H11O+ZQecpT rI+2oxvTyLMjQrkdMUbHvV25+BrjdXLPvq/mW0ddIsBDbwswsBZXCObmVnG0QjfCifKe Hf6v0VT3OhOKRHC/nXux7/8zW6YLNPT6HRj0Tgwkz2baq/GASFaVStM6r3g0x140e2RM J16Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=B6+K/wWcQ98QT35LNxhOd1ZaRzyCLW3hczTnMXZrkRE=; b=POd3OQxfiuT5RW5+Bjqc6swbqCb+zU5PWyJafLGg35dTh33jzVtRphxRN3VbepPcpF DCPYC2nQNgoE81JIkeeGcSYyAwuQQr0IHNvRoPfxwShxx4F2EwSp/N+eu/Oarwq4GAIE vDJSX8KsszgwDdNAuIEv+UhDNfrJfa8w4BO/CmJhCr9VyjhGwJZXzgL55kHRXo7fSe2e CJdSFRklTGWcjyYWAsUa1g8c72af6BKkK0wpKigZVGjht5K8KS+zDQadxDpNfenXacsZ L9V+e6n5WSFo6uvS5+sjovsdJD31OZbSuWaJ0k/YiV9nBJlkuLJ5/TnmQleXGvHm68Si 1D6w== X-Gm-Message-State: AOAM5324ikPYl9rKeU/dVUv+JwEaaGIvITBkevwwnksZHWwkWSr1om2X 5AoEHJYVpBUjEpJ26+sow4iEEzR++/s= X-Google-Smtp-Source: ABdhPJwie3aW5y72iZvZyZ1flEA0BqI+Cl0476Db/kzY+k32Iq2eeLmgmdePLKYryoDlKaNwnFGX4Q== X-Received: by 2002:a05:6a00:2b5:b029:3bc:3183:c370 with SMTP id q21-20020a056a0002b5b02903bc3183c370mr4293888pfs.68.1627882907202; Sun, 01 Aug 2021 22:41:47 -0700 (PDT) Received: from tee480.ozlabs.ibm.com (159-196-117-139.9fc475.syd.nbn.aussiebb.net. [159.196.117.139]) by smtp.gmail.com with ESMTPSA id 189sm1741852pfx.135.2021.08.01.22.41.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:41:46 -0700 (PDT) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Mon, 2 Aug 2021 15:41:10 +1000 Message-Id: <20210802054112.461728-11-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802054112.461728-1-jniethe5@gmail.com> References: <20210802054112.461728-1-jniethe5@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 02 Aug 2021 16:56:28 +1000 Subject: [Pdbg] [PATCH 10/12] htm: Check threads !active instead of quiesced X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Niethe Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" The P10 thread_state quiesced status is maint_mode && thread_quiesced && ict_empty which is more than is needed for taking a core HTM trace. Instead check the secondary threads are !active. Signed-off-by: Jordan Niethe --- src/htm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/htm.c b/src/htm.c index a08f244b2a3c..ba1175e110f3 100644 --- a/src/htm.c +++ b/src/htm.c @@ -230,7 +230,7 @@ static bool is_smt1(struct pdbg_target *target) } /* secondary thread */ - if (thread_status(target).quiesced) + if (!thread_status(target).active) return true; fail: From patchwork Mon Aug 2 05:41:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1512297 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=2404:9400:2:0:216:3eff:fee1:b9f1; helo=lists.ozlabs.org; envelope-from=pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=HSLh/ddq; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2404:9400:2:0:216:3eff:fee1:b9f1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GdTLs2mncz9t6S for ; Mon, 2 Aug 2021 16:56:37 +1000 (AEST) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4GdTLs1gHCz309p for ; Mon, 2 Aug 2021 16:56:37 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=HSLh/ddq; dkim-atps=neutral X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::1035; helo=mail-pj1-x1035.google.com; envelope-from=jniethe5@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=HSLh/ddq; dkim-atps=neutral Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4GdRhb31W5z3022 for ; Mon, 2 Aug 2021 15:41:51 +1000 (AEST) Received: by mail-pj1-x1035.google.com with SMTP id u13-20020a17090abb0db0290177e1d9b3f7so850189pjr.1 for ; Sun, 01 Aug 2021 22:41:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jIqsR/EceeHyBjm1BgovHNcQDBnTFyMto1l76RAXObI=; b=HSLh/ddqjAHkyPY+CyINjfC3Vw+oD0amdvrxilXnQydNNCAO5HhErowYfdQlEBMils EAsc9pSDjXze+KD0M7E8llBhVU0TutUdJ4wFPWqgQMdrSKLDWeWpCRKCLVJwXAUHUuCd zFYDJHWSPD0xsq052YV04MmKKH/oYAh3WbYzR8E10hL1NCUUglgo231sv1Ug/IGbpo43 1POHmYAyQVSi6sv74nhgtbRwPaz5KWd4MmvkRCR68hhEcgrsgh5As+Dzufybzldv5K6V e3gf6+7n6Xr0mHlsXeNIF4B39k2vCI9t1xHsx3uzJ+jMCa6A2en050bM/7vxhCoj4AEi cBFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jIqsR/EceeHyBjm1BgovHNcQDBnTFyMto1l76RAXObI=; b=FPMvfBF/IPzSYfRWRZTQ6MQTu4pG5Ka8glQ919nyJ0N1nEK5jYCbBYxn8FLeHpQ0FX q7KJzA4CgD1uYzV7UdlzdEEmIkfKOh4TWecI/AuTed2MIu34hH7CCydLTJKuiZn2nMQQ XpO2it5F53RdNHpNjlXoTTPW6WtSrqWvoPaFVwhdWWIofRxUNTKZHhV04frcomyQVnva zU12lu6Mh/4r5/l7pCarrvyQqwCTOnKLe9VirXx5Bjt8e3+/zGIQrryTCE6gDmFZ6KLc tutVRoN6zHuUmDwBfDuThjsdIUeJ95jdQh7Mnr3CPZZBKqqqAAOlfIcuPpx4EwP6BQLi MRyg== X-Gm-Message-State: AOAM5321XcFpWRjVTaLO/dxbhZjOhLYSemTkIQU5HftxBIKvuJ7qW+v7 5cCElTArSg6BGqn96BARpgCRi8rUYOY= X-Google-Smtp-Source: ABdhPJxgTuhA82PV7o064rWD07TAkOUi0CEBbBJiUBXWsZ/YRQJK16amTAmv+X1f4Fo+Sk8OrFW/tA== X-Received: by 2002:a17:902:ec85:b029:12c:6896:dd62 with SMTP id x5-20020a170902ec85b029012c6896dd62mr12183400plg.44.1627882909316; Sun, 01 Aug 2021 22:41:49 -0700 (PDT) Received: from tee480.ozlabs.ibm.com (159-196-117-139.9fc475.syd.nbn.aussiebb.net. [159.196.117.139]) by smtp.gmail.com with ESMTPSA id 189sm1741852pfx.135.2021.08.01.22.41.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:41:49 -0700 (PDT) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Mon, 2 Aug 2021 15:41:11 +1000 Message-Id: <20210802054112.461728-12-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802054112.461728-1-jniethe5@gmail.com> References: <20210802054112.461728-1-jniethe5@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 02 Aug 2021 16:56:28 +1000 Subject: [Pdbg] [PATCH 11/12] libpdbg: Warn if default_backend() falls back to fake backend X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Niethe Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Jordan Niethe --- libpdbg/dtb.c | 1 + 1 file changed, 1 insertion(+) diff --git a/libpdbg/dtb.c b/libpdbg/dtb.c index 331bd2cabbb2..2062c0b8db70 100644 --- a/libpdbg/dtb.c +++ b/libpdbg/dtb.c @@ -147,6 +147,7 @@ static enum pdbg_backend default_backend(void) return PDBG_BACKEND_KERNEL; } + pdbg_log(PDBG_WARNING, "Can not determine an appropriate backend. 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[159.196.117.139]) by smtp.gmail.com with ESMTPSA id 189sm1741852pfx.135.2021.08.01.22.41.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:41:51 -0700 (PDT) From: Jordan Niethe To: pdbg@lists.ozlabs.org Date: Mon, 2 Aug 2021 15:41:12 +1000 Message-Id: <20210802054112.461728-13-jniethe5@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802054112.461728-1-jniethe5@gmail.com> References: <20210802054112.461728-1-jniethe5@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 02 Aug 2021 16:56:28 +1000 Subject: [Pdbg] [PATCH 12/12] htm: Add newline to print_htm_address() for chtm X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Niethe Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" For nhtm, print_htm_address() prints a newline so do the same for chtm. Signed-off-by: Jordan Niethe --- src/htm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/htm.c b/src/htm.c index ba1175e110f3..b3b0e538f914 100644 --- a/src/htm.c +++ b/src/htm.c @@ -54,7 +54,7 @@ static inline void print_htm_address(enum htm_type type, { if (type == HTM_CORE) { printf("p%d:", pdbg_parent_index(target, "pib")); - printf("c%d:", pdbg_parent_index(target, "core")); + printf("c%d\n", pdbg_parent_index(target, "core")); } if (type == HTM_NEST) { printf("p%d\n", pdbg_parent_index(target, "pib"));