From patchwork Fri Jul 16 23:29:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 1506314 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4GRSBP4v0yz9sWc for ; Sat, 17 Jul 2021 09:29:33 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238130AbhGPXc0 (ORCPT ); Fri, 16 Jul 2021 19:32:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51838 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238186AbhGPXcY (ORCPT ); Fri, 16 Jul 2021 19:32:24 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A93FC06175F for ; Fri, 16 Jul 2021 16:29:29 -0700 (PDT) Received: from dude03.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::39]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1m4XGl-0002Kr-7f; Sat, 17 Jul 2021 01:29:23 +0200 From: Lucas Stach To: Shawn Guo , Rob Herring Cc: NXP Linux Team , Adam Ford , Frieder Schrempf , Peng Fan , Marek Vasut , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, patchwork-lst@pengutronix.de Subject: [PATCH 07/17] dt-bindings: soc: add binding for i.MX8MM VPU blk-ctrl Date: Sat, 17 Jul 2021 01:29:06 +0200 Message-Id: <20210716232916.3572966-8-l.stach@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210716232916.3572966-1-l.stach@pengutronix.de> References: <20210716232916.3572966-1-l.stach@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::39 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the DT binding for the i.MX8MM VPU blk-ctrl. Signed-off-by: Lucas Stach --- .../soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml new file mode 100644 index 000000000000..eea52eba2fa5 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8MM VPU blk-ctrl + +maintainers: + - Lucas Stach + +description: + The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to + the NoC and ensuring proper power sequencing of the VPU peripherals + located in the VPU domain of the SoC. + +properties: + compatible: + - const: fsl,imx8mm-vpu-blk-ctrl + - const: syscon + + reg: + maxItems: 1 + + "#power-domains-cells": + const: 1 + + power-domains: + minItems: 4 + maxItems: 4 + + power-domain-names: + minItems: 4 + maxItems: 4 + items: + - bus + - g1 + - g1 + - h1 + + clocks: + minItems: 3 + maxItems: 3 + + clock-names: + minItems: 3 + maxItems: 3 + items: + - g1 + - g2 + - h1 + +required: + - compatible + - reg + - power-domains + - power-domain-names + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include ; + power-domains = <&pgc_vpumix>, <&pgc_vpu_g1>, + <&pgc_vpu_g2>, <&pgc_vpu_h1>; + power-domain-names = "bus", "g1", "g2", "h1"; + clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>, + <&clk IMX8MM_CLK_VPU_G2_ROOT>, + <&clk IMX8MM_CLK_VPU_H1_ROOT>; + clock-names = "g1", "g2", "h1"; + #power-domain-cells = <1>; + }; From patchwork Fri Jul 16 23:29:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 1506315 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4GRSBQ0V3nz9sjD for ; Sat, 17 Jul 2021 09:29:34 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238186AbhGPXc0 (ORCPT ); Fri, 16 Jul 2021 19:32:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238210AbhGPXcZ (ORCPT ); Fri, 16 Jul 2021 19:32:25 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9F968C06175F for ; Fri, 16 Jul 2021 16:29:29 -0700 (PDT) Received: from dude03.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::39]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1m4XGl-0002Kr-R2; Sat, 17 Jul 2021 01:29:23 +0200 From: Lucas Stach To: Shawn Guo , Rob Herring Cc: NXP Linux Team , Adam Ford , Frieder Schrempf , Peng Fan , Marek Vasut , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, patchwork-lst@pengutronix.de Subject: [PATCH 08/17] dt-bindings: power: imx8mm: add defines for VPU blk-ctrl domains Date: Sat, 17 Jul 2021 01:29:07 +0200 Message-Id: <20210716232916.3572966-9-l.stach@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210716232916.3572966-1-l.stach@pengutronix.de> References: <20210716232916.3572966-1-l.stach@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::39 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the defines for the power domains provided by the VPU blk-ctrl. Signed-off-by: Lucas Stach --- include/dt-bindings/power/imx8mm-power.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dt-bindings/power/imx8mm-power.h b/include/dt-bindings/power/imx8mm-power.h index fc9c2e16aadc..38b0a56fd7d0 100644 --- a/include/dt-bindings/power/imx8mm-power.h +++ b/include/dt-bindings/power/imx8mm-power.h @@ -19,4 +19,8 @@ #define IMX8MM_POWER_DOMAIN_DISPMIX 10 #define IMX8MM_POWER_DOMAIN_MIPI 11 +#define IMX8MM_VPUBLK_PD_G1 0 +#define IMX8MM_VPUBLK_PD_G2 1 +#define IMX8MM_VPUBLK_PD_H1 2 + #endif From patchwork Fri Jul 16 23:29:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 1506316 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4GRSBQ34njz9t0G for ; Sat, 17 Jul 2021 09:29:34 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238373AbhGPXc0 (ORCPT ); Fri, 16 Jul 2021 19:32:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51852 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238347AbhGPXc0 (ORCPT ); Fri, 16 Jul 2021 19:32:26 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BCA94C061760 for ; Fri, 16 Jul 2021 16:29:30 -0700 (PDT) Received: from dude03.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::39]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1m4XGn-0002Kr-2F; Sat, 17 Jul 2021 01:29:25 +0200 From: Lucas Stach To: Shawn Guo , Rob Herring Cc: NXP Linux Team , Adam Ford , Frieder Schrempf , Peng Fan , Marek Vasut , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, patchwork-lst@pengutronix.de Subject: [PATCH 10/17] dt-bindings: soc: add binding for i.MX8MM DISP blk-ctrl Date: Sat, 17 Jul 2021 01:29:09 +0200 Message-Id: <20210716232916.3572966-11-l.stach@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210716232916.3572966-1-l.stach@pengutronix.de> References: <20210716232916.3572966-1-l.stach@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::39 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the DT binding for the i.MX8MM VPU blk-ctrl. Signed-off-by: Lucas Stach --- .../soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml | 97 +++++++++++++++++++ 1 file changed, 97 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml new file mode 100644 index 000000000000..a2c947b8dd52 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8MM DISP blk-ctrl + +maintainers: + - Lucas Stach + +description: + The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to + the NoC and ensuring proper power sequencing of the display and MIPI CSI + peripherals located in the DISP domain of the SoC. + +properties: + compatible: + - const: fsl,imx8mm-disp-blk-ctrl + - const: syscon + + reg: + maxItems: 1 + + "#power-domains-cells": + const: 1 + + power-domains: + minItems: 5 + maxItems: 5 + + power-domain-names: + minItems: 5 + maxItems: 5 + items: + - bus + - csi-bridge + - lcdif + - mipi-dsi + - mipi-csi + + clocks: + minItems: 10 + maxItems: 10 + + clock-names: + minItems: 10 + maxItems: 10 + items: + - csi-bridge-axi + - csi-bridge-apb + - csi-bridge-core + - lcdif-axi + - lcdif-apb + - lcdif-pix + - dsi-pclk + - dsi-ref + - csi-aclk + - csi-pclk + +required: + - compatible + - reg + - power-domains + - power-domain-names + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include ; + power-domains = <&pgc_dispmix>, <&pgc_dispmix>, <&pgc_dispmix>, + <&pgc_mipi>, <&pgc_mipi>; + power-domain-names = "bus", "csi-bridge", "lcdif", + "mipi-dsi", "mipi-csi"; + clocks = <&clk IMX8MM_CLK_DISP_AXI_ROOT>, + <&clk IMX8MM_CLK_DISP_APB_ROOT>, + <&clk IMX8MM_CLK_CSI1_ROOT>, + <&clk IMX8MM_CLK_DISP_AXI_ROOT>, + <&clk IMX8MM_CLK_DISP_APB_ROOT>, + <&clk IMX8MM_CLK_DISP_ROOT>, + <&clk IMX8MM_CLK_DSI_CORE>, + <&clk IMX8MM_CLK_DSI_PHY_REF>, + <&clk IMX8MM_CLK_CSI1_CORE>, + <&clk IMX8MM_CLK_CSI1_PHY_REF>; + clock-names = "csi-bridge-axi","csi-bridge-apb", "csi-bridge-core", + "lcdif-axi", "lcdif-apb", "lcdif-pix", "dsi-pclk", + "dsi-ref","csi-aclk", "csi-pclk"; + #power-domain-cells = <1>; + }; From patchwork Fri Jul 16 23:29:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 1506317 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4GRSBR2DNtz9sX2 for ; Sat, 17 Jul 2021 09:29:35 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238357AbhGPXc1 (ORCPT ); Fri, 16 Jul 2021 19:32:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238211AbhGPXc1 (ORCPT ); Fri, 16 Jul 2021 19:32:27 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF51DC061764 for ; Fri, 16 Jul 2021 16:29:31 -0700 (PDT) Received: from dude03.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::39]) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1m4XGn-0002Kr-M8; Sat, 17 Jul 2021 01:29:25 +0200 From: Lucas Stach To: Shawn Guo , Rob Herring Cc: NXP Linux Team , Adam Ford , Frieder Schrempf , Peng Fan , Marek Vasut , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de, patchwork-lst@pengutronix.de Subject: [PATCH 11/17] dt-bindings: power: imx8mm: add defines for DISP blk-ctrl domains Date: Sat, 17 Jul 2021 01:29:10 +0200 Message-Id: <20210716232916.3572966-12-l.stach@pengutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210716232916.3572966-1-l.stach@pengutronix.de> References: <20210716232916.3572966-1-l.stach@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::39 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: devicetree@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the defines for the power domains provided by the DISP blk-ctrl. Signed-off-by: Lucas Stach --- include/dt-bindings/power/imx8mm-power.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/dt-bindings/power/imx8mm-power.h b/include/dt-bindings/power/imx8mm-power.h index 38b0a56fd7d0..d7f7cdb5200f 100644 --- a/include/dt-bindings/power/imx8mm-power.h +++ b/include/dt-bindings/power/imx8mm-power.h @@ -23,4 +23,9 @@ #define IMX8MM_VPUBLK_PD_G2 1 #define IMX8MM_VPUBLK_PD_H1 2 +#define IMX8MM_DISPBLK_CSI_BRIDGE 0 +#define IMX8MM_DISPBLK_LCDIF 1 +#define IMX8MM_DISPBLK_MIPI_DSI 2 +#define IMX8MM_DISPBLK_MIPI_CSI 3 + #endif