From patchwork Thu Jul 1 07:45:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: liuhongt X-Patchwork-Id: 1499428 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=OHcl756/; dkim-atps=neutral Received: from sourceware.org (ip-8-43-85-97.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GFqyj3Cgwz9sWw for ; Thu, 1 Jul 2021 17:46:05 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id AC54F3835807 for ; Thu, 1 Jul 2021 07:46:01 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AC54F3835807 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1625125561; bh=1FYgEbuCj/XUcU4Q/LATj15bg67pJqESMxKl+16ya3A=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=OHcl756/28/FdUNdpjF78vvKY71tXoVWUqg2AUCNKBxJEPGaRYTZmfKg9gSu50nLE zll8MqtqRgjAZcITgW9zLvJat6NDLkhlAHK1XgXETM0LxAQwKaNan6JJ9jxcmUhIW4 RkZCxk4AJ+VNNk7ST299Ih9a4IpbBdphJBtXJvGw= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by sourceware.org (Postfix) with ESMTPS id 0BAD7384A028 for ; Thu, 1 Jul 2021 07:45:17 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0BAD7384A028 X-IronPort-AV: E=McAfee;i="6200,9189,10031"; a="269619824" X-IronPort-AV: E=Sophos;i="5.83,313,1616482800"; d="scan'208";a="269619824" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Jul 2021 00:45:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.83,313,1616482800"; d="scan'208";a="426087946" Received: from scymds01.sc.intel.com ([10.148.94.138]) by orsmga002.jf.intel.com with ESMTP; 01 Jul 2021 00:45:15 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.236.50]) by scymds01.sc.intel.com with ESMTP id 1617jD9g001020; Thu, 1 Jul 2021 00:45:14 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH] Fix typo in standard pattern name of trunc2. Date: Thu, 1 Jul 2021 15:45:13 +0800 Message-Id: <20210701074513.30551-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.18.1 X-Spam-Status: No, score=-12.3 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: liuhongt Reply-To: liuhongt Errors-To: gcc-patches-bounces+incoming=patchwork.ozlabs.org@gcc.gnu.org Sender: "Gcc-patches" Bootstrapped and regtested on x86_64-linux-gnu{-m32,}. Pushed to trunk as abvious fix. gcc/ChangeLog * config/i386/sse.md (trunc2): Refined to .. (trunc2): this. --- gcc/config/i386/sse.md | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index ffcc0c81964..c6be2aa144b 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -11199,12 +11199,14 @@ (define_insn_and_split "avx512vl_v8qi2_mask_store_2" (define_mode_iterator PMOV_SRC_MODE_4 [V4DI V2DI V4SI]) (define_mode_attr pmov_dst_4 [(V4DI "V4HI") (V2DI "V2HI") (V4SI "V4HI")]) +(define_mode_attr pmov_dst_4_lower + [(V4DI "v4hi") (V2DI "v2hi") (V4SI "v4hi")]) (define_mode_attr pmov_dst_zeroed_4 [(V4DI "V4HI") (V2DI "V6HI") (V4SI "V4HI")]) (define_mode_attr pmov_suff_4 [(V4DI "qw") (V2DI "qw") (V4SI "dw")]) -(define_expand "trunc2" +(define_expand "trunc2" [(set (match_operand: 0 "register_operand") (truncate: (match_operand:PMOV_SRC_MODE_4 1 "register_operand")))]